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Kernel/riscv64: Implement Processor::read_cpu_counter

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This simply reads the current cycle count from the cycle CSR.
x86-64 uses the similar rdtsc instruction here, which also may or may
not tick at a constant rate.
This commit is contained in:
Sönke Holz 2024-04-21 12:55:36 +02:00 committed by Andrew Kaster
parent c57e39d52b
commit 511e411def
Notes: sideshowbarker 2024-07-16 23:59:28 +09:00 
Author: https://github.com/spholz
Commit: https://github.com/SerenityOS/serenity/commit/511e411def
Pull-request: https://github.com/SerenityOS/serenity/pull/24055
Reviewed-by: https://github.com/ADKaster ✅
2 changed files with 2 additions and 1 deletions
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1
Kernel/Arch/riscv64/CSR.h
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@ -30,6 +30,7 @@ enum class Address : u16 {
SATP = 0x180, SATP = 0x180,
// Unprivileged Counters/Timers // Unprivileged Counters/Timers
CYCLE = 0xc00,
TIME = 0xc01, TIME = 0xc01,
}; };

2
Kernel/Arch/riscv64/Processor.h
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@ -211,7 +211,7 @@ ALWAYS_INLINE void ProcessorBase<T>::wait_check()
template<typename T> template<typename T>
ALWAYS_INLINE u64 ProcessorBase<T>::read_cpu_counter() ALWAYS_INLINE u64 ProcessorBase<T>::read_cpu_counter()
{ {
TODO_RISCV64(); return RISCV64::CSR::read(RISCV64::CSR::Address::CYCLE);
} }
} }