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Kernel/riscv64: Implement Processor::read_cpu_counter
This simply reads the current cycle count from the cycle CSR. x86-64 uses the similar rdtsc instruction here, which also may or may not tick at a constant rate.
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sideshowbarker
2024-07-16 23:59:28 +09:00
Author: https://github.com/spholz Commit: https://github.com/SerenityOS/serenity/commit/511e411def Pull-request: https://github.com/SerenityOS/serenity/pull/24055 Reviewed-by: https://github.com/ADKaster ✅
2 changed files with 2 additions and 1 deletions
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@ -30,6 +30,7 @@ enum class Address : u16 {
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SATP = 0x180,
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// Unprivileged Counters/Timers
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CYCLE = 0xc00,
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TIME = 0xc01,
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};
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@ -211,7 +211,7 @@ ALWAYS_INLINE void ProcessorBase<T>::wait_check()
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template<typename T>
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ALWAYS_INLINE u64 ProcessorBase<T>::read_cpu_counter()
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{
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TODO_RISCV64();
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return RISCV64::CSR::read(RISCV64::CSR::Address::CYCLE);
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}
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}
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