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aacb1f0bf4
Now that the old PCI::Device was removed, we can complete the PCI changes by making the PCI::DeviceController to be named PCI::Device. Really the entire purpose and the distinction between the two was about interrupts, but since this is no longer a problem, just rename it to simplify things further.
212 lines
6.2 KiB
C++
212 lines
6.2 KiB
C++
/*
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* Copyright (c) 2021, Idan Horowitz <idan.horowitz@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/NonnullOwnPtrVector.h>
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#include <AK/OwnPtr.h>
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#include <Kernel/Bus/PCI/Access.h>
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#include <Kernel/Bus/PCI/Device.h>
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#include <Kernel/IO.h>
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#include <Kernel/Interrupts/IRQHandler.h>
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#include <Kernel/Net/NetworkAdapter.h>
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#include <Kernel/Random.h>
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namespace Kernel {
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// RTL8618 / RTL8111 Driver based on https://people.freebsd.org/~wpaul/RealTek/RTL8111B_8168B_Registers_DataSheet_1.0.pdf
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class RTL8168NetworkAdapter final : public NetworkAdapter
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, public PCI::Device
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, public IRQHandler {
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public:
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static RefPtr<RTL8168NetworkAdapter> try_to_initialize(PCI::Address);
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virtual ~RTL8168NetworkAdapter() override;
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virtual void send_raw(ReadonlyBytes) override;
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virtual bool link_up() override { return m_link_up; }
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virtual bool link_full_duplex() override;
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virtual i32 link_speed() override;
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virtual StringView purpose() const override { return class_name(); }
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private:
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// FIXME: should this be increased? (maximum allowed here is 1024) - memory usage vs packet loss chance tradeoff
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static const size_t number_of_rx_descriptors = 64;
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static const size_t number_of_tx_descriptors = 16;
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RTL8168NetworkAdapter(PCI::Address, u8 irq);
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virtual bool handle_irq(const RegisterState&) override;
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virtual StringView class_name() const override { return "RTL8168NetworkAdapter"sv; }
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struct [[gnu::packed]] TXDescriptor {
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volatile u16 frame_length; // top 2 bits are reserved
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volatile u16 flags;
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volatile u16 vlan_tag;
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volatile u16 vlan_flags;
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volatile u32 buffer_address_low;
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volatile u32 buffer_address_high;
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// flags bit field
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static constexpr u16 Ownership = 0x8000u;
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static constexpr u16 EndOfRing = 0x4000u;
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static constexpr u16 FirstSegment = 0x2000u;
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static constexpr u16 LastSegment = 0x1000u;
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static constexpr u16 LargeSend = 0x800u;
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};
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static_assert(sizeof(TXDescriptor) == 16u);
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struct [[gnu::packed]] RXDescriptor {
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volatile u16 buffer_size; // top 2 bits are reserved
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volatile u16 flags;
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volatile u16 vlan_tag;
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volatile u16 vlan_flags;
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volatile u32 buffer_address_low;
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volatile u32 buffer_address_high;
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// flags bit field
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static constexpr u16 Ownership = 0x8000u;
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static constexpr u16 EndOfRing = 0x4000u;
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static constexpr u16 FirstSegment = 0x2000u;
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static constexpr u16 LastSegment = 0x1000u;
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static constexpr u16 MulticastPacket = 0x800u;
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static constexpr u16 PhysicalPacket = 0x400u;
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static constexpr u16 BroadcastPacket = 0x200u;
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static constexpr u16 WatchdogTimerExpired = 0x40;
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static constexpr u16 ErrorSummary = 0x20;
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static constexpr u16 RuntPacket = 0x10;
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static constexpr u16 CRCError = 0x8;
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};
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static_assert(sizeof(RXDescriptor) == 16u);
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enum class ChipVersion : u8 {
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Unknown = 0,
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Version1 = 1,
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Version2 = 2,
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Version3 = 3,
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Version4 = 4,
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Version5 = 5,
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Version6 = 6,
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Version7 = 7,
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Version8 = 8,
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Version9 = 9,
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Version10 = 10,
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Version11 = 11,
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Version12 = 12,
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Version13 = 13,
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Version14 = 14,
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Version15 = 15,
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Version16 = 16,
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Version17 = 17,
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Version18 = 18,
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Version19 = 19,
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Version20 = 20,
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Version21 = 21,
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Version22 = 22,
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Version23 = 23,
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Version24 = 24,
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Version25 = 25,
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Version26 = 26,
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Version27 = 27,
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Version28 = 28,
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Version29 = 29,
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Version30 = 30
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};
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void identify_chip_version();
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String possible_device_name();
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void reset();
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void read_mac_address();
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void set_phy_speed();
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void start_hardware();
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void initialize();
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void startup();
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void configure_phy();
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void configure_phy_b_1();
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void configure_phy_b_2();
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void configure_phy_e_2();
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void configure_phy_h_1();
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void configure_phy_h_2();
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void rar_exgmac_set();
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void hardware_quirks();
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void hardware_quirks_b_1();
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void hardware_quirks_b_2();
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void hardware_quirks_e_2();
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void hardware_quirks_h();
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void initialize_rx_descriptors();
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void initialize_tx_descriptors();
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void receive();
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void out8(u16 address, u8 data);
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void out16(u16 address, u16 data);
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void out32(u16 address, u32 data);
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void out64(u16 address, u64 data);
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u8 in8(u16 address);
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u16 in16(u16 address);
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u32 in32(u16 address);
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void phy_out(u8 address, u16 data);
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u16 phy_in(u8 address);
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void phy_update(u32 address, u32 set, u32 clear);
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struct PhyRegister {
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u16 address;
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u16 data;
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};
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void phy_out_batch(const PhyRegister[], size_t length);
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void extended_phy_out(u8 address, u16 data);
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u16 extended_phy_in(u8 address);
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struct EPhyUpdate {
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u32 offset;
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u16 clear;
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u16 set;
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};
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void extended_phy_initialize(const EPhyUpdate[], size_t length);
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void eri_out(u32 address, u32 mask, u32 data, u32 type);
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u32 eri_in(u32 address, u32 type);
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void eri_update(u32 address, u32 mask, u32 set, u32 clear, u32 type);
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struct ExgMacRegister {
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u16 address;
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u16 mask;
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u32 value;
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};
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void exgmac_out_batch(const ExgMacRegister[], size_t length);
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void csi_out(u32 address, u32 data);
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u32 csi_in(u32 address);
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void csi_enable(u32 bits);
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void ocp_out(u32 address, u32 data);
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u32 ocp_in(u32 address);
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void ocp_phy_out(u32 address, u32 data);
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u16 ocp_phy_in(u32 address);
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ChipVersion m_version { ChipVersion::Unknown };
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bool m_version_uncertain { true };
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IOAddress m_io_base;
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u32 m_ocp_base_address { 0 };
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OwnPtr<Memory::Region> m_rx_descriptors_region;
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NonnullOwnPtrVector<Memory::Region> m_rx_buffers_regions;
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u16 m_rx_free_index { 0 };
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OwnPtr<Memory::Region> m_tx_descriptors_region;
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NonnullOwnPtrVector<Memory::Region> m_tx_buffers_regions;
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u16 m_tx_free_index { 0 };
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bool m_link_up { false };
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EntropySource m_entropy_source;
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WaitQueue m_wait_queue;
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};
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}
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