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1a3a0836c0
This was done with the help of several scripts, I dump them here to easily find them later: awk '/#ifdef/ { print "#cmakedefine01 "$2 }' AK/Debug.h.in for debug_macro in $(awk '/#ifdef/ { print $2 }' AK/Debug.h.in) do find . \( -name '*.cpp' -o -name '*.h' -o -name '*.in' \) -not -path './Toolchain/*' -not -path './Build/*' -exec sed -i -E 's/#ifdef '$debug_macro'/#if '$debug_macro'/' {} \; done # Remember to remove WRAPPER_GERNERATOR_DEBUG from the list. awk '/#cmake/ { print "set("$2" ON)" }' AK/Debug.h.in
320 lines
9.7 KiB
C++
320 lines
9.7 KiB
C++
/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <AK/Debug.h>
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#include <Kernel/IO.h>
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#include <Kernel/PCI/Access.h>
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#include <Kernel/PCI/IOAccess.h>
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//#define PCI_DEBUG
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namespace Kernel {
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namespace PCI {
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static Access* s_access;
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inline void write8(Address address, u32 field, u8 value) { Access::the().write8_field(address, field, value); }
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inline void write16(Address address, u32 field, u16 value) { Access::the().write16_field(address, field, value); }
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inline void write32(Address address, u32 field, u32 value) { Access::the().write32_field(address, field, value); }
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inline u8 read8(Address address, u32 field) { return Access::the().read8_field(address, field); }
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inline u16 read16(Address address, u32 field) { return Access::the().read16_field(address, field); }
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inline u32 read32(Address address, u32 field) { return Access::the().read32_field(address, field); }
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Access& Access::the()
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{
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if (s_access == nullptr) {
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ASSERT_NOT_REACHED(); // We failed to initialize the PCI subsystem, so stop here!
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}
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return *s_access;
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}
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bool Access::is_initialized()
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{
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return (s_access != nullptr);
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}
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Access::Access()
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{
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s_access = this;
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}
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PhysicalID Access::get_physical_id(Address address) const
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{
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for (auto physical_id : m_physical_ids) {
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if (physical_id.address().seg() == address.seg()
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&& physical_id.address().bus() == address.bus()
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&& physical_id.address().slot() == address.slot()
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&& physical_id.address().function() == address.function()) {
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return physical_id;
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}
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}
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ASSERT_NOT_REACHED();
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}
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u8 Access::early_read8_field(Address address, u32 field)
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{
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dbgln<debug_pci>("PCI: Early reading 8-bit field {:#08x} for {}", field, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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return IO::in8(PCI_VALUE_PORT + (field & 3));
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}
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u16 Access::early_read16_field(Address address, u32 field)
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{
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dbgln<debug_pci>("PCI: Early reading 16-bit field {:#08x} for {}", field, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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return IO::in16(PCI_VALUE_PORT + (field & 2));
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}
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u32 Access::early_read32_field(Address address, u32 field)
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{
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dbgln<debug_pci>("PCI: Early reading 32-bit field {:#08x} for {}", field, address);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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return IO::in32(PCI_VALUE_PORT);
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}
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u16 Access::early_read_type(Address address)
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{
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dbgln<debug_pci>("PCI: Early reading type for {}", address);
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return (early_read8_field(address, PCI_CLASS) << 8u) | early_read8_field(address, PCI_SUBCLASS);
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}
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void Access::enumerate_functions(int type, u8 bus, u8 slot, u8 function, Function<void(Address, ID)>& callback)
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{
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dbgln<debug_pci>("PCI: Enumerating function type={}, bus={}, slot={}, function={}", type, bus, slot, function);
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Address address(0, bus, slot, function);
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if (type == -1 || type == early_read_type(address))
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callback(address, { early_read16_field(address, PCI_VENDOR_ID), early_read16_field(address, PCI_DEVICE_ID) });
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if (early_read_type(address) == PCI_TYPE_BRIDGE) {
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u8 secondary_bus = early_read8_field(address, PCI_SECONDARY_BUS);
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#if PCI_DEBUG
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klog() << "PCI: Found secondary bus: " << secondary_bus;
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#endif
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ASSERT(secondary_bus != bus);
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enumerate_bus(type, secondary_bus, callback);
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}
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}
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void Access::enumerate_slot(int type, u8 bus, u8 slot, Function<void(Address, ID)>& callback)
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{
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dbgln<debug_pci>("PCI: Enumerating slot type={}, bus={}, slot={}", type, bus, slot);
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Address address(0, bus, slot, 0);
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if (early_read16_field(address, PCI_VENDOR_ID) == PCI_NONE)
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return;
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enumerate_functions(type, bus, slot, 0, callback);
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if (!(early_read8_field(address, PCI_HEADER_TYPE) & 0x80))
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return;
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for (u8 function = 1; function < 8; ++function) {
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Address address(0, bus, slot, function);
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if (early_read16_field(address, PCI_VENDOR_ID) != PCI_NONE)
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enumerate_functions(type, bus, slot, function, callback);
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}
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}
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void Access::enumerate_bus(int type, u8 bus, Function<void(Address, ID)>& callback)
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{
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dbgln<debug_pci>("PCI: Enumerating bus type={}, bus={}", type, bus);
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for (u8 slot = 0; slot < 32; ++slot)
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enumerate_slot(type, bus, slot, callback);
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}
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void Access::enumerate(Function<void(Address, ID)>& callback) const
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{
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for (auto& physical_id : m_physical_ids) {
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callback(physical_id.address(), physical_id.id());
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}
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}
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void enumerate(Function<void(Address, ID)> callback)
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{
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Access::the().enumerate(callback);
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}
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Optional<u8> get_capabilities_pointer(Address address)
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{
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dbgln<debug_pci>("PCI: Getting capabilities pointer for {}", address);
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if (PCI::read16(address, PCI_STATUS) & (1 << 4)) {
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dbgln<debug_pci>("PCI: Found capabilities pointer for {}", address);
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return PCI::read8(address, PCI_CAPABILITIES_POINTER);
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}
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dbgln<debug_pci>("PCI: No capabilities pointer for {}", address);
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return {};
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}
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PhysicalID get_physical_id(Address address)
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{
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return Access::the().get_physical_id(address);
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}
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Vector<Capability> get_capabilities(Address address)
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{
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dbgln<debug_pci>("PCI: Getting capabilities for {}", address);
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auto capabilities_pointer = PCI::get_capabilities_pointer(address);
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if (!capabilities_pointer.has_value()) {
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dbgln<debug_pci>("PCI: No capabilities for {}", address);
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return {};
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}
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Vector<Capability> capabilities;
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auto capability_pointer = capabilities_pointer.value();
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while (capability_pointer != 0) {
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dbgln<debug_pci>("PCI: Reading in capability at {:#02x} for {}", capability_pointer, address);
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u16 capability_header = PCI::read16(address, capability_pointer);
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u8 capability_id = capability_header & 0xff;
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capability_pointer = capability_header >> 8;
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capabilities.append({ capability_id, capability_pointer });
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}
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return capabilities;
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}
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void raw_access(Address address, u32 field, size_t access_size, u32 value)
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{
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ASSERT(access_size != 0);
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if (access_size == 1) {
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write8(address, field, value);
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return;
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}
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if (access_size == 2) {
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write16(address, field, value);
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return;
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}
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if (access_size == 4) {
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write32(address, field, value);
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return;
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}
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ASSERT_NOT_REACHED();
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}
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ID get_id(Address address)
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{
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return { read16(address, PCI_VENDOR_ID), read16(address, PCI_DEVICE_ID) };
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}
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void enable_interrupt_line(Address address)
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{
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write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) & ~(1 << 10));
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}
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void disable_interrupt_line(Address address)
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{
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write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) | 1 << 10);
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}
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u8 get_interrupt_line(Address address)
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{
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return read8(address, PCI_INTERRUPT_LINE);
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}
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u32 get_BAR0(Address address)
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{
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return read32(address, PCI_BAR0);
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}
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u32 get_BAR1(Address address)
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{
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return read32(address, PCI_BAR1);
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}
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u32 get_BAR2(Address address)
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{
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return read32(address, PCI_BAR2);
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}
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u32 get_BAR3(Address address)
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{
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return read16(address, PCI_BAR3);
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}
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u32 get_BAR4(Address address)
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{
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return read32(address, PCI_BAR4);
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}
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u32 get_BAR5(Address address)
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{
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return read32(address, PCI_BAR5);
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}
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u8 get_revision_id(Address address)
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{
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return read8(address, PCI_REVISION_ID);
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}
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u8 get_subclass(Address address)
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{
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return read8(address, PCI_SUBCLASS);
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}
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u8 get_class(Address address)
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{
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return read8(address, PCI_CLASS);
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}
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u8 get_programming_interface(Address address)
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{
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return read8(address, PCI_PROG_IF);
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}
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u16 get_subsystem_id(Address address)
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{
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return read16(address, PCI_SUBSYSTEM_ID);
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}
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u16 get_subsystem_vendor_id(Address address)
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{
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return read16(address, PCI_SUBSYSTEM_VENDOR_ID);
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}
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void enable_bus_mastering(Address address)
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{
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auto value = read16(address, PCI_COMMAND);
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value |= (1 << 2);
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value |= (1 << 0);
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write16(address, PCI_COMMAND, value);
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}
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void disable_bus_mastering(Address address)
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{
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auto value = read16(address, PCI_COMMAND);
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value &= ~(1 << 2);
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value |= (1 << 0);
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write16(address, PCI_COMMAND, value);
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}
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size_t get_BAR_space_size(Address address, u8 bar_number)
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{
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// See PCI Spec 2.3, Page 222
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ASSERT(bar_number < 6);
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u8 field = (PCI_BAR0 + (bar_number << 2));
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u32 bar_reserved = read32(address, field);
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write32(address, field, 0xFFFFFFFF);
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u32 space_size = read32(address, field);
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write32(address, field, bar_reserved);
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space_size &= 0xfffffff0;
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space_size = (~space_size) + 1;
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return space_size;
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}
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}
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}
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