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346 lines
13 KiB
C++
346 lines
13 KiB
C++
/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <AK/StringView.h>
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#include <Kernel/ACPI/Parser.h>
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#include <Kernel/Interrupts/InterruptManagement.h>
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#include <Kernel/Time/HPET.h>
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#include <Kernel/Time/HPETComparator.h>
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#include <Kernel/Time/TimeManagement.h>
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#include <Kernel/VM/MemoryManager.h>
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#include <Kernel/VM/TypedMapping.h>
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namespace Kernel {
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#define ABSOLUTE_MAXIMUM_COUNTER_TICK_PERIOD 0x05F5E100
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#define NANOSECOND_PERIOD_TO_HERTZ(x) 1000000000 / x
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#define MEGAHERTZ_TO_HERTZ(x) (x / 1000000)
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//#define HPET_DEBUG
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namespace HPETFlags {
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enum class Attributes {
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Counter64BitCapable = 1 << 13,
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LegacyReplacementRouteCapable = 1 << 15
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};
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enum class Configuration {
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Enable = 0x1,
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LegacyReplacementRoute = 0x2
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};
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enum class TimerConfiguration : u32 {
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InterruptType = 1 << 1,
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InterruptEnable = 1 << 2,
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TimerType = 1 << 3,
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PeriodicInterruptCapable = 1 << 4,
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Timer64BitsCapable = 1 << 5,
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ValueSet = 1 << 6,
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Force32BitMode = 1 << 7,
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FSBInterruptEnable = 1 << 14,
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FSBInterruptDelivery = 1 << 15
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};
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};
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struct [[gnu::packed]] TimerStructure
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{
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u64 configuration_and_capability;
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u64 comparator_value;
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u64 fsb_interrupt_route;
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u64 reserved;
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};
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struct [[gnu::packed]] HPETCapabilityRegister
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{
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u32 attributes; // Note: We must do a 32 bit access to offsets 0x0, or 0x4 only, according to HPET spec.
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u32 main_counter_tick_period;
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u64 reserved;
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};
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struct [[gnu::packed]] HPETRegister
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{
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u64 reg;
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u64 reserved;
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};
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struct [[gnu::packed]] HPETRegistersBlock
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{
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union {
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HPETCapabilityRegister capabilities;
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HPETRegister raw_capabilites;
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};
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HPETRegister configuration;
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HPETRegister interrupt_status;
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u8 reserved[0xF0 - 48];
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HPETRegister main_counter_value;
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TimerStructure timers[3];
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u8 reserved2[0x400 - 0x160];
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};
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static HPET* s_hpet;
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static bool hpet_initialized { false };
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bool HPET::initialized()
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{
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return hpet_initialized;
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}
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HPET& HPET::the()
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{
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ASSERT(HPET::initialized());
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ASSERT(s_hpet != nullptr);
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return *s_hpet;
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}
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bool HPET::test_and_initialize()
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{
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ASSERT(!HPET::initialized());
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hpet_initialized = true;
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auto hpet = ACPI::Parser::the()->find_table("HPET");
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if (hpet.is_null())
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return false;
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klog() << "HPET @ " << hpet;
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auto sdt = map_typed<ACPI::Structures::HPET>(hpet);
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// Note: HPET is only usable from System Memory
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ASSERT(sdt->event_timer_block.address_space == (u8)ACPI::GenericAddressStructure::AddressSpace::SystemMemory);
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if (TimeManagement::is_hpet_periodic_mode_allowed()) {
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if (!check_for_exisiting_periodic_timers()) {
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dbg() << "HPET: No periodic capable timers";
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return false;
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}
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}
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s_hpet = new HPET(PhysicalAddress(hpet));
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return true;
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}
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bool HPET::check_for_exisiting_periodic_timers()
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{
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auto hpet = ACPI::Parser::the()->find_table("HPET");
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if (hpet.is_null())
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return false;
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auto sdt = map_typed<ACPI::Structures::HPET>(hpet);
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ASSERT(sdt->event_timer_block.address_space == 0);
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auto registers = map_typed<volatile HPETRegistersBlock>(PhysicalAddress(sdt->event_timer_block.address));
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size_t timers_count = ((registers->raw_capabilites.reg >> 8) & 0x1f) + 1;
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for (size_t index = 0; index < timers_count; index++) {
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if (registers->timers[index].configuration_and_capability & (u32)HPETFlags::TimerConfiguration::PeriodicInterruptCapable)
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return true;
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}
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return false;
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}
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void HPET::global_disable()
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{
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registers().configuration.reg = registers().configuration.reg & ~(u32)HPETFlags::Configuration::Enable;
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}
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void HPET::global_enable()
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{
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registers().configuration.reg = registers().configuration.reg | (u32)HPETFlags::Configuration::Enable;
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}
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void HPET::set_periodic_comparator_value(const HPETComparator& comparator, u64 value)
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{
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disable(comparator);
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ASSERT(comparator.is_periodic());
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ASSERT(comparator.comparator_number() <= m_comparators.size());
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volatile auto& timer = registers().timers[comparator.comparator_number()];
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timer.configuration_and_capability = timer.configuration_and_capability | (u32)HPETFlags::TimerConfiguration::ValueSet;
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timer.comparator_value = value;
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enable(comparator);
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}
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void HPET::set_non_periodic_comparator_value(const HPETComparator& comparator, u64 value)
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{
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ASSERT_INTERRUPTS_DISABLED();
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ASSERT(!comparator.is_periodic());
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ASSERT(comparator.comparator_number() <= m_comparators.size());
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registers().timers[comparator.comparator_number()].comparator_value = main_counter_value() + value;
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}
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void HPET::enable_periodic_interrupt(const HPETComparator& comparator)
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{
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#ifdef HPET_DEBUG
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klog() << "HPET: Set comparator " << comparator.comparator_number() << " to be periodic.";
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#endif
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disable(comparator);
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ASSERT(comparator.comparator_number() <= m_comparators.size());
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volatile auto& timer = registers().timers[comparator.comparator_number()];
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auto configuration_and_capability = timer.configuration_and_capability;
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ASSERT(configuration_and_capability & (u32)HPETFlags::TimerConfiguration::PeriodicInterruptCapable);
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timer.configuration_and_capability = configuration_and_capability | (u32)HPETFlags::TimerConfiguration::TimerType;
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enable(comparator);
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}
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void HPET::disable_periodic_interrupt(const HPETComparator& comparator)
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{
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#ifdef HPET_DEBUG
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klog() << "HPET: Disable periodic interrupt in comparator " << comparator.comparator_number() << ".";
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#endif
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disable(comparator);
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ASSERT(comparator.comparator_number() <= m_comparators.size());
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auto volatile& timer = registers().timers[comparator.comparator_number()];
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auto configuration_and_capability = timer.configuration_and_capability;
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ASSERT(configuration_and_capability & (u32)HPETFlags::TimerConfiguration::PeriodicInterruptCapable);
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timer.configuration_and_capability = configuration_and_capability & ~(u32)HPETFlags::TimerConfiguration::TimerType;
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enable(comparator);
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}
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void HPET::disable(const HPETComparator& comparator)
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{
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#ifdef HPET_DEBUG
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klog() << "HPET: Disable comparator " << comparator.comparator_number() << ".";
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#endif
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ASSERT(comparator.comparator_number() <= m_comparators.size());
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volatile auto& timer = registers().timers[comparator.comparator_number()];
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timer.configuration_and_capability = timer.configuration_and_capability & ~(u32)HPETFlags::TimerConfiguration::InterruptEnable;
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}
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void HPET::enable(const HPETComparator& comparator)
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{
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#ifdef HPET_DEBUG
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klog() << "HPET: Enable comparator " << comparator.comparator_number() << ".";
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#endif
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ASSERT(comparator.comparator_number() <= m_comparators.size());
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volatile auto& timer = registers().timers[comparator.comparator_number()];
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timer.configuration_and_capability = timer.configuration_and_capability | (u32)HPETFlags::TimerConfiguration::InterruptEnable;
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}
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u64 HPET::main_counter_value() const
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{
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return registers().main_counter_value.reg;
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}
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u64 HPET::frequency() const
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{
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return m_frequency;
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}
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Vector<unsigned> HPET::capable_interrupt_numbers(const HPETComparator& comparator)
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{
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ASSERT(comparator.comparator_number() <= m_comparators.size());
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Vector<unsigned> capable_interrupts;
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auto& comparator_registers = (const volatile TimerStructure&)registers().timers[comparator.comparator_number()];
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u32 interrupt_bitfield = comparator_registers.configuration_and_capability >> 32;
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for (size_t index = 0; index < 32; index++) {
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if (interrupt_bitfield & 1)
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capable_interrupts.append(index);
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interrupt_bitfield >>= 1;
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}
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return capable_interrupts;
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}
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Vector<unsigned> HPET::capable_interrupt_numbers(u8 comparator_number)
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{
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ASSERT(comparator_number <= m_comparators.size());
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Vector<unsigned> capable_interrupts;
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auto& comparator_registers = (const volatile TimerStructure&)registers().timers[comparator_number];
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u32 interrupt_bitfield = comparator_registers.configuration_and_capability >> 32;
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for (size_t index = 0; index < 32; index++) {
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if (interrupt_bitfield & 1)
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capable_interrupts.append(index);
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interrupt_bitfield >>= 1;
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}
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return capable_interrupts;
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}
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void HPET::set_comparator_irq_vector(u8 comparator_number, u8 irq_vector)
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{
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ASSERT(comparator_number <= m_comparators.size());
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auto& comparator_registers = (volatile TimerStructure&)registers().timers[comparator_number];
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comparator_registers.configuration_and_capability = comparator_registers.configuration_and_capability | (irq_vector << 9);
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}
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bool HPET::is_periodic_capable(u8 comparator_number) const
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{
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ASSERT(comparator_number <= m_comparators.size());
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auto& comparator_registers = (const volatile TimerStructure&)registers().timers[comparator_number];
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return comparator_registers.configuration_and_capability & (u32)HPETFlags::TimerConfiguration::PeriodicInterruptCapable;
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}
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void HPET::set_comparators_to_optimal_interrupt_state(size_t)
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{
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// FIXME: Implement this method for allowing to use HPET timers 2-31...
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ASSERT_NOT_REACHED();
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}
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PhysicalAddress HPET::find_acpi_hpet_registers_block()
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{
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auto sdt = map_typed<const volatile ACPI::Structures::HPET>(m_physical_acpi_hpet_table);
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ASSERT(sdt->event_timer_block.address_space == (u8)ACPI::GenericAddressStructure::AddressSpace::SystemMemory);
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return PhysicalAddress(sdt->event_timer_block.address);
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}
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const volatile HPETRegistersBlock& HPET::registers() const
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{
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return *(const volatile HPETRegistersBlock*)m_hpet_mmio_region->vaddr().offset(m_physical_acpi_hpet_registers.offset_in_page()).as_ptr();
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}
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volatile HPETRegistersBlock& HPET::registers()
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{
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return *(volatile HPETRegistersBlock*)m_hpet_mmio_region->vaddr().offset(m_physical_acpi_hpet_registers.offset_in_page()).as_ptr();
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}
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u64 HPET::calculate_ticks_in_nanoseconds() const
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{
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return ABSOLUTE_MAXIMUM_COUNTER_TICK_PERIOD / registers().capabilities.main_counter_tick_period;
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}
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HPET::HPET(PhysicalAddress acpi_hpet)
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: m_physical_acpi_hpet_table(acpi_hpet)
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, m_physical_acpi_hpet_registers(find_acpi_hpet_registers_block())
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, m_hpet_mmio_region(MM.allocate_kernel_region(m_physical_acpi_hpet_registers.page_base(), PAGE_SIZE, "HPET MMIO", Region::Access::Read | Region::Access::Write))
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{
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auto sdt = map_typed<const volatile ACPI::Structures::HPET>(m_physical_acpi_hpet_table);
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m_vendor_id = sdt->pci_vendor_id;
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m_minimum_tick = sdt->mininum_clock_tick;
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klog() << "HPET: Minimum clock tick - " << m_minimum_tick;
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// Note: We must do a 32 bit access to offsets 0x0, or 0x4 only.
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size_t timers_count = ((registers().raw_capabilites.reg >> 8) & 0x1f) + 1;
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klog() << "HPET: Timers count - " << timers_count;
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ASSERT(timers_count >= 2);
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auto* capabilities_register = (const volatile HPETCapabilityRegister*)®isters().raw_capabilites.reg;
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global_disable();
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m_frequency = NANOSECOND_PERIOD_TO_HERTZ(calculate_ticks_in_nanoseconds());
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klog() << "HPET: frequency " << m_frequency << " Hz (" << MEGAHERTZ_TO_HERTZ(m_frequency) << " MHz)";
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ASSERT(capabilities_register->main_counter_tick_period <= ABSOLUTE_MAXIMUM_COUNTER_TICK_PERIOD);
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// Reset the counter, just in case...
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registers().main_counter_value.reg = 0;
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if (registers().raw_capabilites.reg & (u32)HPETFlags::Attributes::LegacyReplacementRouteCapable)
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registers().configuration.reg = registers().configuration.reg | (u32)HPETFlags::Configuration::LegacyReplacementRoute;
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m_comparators.append(HPETComparator::create(0, 0, is_periodic_capable(0)));
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m_comparators.append(HPETComparator::create(1, 8, is_periodic_capable(1)));
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global_enable();
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}
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}
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