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ac2c01320b
Two classes are added - HostBridge and MemoryBackedHostBridge, which both derive from HostController class. This allows the kernel to map different busses from different PCI domains in the same time. Each HostController implementation doesn't take the Address object to address PCI devices but instead we take distinct numbers of the PCI bus, device and function as it allows us to specify arbitrary PCI domains in the Address structure and still to get the correct PCI devices. This also matches the hardware behavior of PCI domains - the host bridge merely takes memory operations or IO operations and translates them to addressing of three components - PCI bus, device and function. These changes also greatly simplify how enumeration of Host Bridges work now - scanning of the hardware depends on what the Host bridges can do for us, so in case we have multiple host bridges that expose a memory mapped region or IO ports to access PCI configuration space, we simply let the code of the host bridge to figure out how to fetch data for us. Another semantical change is that a PCI domain structure is no longer attached to a PhysicalAddress, so even in the case that the machine doesn't implement PCI domains, we still treat that machine to contain 1 PCI domain to treat that one host bridge in the same way, like with a machine with one or more PCI domains.
59 lines
1.8 KiB
C++
59 lines
1.8 KiB
C++
/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Bitmap.h>
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#include <AK/Vector.h>
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#include <Kernel/Bus/PCI/Controller/HostController.h>
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#include <Kernel/Bus/PCI/Definitions.h>
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#include <Kernel/FileSystem/SysFS.h>
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#include <Kernel/Locking/Spinlock.h>
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namespace Kernel::PCI {
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class HostBridge;
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class Access {
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public:
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static bool initialize_for_multiple_pci_domains(PhysicalAddress mcfg_table);
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static bool initialize_for_one_pci_domain();
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void fast_enumerate(Function<void(DeviceIdentifier const&)>&) const;
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void rescan_hardware();
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static Access& the();
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static bool is_initialized();
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void write8_field(Address address, u32 field, u8 value);
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void write16_field(Address address, u32 field, u16 value);
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void write32_field(Address address, u32 field, u32 value);
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u8 read8_field(Address address, u32 field);
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u16 read16_field(Address address, u32 field);
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u32 read32_field(Address address, u32 field);
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DeviceIdentifier get_device_identifier(Address address) const;
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Spinlock const& scan_lock() const { return m_scan_lock; }
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Mutex const& access_lock() const { return m_access_lock; }
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private:
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u8 read8_field(Address address, RegisterOffset field);
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u16 read16_field(Address address, RegisterOffset field);
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void add_host_controller(NonnullOwnPtr<HostController>);
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bool find_and_register_pci_host_bridges_from_acpi_mcfg_table(PhysicalAddress mcfg);
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Access();
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Vector<Capability> get_capabilities(Address);
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Optional<u8> get_capabilities_pointer(Address address);
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// General Data-members
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mutable Mutex m_access_lock;
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mutable Spinlock m_scan_lock;
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HashMap<u32, NonnullOwnPtr<HostController>> m_host_controllers;
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Vector<DeviceIdentifier> m_device_identifiers;
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};
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}
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