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Kernel: Delete unused files
This commit is contained in:
parent
36eea5fa60
commit
e3b24d0478
Notes:
sideshowbarker
2024-07-19 09:05:53 +09:00
Author: https://github.com/supercomputer7 Commit: https://github.com/SerenityOS/serenity/commit/e3b24d0478e Pull-request: https://github.com/SerenityOS/serenity/pull/1274 Reviewed-by: https://github.com/awesomekling Reviewed-by: https://github.com/shannonbooth
12 changed files with 0 additions and 1046 deletions
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@ -1,220 +0,0 @@
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/*
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* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
|
||||
*
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||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
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||||
*
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||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
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||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <AK/Assertions.h>
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#include <AK/Types.h>
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#include <Kernel/Arch/i386/APIC.h>
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#include <Kernel/Arch/i386/CPU.h>
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#include <Kernel/VM/MemoryManager.h>
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#include <LibBareMetal/IO.h>
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#define IRQ_APIC_SPURIOUS 0x1f
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#define APIC_BASE_MSR 0x1b
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#define APIC_REG_LD 0xd0
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#define APIC_REG_DF 0xe0
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#define APIC_REG_SIV 0xf0
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#define APIC_REG_ICR_LOW 0x300
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#define APIC_REG_ICR_HIGH 0x310
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#define APIC_REG_LVT_TIMER 0x320
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#define APIC_REG_LVT_THERMAL 0x330
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#define APIC_REG_LVT_PERFORMANCE_COUNTER 0x340
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#define APIC_REG_LVT_LINT0 0x350
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#define APIC_REG_LVT_LINT1 0x360
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#define APIC_REG_LVT_ERR 0x370
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namespace Kernel {
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extern "C" void apic_spurious_interrupt_entry();
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asm(
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".globl apic_spurious_interrupt_entry \n"
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"apic_spurious_interrupt_entry: \n"
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" iret\n");
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namespace APIC {
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class ICRReg {
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u32 m_reg { 0 };
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public:
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enum DeliveryMode {
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Fixed = 0x0,
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LowPriority = 0x1,
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SMI = 0x2,
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NMI = 0x4,
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INIT = 0x5,
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StartUp = 0x6,
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};
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enum DestinationMode {
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Physical = 0x0,
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Logical = 0x0,
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};
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enum Level {
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DeAssert = 0x0,
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Assert = 0x1
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};
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enum class TriggerMode {
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Edge = 0x0,
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Level = 0x1,
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};
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enum DestinationShorthand {
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NoShorthand = 0x0,
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Self = 0x1,
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AllIncludingSelf = 0x2,
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AllExcludingSelf = 0x3,
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};
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ICRReg(u8 vector, DeliveryMode delivery_mode, DestinationMode destination_mode, Level level, TriggerMode trigger_mode, DestinationShorthand destination)
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: m_reg(vector | (delivery_mode << 8) | (destination_mode << 11) | (level << 14) | (static_cast<u32>(trigger_mode) << 15) | (destination << 18))
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{
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}
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u32 low() const { return m_reg; }
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u32 high() const { return 0; }
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};
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static volatile u8* g_apic_base = nullptr;
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static PhysicalAddress get_base()
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{
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u32 lo, hi;
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MSR msr(APIC_BASE_MSR);
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msr.get(lo, hi);
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return PhysicalAddress(lo & 0xfffff000);
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}
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static void set_base(const PhysicalAddress& base)
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{
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u32 hi = 0;
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u32 lo = base.get() | 0x800;
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MSR msr(APIC_BASE_MSR);
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msr.set(lo, hi);
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}
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static u32 apic_read(u32 off)
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{
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return *(volatile u32*)(&g_apic_base[off]);
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}
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static void apic_write(u32 off, u32 val)
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{
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*reinterpret_cast<volatile u32*>(&g_apic_base[off]) = val;
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}
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static void apic_write_icr(const ICRReg& icr)
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{
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apic_write(APIC_REG_ICR_HIGH, icr.high());
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apic_write(APIC_REG_ICR_LOW, icr.low());
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}
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#define APIC_LVT_MASKED (1 << 15)
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#define APIC_LVT_TRIGGER_LEVEL (1 << 14)
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#define APIC_LVT(iv, dm) ((iv & 0xff) | ((dm & 0x7) << 8))
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asm(
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".globl apic_ap_start \n"
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".type apic_ap_start, @function \n"
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"apic_ap_start: \n"
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".set begin_apic_ap_start, . \n"
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" jmp apic_ap_start\n" // TODO: implement
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".set end_apic_ap_start, . \n"
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"\n"
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".globl apic_ap_start_size \n"
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"apic_ap_start_size: \n"
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".word end_apic_ap_start - begin_apic_ap_start \n");
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extern "C" void apic_ap_start(void);
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extern "C" u16 apic_ap_start_size;
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bool init()
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{
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// FIXME: This code is broken and therefore isn't called. Please map everything correctly before calling this code.
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ASSERT_NOT_REACHED();
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if (!MSR::have())
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return false;
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// check if we support local apic
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CPUID id(1);
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if ((id.edx() & (1 << 9)) == 0)
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return false;
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PhysicalAddress apic_base = get_base();
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kprintf("Initializing APIC, base: P%x\n", apic_base);
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set_base(apic_base);
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g_apic_base = apic_base.as_ptr();
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// copy ap init code to P8000
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memcpy(reinterpret_cast<u8*>(0x8000), reinterpret_cast<const u8*>(apic_ap_start), apic_ap_start_size);
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return true;
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}
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void enable(u32 cpu)
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{
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kprintf("Enabling local APIC for cpu #%u\n", cpu);
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// set spurious interrupt vector
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apic_write(APIC_REG_SIV, apic_read(APIC_REG_SIV) | 0x100);
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// local destination mode (flat mode)
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apic_write(APIC_REG_DF, 0xf000000);
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// set destination id (note that this limits it to 8 cpus)
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apic_write(APIC_REG_LD, (1 << cpu) << 24);
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register_interrupt_handler(IRQ_APIC_SPURIOUS, apic_spurious_interrupt_entry);
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apic_write(APIC_REG_LVT_TIMER, APIC_LVT(0xff, 0) | APIC_LVT_MASKED);
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apic_write(APIC_REG_LVT_THERMAL, APIC_LVT(0xff, 0) | APIC_LVT_MASKED);
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apic_write(APIC_REG_LVT_PERFORMANCE_COUNTER, APIC_LVT(0xff, 0) | APIC_LVT_MASKED);
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apic_write(APIC_REG_LVT_LINT0, APIC_LVT(0x1f, 7) | APIC_LVT_MASKED);
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apic_write(APIC_REG_LVT_LINT1, APIC_LVT(0xff, 4) | APIC_LVT_TRIGGER_LEVEL); // nmi
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apic_write(APIC_REG_LVT_ERR, APIC_LVT(0xe3, 0) | APIC_LVT_MASKED);
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if (cpu == 0) {
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static volatile u32 foo = 0;
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// INIT
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apic_write_icr(ICRReg(0, ICRReg::INIT, ICRReg::Physical, ICRReg::Assert, ICRReg::TriggerMode::Edge, ICRReg::AllExcludingSelf));
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for (foo = 0; foo < 0x800000; foo++)
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; // TODO: 10 millisecond delay
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for (int i = 0; i < 2; i++) {
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// SIPI
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apic_write_icr(ICRReg(0x08, ICRReg::StartUp, ICRReg::Physical, ICRReg::Assert, ICRReg::TriggerMode::Edge, ICRReg::AllExcludingSelf)); // start execution at P8000
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for (foo = 0; foo < 0x80000; foo++)
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; // TODO: 200 microsecond delay
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}
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}
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}
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}
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}
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@ -1,40 +0,0 @@
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/*
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* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
|
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
|
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#pragma once
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#include <AK/Types.h>
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namespace Kernel {
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namespace APIC {
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bool init();
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void enable(u32 cpu);
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}
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}
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@ -1,143 +0,0 @@
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/*
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* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
|
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* this list of conditions and the following disclaimer in the documentation
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||||
* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <AK/Assertions.h>
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#include <AK/Types.h>
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#include <Kernel/Arch/i386/CPU.h>
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#include <Kernel/Arch/i386/PIC.h>
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#include <LibBareMetal/IO.h>
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namespace Kernel {
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// The slave 8259 is connected to the master's IRQ2 line.
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// This is really only to enhance clarity.
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#define SLAVE_INDEX 2
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#define PIC0_CTL 0x20
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#define PIC0_CMD 0x21
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#define PIC1_CTL 0xA0
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#define PIC1_CMD 0xA1
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#ifdef DEBUG_PIC
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static bool initialized;
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#endif
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namespace PIC {
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void disable(u8 irq)
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{
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InterruptDisabler disabler;
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u8 imr;
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if (irq & 8) {
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imr = IO::in8(PIC1_CMD);
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imr |= 1 << (irq - 8);
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IO::out8(PIC1_CMD, imr);
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} else {
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imr = IO::in8(PIC0_CMD);
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imr |= 1 << irq;
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IO::out8(PIC0_CMD, imr);
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}
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}
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void enable(u8 irq)
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{
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InterruptDisabler disabler;
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u8 imr;
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if (irq & 8) {
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imr = IO::in8(PIC1_CMD);
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imr &= ~(1 << (irq - 8));
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IO::out8(PIC1_CMD, imr);
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} else {
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imr = IO::in8(PIC0_CMD);
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imr &= ~(1 << irq);
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IO::out8(PIC0_CMD, imr);
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}
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}
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void eoi(u8 irq)
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{
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if (irq & 8)
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IO::out8(PIC1_CTL, 0x20);
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IO::out8(PIC0_CTL, 0x20);
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}
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void initialize()
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{
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#ifdef DEBUG_PIC
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ASSERT(!initialized);
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#endif
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/* ICW1 (edge triggered mode, cascading controllers, expect ICW4) */
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IO::out8(PIC0_CTL, 0x11);
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IO::out8(PIC1_CTL, 0x11);
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/* ICW2 (upper 5 bits specify ISR indices, lower 3 idunno) */
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IO::out8(PIC0_CMD, IRQ_VECTOR_BASE);
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IO::out8(PIC1_CMD, IRQ_VECTOR_BASE + 0x08);
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/* ICW3 (configure master/slave relationship) */
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IO::out8(PIC0_CMD, 1 << SLAVE_INDEX);
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IO::out8(PIC1_CMD, SLAVE_INDEX);
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/* ICW4 (set x86 mode) */
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IO::out8(PIC0_CMD, 0x01);
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IO::out8(PIC1_CMD, 0x01);
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// Mask -- start out with all IRQs disabled.
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IO::out8(PIC0_CMD, 0xff);
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IO::out8(PIC1_CMD, 0xff);
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// ...except IRQ2, since that's needed for the master to let through slave interrupts.
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enable(2);
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kprintf("PIC(i8259): cascading mode, vectors 0x%b-0x%b\n", IRQ_VECTOR_BASE, IRQ_VECTOR_BASE + 0x08);
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#ifdef DEBUG_PIC
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initialized = true;
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#endif
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}
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u16 get_isr()
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{
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IO::out8(PIC0_CTL, 0x0b);
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IO::out8(PIC1_CTL, 0x0b);
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u8 isr0 = IO::in8(PIC0_CTL);
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u8 isr1 = IO::in8(PIC1_CTL);
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return (isr1 << 8) | isr0;
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}
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u16 get_irr()
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{
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IO::out8(PIC0_CTL, 0x0a);
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IO::out8(PIC1_CTL, 0x0a);
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u8 irr0 = IO::in8(PIC0_CTL);
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u8 irr1 = IO::in8(PIC1_CTL);
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return (irr1 << 8) | irr0;
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}
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}
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}
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@ -1,56 +0,0 @@
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/*
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* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
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#pragma once
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|
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#include <AK/Types.h>
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namespace Kernel {
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namespace PIC {
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void enable(u8 number);
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void disable(u8 number);
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void eoi(u8 number);
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void initialize();
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u16 get_isr();
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u16 get_irr();
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}
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class IRQHandlerScope {
|
||||
public:
|
||||
explicit IRQHandlerScope(u8 irq)
|
||||
: m_irq(irq)
|
||||
{
|
||||
}
|
||||
~IRQHandlerScope() { PIC::eoi(m_irq); }
|
||||
|
||||
private:
|
||||
u8 m_irq { 0 };
|
||||
};
|
||||
|
||||
}
|
|
@ -1,113 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <Kernel/Arch/i386/CPU.h>
|
||||
#include <Kernel/Arch/i386/PIC.h>
|
||||
#include <Kernel/Arch/i386/PIT.h>
|
||||
#include <Kernel/Scheduler.h>
|
||||
#include <LibBareMetal/IO.h>
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
#define IRQ_TIMER 0
|
||||
|
||||
extern "C" void timer_interrupt_entry();
|
||||
extern "C" void timer_interrupt_handler(RegisterState);
|
||||
|
||||
asm(
|
||||
".globl timer_interrupt_entry \n"
|
||||
"timer_interrupt_entry: \n"
|
||||
" pushl $0x0\n"
|
||||
" pusha\n"
|
||||
" pushl %ds\n"
|
||||
" pushl %es\n"
|
||||
" pushl %fs\n"
|
||||
" pushl %gs\n"
|
||||
" pushl %ss\n"
|
||||
" mov $0x10, %ax\n"
|
||||
" mov %ax, %ds\n"
|
||||
" mov %ax, %es\n"
|
||||
" cld\n"
|
||||
" call timer_interrupt_handler\n"
|
||||
" add $0x4, %esp\n"
|
||||
" popl %gs\n"
|
||||
" popl %fs\n"
|
||||
" popl %es\n"
|
||||
" popl %ds\n"
|
||||
" popa\n"
|
||||
" add $0x4, %esp\n"
|
||||
" iret\n");
|
||||
|
||||
static u32 s_ticks_this_second;
|
||||
static u32 s_seconds_since_boot;
|
||||
|
||||
void timer_interrupt_handler(RegisterState regs)
|
||||
{
|
||||
clac();
|
||||
++g_in_irq;
|
||||
IRQHandlerScope scope(IRQ_TIMER);
|
||||
if (++s_ticks_this_second >= TICKS_PER_SECOND) {
|
||||
// FIXME: Synchronize with the RTC somehow to prevent drifting apart.
|
||||
++s_seconds_since_boot;
|
||||
s_ticks_this_second = 0;
|
||||
}
|
||||
Scheduler::timer_tick(regs);
|
||||
--g_in_irq;
|
||||
}
|
||||
|
||||
namespace PIT {
|
||||
|
||||
u32 ticks_this_second()
|
||||
{
|
||||
return s_ticks_this_second;
|
||||
}
|
||||
|
||||
u32 seconds_since_boot()
|
||||
{
|
||||
return s_seconds_since_boot;
|
||||
}
|
||||
|
||||
void initialize()
|
||||
{
|
||||
u16 timer_reload;
|
||||
|
||||
IO::out8(PIT_CTL, TIMER0_SELECT | WRITE_WORD | MODE_SQUARE_WAVE);
|
||||
|
||||
timer_reload = (BASE_FREQUENCY / TICKS_PER_SECOND);
|
||||
|
||||
kprintf("PIT: %u Hz, square wave (%x)\n", TICKS_PER_SECOND, timer_reload);
|
||||
|
||||
IO::out8(TIMER0_CTL, LSB(timer_reload));
|
||||
IO::out8(TIMER0_CTL, MSB(timer_reload));
|
||||
|
||||
register_interrupt_handler(IRQ_VECTOR_BASE + IRQ_TIMER, timer_interrupt_entry);
|
||||
|
||||
PIC::enable(IRQ_TIMER);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
}
|
|
@ -1,62 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <AK/Types.h>
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
#define TICKS_PER_SECOND 1000
|
||||
/* Timer related ports */
|
||||
#define TIMER0_CTL 0x40
|
||||
#define TIMER1_CTL 0x41
|
||||
#define TIMER2_CTL 0x42
|
||||
#define PIT_CTL 0x43
|
||||
|
||||
/* Building blocks for PIT_CTL */
|
||||
#define TIMER0_SELECT 0x00
|
||||
#define TIMER1_SELECT 0x40
|
||||
#define TIMER2_SELECT 0x80
|
||||
|
||||
#define MODE_COUNTDOWN 0x00
|
||||
#define MODE_ONESHOT 0x02
|
||||
#define MODE_RATE 0x04
|
||||
#define MODE_SQUARE_WAVE 0x06
|
||||
|
||||
#define WRITE_WORD 0x30
|
||||
|
||||
#define BASE_FREQUENCY 1193182
|
||||
|
||||
namespace PIT {
|
||||
|
||||
void initialize();
|
||||
u32 ticks_this_second();
|
||||
u32 seconds_since_boot();
|
||||
|
||||
}
|
||||
|
||||
}
|
|
@ -1,54 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "IRQHandler.h"
|
||||
#include <Kernel/Arch/i386/CPU.h>
|
||||
#include <Kernel/Arch/i386/PIC.h>
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
IRQHandler::IRQHandler(u8 irq)
|
||||
: m_irq_number(irq)
|
||||
{
|
||||
register_irq_handler(m_irq_number, *this);
|
||||
}
|
||||
|
||||
IRQHandler::~IRQHandler()
|
||||
{
|
||||
unregister_irq_handler(m_irq_number, *this);
|
||||
}
|
||||
|
||||
void IRQHandler::enable_irq()
|
||||
{
|
||||
PIC::enable(m_irq_number);
|
||||
}
|
||||
|
||||
void IRQHandler::disable_irq()
|
||||
{
|
||||
PIC::disable(m_irq_number);
|
||||
}
|
||||
|
||||
}
|
|
@ -1,50 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2018-2020, Andreas Kling <kling@serenityos.org>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <AK/Types.h>
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
class IRQHandler {
|
||||
public:
|
||||
virtual ~IRQHandler();
|
||||
virtual void handle_irq() = 0;
|
||||
|
||||
u8 irq_number() const { return m_irq_number; }
|
||||
|
||||
void enable_irq();
|
||||
void disable_irq();
|
||||
|
||||
protected:
|
||||
explicit IRQHandler(u8 irq);
|
||||
|
||||
private:
|
||||
u8 m_irq_number { 0 };
|
||||
};
|
||||
|
||||
}
|
|
@ -1,74 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <Kernel/InterruptHandler.h>
|
||||
#include <Kernel/SharedInterruptHandler.h>
|
||||
|
||||
InterruptHandler::InterruptHandler(u8 irq)
|
||||
: m_irq_number(irq)
|
||||
{
|
||||
SharedInterruptHandler::from(m_irq_number).register_handler(*this);
|
||||
disable_interrupts();
|
||||
}
|
||||
|
||||
InterruptHandler::~InterruptHandler()
|
||||
{
|
||||
disable_interrupts();
|
||||
SharedInterruptHandler::from(m_irq_number).unregister_handler(*this);
|
||||
}
|
||||
|
||||
void InterruptHandler::enable_interrupts()
|
||||
{
|
||||
m_enabled = true;
|
||||
}
|
||||
|
||||
void InterruptHandler::change_irq_number(u8 irq_number)
|
||||
{
|
||||
bool was_enabled = m_enabled;
|
||||
disable_interrupts();
|
||||
SharedInterruptHandler::from(m_irq_number).unregister_handler(*this);
|
||||
m_irq_number = irq_number;
|
||||
SharedInterruptHandler::from(m_irq_number).register_handler(*this);
|
||||
if (was_enabled)
|
||||
enable_interrupts();
|
||||
}
|
||||
|
||||
void InterruptHandler::disable_interrupts()
|
||||
{
|
||||
m_enabled = false;
|
||||
}
|
||||
|
||||
InterruptHandler::Enabler::Enabler(InterruptHandler& handler)
|
||||
: m_handler(handler)
|
||||
, m_was_enabled(m_handler.is_enabled())
|
||||
{
|
||||
m_handler.enable_interrupts();
|
||||
}
|
||||
InterruptHandler::Enabler::~Enabler()
|
||||
{
|
||||
if (!m_was_enabled)
|
||||
m_handler.disable_interrupts();
|
||||
}
|
|
@ -1,60 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <AK/Types.h>
|
||||
|
||||
class InterruptHandler {
|
||||
public:
|
||||
class Enabler {
|
||||
public:
|
||||
explicit Enabler(InterruptHandler&);
|
||||
~Enabler();
|
||||
|
||||
private:
|
||||
InterruptHandler& m_handler;
|
||||
bool m_was_enabled;
|
||||
};
|
||||
friend class Enabler;
|
||||
|
||||
public:
|
||||
virtual ~InterruptHandler();
|
||||
virtual void handle_interrupt() = 0;
|
||||
|
||||
u8 irq_number() const { return m_irq_number; }
|
||||
bool is_enabled() const { return m_enabled; }
|
||||
|
||||
protected:
|
||||
void enable_interrupts();
|
||||
void change_irq_number(u8 irq_number);
|
||||
void disable_interrupts();
|
||||
explicit InterruptHandler(u8 irq);
|
||||
|
||||
private:
|
||||
bool m_enabled { false };
|
||||
u8 m_irq_number { 0 };
|
||||
};
|
|
@ -1,121 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <Kernel/Arch/i386/CPU.h>
|
||||
#include <Kernel/Arch/i386/PIC.h>
|
||||
#include <Kernel/InterruptHandler.h>
|
||||
#include <Kernel/SharedInterruptHandler.h>
|
||||
|
||||
//#define INTERRUPT_DEBUG
|
||||
|
||||
SharedInterruptHandler& SharedInterruptHandler::from(u8 interrupt_number)
|
||||
{
|
||||
return get_interrupt_handler(interrupt_number);
|
||||
}
|
||||
|
||||
void SharedInterruptHandler::initialize(u8 interrupt_number)
|
||||
{
|
||||
new SharedInterruptHandler(interrupt_number);
|
||||
}
|
||||
|
||||
void SharedInterruptHandler::register_handler(InterruptHandler& handler)
|
||||
{
|
||||
#ifdef INTERRUPT_DEBUG
|
||||
kprintf("Interrupt Handler registered @ Shared Interrupt Handler %d\n", m_interrupt_number);
|
||||
#endif
|
||||
m_handlers.set(&handler);
|
||||
enable_interrupt_vector();
|
||||
}
|
||||
void SharedInterruptHandler::unregister_handler(InterruptHandler& handler)
|
||||
{
|
||||
#ifdef INTERRUPT_DEBUG
|
||||
kprintf("Interrupt Handler unregistered @ Shared Interrupt Handler %d\n", m_interrupt_number);
|
||||
#endif
|
||||
m_handlers.remove(&handler);
|
||||
if (m_handlers.is_empty())
|
||||
disable_interrupt_vector();
|
||||
}
|
||||
|
||||
SharedInterruptHandler::SharedInterruptHandler(u8 interrupt_number)
|
||||
: m_interrupt_number(interrupt_number)
|
||||
, m_enabled(true)
|
||||
{
|
||||
#ifdef INTERRUPT_DEBUG
|
||||
kprintf("Shared Interrupt Handler registered @ %d\n", m_interrupt_number);
|
||||
#endif
|
||||
register_shared_interrupt_handler(m_interrupt_number, *this);
|
||||
disable_interrupt_vector();
|
||||
}
|
||||
|
||||
SharedInterruptHandler::~SharedInterruptHandler()
|
||||
{
|
||||
#ifdef INTERRUPT_DEBUG
|
||||
kprintf("Shared Interrupt Handler unregistered @ %d\n", m_interrupt_number);
|
||||
#endif
|
||||
disable_interrupt_vector();
|
||||
unregister_shared_interrupt_handler(m_interrupt_number, *this);
|
||||
}
|
||||
|
||||
void SharedInterruptHandler::handle_interrupt()
|
||||
{
|
||||
#ifdef INTERRUPT_DEBUG
|
||||
kprintf("Interrupt @ %d\n", m_interrupt_number);
|
||||
kprintf("Interrupt Handlers registered - %d\n", m_handlers.size());
|
||||
#endif
|
||||
int i = 0;
|
||||
for (auto* handler : m_handlers) {
|
||||
#ifdef INTERRUPT_DEBUG
|
||||
kprintf("Going for Interrupt Handling @ %d, Shared Interrupt %d\n", i, m_interrupt_number);
|
||||
#endif
|
||||
ASSERT(handler != nullptr);
|
||||
if (handler->is_enabled())
|
||||
handler->handle_interrupt();
|
||||
|
||||
#ifdef INTERRUPT_DEBUG
|
||||
kprintf("Going for Interrupt Handling @ %d, Shared Interrupt %d - End\n", i, m_interrupt_number);
|
||||
#endif
|
||||
i++;
|
||||
}
|
||||
// FIXME: Determine if we use IRQs or MSIs (in the future) to send EOI...
|
||||
}
|
||||
|
||||
void SharedInterruptHandler::enable_interrupt_vector()
|
||||
{
|
||||
if (m_enabled)
|
||||
return;
|
||||
m_enabled = true;
|
||||
// FIXME: Determine if we use IRQs or MSIs (in the future) to enable the interrupt vector...
|
||||
PIC::enable(m_interrupt_number);
|
||||
}
|
||||
|
||||
void SharedInterruptHandler::disable_interrupt_vector()
|
||||
{
|
||||
if (!m_enabled)
|
||||
return;
|
||||
m_enabled = false;
|
||||
// FIXME: Determine if we use IRQs or MSIs (in the future) to disable the interrupt vector...
|
||||
PIC::disable(m_interrupt_number);
|
||||
}
|
|
@ -1,53 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <AK/HashTable.h>
|
||||
#include <AK/NonnullOwnPtr.h>
|
||||
#include <AK/Types.h>
|
||||
|
||||
class InterruptHandler;
|
||||
class SharedInterruptHandler final {
|
||||
public:
|
||||
static void initialize(u8 interrupt_number);
|
||||
static SharedInterruptHandler& from(u8 interrupt_number);
|
||||
~SharedInterruptHandler();
|
||||
void handle_interrupt();
|
||||
|
||||
u8 interrupt_number() const { return m_interrupt_number; }
|
||||
|
||||
void register_handler(InterruptHandler&);
|
||||
void unregister_handler(InterruptHandler&);
|
||||
|
||||
private:
|
||||
void enable_interrupt_vector();
|
||||
void disable_interrupt_vector();
|
||||
explicit SharedInterruptHandler(u8 interrupt_number);
|
||||
HashTable<InterruptHandler*> m_handlers;
|
||||
u8 m_interrupt_number { 0 };
|
||||
bool m_enabled { false };
|
||||
};
|
Loading…
Reference in a new issue