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https://github.com/LadybirdBrowser/ladybird.git
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Kernel/riscv64: Make the kernel compile
This commits inserts TODOs into all necessary places to make the kernel compile on riscv64!
This commit is contained in:
parent
b6ac2ed34d
commit
da88d766b2
Notes:
sideshowbarker
2024-07-16 20:44:03 +09:00
Author: https://github.com/spholz Commit: https://github.com/SerenityOS/serenity/commit/da88d766b2 Pull-request: https://github.com/SerenityOS/serenity/pull/21542 Reviewed-by: https://github.com/ADKaster Reviewed-by: https://github.com/Hendiadyoin1
37 changed files with 633 additions and 5 deletions
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@ -20,6 +20,8 @@
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# include <Kernel/Arch/x86_64/CPU.h>
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#elif ARCH(AARCH64)
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# include <Kernel/Arch/aarch64/CPU.h>
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#elif ARCH(RISCV64)
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# include <Kernel/Arch/riscv64/CPU.h>
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#else
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# error "Unknown architecture"
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#endif
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@ -12,6 +12,8 @@
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# include <Kernel/Arch/x86_64/IRQController.h>
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#elif ARCH(AARCH64)
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# include <Kernel/Arch/aarch64/IRQController.h>
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#elif ARCH(RISCV64)
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# include <Kernel/Arch/riscv64/IRQController.h>
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#else
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# error "Unknown architecture"
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#endif
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@ -12,6 +12,8 @@
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# include <Kernel/Arch/x86_64/InterruptManagement.h>
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#elif ARCH(AARCH64)
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# include <Kernel/Arch/aarch64/InterruptManagement.h>
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#elif ARCH(RISCV64)
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# include <Kernel/Arch/riscv64/InterruptManagement.h>
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#else
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# error "Unknown architecture"
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#endif
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@ -6,6 +6,7 @@
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#pragma once
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#include <AK/Error.h>
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#include <AK/Platform.h>
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#include <AK/Types.h>
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@ -14,7 +14,7 @@ u64 msi_address_register(u8 destination_id, bool redirection_hint, bool destinat
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u32 msi_data_register(u8 vector, bool level_trigger, bool assert);
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u32 msix_vector_control_register(u32 vector_control, bool mask);
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void msi_signal_eoi();
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#elif ARCH(AARCH64)
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#elif ARCH(AARCH64) || ARCH(RISCV64)
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[[maybe_unused]] static u64 msi_address_register([[maybe_unused]] u8 destination_id, [[maybe_unused]] bool redirection_hint, [[maybe_unused]] bool destination_mode)
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{
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TODO_AARCH64();
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@ -13,6 +13,8 @@
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# include <Kernel/Arch/x86_64/PageDirectory.h>
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#elif ARCH(AARCH64)
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# include <Kernel/Arch/aarch64/PageDirectory.h>
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#elif ARCH(RISCV64)
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# include <Kernel/Arch/riscv64/PageDirectory.h>
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#else
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# error "Unknown architecture"
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#endif
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10
Kernel/Arch/riscv64/CPU.h
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10
Kernel/Arch/riscv64/CPU.h
Normal file
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@ -0,0 +1,10 @@
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Platform.h>
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VALIDATE_IS_RISCV64()
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16
Kernel/Arch/riscv64/DebugOutput.cpp
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16
Kernel/Arch/riscv64/DebugOutput.cpp
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@ -0,0 +1,16 @@
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Library/Assertions.h>
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namespace Kernel {
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void debug_output(char)
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{
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TODO_RISCV64();
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}
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}
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16
Kernel/Arch/riscv64/Delay.cpp
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16
Kernel/Arch/riscv64/Delay.cpp
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@ -0,0 +1,16 @@
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Arch/Delay.h>
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namespace Kernel {
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void microseconds_delay(u32)
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{
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TODO_RISCV64();
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}
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}
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17
Kernel/Arch/riscv64/Firmware/ACPI/StaticParsing.cpp
Normal file
17
Kernel/Arch/riscv64/Firmware/ACPI/StaticParsing.cpp
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@ -0,0 +1,17 @@
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Firmware/ACPI/StaticParsing.h>
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namespace Kernel::ACPI::StaticParsing {
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ErrorOr<Optional<PhysicalAddress>> find_rsdp_in_platform_specific_memory_locations()
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{
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// FIXME: Implement finding RSDP for riscv64.
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return Optional<PhysicalAddress> {};
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}
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}
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37
Kernel/Arch/riscv64/IRQController.h
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37
Kernel/Arch/riscv64/IRQController.h
Normal file
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@ -0,0 +1,37 @@
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/AtomicRefCounted.h>
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#include <AK/StringView.h>
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#include <AK/Types.h>
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#include <Kernel/Interrupts/GenericInterruptHandler.h>
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#include <AK/Platform.h>
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VALIDATE_IS_RISCV64()
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namespace Kernel {
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class IRQController : public AtomicRefCounted<IRQController> {
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public:
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virtual ~IRQController() = default;
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virtual void enable(GenericInterruptHandler const&) = 0;
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virtual void disable(GenericInterruptHandler const&) = 0;
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virtual void eoi(GenericInterruptHandler const&) const = 0;
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virtual u64 pending_interrupts() const = 0;
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virtual StringView model() const = 0;
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protected:
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IRQController() = default;
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};
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}
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36
Kernel/Arch/riscv64/InterruptController.h
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36
Kernel/Arch/riscv64/InterruptController.h
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/StringView.h>
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#include <AK/Types.h>
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#include <Kernel/Arch/riscv64/IRQController.h>
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#include <AK/Platform.h>
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VALIDATE_IS_RISCV64()
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namespace Kernel::RISCV64 {
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class InterruptController : public IRQController {
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public:
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InterruptController();
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private:
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virtual void enable(GenericInterruptHandler const&) override;
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virtual void disable(GenericInterruptHandler const&) override;
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virtual void eoi(GenericInterruptHandler const&) const override;
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virtual u64 pending_interrupts() const override;
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virtual StringView model() const override
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{
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return "cpu-intc"sv;
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}
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};
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}
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60
Kernel/Arch/riscv64/InterruptManagement.cpp
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60
Kernel/Arch/riscv64/InterruptManagement.cpp
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Arch/Interrupts.h>
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#include <Kernel/Arch/riscv64/IRQController.h>
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#include <Kernel/Arch/riscv64/InterruptManagement.h>
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#include <Kernel/Interrupts/SharedIRQHandler.h>
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namespace Kernel {
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static InterruptManagement* s_interrupt_management;
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bool InterruptManagement::initialized()
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{
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return s_interrupt_management != nullptr;
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}
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InterruptManagement& InterruptManagement::the()
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{
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VERIFY(InterruptManagement::initialized());
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return *s_interrupt_management;
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}
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void InterruptManagement::initialize()
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{
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VERIFY(!InterruptManagement::initialized());
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s_interrupt_management = new InterruptManagement;
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the().find_controllers();
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}
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void InterruptManagement::find_controllers()
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{
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TODO_RISCV64();
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}
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u8 InterruptManagement::acquire_mapped_interrupt_number(u8)
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{
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TODO_RISCV64();
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}
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Vector<NonnullLockRefPtr<IRQController>> const& InterruptManagement::controllers()
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{
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return m_interrupt_controllers;
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}
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NonnullLockRefPtr<IRQController> InterruptManagement::get_responsible_irq_controller(size_t)
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{
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TODO_RISCV64();
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}
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void InterruptManagement::enumerate_interrupt_handlers(Function<void(GenericInterruptHandler&)>)
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{
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TODO_RISCV64();
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}
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}
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37
Kernel/Arch/riscv64/InterruptManagement.h
Normal file
37
Kernel/Arch/riscv64/InterruptManagement.h
Normal file
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Vector.h>
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#include <Kernel/Arch/riscv64/IRQController.h>
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#include <AK/Platform.h>
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VALIDATE_IS_RISCV64()
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namespace Kernel {
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class InterruptManagement {
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public:
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static InterruptManagement& the();
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static void initialize();
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static bool initialized();
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static u8 acquire_mapped_interrupt_number(u8 original_irq);
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Vector<NonnullLockRefPtr<IRQController>> const& controllers();
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NonnullLockRefPtr<IRQController> get_responsible_irq_controller(size_t irq_number);
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void enumerate_interrupt_handlers(Function<void(GenericInterruptHandler&)>);
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private:
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InterruptManagement() = default;
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void find_controllers();
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Vector<NonnullLockRefPtr<IRQController>> m_interrupt_controllers;
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};
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}
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47
Kernel/Arch/riscv64/Interrupts.cpp
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47
Kernel/Arch/riscv64/Interrupts.cpp
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/Error.h>
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#include <AK/Types.h>
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#include <Kernel/Arch/TrapFrame.h>
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#include <Kernel/Interrupts/GenericInterruptHandler.h>
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namespace Kernel {
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void dump_registers(RegisterState const&)
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{
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}
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// FIXME: Share the code below with Arch/x86_64/Interrupts.cpp
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// While refactoring, the interrupt handlers can also be moved into the InterruptManagement class.
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GenericInterruptHandler& get_interrupt_handler(u8)
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{
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TODO_RISCV64();
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}
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// Sets the reserved flag on `number_of_irqs` if it finds unused interrupt handler on
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// a contiguous range.
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ErrorOr<u8> reserve_interrupt_handlers(u8)
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{
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TODO_RISCV64();
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}
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void register_generic_interrupt_handler(u8, GenericInterruptHandler&)
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{
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TODO_RISCV64();
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}
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void unregister_generic_interrupt_handler(u8, GenericInterruptHandler&)
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{
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}
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void initialize_interrupts()
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{
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TODO_RISCV64();
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}
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}
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19
Kernel/Arch/riscv64/PCI.cpp
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19
Kernel/Arch/riscv64/PCI.cpp
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Library/Assertions.h>
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namespace Kernel::PCI {
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bool g_pci_access_io_probe_failed { false };
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bool g_pci_access_is_disabled_from_commandline { true };
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void initialize()
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{
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TODO_RISCV64();
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}
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}
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65
Kernel/Arch/riscv64/PageDirectory.cpp
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65
Kernel/Arch/riscv64/PageDirectory.cpp
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/Format.h>
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#include <AK/Singleton.h>
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#include <Kernel/Arch/PageDirectory.h>
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#include <Kernel/Library/LockRefPtr.h>
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#include <Kernel/Sections.h>
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namespace Kernel::Memory {
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void PageDirectory::register_page_directory(PageDirectory*)
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{
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TODO_RISCV64();
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}
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void PageDirectory::deregister_page_directory(PageDirectory*)
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{
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TODO_RISCV64();
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}
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ErrorOr<NonnullLockRefPtr<PageDirectory>> PageDirectory::try_create_for_userspace(Process&)
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{
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TODO_RISCV64();
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}
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LockRefPtr<PageDirectory> PageDirectory::find_current()
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{
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TODO_RISCV64();
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}
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void activate_kernel_page_directory(PageDirectory const&)
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{
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TODO_RISCV64();
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}
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void activate_page_directory(PageDirectory const&, Thread*)
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{
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TODO_RISCV64();
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}
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UNMAP_AFTER_INIT NonnullLockRefPtr<PageDirectory> PageDirectory::must_create_kernel_page_directory()
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{
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return adopt_lock_ref_if_nonnull(new (nothrow) PageDirectory).release_nonnull();
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}
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PageDirectory::PageDirectory() = default;
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UNMAP_AFTER_INIT void PageDirectory::allocate_kernel_directory()
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{
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TODO_RISCV64();
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}
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PageDirectory::~PageDirectory()
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{
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if (is_root_table_initialized()) {
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deregister_page_directory(this);
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}
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}
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}
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24
Kernel/Arch/riscv64/Panic.cpp
Normal file
24
Kernel/Arch/riscv64/Panic.cpp
Normal file
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/*
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* Copyright (c) 2022, Timon Kruiper <timonkruiper@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Arch/Processor.h>
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#include <Kernel/KSyms.h>
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#include <Kernel/Library/Panic.h>
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// FIXME: Merge the code in this file with Kernel/Library/Panic.cpp once the proper abstractions are in place.
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// Note: This is required here, since __assertion_failed should be out of the Kernel namespace,
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// but the PANIC macro uses functions that require the Kernel namespace.
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using namespace Kernel;
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[[noreturn]] void __assertion_failed(char const* msg, char const* file, unsigned line, char const* func)
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{
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critical_dmesgln("ASSERTION FAILED: {}", msg);
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critical_dmesgln("{}:{} in {}", file, line, func);
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// Used for printing a nice backtrace!
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PANIC("Aborted");
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}
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21
Kernel/Arch/riscv64/PowerState.cpp
Normal file
21
Kernel/Arch/riscv64/PowerState.cpp
Normal file
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/*
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* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <Kernel/Arch/PowerState.h>
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namespace Kernel {
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void arch_specific_reboot()
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{
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TODO_RISCV64();
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}
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void arch_specific_poweroff()
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{
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TODO_RISCV64();
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}
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}
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109
Kernel/Arch/riscv64/SafeMem.cpp
Normal file
109
Kernel/Arch/riscv64/SafeMem.cpp
Normal file
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/*
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* Copyright (c) 2022, Timon Kruiper <timonkruiper@gmail.com>
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||||
* Copyright (c) 2023, Daniel Bertalan <dani@danielbertalan.dev>
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*
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* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <Kernel/Arch/RegisterState.h>
|
||||
#include <Kernel/Arch/SafeMem.h>
|
||||
#include <Kernel/Library/StdLib.h>
|
||||
|
||||
#define CODE_SECTION(section_name) __attribute__((section(section_name)))
|
||||
|
||||
extern "C" u8 start_of_safemem_text[];
|
||||
extern "C" u8 end_of_safemem_text[];
|
||||
|
||||
extern "C" u8 start_of_safemem_atomic_text[];
|
||||
extern "C" u8 end_of_safemem_atomic_text[];
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
CODE_SECTION(".text.safemem")
|
||||
NEVER_INLINE FLATTEN bool safe_memset(void* dest_ptr, int c, size_t n, void*& fault_at)
|
||||
{
|
||||
// FIXME: Actually implement a safe memset.
|
||||
auto* dest = static_cast<u8*>(dest_ptr);
|
||||
for (; n--;)
|
||||
*dest++ = c;
|
||||
fault_at = nullptr;
|
||||
return true;
|
||||
}
|
||||
|
||||
CODE_SECTION(".text.safemem")
|
||||
NEVER_INLINE FLATTEN ssize_t safe_strnlen(char const* str, unsigned long max_n, void*& fault_at)
|
||||
{
|
||||
// FIXME: Actually implement a safe strnlen.
|
||||
size_t len = 0;
|
||||
for (; len < max_n && *str; str++)
|
||||
len++;
|
||||
fault_at = nullptr;
|
||||
return len;
|
||||
}
|
||||
|
||||
CODE_SECTION(".text.safemem")
|
||||
NEVER_INLINE FLATTEN bool safe_memcpy(void* dest_ptr, void const* src_ptr, unsigned long n, void*& fault_at)
|
||||
{
|
||||
// FIXME: Actually implement a safe memcpy.
|
||||
auto* pd = static_cast<u8*>(dest_ptr);
|
||||
auto const* ps = static_cast<u8 const*>(src_ptr);
|
||||
for (; n--;)
|
||||
*pd++ = *ps++;
|
||||
fault_at = nullptr;
|
||||
return true;
|
||||
}
|
||||
|
||||
CODE_SECTION(".text.safemem.atomic")
|
||||
NEVER_INLINE FLATTEN Optional<bool> safe_atomic_compare_exchange_relaxed(u32 volatile* var, u32& expected, u32 val)
|
||||
{
|
||||
// FIXME: Handle access faults.
|
||||
return AK::atomic_compare_exchange_strong(var, expected, val, AK::memory_order_relaxed);
|
||||
}
|
||||
|
||||
CODE_SECTION(".text.safemem.atomic")
|
||||
NEVER_INLINE FLATTEN Optional<u32> safe_atomic_load_relaxed(u32 volatile* var)
|
||||
{
|
||||
// FIXME: Handle access faults.
|
||||
return AK::atomic_load(var, AK::memory_order_relaxed);
|
||||
}
|
||||
|
||||
CODE_SECTION(".text.safemem.atomic")
|
||||
NEVER_INLINE FLATTEN Optional<u32> safe_atomic_fetch_add_relaxed(u32 volatile* var, u32 val)
|
||||
{
|
||||
// FIXME: Handle access faults.
|
||||
return AK::atomic_fetch_add(var, val, AK::memory_order_relaxed);
|
||||
}
|
||||
|
||||
CODE_SECTION(".text.safemem.atomic")
|
||||
NEVER_INLINE FLATTEN Optional<u32> safe_atomic_exchange_relaxed(u32 volatile* var, u32 val)
|
||||
{
|
||||
// FIXME: Handle access faults.
|
||||
return AK::atomic_exchange(var, val, AK::memory_order_relaxed);
|
||||
}
|
||||
|
||||
CODE_SECTION(".text.safemem.atomic")
|
||||
NEVER_INLINE FLATTEN bool safe_atomic_store_relaxed(u32 volatile* var, u32 val)
|
||||
{
|
||||
// FIXME: Handle access faults.
|
||||
AK::atomic_store(var, val);
|
||||
return true;
|
||||
}
|
||||
|
||||
bool handle_safe_access_fault(RegisterState& regs, FlatPtr fault_address)
|
||||
{
|
||||
FlatPtr ip = regs.ip();
|
||||
|
||||
if (ip >= (FlatPtr)&start_of_safemem_text && ip < (FlatPtr)&end_of_safemem_text) {
|
||||
dbgln("FIXME: Faulted while accessing userspace address {:p}.", fault_address);
|
||||
dbgln(" We need to jump back into the appropriate SafeMem function, set fault_at and return failure.");
|
||||
TODO_RISCV64();
|
||||
} else if (ip >= (FlatPtr)&start_of_safemem_atomic_text && ip < (FlatPtr)&end_of_safemem_atomic_text) {
|
||||
dbgln("FIXME: Faulted while accessing userspace address {:p}.", fault_address);
|
||||
dbgln(" We need to jump back into the appropriate atomic SafeMem function and return failure.");
|
||||
TODO_RISCV64();
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
}
|
25
Kernel/Arch/riscv64/pre_init.cpp
Normal file
25
Kernel/Arch/riscv64/pre_init.cpp
Normal file
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-2-Clause
|
||||
*/
|
||||
|
||||
#include <AK/Types.h>
|
||||
|
||||
#include <Kernel/Arch/Processor.h>
|
||||
#include <Kernel/Memory/PhysicalAddress.h>
|
||||
|
||||
namespace Kernel {
|
||||
|
||||
extern "C" [[noreturn]] void pre_init(FlatPtr mhartid, PhysicalPtr fdt_phys_addr);
|
||||
extern "C" [[noreturn]] void pre_init(FlatPtr mhartid, PhysicalPtr fdt_phys_addr)
|
||||
{
|
||||
(void)mhartid;
|
||||
(void)fdt_phys_addr;
|
||||
|
||||
// FIXME: Implement this
|
||||
|
||||
Processor::halt();
|
||||
}
|
||||
|
||||
}
|
|
@ -9,6 +9,7 @@
|
|||
#include <AK/Badge.h>
|
||||
#include <AK/DistinctNumeric.h>
|
||||
#include <AK/Function.h>
|
||||
#include <AK/RefCounted.h>
|
||||
#include <AK/Types.h>
|
||||
#include <AK/Vector.h>
|
||||
#include <Kernel/Debug.h>
|
||||
|
|
|
@ -512,9 +512,22 @@ elseif("${SERENITY_ARCH}" STREQUAL "riscv64")
|
|||
Arch/Processor.cpp
|
||||
kprintf.cpp
|
||||
|
||||
Arch/riscv64/Firmware/ACPI/StaticParsing.cpp
|
||||
|
||||
Arch/riscv64/boot.S
|
||||
Arch/riscv64/DebugOutput.cpp
|
||||
Arch/riscv64/Delay.cpp
|
||||
Arch/riscv64/InterruptManagement.cpp
|
||||
Arch/riscv64/Interrupts.cpp
|
||||
Arch/riscv64/PageDirectory.cpp
|
||||
Arch/riscv64/Panic.cpp
|
||||
Arch/riscv64/PCI.cpp
|
||||
Arch/riscv64/PowerState.cpp
|
||||
Arch/riscv64/pre_init.cpp
|
||||
Arch/riscv64/Processor.cpp
|
||||
Arch/riscv64/SafeMem.cpp
|
||||
Arch/riscv64/SBI.cpp
|
||||
Arch/riscv64/SmapDisabler.cpp
|
||||
)
|
||||
|
||||
add_compile_options(-fno-stack-protector -fno-sanitize=all)
|
||||
|
|
|
@ -122,6 +122,11 @@ UNMAP_AFTER_INIT void StorageManagement::enumerate_pci_controllers(bool force_pi
|
|||
#elif ARCH(AARCH64)
|
||||
(void)force_pio;
|
||||
TODO_AARCH64();
|
||||
#elif ARCH(RISCV64)
|
||||
(void)force_pio;
|
||||
if (subclass_code == SubclassID::IDEController && kernel_command_line().is_ide_enabled()) {
|
||||
TODO_RISCV64();
|
||||
}
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
|
|
@ -81,6 +81,10 @@ ErrorOr<void> SysFSCPUInformation::try_generate(KBufferBuilder& builder)
|
|||
(void)builder;
|
||||
dmesgln("TODO: Implement ProcessorInfo for AArch64!");
|
||||
return Error::from_errno(EINVAL);
|
||||
#elif ARCH(RISCV64)
|
||||
(void)builder;
|
||||
dmesgln("TODO: Implement ProcessorInfo for riscv64!");
|
||||
return Error::from_errno(EINVAL);
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
#include <Kernel/Sections.h>
|
||||
#include <Kernel/Tasks/PerformanceManager.h>
|
||||
|
||||
#if ARCH(X86_64) || ARCH(AARCH64)
|
||||
#if ARCH(X86_64) || ARCH(AARCH64) || ARCH(RISCV64)
|
||||
static constexpr size_t CHUNK_SIZE = 64;
|
||||
#else
|
||||
# error Unknown architecture
|
||||
|
|
|
@ -90,7 +90,7 @@ UNMAP_AFTER_INIT static void load_kernel_symbols_from_data(Bytes buffer)
|
|||
// of zero, so the address of a symbol does not need to be offset by the kernel_load_base.
|
||||
#if ARCH(X86_64)
|
||||
ksym.address = kernel_load_base + address;
|
||||
#elif ARCH(AARCH64)
|
||||
#elif ARCH(AARCH64) || ARCH(RISCV64)
|
||||
ksym.address = address;
|
||||
#else
|
||||
# error "Unknown architecture"
|
||||
|
|
|
@ -107,6 +107,8 @@ NEVER_INLINE void syscall_handler(TrapFrame* trap)
|
|||
clac();
|
||||
#elif ARCH(AARCH64)
|
||||
// FIXME: Implement the security mechanism for aarch64
|
||||
#elif ARCH(RISCV64)
|
||||
// FIXME: Implement the security mechanism for riscv64
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
@ -148,6 +150,8 @@ NEVER_INLINE void syscall_handler(TrapFrame* trap)
|
|||
}
|
||||
#elif ARCH(AARCH64)
|
||||
// FIXME: Implement the security mechanism for aarch64
|
||||
#elif ARCH(RISCV64)
|
||||
// FIXME: Implement the security mechanism for riscv64
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
|
|
@ -156,6 +156,10 @@ static ErrorOr<FlatPtr> make_userspace_context_for_main_thread([[maybe_unused]]
|
|||
regs.x[0] = argv_entries.size();
|
||||
regs.x[1] = argv;
|
||||
regs.x[2] = envp;
|
||||
#elif ARCH(RISCV64)
|
||||
(void)argv;
|
||||
(void)envp;
|
||||
TODO_RISCV64();
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
@ -737,6 +741,8 @@ static Array<ELF::AuxiliaryValue, auxiliary_vector_size> generate_auxiliary_vect
|
|||
{ ELF::AuxiliaryValue::HwCap, (long)CPUID(1).edx() },
|
||||
#elif ARCH(AARCH64)
|
||||
{ ELF::AuxiliaryValue::HwCap, (long)0 },
|
||||
#elif ARCH(RISCV64)
|
||||
{ ELF::AuxiliaryValue::HwCap, (long)0 }, // TODO
|
||||
#else
|
||||
# error "Unknown architecture"
|
||||
#endif
|
||||
|
|
|
@ -150,6 +150,10 @@ ErrorOr<FlatPtr> Process::sys$fork(RegisterState& regs)
|
|||
child_regs.spsr_el1 = regs.spsr_el1;
|
||||
child_regs.elr_el1 = regs.elr_el1;
|
||||
child_regs.sp_el0 = regs.sp_el0;
|
||||
#elif ARCH(RISCV64)
|
||||
(void)child_regs;
|
||||
(void)regs;
|
||||
TODO_RISCV64();
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
|
|
@ -258,6 +258,9 @@ ErrorOr<FlatPtr> Thread::peek_debug_register(u32 register_index)
|
|||
#elif ARCH(AARCH64)
|
||||
(void)register_index;
|
||||
TODO_AARCH64();
|
||||
#elif ARCH(RISCV64)
|
||||
(void)register_index;
|
||||
TODO_RISCV64();
|
||||
#else
|
||||
# error "Unknown architecture"
|
||||
#endif
|
||||
|
@ -290,6 +293,10 @@ ErrorOr<void> Thread::poke_debug_register(u32 register_index, FlatPtr data)
|
|||
(void)register_index;
|
||||
(void)data;
|
||||
TODO_AARCH64();
|
||||
#elif ARCH(RISCV64)
|
||||
(void)register_index;
|
||||
(void)data;
|
||||
TODO_RISCV64();
|
||||
#else
|
||||
# error "Unknown architecture"
|
||||
#endif
|
||||
|
|
|
@ -76,6 +76,8 @@ ErrorOr<FlatPtr> Process::sys$create_thread(void* (*entry)(void*), Userspace<Sys
|
|||
regs.x[1] = (FlatPtr)params.entry_argument;
|
||||
regs.x[2] = (FlatPtr)params.stack_location;
|
||||
regs.x[3] = (FlatPtr)params.stack_size;
|
||||
#elif ARCH(RISCV64)
|
||||
TODO_RISCV64();
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
|
|
@ -15,6 +15,8 @@ namespace Kernel {
|
|||
# define UNAME_MACHINE "x86_64"
|
||||
#elif ARCH(AARCH64)
|
||||
# define UNAME_MACHINE "AArch64"
|
||||
#elif ARCH(RISCV64)
|
||||
# define UNAME_MACHINE "riscv64"
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
|
|
@ -120,7 +120,7 @@ ErrorOr<void> Coredump::write_elf_header()
|
|||
elf_file_header.e_ident[EI_MAG1] = 'E';
|
||||
elf_file_header.e_ident[EI_MAG2] = 'L';
|
||||
elf_file_header.e_ident[EI_MAG3] = 'F';
|
||||
#if ARCH(X86_64) || ARCH(AARCH64)
|
||||
#if ARCH(X86_64) || ARCH(AARCH64) || ARCH(RISCV64)
|
||||
elf_file_header.e_ident[EI_CLASS] = ELFCLASS64;
|
||||
#else
|
||||
# error Unknown architecture
|
||||
|
@ -140,6 +140,8 @@ ErrorOr<void> Coredump::write_elf_header()
|
|||
elf_file_header.e_machine = EM_X86_64;
|
||||
#elif ARCH(AARCH64)
|
||||
elf_file_header.e_machine = EM_AARCH64;
|
||||
#elif ARCH(RISCV64)
|
||||
elf_file_header.e_machine = EM_RISCV;
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
|
|
@ -457,6 +457,20 @@ void signal_trampoline_dummy()
|
|||
".global asm_signal_trampoline_end\n"
|
||||
"asm_signal_trampoline_end: \n" ::[sigreturn_syscall_number] "i"(Syscall::SC_sigreturn),
|
||||
[offset_to_first_register_slot] "i"(offset_to_first_register_slot));
|
||||
#elif ARCH(RISCV64)
|
||||
constexpr static auto offset_to_a0_slot = align_up_to(sizeof(__ucontext) + sizeof(siginfo) + sizeof(FPUState) + 3 * sizeof(FlatPtr), 16);
|
||||
asm(
|
||||
".global asm_signal_trampoline\n"
|
||||
"asm_signal_trampoline:\n"
|
||||
// stack state: 0, ucontext, signal_info (alignment = 16), fpu_state (alignment = 16), ucontext*, siginfo*, signal, handler
|
||||
|
||||
// FIXME: Implement this
|
||||
"unimp\n"
|
||||
|
||||
"\n"
|
||||
".global asm_signal_trampoline_end\n"
|
||||
"asm_signal_trampoline_end: \n" ::[sigreturn_syscall_number] "i"(Syscall::SC_sigreturn),
|
||||
[offset_to_first_register_slot] "i"(offset_to_a0_slot));
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
@ -500,6 +514,8 @@ void Process::crash(int signal, Optional<RegisterState const&> regs, bool out_of
|
|||
constexpr bool userspace_backtrace = false;
|
||||
#elif ARCH(AARCH64)
|
||||
constexpr bool userspace_backtrace = true;
|
||||
#elif ARCH(RISCV64)
|
||||
constexpr bool userspace_backtrace = true;
|
||||
#else
|
||||
# error "Unknown architecture"
|
||||
#endif
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
# include <Kernel/Arch/x86_64/Time/RTC.h>
|
||||
#elif ARCH(AARCH64)
|
||||
# include <Kernel/Arch/aarch64/RPi/Timer.h>
|
||||
#elif ARCH(RISCV64)
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
@ -135,6 +136,8 @@ MonotonicTime TimeManagement::monotonic_time(TimePrecision precision) const
|
|||
#elif ARCH(AARCH64)
|
||||
// FIXME: Get rid of these horrible casts
|
||||
const_cast<RPi::Timer*>(static_cast<RPi::Timer const*>(m_system_timer.ptr()))->update_time(seconds, ticks, true);
|
||||
#elif ARCH(RISCV64)
|
||||
TODO_RISCV64();
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
@ -203,6 +206,8 @@ UNMAP_AFTER_INIT void TimeManagement::initialize([[maybe_unused]] u32 cpu)
|
|||
VERIFY(!s_the.is_initialized());
|
||||
s_the.ensure_instance();
|
||||
}
|
||||
#elif ARCH(RISCV64)
|
||||
TODO_RISCV64();
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
@ -231,7 +236,7 @@ UnixDateTime TimeManagement::boot_time()
|
|||
{
|
||||
#if ARCH(X86_64)
|
||||
return RTC::boot_time();
|
||||
#elif ARCH(AARCH64)
|
||||
#elif ARCH(AARCH64) || ARCH(RISCV64)
|
||||
// FIXME: Return correct boot time
|
||||
return UnixDateTime::epoch();
|
||||
#else
|
||||
|
@ -271,6 +276,8 @@ UNMAP_AFTER_INIT TimeManagement::TimeManagement()
|
|||
}
|
||||
#elif ARCH(AARCH64)
|
||||
probe_and_set_aarch64_hardware_timers();
|
||||
#elif ARCH(RISCV64)
|
||||
probe_and_set_riscv64_hardware_timers();
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
@ -474,6 +481,11 @@ UNMAP_AFTER_INIT bool TimeManagement::probe_and_set_aarch64_hardware_timers()
|
|||
|
||||
return true;
|
||||
}
|
||||
#elif ARCH(RISCV64)
|
||||
UNMAP_AFTER_INIT bool TimeManagement::probe_and_set_riscv64_hardware_timers()
|
||||
{
|
||||
TODO_RISCV64();
|
||||
}
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
|
|
@ -87,6 +87,8 @@ private:
|
|||
static void update_time(RegisterState const&);
|
||||
#elif ARCH(AARCH64)
|
||||
bool probe_and_set_aarch64_hardware_timers();
|
||||
#elif ARCH(RISCV64)
|
||||
bool probe_and_set_riscv64_hardware_timers();
|
||||
#else
|
||||
# error Unknown architecture
|
||||
#endif
|
||||
|
|
Loading…
Reference in a new issue