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LibJIT: Fix Assembler::add(reg, reg) and sub(reg, reg) encoding

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This commit is contained in:
Fabian Meyer 2023-10-28 22:11:22 +02:00 committed by Andreas Kling
parent 9258e253ca
commit 4afd782477
Notes: sideshowbarker 2024-07-17 03:03:15 +09:00 
Author: https://github.com/meyfa 🔰
Commit: https://github.com/SerenityOS/serenity/commit/4afd782477
Pull-request: https://github.com/SerenityOS/serenity/pull/21654
1 changed files with 6 additions and 6 deletions
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12
Userland/Libraries/LibJIT/Assembler.h
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@ -532,10 +532,10 @@ struct Assembler {
{
if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Reg) {
emit8(0x48
| ((to_underlying(dst.reg) >= 8) ? 1 << 2 : 0)
| ((to_underlying(src.reg) >= 8) ? 1 << 0 : 0));
| ((to_underlying(src.reg) >= 8) ? 1 << 2 : 0)
| ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
emit8(0x01);
emit8(0xc0 | (encode_reg(dst.reg) << 3) | encode_reg(src.reg));
emit8(0xc0 | (encode_reg(src.reg) << 3) | encode_reg(dst.reg));
} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i8()) {
emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
emit8(0x83);
@ -555,10 +555,10 @@ struct Assembler {
{
if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Reg) {
emit8(0x48
| ((to_underlying(dst.reg) >= 8) ? 1 << 2 : 0)
| ((to_underlying(src.reg) >= 8) ? 1 << 0 : 0));
| ((to_underlying(src.reg) >= 8) ? 1 << 2 : 0)
| ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
emit8(0x29);
emit8(0xc0 | (encode_reg(dst.reg) << 3) | encode_reg(src.reg));
emit8(0xc0 | (encode_reg(src.reg) << 3) | encode_reg(dst.reg));
} else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i8()) {
emit8(0x48 | ((to_underlying(dst.reg) >= 8) ? 1 << 0 : 0));
emit8(0x83);