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@@ -1,71 +1,70 @@
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-#include "board/board.h"
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+#include <nrfx_i2s.h>
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+#include "board/board.h"
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+#include "drivers/flash/qspi_flash_definitions.h"
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#include "drivers/gpio.h"
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#include "drivers/i2c.h"
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-#include "drivers/nrf5/uart_definitions.h"
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+#include "drivers/i2c_definitions.h"
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#include "drivers/nrf5/i2c_hal_definitions.h"
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#include "drivers/nrf5/spi_definitions.h"
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-#include "drivers/flash/qspi_flash_definitions.h"
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-#include "drivers/i2c_definitions.h"
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+#include "drivers/nrf5/uart_definitions.h"
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+#include "drivers/pwm.h"
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#include "drivers/qspi_definitions.h"
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#include "drivers/temperature.h"
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#include "drivers/voltage_monitor.h"
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#include "flash_region/flash_region.h"
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-#include "util/units.h"
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-#include "system/passert.h"
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#include "kernel/util/sleep.h"
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-#include "drivers/pwm.h"
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-
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-#include <nrfx_i2s.h>
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+#include "system/passert.h"
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+#include "util/units.h"
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// QSPI
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-#include <nrfx_qspi.h>
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+#include <hal/nrf_clock.h>
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+#include <hal/nrf_gpio.h>
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#include <nrfx_gpiote.h>
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+#include <nrfx_qspi.h>
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#include <nrfx_spim.h>
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#include <nrfx_twim.h>
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-#include <hal/nrf_gpio.h>
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-#include <hal/nrf_clock.h>
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-
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static QSPIPortState s_qspi_port_state;
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static QSPIPort QSPI_PORT = {
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- .state = &s_qspi_port_state,
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- .auto_polling_interval = 16,
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- .cs_gpio = NRF_GPIO_PIN_MAP(0, 17),
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- .clk_gpio = NRF_GPIO_PIN_MAP(0, 19),
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- .data_gpio = {
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- NRF_GPIO_PIN_MAP(0, 20),
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- NRF_GPIO_PIN_MAP(0, 21),
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- NRF_GPIO_PIN_MAP(0, 22),
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- NRF_GPIO_PIN_MAP(0, 23),
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- },
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+ .state = &s_qspi_port_state,
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+ .auto_polling_interval = 16,
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+ .cs_gpio = NRF_GPIO_PIN_MAP(0, 17),
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+ .clk_gpio = NRF_GPIO_PIN_MAP(0, 19),
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+ .data_gpio =
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+ {
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+ NRF_GPIO_PIN_MAP(0, 20),
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+ NRF_GPIO_PIN_MAP(0, 21),
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+ NRF_GPIO_PIN_MAP(0, 22),
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+ NRF_GPIO_PIN_MAP(0, 23),
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+ },
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};
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-QSPIPort * const QSPI = &QSPI_PORT;
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+QSPIPort *const QSPI = &QSPI_PORT;
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static QSPIFlashState s_qspi_flash_state;
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static QSPIFlash QSPI_FLASH_DEVICE = {
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- .state = &s_qspi_flash_state,
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- .qspi = &QSPI_PORT,
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- .default_fast_read_ddr_enabled = false,
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- .read_mode = QSPI_FLASH_READ_READ4IO,
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- .write_mode = QSPI_FLASH_WRITE_PP4O,
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- .reset_gpio = { GPIO_Port_NULL },
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+ .state = &s_qspi_flash_state,
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+ .qspi = &QSPI_PORT,
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+ .default_fast_read_ddr_enabled = false,
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+ .read_mode = QSPI_FLASH_READ_READ4IO,
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+ .write_mode = QSPI_FLASH_WRITE_PP4O,
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+ .reset_gpio = {GPIO_Port_NULL},
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};
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-QSPIFlash * const QSPI_FLASH = &QSPI_FLASH_DEVICE;
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+QSPIFlash *const QSPI_FLASH = &QSPI_FLASH_DEVICE;
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IRQ_MAP_NRFX(QSPI, nrfx_qspi_irq_handler);
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/* PERIPHERAL ID 43 */
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static UARTDeviceState s_dbg_uart_state;
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static UARTDevice DBG_UART_DEVICE = {
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- .state = &s_dbg_uart_state,
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- .tx_gpio = NRF_GPIO_PIN_MAP(0, 27),
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- .rx_gpio = NRF_GPIO_PIN_MAP(0, 5),
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- .rts_gpio = NRF_UARTE_PSEL_DISCONNECTED,
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- .cts_gpio = NRF_UARTE_PSEL_DISCONNECTED,
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- .periph = NRFX_UARTE_INSTANCE(0),
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- .counter = NRFX_TIMER_INSTANCE(2),
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+ .state = &s_dbg_uart_state,
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+ .tx_gpio = NRF_GPIO_PIN_MAP(0, 27),
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+ .rx_gpio = NRF_GPIO_PIN_MAP(0, 5),
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+ .rts_gpio = NRF_UARTE_PSEL_DISCONNECTED,
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+ .cts_gpio = NRF_UARTE_PSEL_DISCONNECTED,
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+ .periph = NRFX_UARTE_INSTANCE(0),
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+ .counter = NRFX_TIMER_INSTANCE(2),
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};
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-UARTDevice * const DBG_UART = &DBG_UART_DEVICE;
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+UARTDevice *const DBG_UART = &DBG_UART_DEVICE;
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IRQ_MAP_NRFX(UART0_UARTE0, nrfx_uarte_0_irq_handler);
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/* PERIPHERAL ID 8 */
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@@ -85,54 +84,58 @@ IRQ_MAP_NRFX(GPIOTE, nrfx_gpiote_0_irq_handler);
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static I2CBusState I2C_NPMC_IIC1_BUS_STATE = {};
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static const I2CBusHal I2C_NPMC_IIC1_BUS_HAL = {
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- .twim = NRFX_TWIM_INSTANCE(1),
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- .frequency = NRF_TWIM_FREQ_400K,
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+ .twim = NRFX_TWIM_INSTANCE(1),
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+ .frequency = NRF_TWIM_FREQ_400K,
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};
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static const I2CBus I2C_NPMC_IIC1_BUS = {
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- .state = &I2C_NPMC_IIC1_BUS_STATE,
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- .hal = &I2C_NPMC_IIC1_BUS_HAL,
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- .scl_gpio = {
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- .gpio = NRF5_GPIO_RESOURCE_EXISTS,
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- .gpio_pin = NRF_GPIO_PIN_MAP(0, 14),
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- },
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- .sda_gpio = {
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- .gpio = NRF5_GPIO_RESOURCE_EXISTS,
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- .gpio_pin = NRF_GPIO_PIN_MAP(0, 15),
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- },
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- .name = "I2C_NPMC_IIC1"
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+ .state = &I2C_NPMC_IIC1_BUS_STATE,
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+ .hal = &I2C_NPMC_IIC1_BUS_HAL,
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+ .scl_gpio =
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+ {
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+ .gpio = NRF5_GPIO_RESOURCE_EXISTS,
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+ .gpio_pin = NRF_GPIO_PIN_MAP(0, 14),
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+ },
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+ .sda_gpio =
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+ {
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+ .gpio = NRF5_GPIO_RESOURCE_EXISTS,
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+ .gpio_pin = NRF_GPIO_PIN_MAP(0, 15),
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+ },
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+ .name = "I2C_NPMC_IIC1",
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};
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IRQ_MAP_NRFX(SPI1_SPIM1_SPIS1_TWI1_TWIM1_TWIS1, nrfx_twim_1_irq_handler);
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/* PERIPHERAL ID 9 */
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static const I2CSlavePort I2C_SLAVE_NPM1300 = {
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- .bus = &I2C_NPMC_IIC1_BUS,
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- .address = 0xD6,
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+ .bus = &I2C_NPMC_IIC1_BUS,
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+ .address = 0xD6,
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};
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-I2CSlavePort * const I2C_NPM1300 = &I2C_SLAVE_NPM1300;
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+I2CSlavePort *const I2C_NPM1300 = &I2C_SLAVE_NPM1300;
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/* peripheral I2C bus */
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static I2CBusState I2C_IIC2_BUS_STATE = {};
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static const I2CBusHal I2C_IIC2_BUS_HAL = {
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- .twim = NRFX_TWIM_INSTANCE(0),
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- .frequency = NRF_TWIM_FREQ_400K,
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+ .twim = NRFX_TWIM_INSTANCE(0),
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+ .frequency = NRF_TWIM_FREQ_400K,
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};
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/* FIXME */
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static const I2CBus I2C_IIC2_BUS = {
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- .state = &I2C_IIC2_BUS_STATE,
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- .hal = &I2C_IIC2_BUS_HAL,
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- .scl_gpio = {
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- .gpio = NRF5_GPIO_RESOURCE_EXISTS,
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- .gpio_pin = NRF_GPIO_PIN_MAP(0, 25),
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- },
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- .sda_gpio = {
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- .gpio = NRF5_GPIO_RESOURCE_EXISTS,
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- .gpio_pin = NRF_GPIO_PIN_MAP(0, 11),
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- },
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- .name = "I2C_IIC2"
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+ .state = &I2C_IIC2_BUS_STATE,
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+ .hal = &I2C_IIC2_BUS_HAL,
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+ .scl_gpio =
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+ {
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+ .gpio = NRF5_GPIO_RESOURCE_EXISTS,
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+ .gpio_pin = NRF_GPIO_PIN_MAP(0, 25),
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+ },
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+ .sda_gpio =
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+ {
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+ .gpio = NRF5_GPIO_RESOURCE_EXISTS,
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+ .gpio_pin = NRF_GPIO_PIN_MAP(0, 11),
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+ },
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+ .name = "I2C_IIC2",
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};
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IRQ_MAP_NRFX(SPI0_SPIM0_SPIS0_TWI0_TWIM0_TWIS0, nrfx_twim_0_irq_handler);
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@@ -147,7 +150,7 @@ IRQ_MAP_NRFX(PWM0, nrfx_pwm_0_irq_handler);
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void board_early_init(void) {
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PBL_LOG(LOG_LEVEL_ERROR, "asterix early init");
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-
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+
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/* shared SPI chip outputs */
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nrf_gpio_cfg_output(15);
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nrf_gpio_cfg_output(16);
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