0005-surface-sam.patch 198 KB

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  1. From 09f283be44830292c64b4af888e3ddc9fff46c11 Mon Sep 17 00:00:00 2001
  2. From: qzed <qzed@users.noreply.github.com>
  3. Date: Mon, 26 Aug 2019 01:15:40 +0200
  4. Subject: [PATCH 05/10] surface-sam
  5. ---
  6. drivers/acpi/acpica/dsopcode.c | 2 +-
  7. drivers/acpi/acpica/exfield.c | 26 +-
  8. drivers/platform/x86/Kconfig | 2 +
  9. drivers/platform/x86/Makefile | 1 +
  10. drivers/platform/x86/surface_sam/Kconfig | 164 ++
  11. drivers/platform/x86/surface_sam/Makefile | 10 +
  12. .../x86/surface_sam/surface_sam_dtx.c | 604 ++++++
  13. .../x86/surface_sam/surface_sam_hps.c | 1110 +++++++++++
  14. .../x86/surface_sam/surface_sam_san.c | 883 +++++++++
  15. .../x86/surface_sam/surface_sam_san.h | 30 +
  16. .../x86/surface_sam/surface_sam_sid.c | 137 ++
  17. .../x86/surface_sam/surface_sam_sid_gpelid.c | 224 +++
  18. .../surface_sam/surface_sam_sid_perfmode.c | 216 ++
  19. .../x86/surface_sam/surface_sam_sid_power.c | 1264 ++++++++++++
  20. .../x86/surface_sam/surface_sam_sid_vhf.c | 428 ++++
  21. .../x86/surface_sam/surface_sam_ssh.c | 1744 +++++++++++++++++
  22. .../x86/surface_sam/surface_sam_ssh.h | 98 +
  23. .../x86/surface_sam/surface_sam_vhf.c | 270 +++
  24. drivers/tty/serdev/core.c | 110 +-
  25. 19 files changed, 7294 insertions(+), 29 deletions(-)
  26. create mode 100644 drivers/platform/x86/surface_sam/Kconfig
  27. create mode 100644 drivers/platform/x86/surface_sam/Makefile
  28. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_dtx.c
  29. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_hps.c
  30. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_san.c
  31. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_san.h
  32. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid.c
  33. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  34. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  35. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  36. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  37. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_ssh.c
  38. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_ssh.h
  39. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_vhf.c
  40. diff --git a/drivers/acpi/acpica/dsopcode.c b/drivers/acpi/acpica/dsopcode.c
  41. index 2f4641e5ecde..beb22d7e245e 100644
  42. --- a/drivers/acpi/acpica/dsopcode.c
  43. +++ b/drivers/acpi/acpica/dsopcode.c
  44. @@ -123,7 +123,7 @@ acpi_ds_init_buffer_field(u16 aml_opcode,
  45. /* Offset is in bits, count is in bits */
  46. - field_flags = AML_FIELD_ACCESS_BYTE;
  47. + field_flags = AML_FIELD_ACCESS_BUFFER;
  48. bit_offset = offset;
  49. bit_count = (u32) length_desc->integer.value;
  50. diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c
  51. index b272c329d45d..cf547883a993 100644
  52. --- a/drivers/acpi/acpica/exfield.c
  53. +++ b/drivers/acpi/acpica/exfield.c
  54. @@ -102,6 +102,7 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
  55. void *buffer;
  56. u32 function;
  57. u16 accessor_type;
  58. + u8 field_flags;
  59. ACPI_FUNCTION_TRACE_PTR(ex_read_data_from_field, obj_desc);
  60. @@ -199,11 +200,16 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
  61. * Note: Field.length is in bits.
  62. */
  63. length =
  64. - (acpi_size)ACPI_ROUND_BITS_UP_TO_BYTES(obj_desc->field.bit_length);
  65. + (acpi_size)ACPI_ROUND_BITS_UP_TO_BYTES(obj_desc->common_field.bit_length);
  66. + field_flags = obj_desc->common_field.field_flags;
  67. - if (length > acpi_gbl_integer_byte_width) {
  68. + if (length > acpi_gbl_integer_byte_width ||
  69. + (field_flags & AML_FIELD_ACCESS_TYPE_MASK) == AML_FIELD_ACCESS_BUFFER) {
  70. - /* Field is too large for an Integer, create a Buffer instead */
  71. + /*
  72. + * Field is either too large for an Integer, or a actually of type
  73. + * buffer, so create a Buffer.
  74. + */
  75. buffer_desc = acpi_ut_create_buffer_object(length);
  76. if (!buffer_desc) {
  77. @@ -366,19 +372,7 @@ acpi_ex_write_data_to_field(union acpi_operand_object *source_desc,
  78. } else if (obj_desc->field.region_obj->region.space_id ==
  79. ACPI_ADR_SPACE_GSBUS) {
  80. accessor_type = obj_desc->field.attribute;
  81. - length =
  82. - acpi_ex_get_serial_access_length(accessor_type,
  83. - obj_desc->field.
  84. - access_length);
  85. -
  86. - /*
  87. - * Add additional 2 bytes for the generic_serial_bus data buffer:
  88. - *
  89. - * Status; (Byte 0 of the data buffer)
  90. - * Length; (Byte 1 of the data buffer)
  91. - * Data[x-1]: (Bytes 2-x of the arbitrary length data buffer)
  92. - */
  93. - length += 2;
  94. + length = source_desc->buffer.length;
  95. function = ACPI_WRITE | (accessor_type << 16);
  96. } else { /* IPMI */
  97. diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
  98. index 2ad19dc64a4a..7cee1015981d 100644
  99. --- a/drivers/platform/x86/Kconfig
  100. +++ b/drivers/platform/x86/Kconfig
  101. @@ -1250,6 +1250,8 @@ config INTEL_ATOMISP2_PM
  102. To compile this driver as a module, choose M here: the module
  103. will be called intel_atomisp2_pm.
  104. +source "drivers/platform/x86/surface_sam/Kconfig"
  105. +
  106. endif # X86_PLATFORM_DEVICES
  107. config PMC_ATOM
  108. diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
  109. index 2ea90039a3e4..cbea9579c1d2 100644
  110. --- a/drivers/platform/x86/Makefile
  111. +++ b/drivers/platform/x86/Makefile
  112. @@ -94,3 +94,4 @@ obj-$(CONFIG_INTEL_TURBO_MAX_3) += intel_turbo_max_3.o
  113. obj-$(CONFIG_INTEL_CHTDC_TI_PWRBTN) += intel_chtdc_ti_pwrbtn.o
  114. obj-$(CONFIG_I2C_MULTI_INSTANTIATE) += i2c-multi-instantiate.o
  115. obj-$(CONFIG_INTEL_ATOMISP2_PM) += intel_atomisp2_pm.o
  116. +obj-$(CONFIG_SURFACE_SAM) += surface_sam/
  117. diff --git a/drivers/platform/x86/surface_sam/Kconfig b/drivers/platform/x86/surface_sam/Kconfig
  118. new file mode 100644
  119. index 000000000000..c4556e58b9a5
  120. --- /dev/null
  121. +++ b/drivers/platform/x86/surface_sam/Kconfig
  122. @@ -0,0 +1,164 @@
  123. +menuconfig SURFACE_SAM
  124. + depends on ACPI
  125. + tristate "Microsoft Surface/System Aggregator Module and Platform Drivers"
  126. + help
  127. + Drivers for the Surface/System Aggregator Module (SAM) of Microsoft
  128. + Surface devices.
  129. +
  130. + SAM is an embedded controller that provides access to various
  131. + functionalities on these devices, including battery status, keyboard
  132. + events (on the Laptops) and many more.
  133. +
  134. + Say M/Y here if you have a Microsoft Surface device with a SAM device
  135. + (i.e. 5th generation or later).
  136. +
  137. +config SURFACE_SAM_SSH
  138. + tristate "Surface Serial Hub Driver"
  139. + depends on SURFACE_SAM
  140. + depends on SERIAL_DEV_CTRL_TTYPORT
  141. + select CRC_CCITT
  142. + default m
  143. + help
  144. + Surface Serial Hub driver for 5th generation (or later) Microsoft
  145. + Surface devices.
  146. +
  147. + This is the base driver for the embedded serial controller found on
  148. + 5th generation (and later) Microsoft Surface devices (e.g. Book 2,
  149. + Laptop, Laptop 2, Pro 2017, Pro 6, ...). This driver itself only
  150. + provides access to the embedded controller (SAM) and subsequent
  151. + drivers are required for the respective functionalities.
  152. +
  153. + If you have a 5th generation (or later) Microsoft Surface device, say
  154. + Y or M here.
  155. +
  156. +config SURFACE_SAM_SSH_DEBUG_DEVICE
  157. + bool "Surface Serial Hub Debug Device"
  158. + depends on SURFACE_SAM_SSH
  159. + depends on SYSFS
  160. + default n
  161. + help
  162. + Debug device for direct communication with the embedded controller
  163. + found on 5th generation (and later) Microsoft Surface devices (e.g.
  164. + Book 2, Laptop, Laptop 2, Pro 2017, Pro 6, ...) via sysfs.
  165. +
  166. + If you are not sure, say N here.
  167. +
  168. +config SURFACE_SAM_SAN
  169. + tristate "Surface ACPI Notify Driver"
  170. + depends on SURFACE_SAM_SSH
  171. + default m
  172. + help
  173. + Surface ACPI Notify driver for 5th generation (or later) Microsoft
  174. + Surface devices.
  175. +
  176. + This driver enables basic ACPI events and requests, such as battery
  177. + status requests/events, thermal events, lid status, and possibly more,
  178. + which would otherwise not work on these devices.
  179. +
  180. + If you are not sure, say M here.
  181. +
  182. +config SURFACE_SAM_VHF
  183. + tristate "Surface Virtual HID Framework Driver"
  184. + depends on SURFACE_SAM_SSH
  185. + depends on HID
  186. + default m
  187. + help
  188. + Surface Virtual HID Framework driver for 5th generation (or later)
  189. + Microsoft Surface devices.
  190. +
  191. + This driver provides support for the Microsoft Virtual HID framework,
  192. + which is required for keyboard support on the Surface Laptop 1 and 2.
  193. +
  194. + If you are not sure, say M here.
  195. +
  196. +config SURFACE_SAM_DTX
  197. + tristate "Surface Detachment System (DTX) Driver"
  198. + depends on SURFACE_SAM_SSH
  199. + depends on INPUT
  200. + default m
  201. + help
  202. + Surface Detachment System (DTX) driver for the Microsoft Surface Book
  203. + 2. This driver provides support for proper detachment handling in
  204. + user-space, status-events relating to the base and support for
  205. + the safe-guard keeping the base attached when the discrete GPU
  206. + contained in it is running via the special /dev/surface-dtx device.
  207. +
  208. + Also provides a standard input device to provide SW_TABLET_MODE events
  209. + upon device mode change.
  210. +
  211. + If you are not sure, say M here.
  212. +
  213. +config SURFACE_SAM_HPS
  214. + tristate "Surface dGPU Hot-Plug System (dGPU-HPS) Driver"
  215. + depends on SURFACE_SAM_SSH
  216. + depends on SURFACE_SAM_SAN
  217. + depends on GPIO_SYSFS
  218. + default m
  219. + help
  220. + Driver to properly handle hot-plugging and explicit power-on/power-off
  221. + of the discrete GPU (dGPU) on the Surface Book 2.
  222. +
  223. + If you are not sure, say M here.
  224. +
  225. +config SURFACE_SAM_SID
  226. + tristate "Surface Platform Integration Driver"
  227. + depends on SURFACE_SAM_SSH
  228. + default m
  229. + help
  230. + Surface Platform Integration Driver for the Microsoft Surface Devices.
  231. + This driver loads various model-specific sub-drivers, including
  232. + battery and keyboard support on 7th generation Surface devices, proper
  233. + lid setup to enable device wakeup when the lid is opened on multiple
  234. + models, as well as performance mode setting support on the Surface
  235. + Book 2.
  236. +
  237. + If you are not sure, say M here.
  238. +
  239. +config SURFACE_SAM_SID_GPELID
  240. + tristate "Surface Lid Wakeup Driver"
  241. + depends on SURFACE_SAM_SID
  242. + default m
  243. + help
  244. + Driver to set up device wake-up via lid on Intel-based Microsoft
  245. + Surface devices. These devices do not wake up from sleep as their GPE
  246. + interrupt is not configured automatically. This driver solves that
  247. + problem.
  248. +
  249. + If you are not sure, say M here.
  250. +
  251. +config SURFACE_SAM_SID_PERFMODE
  252. + tristate "Surface Performance Mode Driver"
  253. + depends on SURFACE_SAM_SID
  254. + depends on SYSFS
  255. + default m
  256. + help
  257. + This driver provides support for setting performance-modes on Surface
  258. + devices via the perf_mode sysfs attribute. Currently only supports the
  259. + Surface Book 2. Performance-modes directly influence the fan-profile
  260. + of the device, allowing to choose between higher performance or
  261. + quieter operation.
  262. +
  263. + If you are not sure, say M here.
  264. +
  265. +config SURFACE_SAM_SID_VHF
  266. + tristate "Surface SAM HID Driver"
  267. + depends on SURFACE_SAM_SID
  268. + depends on HID
  269. + default m
  270. + help
  271. + This driver provides support for HID devices connected via the Surface
  272. + SAM embedded controller. It provides support for keyboard and touchpad
  273. + on the Surface Laptop 3 models.
  274. +
  275. + If you are not sure, say M here.
  276. +
  277. +config SURFACE_SAM_SID_POWER
  278. + tristate "Surface SAM Battery/AC Driver"
  279. + depends on SURFACE_SAM_SID
  280. + select POWER_SUPPLY
  281. + default m
  282. + help
  283. + This driver provides support for the battery and AC on 7th generation
  284. + Surface devices.
  285. +
  286. + If you are not sure, say M here.
  287. diff --git a/drivers/platform/x86/surface_sam/Makefile b/drivers/platform/x86/surface_sam/Makefile
  288. new file mode 100644
  289. index 000000000000..188975ccde5c
  290. --- /dev/null
  291. +++ b/drivers/platform/x86/surface_sam/Makefile
  292. @@ -0,0 +1,10 @@
  293. +obj-$(CONFIG_SURFACE_SAM_SSH) += surface_sam_ssh.o
  294. +obj-$(CONFIG_SURFACE_SAM_SAN) += surface_sam_san.o
  295. +obj-$(CONFIG_SURFACE_SAM_DTX) += surface_sam_dtx.o
  296. +obj-$(CONFIG_SURFACE_SAM_HPS) += surface_sam_hps.o
  297. +obj-$(CONFIG_SURFACE_SAM_VHF) += surface_sam_vhf.o
  298. +obj-$(CONFIG_SURFACE_SAM_SID) += surface_sam_sid.o
  299. +obj-$(CONFIG_SURFACE_SAM_SID_GPELID) += surface_sam_sid_gpelid.o
  300. +obj-$(CONFIG_SURFACE_SAM_SID_PERFMODE) += surface_sam_sid_perfmode.o
  301. +obj-$(CONFIG_SURFACE_SAM_SID_POWER) += surface_sam_sid_power.o
  302. +obj-$(CONFIG_SURFACE_SAM_SID_VHF) += surface_sam_sid_vhf.o
  303. diff --git a/drivers/platform/x86/surface_sam/surface_sam_dtx.c b/drivers/platform/x86/surface_sam/surface_sam_dtx.c
  304. new file mode 100644
  305. index 000000000000..1e772fd5b0be
  306. --- /dev/null
  307. +++ b/drivers/platform/x86/surface_sam/surface_sam_dtx.c
  308. @@ -0,0 +1,604 @@
  309. +// SPDX-License-Identifier: GPL-2.0
  310. +/*
  311. + * Detachment system (DTX) driver for Microsoft Surface Book 2.
  312. + */
  313. +
  314. +#include <linux/acpi.h>
  315. +#include <linux/delay.h>
  316. +#include <linux/fs.h>
  317. +#include <linux/input.h>
  318. +#include <linux/ioctl.h>
  319. +#include <linux/kernel.h>
  320. +#include <linux/miscdevice.h>
  321. +#include <linux/module.h>
  322. +#include <linux/poll.h>
  323. +#include <linux/rculist.h>
  324. +#include <linux/slab.h>
  325. +#include <linux/spinlock.h>
  326. +#include <linux/platform_device.h>
  327. +
  328. +#include "surface_sam_ssh.h"
  329. +
  330. +
  331. +#define USB_VENDOR_ID_MICROSOFT 0x045e
  332. +#define USB_DEVICE_ID_MS_SURFACE_BASE_2_INTEGRATION 0x0922
  333. +
  334. +// name copied from MS device manager
  335. +#define DTX_INPUT_NAME "Microsoft Surface Base 2 Integration Device"
  336. +
  337. +
  338. +#define DTX_CMD_LATCH_LOCK _IO(0x11, 0x01)
  339. +#define DTX_CMD_LATCH_UNLOCK _IO(0x11, 0x02)
  340. +#define DTX_CMD_LATCH_REQUEST _IO(0x11, 0x03)
  341. +#define DTX_CMD_LATCH_OPEN _IO(0x11, 0x04)
  342. +#define DTX_CMD_GET_OPMODE _IOR(0x11, 0x05, int)
  343. +
  344. +#define SAM_RQST_DTX_TC 0x11
  345. +#define SAM_RQST_DTX_CID_LATCH_LOCK 0x06
  346. +#define SAM_RQST_DTX_CID_LATCH_UNLOCK 0x07
  347. +#define SAM_RQST_DTX_CID_LATCH_REQUEST 0x08
  348. +#define SAM_RQST_DTX_CID_LATCH_OPEN 0x09
  349. +#define SAM_RQST_DTX_CID_GET_OPMODE 0x0D
  350. +
  351. +#define SAM_EVENT_DTX_TC 0x11
  352. +#define SAM_EVENT_DTX_RQID 0x0011
  353. +#define SAM_EVENT_DTX_CID_CONNECTION 0x0c
  354. +#define SAM_EVENT_DTX_CID_BUTTON 0x0e
  355. +#define SAM_EVENT_DTX_CID_ERROR 0x0f
  356. +#define SAM_EVENT_DTX_CID_LATCH_STATUS 0x11
  357. +
  358. +#define DTX_OPMODE_TABLET 0x00
  359. +#define DTX_OPMODE_LAPTOP 0x01
  360. +#define DTX_OPMODE_STUDIO 0x02
  361. +
  362. +#define DTX_LATCH_CLOSED 0x00
  363. +#define DTX_LATCH_OPENED 0x01
  364. +
  365. +
  366. +// Warning: This must always be a power of 2!
  367. +#define DTX_CLIENT_BUF_SIZE 16
  368. +
  369. +#define DTX_CONNECT_OPMODE_DELAY 1000
  370. +
  371. +#define DTX_ERR KERN_ERR "surface_sam_dtx: "
  372. +#define DTX_WARN KERN_WARNING "surface_sam_dtx: "
  373. +
  374. +
  375. +struct surface_dtx_event {
  376. + u8 type;
  377. + u8 code;
  378. + u8 arg0;
  379. + u8 arg1;
  380. +} __packed;
  381. +
  382. +struct surface_dtx_dev {
  383. + wait_queue_head_t waitq;
  384. + struct miscdevice mdev;
  385. + spinlock_t client_lock;
  386. + struct list_head client_list;
  387. + struct mutex mutex;
  388. + bool active;
  389. + spinlock_t input_lock;
  390. + struct input_dev *input_dev;
  391. +};
  392. +
  393. +struct surface_dtx_client {
  394. + struct list_head node;
  395. + struct surface_dtx_dev *ddev;
  396. + struct fasync_struct *fasync;
  397. + spinlock_t buffer_lock;
  398. + unsigned int buffer_head;
  399. + unsigned int buffer_tail;
  400. + struct surface_dtx_event buffer[DTX_CLIENT_BUF_SIZE];
  401. +};
  402. +
  403. +
  404. +static struct surface_dtx_dev surface_dtx_dev;
  405. +
  406. +
  407. +static int surface_sam_query_opmpde(void)
  408. +{
  409. + u8 result_buf[1];
  410. + int status;
  411. +
  412. + struct surface_sam_ssh_rqst rqst = {
  413. + .tc = SAM_RQST_DTX_TC,
  414. + .cid = SAM_RQST_DTX_CID_GET_OPMODE,
  415. + .iid = 0,
  416. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  417. + .snc = 1,
  418. + .cdl = 0,
  419. + .pld = NULL,
  420. + };
  421. +
  422. + struct surface_sam_ssh_buf result = {
  423. + .cap = 1,
  424. + .len = 0,
  425. + .data = result_buf,
  426. + };
  427. +
  428. + status = surface_sam_ssh_rqst(&rqst, &result);
  429. + if (status)
  430. + return status;
  431. +
  432. + if (result.len != 1)
  433. + return -EFAULT;
  434. +
  435. + return result.data[0];
  436. +}
  437. +
  438. +
  439. +static int dtx_cmd_simple(u8 cid)
  440. +{
  441. + struct surface_sam_ssh_rqst rqst = {
  442. + .tc = SAM_RQST_DTX_TC,
  443. + .cid = cid,
  444. + .iid = 0,
  445. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  446. + .snc = 0,
  447. + .cdl = 0,
  448. + .pld = NULL,
  449. + };
  450. +
  451. + return surface_sam_ssh_rqst(&rqst, NULL);
  452. +}
  453. +
  454. +static int dtx_cmd_get_opmode(int __user *buf)
  455. +{
  456. + int opmode;
  457. +
  458. + opmode = surface_sam_query_opmpde();
  459. + if (opmode < 0)
  460. + return opmode;
  461. +
  462. + if (put_user(opmode, buf))
  463. + return -EACCES;
  464. +
  465. + return 0;
  466. +}
  467. +
  468. +
  469. +static int surface_dtx_open(struct inode *inode, struct file *file)
  470. +{
  471. + struct surface_dtx_dev *ddev = container_of(file->private_data, struct surface_dtx_dev, mdev);
  472. + struct surface_dtx_client *client;
  473. +
  474. + // initialize client
  475. + client = kzalloc(sizeof(struct surface_dtx_client), GFP_KERNEL);
  476. + if (!client)
  477. + return -ENOMEM;
  478. +
  479. + spin_lock_init(&client->buffer_lock);
  480. + client->buffer_head = 0;
  481. + client->buffer_tail = 0;
  482. + client->ddev = ddev;
  483. +
  484. + // attach client
  485. + spin_lock(&ddev->client_lock);
  486. + list_add_tail_rcu(&client->node, &ddev->client_list);
  487. + spin_unlock(&ddev->client_lock);
  488. +
  489. + file->private_data = client;
  490. + nonseekable_open(inode, file);
  491. +
  492. + return 0;
  493. +}
  494. +
  495. +static int surface_dtx_release(struct inode *inode, struct file *file)
  496. +{
  497. + struct surface_dtx_client *client = file->private_data;
  498. +
  499. + // detach client
  500. + spin_lock(&client->ddev->client_lock);
  501. + list_del_rcu(&client->node);
  502. + spin_unlock(&client->ddev->client_lock);
  503. + synchronize_rcu();
  504. +
  505. + kfree(client);
  506. + file->private_data = NULL;
  507. +
  508. + return 0;
  509. +}
  510. +
  511. +static ssize_t surface_dtx_read(struct file *file, char __user *buf, size_t count, loff_t *offs)
  512. +{
  513. + struct surface_dtx_client *client = file->private_data;
  514. + struct surface_dtx_dev *ddev = client->ddev;
  515. + struct surface_dtx_event event;
  516. + size_t read = 0;
  517. + int status = 0;
  518. +
  519. + if (count != 0 && count < sizeof(struct surface_dtx_event))
  520. + return -EINVAL;
  521. +
  522. + if (!ddev->active)
  523. + return -ENODEV;
  524. +
  525. + // check availability
  526. + if (client->buffer_head == client->buffer_tail) {
  527. + if (file->f_flags & O_NONBLOCK)
  528. + return -EAGAIN;
  529. +
  530. + status = wait_event_interruptible(ddev->waitq,
  531. + client->buffer_head != client->buffer_tail ||
  532. + !ddev->active);
  533. + if (status)
  534. + return status;
  535. +
  536. + if (!ddev->active)
  537. + return -ENODEV;
  538. + }
  539. +
  540. + // copy events one by one
  541. + while (read + sizeof(struct surface_dtx_event) <= count) {
  542. + spin_lock_irq(&client->buffer_lock);
  543. +
  544. + if (client->buffer_head == client->buffer_tail) {
  545. + spin_unlock_irq(&client->buffer_lock);
  546. + break;
  547. + }
  548. +
  549. + // get one event
  550. + event = client->buffer[client->buffer_tail];
  551. + client->buffer_tail = (client->buffer_tail + 1) & (DTX_CLIENT_BUF_SIZE - 1);
  552. + spin_unlock_irq(&client->buffer_lock);
  553. +
  554. + // copy to userspace
  555. + if (copy_to_user(buf, &event, sizeof(struct surface_dtx_event)))
  556. + return -EFAULT;
  557. +
  558. + read += sizeof(struct surface_dtx_event);
  559. + }
  560. +
  561. + return read;
  562. +}
  563. +
  564. +static __poll_t surface_dtx_poll(struct file *file, struct poll_table_struct *pt)
  565. +{
  566. + struct surface_dtx_client *client = file->private_data;
  567. + int mask;
  568. +
  569. + poll_wait(file, &client->ddev->waitq, pt);
  570. +
  571. + if (client->ddev->active)
  572. + mask = EPOLLOUT | EPOLLWRNORM;
  573. + else
  574. + mask = EPOLLHUP | EPOLLERR;
  575. +
  576. + if (client->buffer_head != client->buffer_tail)
  577. + mask |= EPOLLIN | EPOLLRDNORM;
  578. +
  579. + return mask;
  580. +}
  581. +
  582. +static int surface_dtx_fasync(int fd, struct file *file, int on)
  583. +{
  584. + struct surface_dtx_client *client = file->private_data;
  585. +
  586. + return fasync_helper(fd, file, on, &client->fasync);
  587. +}
  588. +
  589. +static long surface_dtx_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  590. +{
  591. + struct surface_dtx_client *client = file->private_data;
  592. + struct surface_dtx_dev *ddev = client->ddev;
  593. + int status;
  594. +
  595. + status = mutex_lock_interruptible(&ddev->mutex);
  596. + if (status)
  597. + return status;
  598. +
  599. + if (!ddev->active) {
  600. + mutex_unlock(&ddev->mutex);
  601. + return -ENODEV;
  602. + }
  603. +
  604. + switch (cmd) {
  605. + case DTX_CMD_LATCH_LOCK:
  606. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_LOCK);
  607. + break;
  608. +
  609. + case DTX_CMD_LATCH_UNLOCK:
  610. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_UNLOCK);
  611. + break;
  612. +
  613. + case DTX_CMD_LATCH_REQUEST:
  614. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_REQUEST);
  615. + break;
  616. +
  617. + case DTX_CMD_LATCH_OPEN:
  618. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_OPEN);
  619. + break;
  620. +
  621. + case DTX_CMD_GET_OPMODE:
  622. + status = dtx_cmd_get_opmode((int __user *)arg);
  623. + break;
  624. +
  625. + default:
  626. + status = -EINVAL;
  627. + break;
  628. + }
  629. +
  630. + mutex_unlock(&ddev->mutex);
  631. + return status;
  632. +}
  633. +
  634. +static const struct file_operations surface_dtx_fops = {
  635. + .owner = THIS_MODULE,
  636. + .open = surface_dtx_open,
  637. + .release = surface_dtx_release,
  638. + .read = surface_dtx_read,
  639. + .poll = surface_dtx_poll,
  640. + .fasync = surface_dtx_fasync,
  641. + .unlocked_ioctl = surface_dtx_ioctl,
  642. + .llseek = no_llseek,
  643. +};
  644. +
  645. +static struct surface_dtx_dev surface_dtx_dev = {
  646. + .mdev = {
  647. + .minor = MISC_DYNAMIC_MINOR,
  648. + .name = "surface_dtx",
  649. + .fops = &surface_dtx_fops,
  650. + },
  651. + .client_lock = __SPIN_LOCK_UNLOCKED(),
  652. + .input_lock = __SPIN_LOCK_UNLOCKED(),
  653. + .mutex = __MUTEX_INITIALIZER(surface_dtx_dev.mutex),
  654. + .active = false,
  655. +};
  656. +
  657. +
  658. +static void surface_dtx_push_event(struct surface_dtx_dev *ddev, struct surface_dtx_event *event)
  659. +{
  660. + struct surface_dtx_client *client;
  661. +
  662. + rcu_read_lock();
  663. + list_for_each_entry_rcu(client, &ddev->client_list, node) {
  664. + spin_lock(&client->buffer_lock);
  665. +
  666. + client->buffer[client->buffer_head++] = *event;
  667. + client->buffer_head &= DTX_CLIENT_BUF_SIZE - 1;
  668. +
  669. + if (unlikely(client->buffer_head == client->buffer_tail)) {
  670. + printk(DTX_WARN "event buffer overrun\n");
  671. + client->buffer_tail = (client->buffer_tail + 1) & (DTX_CLIENT_BUF_SIZE - 1);
  672. + }
  673. +
  674. + spin_unlock(&client->buffer_lock);
  675. +
  676. + kill_fasync(&client->fasync, SIGIO, POLL_IN);
  677. + }
  678. + rcu_read_unlock();
  679. +
  680. + wake_up_interruptible(&ddev->waitq);
  681. +}
  682. +
  683. +
  684. +static void surface_dtx_update_opmpde(struct surface_dtx_dev *ddev)
  685. +{
  686. + struct surface_dtx_event event;
  687. + int opmode;
  688. +
  689. + // get operation mode
  690. + opmode = surface_sam_query_opmpde();
  691. + if (opmode < 0)
  692. + printk(DTX_ERR "EC request failed with error %d\n", opmode);
  693. +
  694. + // send DTX event
  695. + event.type = 0x11;
  696. + event.code = 0x0D;
  697. + event.arg0 = opmode;
  698. + event.arg1 = 0x00;
  699. +
  700. + surface_dtx_push_event(ddev, &event);
  701. +
  702. + // send SW_TABLET_MODE event
  703. + spin_lock(&ddev->input_lock);
  704. + input_report_switch(ddev->input_dev, SW_TABLET_MODE, opmode != DTX_OPMODE_LAPTOP);
  705. + input_sync(ddev->input_dev);
  706. + spin_unlock(&ddev->input_lock);
  707. +}
  708. +
  709. +static int surface_dtx_evt_dtx(struct surface_sam_ssh_event *in_event, void *data)
  710. +{
  711. + struct surface_dtx_dev *ddev = data;
  712. + struct surface_dtx_event event;
  713. +
  714. + switch (in_event->cid) {
  715. + case SAM_EVENT_DTX_CID_CONNECTION:
  716. + case SAM_EVENT_DTX_CID_BUTTON:
  717. + case SAM_EVENT_DTX_CID_ERROR:
  718. + case SAM_EVENT_DTX_CID_LATCH_STATUS:
  719. + if (in_event->len > 2) {
  720. + printk(DTX_ERR "unexpected payload size (cid: %x, len: %u)\n",
  721. + in_event->cid, in_event->len);
  722. + return 0;
  723. + }
  724. +
  725. + event.type = in_event->tc;
  726. + event.code = in_event->cid;
  727. + event.arg0 = in_event->len >= 1 ? in_event->pld[0] : 0x00;
  728. + event.arg1 = in_event->len >= 2 ? in_event->pld[1] : 0x00;
  729. + surface_dtx_push_event(ddev, &event);
  730. + break;
  731. +
  732. + default:
  733. + printk(DTX_WARN "unhandled dtx event (cid: %x)\n", in_event->cid);
  734. + }
  735. +
  736. + // update device mode
  737. + if (in_event->cid == SAM_EVENT_DTX_CID_CONNECTION) {
  738. + if (in_event->pld[0]) {
  739. + // Note: we're already in a workqueue task
  740. + msleep(DTX_CONNECT_OPMODE_DELAY);
  741. + }
  742. +
  743. + surface_dtx_update_opmpde(ddev);
  744. + }
  745. +
  746. + return 0;
  747. +}
  748. +
  749. +static int surface_dtx_events_setup(struct surface_dtx_dev *ddev)
  750. +{
  751. + int status;
  752. +
  753. + status = surface_sam_ssh_set_event_handler(SAM_EVENT_DTX_RQID, surface_dtx_evt_dtx, ddev);
  754. + if (status)
  755. + goto err_handler;
  756. +
  757. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_DTX_TC, 0x01, SAM_EVENT_DTX_RQID);
  758. + if (status)
  759. + goto err_source;
  760. +
  761. + return 0;
  762. +
  763. +err_source:
  764. + surface_sam_ssh_remove_event_handler(SAM_EVENT_DTX_RQID);
  765. +err_handler:
  766. + return status;
  767. +}
  768. +
  769. +static void surface_dtx_events_disable(void)
  770. +{
  771. + surface_sam_ssh_disable_event_source(SAM_EVENT_DTX_TC, 0x01, SAM_EVENT_DTX_RQID);
  772. + surface_sam_ssh_remove_event_handler(SAM_EVENT_DTX_RQID);
  773. +}
  774. +
  775. +
  776. +static struct input_dev *surface_dtx_register_inputdev(struct platform_device *pdev)
  777. +{
  778. + struct input_dev *input_dev;
  779. + int status;
  780. +
  781. + input_dev = input_allocate_device();
  782. + if (!input_dev)
  783. + return ERR_PTR(-ENOMEM);
  784. +
  785. + input_dev->name = DTX_INPUT_NAME;
  786. + input_dev->dev.parent = &pdev->dev;
  787. + input_dev->id.bustype = BUS_VIRTUAL;
  788. + input_dev->id.vendor = USB_VENDOR_ID_MICROSOFT;
  789. + input_dev->id.product = USB_DEVICE_ID_MS_SURFACE_BASE_2_INTEGRATION;
  790. +
  791. + input_set_capability(input_dev, EV_SW, SW_TABLET_MODE);
  792. +
  793. + status = surface_sam_query_opmpde();
  794. + if (status < 0) {
  795. + input_free_device(input_dev);
  796. + return ERR_PTR(status);
  797. + }
  798. +
  799. + input_report_switch(input_dev, SW_TABLET_MODE, status != DTX_OPMODE_LAPTOP);
  800. +
  801. + status = input_register_device(input_dev);
  802. + if (status) {
  803. + input_unregister_device(input_dev);
  804. + return ERR_PTR(status);
  805. + }
  806. +
  807. + return input_dev;
  808. +}
  809. +
  810. +
  811. +static int surface_sam_dtx_probe(struct platform_device *pdev)
  812. +{
  813. + struct surface_dtx_dev *ddev = &surface_dtx_dev;
  814. + struct input_dev *input_dev;
  815. + int status;
  816. +
  817. + // link to ec
  818. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  819. + if (status)
  820. + return status == -ENXIO ? -EPROBE_DEFER : status;
  821. +
  822. + input_dev = surface_dtx_register_inputdev(pdev);
  823. + if (IS_ERR(input_dev))
  824. + return PTR_ERR(input_dev);
  825. +
  826. + // initialize device
  827. + mutex_lock(&ddev->mutex);
  828. + if (ddev->active) {
  829. + mutex_unlock(&ddev->mutex);
  830. + status = -ENODEV;
  831. + goto err_register;
  832. + }
  833. +
  834. + INIT_LIST_HEAD(&ddev->client_list);
  835. + init_waitqueue_head(&ddev->waitq);
  836. + ddev->active = true;
  837. + ddev->input_dev = input_dev;
  838. + mutex_unlock(&ddev->mutex);
  839. +
  840. + status = misc_register(&ddev->mdev);
  841. + if (status)
  842. + goto err_register;
  843. +
  844. + // enable events
  845. + status = surface_dtx_events_setup(ddev);
  846. + if (status)
  847. + goto err_events_setup;
  848. +
  849. + return 0;
  850. +
  851. +err_events_setup:
  852. + misc_deregister(&ddev->mdev);
  853. +err_register:
  854. + input_unregister_device(ddev->input_dev);
  855. + return status;
  856. +}
  857. +
  858. +static int surface_sam_dtx_remove(struct platform_device *pdev)
  859. +{
  860. + struct surface_dtx_dev *ddev = &surface_dtx_dev;
  861. + struct surface_dtx_client *client;
  862. +
  863. + mutex_lock(&ddev->mutex);
  864. + if (!ddev->active) {
  865. + mutex_unlock(&ddev->mutex);
  866. + return 0;
  867. + }
  868. +
  869. + // mark as inactive
  870. + ddev->active = false;
  871. + mutex_unlock(&ddev->mutex);
  872. +
  873. + // After this call we're guaranteed that no more input events will arive
  874. + surface_dtx_events_disable();
  875. +
  876. + // wake up clients
  877. + spin_lock(&ddev->client_lock);
  878. + list_for_each_entry(client, &ddev->client_list, node) {
  879. + kill_fasync(&client->fasync, SIGIO, POLL_HUP);
  880. + }
  881. + spin_unlock(&ddev->client_lock);
  882. +
  883. + wake_up_interruptible(&ddev->waitq);
  884. +
  885. + // unregister user-space devices
  886. + input_unregister_device(ddev->input_dev);
  887. + misc_deregister(&ddev->mdev);
  888. +
  889. + return 0;
  890. +}
  891. +
  892. +
  893. +static const struct acpi_device_id surface_sam_dtx_match[] = {
  894. + { "MSHW0133", 0 },
  895. + { },
  896. +};
  897. +MODULE_DEVICE_TABLE(acpi, surface_sam_dtx_match);
  898. +
  899. +static struct platform_driver surface_sam_dtx = {
  900. + .probe = surface_sam_dtx_probe,
  901. + .remove = surface_sam_dtx_remove,
  902. + .driver = {
  903. + .name = "surface_sam_dtx",
  904. + .acpi_match_table = ACPI_PTR(surface_sam_dtx_match),
  905. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  906. + },
  907. +};
  908. +module_platform_driver(surface_sam_dtx);
  909. +
  910. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  911. +MODULE_DESCRIPTION("Surface Detachment System (DTX) Driver for 5th Generation Surface Devices");
  912. +MODULE_LICENSE("GPL v2");
  913. diff --git a/drivers/platform/x86/surface_sam/surface_sam_hps.c b/drivers/platform/x86/surface_sam/surface_sam_hps.c
  914. new file mode 100644
  915. index 000000000000..4fba5ee75a66
  916. --- /dev/null
  917. +++ b/drivers/platform/x86/surface_sam/surface_sam_hps.c
  918. @@ -0,0 +1,1110 @@
  919. +// SPDX-License-Identifier: GPL-2.0
  920. +/*
  921. + * Surface dGPU hot-plug system driver.
  922. + * Supports explicit setting of the dGPU power-state on the Surface Book 2 and
  923. + * properly handles hot-plugging by detaching the base.
  924. + */
  925. +
  926. +#include <linux/acpi.h>
  927. +#include <linux/delay.h>
  928. +#include <linux/gpio.h>
  929. +#include <linux/kernel.h>
  930. +#include <linux/module.h>
  931. +#include <linux/mutex.h>
  932. +#include <linux/pci.h>
  933. +#include <linux/platform_device.h>
  934. +#include <linux/sysfs.h>
  935. +
  936. +#include "surface_sam_ssh.h"
  937. +#include "surface_sam_san.h"
  938. +
  939. +
  940. +// TODO: vgaswitcheroo integration
  941. +
  942. +
  943. +static void dbg_dump_drvsta(struct platform_device *pdev, const char *prefix);
  944. +
  945. +
  946. +#define SHPS_DSM_REVISION 1
  947. +#define SHPS_DSM_GPU_ADDRS 0x02
  948. +#define SHPS_DSM_GPU_POWER 0x05
  949. +static const guid_t SHPS_DSM_UUID =
  950. + GUID_INIT(0x5515a847, 0xed55, 0x4b27, 0x83, 0x52, 0xcd,
  951. + 0x32, 0x0e, 0x10, 0x36, 0x0a);
  952. +
  953. +
  954. +#define SAM_DGPU_TC 0x13
  955. +#define SAM_DGPU_CID_POWERON 0x02
  956. +
  957. +#define SAM_DTX_TC 0x11
  958. +#define SAM_DTX_CID_LATCH_LOCK 0x06
  959. +#define SAM_DTX_CID_LATCH_UNLOCK 0x07
  960. +
  961. +#define SHPS_DSM_GPU_ADDRS_RP "RP5_PCIE"
  962. +#define SHPS_DSM_GPU_ADDRS_DGPU "DGPU_PCIE"
  963. +
  964. +
  965. +static const struct acpi_gpio_params gpio_base_presence_int = { 0, 0, false };
  966. +static const struct acpi_gpio_params gpio_base_presence = { 1, 0, false };
  967. +static const struct acpi_gpio_params gpio_dgpu_power_int = { 2, 0, false };
  968. +static const struct acpi_gpio_params gpio_dgpu_power = { 3, 0, false };
  969. +static const struct acpi_gpio_params gpio_dgpu_presence_int = { 4, 0, false };
  970. +static const struct acpi_gpio_params gpio_dgpu_presence = { 5, 0, false };
  971. +
  972. +static const struct acpi_gpio_mapping shps_acpi_gpios[] = {
  973. + { "base_presence-int-gpio", &gpio_base_presence_int, 1 },
  974. + { "base_presence-gpio", &gpio_base_presence, 1 },
  975. + { "dgpu_power-int-gpio", &gpio_dgpu_power_int, 1 },
  976. + { "dgpu_power-gpio", &gpio_dgpu_power, 1 },
  977. + { "dgpu_presence-int-gpio", &gpio_dgpu_presence_int, 1 },
  978. + { "dgpu_presence-gpio", &gpio_dgpu_presence, 1 },
  979. + { },
  980. +};
  981. +
  982. +
  983. +enum shps_dgpu_power {
  984. + SHPS_DGPU_POWER_OFF = 0,
  985. + SHPS_DGPU_POWER_ON = 1,
  986. + SHPS_DGPU_POWER_UNKNOWN = 2,
  987. +};
  988. +
  989. +static const char *shps_dgpu_power_str(enum shps_dgpu_power power)
  990. +{
  991. + if (power == SHPS_DGPU_POWER_OFF)
  992. + return "off";
  993. + else if (power == SHPS_DGPU_POWER_ON)
  994. + return "on";
  995. + else if (power == SHPS_DGPU_POWER_UNKNOWN)
  996. + return "unknown";
  997. + else
  998. + return "<invalid>";
  999. +}
  1000. +
  1001. +
  1002. +struct shps_driver_data {
  1003. + struct mutex lock;
  1004. + struct pci_dev *dgpu_root_port;
  1005. + struct pci_saved_state *dgpu_root_port_state;
  1006. + struct gpio_desc *gpio_dgpu_power;
  1007. + struct gpio_desc *gpio_dgpu_presence;
  1008. + struct gpio_desc *gpio_base_presence;
  1009. + unsigned int irq_dgpu_presence;
  1010. + unsigned int irq_base_presence;
  1011. + unsigned long state;
  1012. +};
  1013. +
  1014. +#define SHPS_STATE_BIT_PWRTGT 0 /* desired power state: 1 for on, 0 for off */
  1015. +#define SHPS_STATE_BIT_RPPWRON_SYNC 1 /* synchronous/requested power-up in progress */
  1016. +#define SHPS_STATE_BIT_WAKE_ENABLED 2 /* wakeup via base-presence GPIO enabled */
  1017. +
  1018. +
  1019. +#define SHPS_DGPU_PARAM_PERM 0644
  1020. +
  1021. +enum shps_dgpu_power_mp {
  1022. + SHPS_DGPU_MP_POWER_OFF = SHPS_DGPU_POWER_OFF,
  1023. + SHPS_DGPU_MP_POWER_ON = SHPS_DGPU_POWER_ON,
  1024. + SHPS_DGPU_MP_POWER_ASIS = -1,
  1025. +
  1026. + __SHPS_DGPU_MP_POWER_START = -1,
  1027. + __SHPS_DGPU_MP_POWER_END = 1,
  1028. +};
  1029. +
  1030. +static int param_dgpu_power_set(const char *val, const struct kernel_param *kp)
  1031. +{
  1032. + int power = SHPS_DGPU_MP_POWER_OFF;
  1033. + int status;
  1034. +
  1035. + status = kstrtoint(val, 0, &power);
  1036. + if (status)
  1037. + return status;
  1038. +
  1039. + if (power < __SHPS_DGPU_MP_POWER_START || power > __SHPS_DGPU_MP_POWER_END)
  1040. + return -EINVAL;
  1041. +
  1042. + return param_set_int(val, kp);
  1043. +}
  1044. +
  1045. +static const struct kernel_param_ops param_dgpu_power_ops = {
  1046. + .set = param_dgpu_power_set,
  1047. + .get = param_get_int,
  1048. +};
  1049. +
  1050. +static int param_dgpu_power_init = SHPS_DGPU_MP_POWER_OFF;
  1051. +static int param_dgpu_power_exit = SHPS_DGPU_MP_POWER_ON;
  1052. +static int param_dgpu_power_susp = SHPS_DGPU_MP_POWER_ASIS;
  1053. +static bool param_dtx_latch = true;
  1054. +
  1055. +module_param_cb(dgpu_power_init, &param_dgpu_power_ops, &param_dgpu_power_init, SHPS_DGPU_PARAM_PERM);
  1056. +module_param_cb(dgpu_power_exit, &param_dgpu_power_ops, &param_dgpu_power_exit, SHPS_DGPU_PARAM_PERM);
  1057. +module_param_cb(dgpu_power_susp, &param_dgpu_power_ops, &param_dgpu_power_susp, SHPS_DGPU_PARAM_PERM);
  1058. +module_param_named(dtx_latch, param_dtx_latch, bool, SHPS_DGPU_PARAM_PERM);
  1059. +
  1060. +MODULE_PARM_DESC(dgpu_power_init, "dGPU power state to be set on init (0: off / 1: on / 2: as-is, default: off)");
  1061. +MODULE_PARM_DESC(dgpu_power_exit, "dGPU power state to be set on exit (0: off / 1: on / 2: as-is, default: on)");
  1062. +MODULE_PARM_DESC(dgpu_power_susp, "dGPU power state to be set on exit (0: off / 1: on / 2: as-is, default: as-is)");
  1063. +MODULE_PARM_DESC(dtx_latch, "lock/unlock DTX base latch in accordance to power-state (Y/n)");
  1064. +
  1065. +
  1066. +static int dtx_cmd_simple(u8 cid)
  1067. +{
  1068. + struct surface_sam_ssh_rqst rqst = {
  1069. + .tc = SAM_DTX_TC,
  1070. + .cid = cid,
  1071. + .iid = 0,
  1072. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  1073. + .snc = 0,
  1074. + .cdl = 0,
  1075. + .pld = NULL,
  1076. + };
  1077. +
  1078. + return surface_sam_ssh_rqst(&rqst, NULL);
  1079. +}
  1080. +
  1081. +static inline int shps_dtx_latch_lock(void)
  1082. +{
  1083. + return dtx_cmd_simple(SAM_DTX_CID_LATCH_LOCK);
  1084. +}
  1085. +
  1086. +static inline int shps_dtx_latch_unlock(void)
  1087. +{
  1088. + return dtx_cmd_simple(SAM_DTX_CID_LATCH_UNLOCK);
  1089. +}
  1090. +
  1091. +
  1092. +static int shps_dgpu_dsm_get_pci_addr(struct platform_device *pdev, const char *entry)
  1093. +{
  1094. + acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  1095. + union acpi_object *result;
  1096. + union acpi_object *e0;
  1097. + union acpi_object *e1;
  1098. + union acpi_object *e2;
  1099. + u64 device_addr = 0;
  1100. + u8 bus, dev, fun;
  1101. + int i;
  1102. +
  1103. + result = acpi_evaluate_dsm_typed(handle, &SHPS_DSM_UUID, SHPS_DSM_REVISION,
  1104. + SHPS_DSM_GPU_ADDRS, NULL, ACPI_TYPE_PACKAGE);
  1105. +
  1106. + if (IS_ERR_OR_NULL(result))
  1107. + return result ? PTR_ERR(result) : -EIO;
  1108. +
  1109. + // three entries per device: name, address, <integer>
  1110. + for (i = 0; i + 2 < result->package.count; i += 3) {
  1111. + e0 = &result->package.elements[i];
  1112. + e1 = &result->package.elements[i + 1];
  1113. + e2 = &result->package.elements[i + 2];
  1114. +
  1115. + if (e0->type != ACPI_TYPE_STRING) {
  1116. + ACPI_FREE(result);
  1117. + return -EIO;
  1118. + }
  1119. +
  1120. + if (e1->type != ACPI_TYPE_INTEGER) {
  1121. + ACPI_FREE(result);
  1122. + return -EIO;
  1123. + }
  1124. +
  1125. + if (e2->type != ACPI_TYPE_INTEGER) {
  1126. + ACPI_FREE(result);
  1127. + return -EIO;
  1128. + }
  1129. +
  1130. + if (strncmp(e0->string.pointer, entry, 64) == 0)
  1131. + device_addr = e1->integer.value;
  1132. + }
  1133. +
  1134. + ACPI_FREE(result);
  1135. + if (device_addr == 0)
  1136. + return -ENODEV;
  1137. +
  1138. + // convert address
  1139. + bus = (device_addr & 0x0FF00000) >> 20;
  1140. + dev = (device_addr & 0x000F8000) >> 15;
  1141. + fun = (device_addr & 0x00007000) >> 12;
  1142. +
  1143. + return bus << 8 | PCI_DEVFN(dev, fun);
  1144. +}
  1145. +
  1146. +static struct pci_dev *shps_dgpu_dsm_get_pci_dev(struct platform_device *pdev, const char *entry)
  1147. +{
  1148. + struct pci_dev *dev;
  1149. + int addr;
  1150. +
  1151. + addr = shps_dgpu_dsm_get_pci_addr(pdev, entry);
  1152. + if (addr < 0)
  1153. + return ERR_PTR(addr);
  1154. +
  1155. + dev = pci_get_domain_bus_and_slot(0, (addr & 0xFF00) >> 8, addr & 0xFF);
  1156. + return dev ? dev : ERR_PTR(-ENODEV);
  1157. +}
  1158. +
  1159. +
  1160. +static int shps_dgpu_dsm_get_power_unlocked(struct platform_device *pdev)
  1161. +{
  1162. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1163. + struct gpio_desc *gpio = drvdata->gpio_dgpu_power;
  1164. + int status;
  1165. +
  1166. + status = gpiod_get_value_cansleep(gpio);
  1167. + if (status < 0)
  1168. + return status;
  1169. +
  1170. + return status == 0 ? SHPS_DGPU_POWER_OFF : SHPS_DGPU_POWER_ON;
  1171. +}
  1172. +
  1173. +static int shps_dgpu_dsm_get_power(struct platform_device *pdev)
  1174. +{
  1175. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1176. + int status;
  1177. +
  1178. + mutex_lock(&drvdata->lock);
  1179. + status = shps_dgpu_dsm_get_power_unlocked(pdev);
  1180. + mutex_unlock(&drvdata->lock);
  1181. +
  1182. + return status;
  1183. +}
  1184. +
  1185. +static int __shps_dgpu_dsm_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1186. +{
  1187. + acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  1188. + union acpi_object *result;
  1189. + union acpi_object param;
  1190. +
  1191. + dev_info(&pdev->dev, "setting dGPU direct power to \'%s\'\n", shps_dgpu_power_str(power));
  1192. +
  1193. + param.type = ACPI_TYPE_INTEGER;
  1194. + param.integer.value = power == SHPS_DGPU_POWER_ON;
  1195. +
  1196. + result = acpi_evaluate_dsm_typed(handle, &SHPS_DSM_UUID, SHPS_DSM_REVISION,
  1197. + SHPS_DSM_GPU_POWER, &param, ACPI_TYPE_BUFFER);
  1198. +
  1199. + if (IS_ERR_OR_NULL(result))
  1200. + return result ? PTR_ERR(result) : -EIO;
  1201. +
  1202. + // check for the expected result
  1203. + if (result->buffer.length != 1 || result->buffer.pointer[0] != 0) {
  1204. + ACPI_FREE(result);
  1205. + return -EIO;
  1206. + }
  1207. +
  1208. + ACPI_FREE(result);
  1209. + return 0;
  1210. +}
  1211. +
  1212. +static int shps_dgpu_dsm_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1213. +{
  1214. + int status;
  1215. +
  1216. + if (power != SHPS_DGPU_POWER_ON && power != SHPS_DGPU_POWER_OFF)
  1217. + return -EINVAL;
  1218. +
  1219. + status = shps_dgpu_dsm_get_power_unlocked(pdev);
  1220. + if (status < 0)
  1221. + return status;
  1222. + if (status == power)
  1223. + return 0;
  1224. +
  1225. + return __shps_dgpu_dsm_set_power_unlocked(pdev, power);
  1226. +}
  1227. +
  1228. +static int shps_dgpu_dsm_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1229. +{
  1230. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1231. + int status;
  1232. +
  1233. + mutex_lock(&drvdata->lock);
  1234. + status = shps_dgpu_dsm_set_power_unlocked(pdev, power);
  1235. + mutex_unlock(&drvdata->lock);
  1236. +
  1237. + return status;
  1238. +}
  1239. +
  1240. +
  1241. +static bool shps_rp_link_up(struct pci_dev *rp)
  1242. +{
  1243. + u16 lnksta = 0, sltsta = 0;
  1244. +
  1245. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA, &lnksta);
  1246. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA, &sltsta);
  1247. +
  1248. + return (lnksta & PCI_EXP_LNKSTA_DLLLA) || (sltsta & PCI_EXP_SLTSTA_PDS);
  1249. +}
  1250. +
  1251. +
  1252. +static int shps_dgpu_rp_get_power_unlocked(struct platform_device *pdev)
  1253. +{
  1254. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1255. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1256. +
  1257. + if (rp->current_state == PCI_D3hot || rp->current_state == PCI_D3cold)
  1258. + return SHPS_DGPU_POWER_OFF;
  1259. + else if (rp->current_state == PCI_UNKNOWN || rp->current_state == PCI_POWER_ERROR)
  1260. + return SHPS_DGPU_POWER_UNKNOWN;
  1261. + else
  1262. + return SHPS_DGPU_POWER_ON;
  1263. +}
  1264. +
  1265. +static int shps_dgpu_rp_get_power(struct platform_device *pdev)
  1266. +{
  1267. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1268. + int status;
  1269. +
  1270. + mutex_lock(&drvdata->lock);
  1271. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1272. + mutex_unlock(&drvdata->lock);
  1273. +
  1274. + return status;
  1275. +}
  1276. +
  1277. +static int __shps_dgpu_rp_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1278. +{
  1279. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1280. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1281. + int status, i;
  1282. +
  1283. + dev_info(&pdev->dev, "setting dGPU power state to \'%s\'\n", shps_dgpu_power_str(power));
  1284. +
  1285. + dbg_dump_drvsta(pdev, "__shps_dgpu_rp_set_power_unlocked.1");
  1286. + if (power == SHPS_DGPU_POWER_ON) {
  1287. + set_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state);
  1288. + pci_set_power_state(rp, PCI_D0);
  1289. +
  1290. + if (drvdata->dgpu_root_port_state)
  1291. + pci_load_and_free_saved_state(rp, &drvdata->dgpu_root_port_state);
  1292. +
  1293. + pci_restore_state(rp);
  1294. +
  1295. + if (!pci_is_enabled(rp))
  1296. + pci_enable_device(rp);
  1297. +
  1298. + pci_set_master(rp);
  1299. + clear_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state);
  1300. +
  1301. + set_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1302. + } else {
  1303. + if (!drvdata->dgpu_root_port_state) {
  1304. + pci_save_state(rp);
  1305. + drvdata->dgpu_root_port_state = pci_store_saved_state(rp);
  1306. + }
  1307. +
  1308. + /*
  1309. + * To properly update the hot-plug system we need to "remove" the dGPU
  1310. + * before disabling it and sending it to D3cold. Following this, we
  1311. + * need to wait for the link and slot status to actually change.
  1312. + */
  1313. + status = shps_dgpu_dsm_set_power_unlocked(pdev, SHPS_DGPU_POWER_OFF);
  1314. + if (status)
  1315. + return status;
  1316. +
  1317. + for (i = 0; i < 20 && shps_rp_link_up(rp); i++)
  1318. + msleep(50);
  1319. +
  1320. + if (shps_rp_link_up(rp))
  1321. + dev_err(&pdev->dev, "dGPU removal via DSM timed out\n");
  1322. +
  1323. + pci_clear_master(rp);
  1324. +
  1325. + if (pci_is_enabled(rp))
  1326. + pci_disable_device(rp);
  1327. +
  1328. + pci_set_power_state(rp, PCI_D3cold);
  1329. +
  1330. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1331. + }
  1332. + dbg_dump_drvsta(pdev, "__shps_dgpu_rp_set_power_unlocked.2");
  1333. +
  1334. + return 0;
  1335. +}
  1336. +
  1337. +static int shps_dgpu_rp_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1338. +{
  1339. + int status;
  1340. +
  1341. + if (power != SHPS_DGPU_POWER_ON && power != SHPS_DGPU_POWER_OFF)
  1342. + return -EINVAL;
  1343. +
  1344. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1345. + if (status < 0)
  1346. + return status;
  1347. + if (status == power)
  1348. + return 0;
  1349. +
  1350. + return __shps_dgpu_rp_set_power_unlocked(pdev, power);
  1351. +}
  1352. +
  1353. +static int shps_dgpu_rp_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1354. +{
  1355. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1356. + int status;
  1357. +
  1358. + mutex_lock(&drvdata->lock);
  1359. + status = shps_dgpu_rp_set_power_unlocked(pdev, power);
  1360. + mutex_unlock(&drvdata->lock);
  1361. +
  1362. + return status;
  1363. +}
  1364. +
  1365. +
  1366. +static int shps_dgpu_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1367. +{
  1368. + int status;
  1369. +
  1370. + if (!param_dtx_latch)
  1371. + return shps_dgpu_rp_set_power(pdev, power);
  1372. +
  1373. + if (power == SHPS_DGPU_POWER_ON) {
  1374. + status = shps_dtx_latch_lock();
  1375. + if (status)
  1376. + return status;
  1377. +
  1378. + status = shps_dgpu_rp_set_power(pdev, power);
  1379. + if (status)
  1380. + shps_dtx_latch_unlock();
  1381. +
  1382. + } else {
  1383. + status = shps_dgpu_rp_set_power(pdev, power);
  1384. + if (status)
  1385. + return status;
  1386. +
  1387. + status = shps_dtx_latch_unlock();
  1388. + }
  1389. +
  1390. + return status;
  1391. +}
  1392. +
  1393. +
  1394. +static int shps_dgpu_is_present(struct platform_device *pdev)
  1395. +{
  1396. + struct shps_driver_data *drvdata;
  1397. +
  1398. + drvdata = platform_get_drvdata(pdev);
  1399. + return gpiod_get_value_cansleep(drvdata->gpio_dgpu_presence);
  1400. +}
  1401. +
  1402. +
  1403. +static ssize_t dgpu_power_show(struct device *dev, struct device_attribute *attr, char *data)
  1404. +{
  1405. + struct platform_device *pdev = to_platform_device(dev);
  1406. + int power = shps_dgpu_rp_get_power(pdev);
  1407. +
  1408. + if (power < 0)
  1409. + return power;
  1410. +
  1411. + return sprintf(data, "%s\n", shps_dgpu_power_str(power));
  1412. +}
  1413. +
  1414. +static ssize_t dgpu_power_store(struct device *dev, struct device_attribute *attr,
  1415. + const char *data, size_t count)
  1416. +{
  1417. + struct platform_device *pdev = to_platform_device(dev);
  1418. + enum shps_dgpu_power power;
  1419. + bool b = false;
  1420. + int status;
  1421. +
  1422. + status = kstrtobool(data, &b);
  1423. + if (status)
  1424. + return status;
  1425. +
  1426. + status = shps_dgpu_is_present(pdev);
  1427. + if (status <= 0)
  1428. + return status < 0 ? status : -EPERM;
  1429. +
  1430. + power = b ? SHPS_DGPU_POWER_ON : SHPS_DGPU_POWER_OFF;
  1431. + status = shps_dgpu_set_power(pdev, power);
  1432. +
  1433. + return status < 0 ? status : count;
  1434. +}
  1435. +
  1436. +static ssize_t dgpu_power_dsm_show(struct device *dev, struct device_attribute *attr, char *data)
  1437. +{
  1438. + struct platform_device *pdev = to_platform_device(dev);
  1439. + int power = shps_dgpu_dsm_get_power(pdev);
  1440. +
  1441. + if (power < 0)
  1442. + return power;
  1443. +
  1444. + return sprintf(data, "%s\n", shps_dgpu_power_str(power));
  1445. +}
  1446. +
  1447. +static ssize_t dgpu_power_dsm_store(struct device *dev, struct device_attribute *attr,
  1448. + const char *data, size_t count)
  1449. +{
  1450. + struct platform_device *pdev = to_platform_device(dev);
  1451. + enum shps_dgpu_power power;
  1452. + bool b = false;
  1453. + int status;
  1454. +
  1455. + status = kstrtobool(data, &b);
  1456. + if (status)
  1457. + return status;
  1458. +
  1459. + status = shps_dgpu_is_present(pdev);
  1460. + if (status <= 0)
  1461. + return status < 0 ? status : -EPERM;
  1462. +
  1463. + power = b ? SHPS_DGPU_POWER_ON : SHPS_DGPU_POWER_OFF;
  1464. + status = shps_dgpu_dsm_set_power(pdev, power);
  1465. +
  1466. + return status < 0 ? status : count;
  1467. +}
  1468. +
  1469. +static DEVICE_ATTR_RW(dgpu_power);
  1470. +static DEVICE_ATTR_RW(dgpu_power_dsm);
  1471. +
  1472. +static struct attribute *shps_power_attrs[] = {
  1473. + &dev_attr_dgpu_power.attr,
  1474. + &dev_attr_dgpu_power_dsm.attr,
  1475. + NULL,
  1476. +};
  1477. +ATTRIBUTE_GROUPS(shps_power);
  1478. +
  1479. +
  1480. +static void dbg_dump_power_states(struct platform_device *pdev, const char *prefix)
  1481. +{
  1482. + enum shps_dgpu_power power_dsm;
  1483. + enum shps_dgpu_power power_rp;
  1484. + int status;
  1485. +
  1486. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1487. + if (status < 0)
  1488. + dev_err(&pdev->dev, "%s: failed to get root-port power state: %d\n", prefix, status);
  1489. + power_rp = status;
  1490. +
  1491. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1492. + if (status < 0)
  1493. + dev_err(&pdev->dev, "%s: failed to get direct power state: %d\n", prefix, status);
  1494. + power_dsm = status;
  1495. +
  1496. + dev_dbg(&pdev->dev, "%s: root-port power state: %d\n", prefix, power_rp);
  1497. + dev_dbg(&pdev->dev, "%s: direct power state: %d\n", prefix, power_dsm);
  1498. +}
  1499. +
  1500. +static void dbg_dump_pciesta(struct platform_device *pdev, const char *prefix)
  1501. +{
  1502. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1503. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1504. + u16 lnksta, lnksta2, sltsta, sltsta2;
  1505. +
  1506. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA, &lnksta);
  1507. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA2, &lnksta2);
  1508. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA, &sltsta);
  1509. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA2, &sltsta2);
  1510. +
  1511. + dev_dbg(&pdev->dev, "%s: LNKSTA: 0x%04x", prefix, lnksta);
  1512. + dev_dbg(&pdev->dev, "%s: LNKSTA2: 0x%04x", prefix, lnksta2);
  1513. + dev_dbg(&pdev->dev, "%s: SLTSTA: 0x%04x", prefix, sltsta);
  1514. + dev_dbg(&pdev->dev, "%s: SLTSTA2: 0x%04x", prefix, sltsta2);
  1515. +}
  1516. +
  1517. +static void dbg_dump_drvsta(struct platform_device *pdev, const char *prefix)
  1518. +{
  1519. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1520. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1521. +
  1522. + dev_dbg(&pdev->dev, "%s: RP power: %d", prefix, rp->current_state);
  1523. + dev_dbg(&pdev->dev, "%s: RP state saved: %d", prefix, rp->state_saved);
  1524. + dev_dbg(&pdev->dev, "%s: RP state stored: %d", prefix, !!drvdata->dgpu_root_port_state);
  1525. + dev_dbg(&pdev->dev, "%s: RP enabled: %d", prefix, atomic_read(&rp->enable_cnt));
  1526. + dev_dbg(&pdev->dev, "%s: RP mastered: %d", prefix, rp->is_busmaster);
  1527. +}
  1528. +
  1529. +
  1530. +static int shps_pm_prepare(struct device *dev)
  1531. +{
  1532. + struct platform_device *pdev = to_platform_device(dev);
  1533. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1534. + bool pwrtgt;
  1535. + int status = 0;
  1536. +
  1537. + dbg_dump_power_states(pdev, "shps_pm_prepare");
  1538. +
  1539. + if (param_dgpu_power_susp != SHPS_DGPU_MP_POWER_ASIS) {
  1540. + pwrtgt = test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1541. +
  1542. + status = shps_dgpu_set_power(pdev, param_dgpu_power_susp);
  1543. + if (status) {
  1544. + dev_err(&pdev->dev, "failed to power %s dGPU: %d\n",
  1545. + param_dgpu_power_susp == SHPS_DGPU_MP_POWER_OFF ? "off" : "on",
  1546. + status);
  1547. + return status;
  1548. + }
  1549. +
  1550. + if (pwrtgt)
  1551. + set_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1552. + else
  1553. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1554. + }
  1555. +
  1556. + return 0;
  1557. +}
  1558. +
  1559. +static void shps_pm_complete(struct device *dev)
  1560. +{
  1561. + struct platform_device *pdev = to_platform_device(dev);
  1562. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1563. + int status;
  1564. +
  1565. + dbg_dump_power_states(pdev, "shps_pm_complete");
  1566. + dbg_dump_pciesta(pdev, "shps_pm_complete");
  1567. + dbg_dump_drvsta(pdev, "shps_pm_complete.1");
  1568. +
  1569. + // update power target, dGPU may have been detached while suspended
  1570. + status = shps_dgpu_is_present(pdev);
  1571. + if (status < 0) {
  1572. + dev_err(&pdev->dev, "failed to get dGPU presence: %d\n", status);
  1573. + return;
  1574. + } else if (status == 0) {
  1575. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1576. + }
  1577. +
  1578. + /*
  1579. + * During resume, the PCIe core will power on the root-port, which in turn
  1580. + * will power on the dGPU. Most of the state synchronization is already
  1581. + * handled via the SAN RQSG handler, so it is in a fully consistent
  1582. + * on-state here. If requested, turn it off here.
  1583. + *
  1584. + * As there seem to be some synchronization issues turning off the dGPU
  1585. + * directly after the power-on SAN RQSG notification during the resume
  1586. + * process, let's do this here.
  1587. + *
  1588. + * TODO/FIXME:
  1589. + * This does not combat unhandled power-ons when the device is not fully
  1590. + * resumed, i.e. re-suspended before shps_pm_complete is called. Those
  1591. + * should normally not be an issue, but the dGPU does get hot even though
  1592. + * it is suspended, so ideally we want to keep it off.
  1593. + */
  1594. + if (!test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state)) {
  1595. + status = shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_OFF);
  1596. + if (status)
  1597. + dev_err(&pdev->dev, "failed to power-off dGPU: %d\n", status);
  1598. + }
  1599. +
  1600. + dbg_dump_drvsta(pdev, "shps_pm_complete.2");
  1601. +}
  1602. +
  1603. +static int shps_pm_suspend(struct device *dev)
  1604. +{
  1605. + struct platform_device *pdev = to_platform_device(dev);
  1606. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1607. + int status;
  1608. +
  1609. + if (device_may_wakeup(dev)) {
  1610. + status = enable_irq_wake(drvdata->irq_base_presence);
  1611. + if (status)
  1612. + return status;
  1613. +
  1614. + set_bit(SHPS_STATE_BIT_WAKE_ENABLED, &drvdata->state);
  1615. + }
  1616. +
  1617. + return 0;
  1618. +}
  1619. +
  1620. +static int shps_pm_resume(struct device *dev)
  1621. +{
  1622. + struct platform_device *pdev = to_platform_device(dev);
  1623. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1624. + int status = 0;
  1625. +
  1626. + if (test_and_clear_bit(SHPS_STATE_BIT_WAKE_ENABLED, &drvdata->state))
  1627. + status = disable_irq_wake(drvdata->irq_base_presence);
  1628. +
  1629. + return status;
  1630. +}
  1631. +
  1632. +static void shps_shutdown(struct platform_device *pdev)
  1633. +{
  1634. + int status;
  1635. +
  1636. + /*
  1637. + * Turn on dGPU before shutting down. This allows the core drivers to
  1638. + * properly shut down the device. If we don't do this, the pcieport driver
  1639. + * will complain that the device has already been disabled.
  1640. + */
  1641. + status = shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_ON);
  1642. + if (status)
  1643. + dev_err(&pdev->dev, "failed to turn on dGPU: %d\n", status);
  1644. +}
  1645. +
  1646. +static int shps_dgpu_detached(struct platform_device *pdev)
  1647. +{
  1648. + dbg_dump_power_states(pdev, "shps_dgpu_detached");
  1649. + return shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_OFF);
  1650. +}
  1651. +
  1652. +static int shps_dgpu_attached(struct platform_device *pdev)
  1653. +{
  1654. + dbg_dump_power_states(pdev, "shps_dgpu_attached");
  1655. + return 0;
  1656. +}
  1657. +
  1658. +static int shps_dgpu_powered_on(struct platform_device *pdev)
  1659. +{
  1660. + /*
  1661. + * This function gets called directly after a power-state transition of
  1662. + * the dGPU root port out of D3cold state, indicating a power-on of the
  1663. + * dGPU. Specifically, this function is called from the RQSG handler of
  1664. + * SAN, invoked by the ACPI _ON method of the dGPU root port. This means
  1665. + * that this function is run inside `pci_set_power_state(rp, ...)`
  1666. + * syncrhonously and thus returns before the `pci_set_power_state` call
  1667. + * does.
  1668. + *
  1669. + * `pci_set_power_state` may either be called by us or when the PCI
  1670. + * subsystem decides to power up the root port (e.g. during resume). Thus
  1671. + * we should use this function to ensure that the dGPU and root port
  1672. + * states are consistent when an unexpected power-up is encountered.
  1673. + */
  1674. +
  1675. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1676. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1677. + int status;
  1678. +
  1679. + dbg_dump_drvsta(pdev, "shps_dgpu_powered_on.1");
  1680. +
  1681. + // if we caused the root port to power-on, return
  1682. + if (test_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state))
  1683. + return 0;
  1684. +
  1685. + // if dGPU is not present, force power-target to off and return
  1686. + status = shps_dgpu_is_present(pdev);
  1687. + if (status == 0)
  1688. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1689. + if (status <= 0)
  1690. + return status;
  1691. +
  1692. + mutex_lock(&drvdata->lock);
  1693. +
  1694. + dbg_dump_power_states(pdev, "shps_dgpu_powered_on.1");
  1695. + dbg_dump_pciesta(pdev, "shps_dgpu_powered_on.1");
  1696. + if (drvdata->dgpu_root_port_state)
  1697. + pci_load_and_free_saved_state(rp, &drvdata->dgpu_root_port_state);
  1698. + pci_restore_state(rp);
  1699. + if (!pci_is_enabled(rp))
  1700. + pci_enable_device(rp);
  1701. + pci_set_master(rp);
  1702. + dbg_dump_drvsta(pdev, "shps_dgpu_powered_on.2");
  1703. + dbg_dump_power_states(pdev, "shps_dgpu_powered_on.2");
  1704. + dbg_dump_pciesta(pdev, "shps_dgpu_powered_on.2");
  1705. +
  1706. + mutex_unlock(&drvdata->lock);
  1707. +
  1708. + if (!test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state)) {
  1709. + dev_warn(&pdev->dev, "unexpected dGPU power-on detected");
  1710. + // TODO: schedule state re-check and update
  1711. + }
  1712. +
  1713. + return 0;
  1714. +}
  1715. +
  1716. +
  1717. +static int shps_dgpu_handle_rqsg(struct surface_sam_san_rqsg *rqsg, void *data)
  1718. +{
  1719. + struct platform_device *pdev = data;
  1720. +
  1721. + if (rqsg->tc == SAM_DGPU_TC && rqsg->cid == SAM_DGPU_CID_POWERON)
  1722. + return shps_dgpu_powered_on(pdev);
  1723. +
  1724. + dev_warn(&pdev->dev, "unimplemented dGPU request: RQSG(0x%02x, 0x%02x, 0x%02x)",
  1725. + rqsg->tc, rqsg->cid, rqsg->iid);
  1726. + return 0;
  1727. +}
  1728. +
  1729. +static irqreturn_t shps_dgpu_presence_irq(int irq, void *data)
  1730. +{
  1731. + struct platform_device *pdev = data;
  1732. + bool dgpu_present;
  1733. + int status;
  1734. +
  1735. + status = shps_dgpu_is_present(pdev);
  1736. + if (status < 0) {
  1737. + dev_err(&pdev->dev, "failed to check physical dGPU presence: %d\n", status);
  1738. + return IRQ_HANDLED;
  1739. + }
  1740. +
  1741. + dgpu_present = status != 0;
  1742. + dev_info(&pdev->dev, "dGPU physically %s\n", dgpu_present ? "attached" : "detached");
  1743. +
  1744. + if (dgpu_present)
  1745. + status = shps_dgpu_attached(pdev);
  1746. + else
  1747. + status = shps_dgpu_detached(pdev);
  1748. +
  1749. + if (status)
  1750. + dev_err(&pdev->dev, "error handling dGPU interrupt: %d\n", status);
  1751. +
  1752. + return IRQ_HANDLED;
  1753. +}
  1754. +
  1755. +static irqreturn_t shps_base_presence_irq(int irq, void *data)
  1756. +{
  1757. + return IRQ_HANDLED; // nothing to do, just wake
  1758. +}
  1759. +
  1760. +
  1761. +static int shps_gpios_setup(struct platform_device *pdev)
  1762. +{
  1763. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1764. + struct gpio_desc *gpio_dgpu_power;
  1765. + struct gpio_desc *gpio_dgpu_presence;
  1766. + struct gpio_desc *gpio_base_presence;
  1767. + int status;
  1768. +
  1769. + // get GPIOs
  1770. + gpio_dgpu_power = devm_gpiod_get(&pdev->dev, "dgpu_power", GPIOD_IN);
  1771. + if (IS_ERR(gpio_dgpu_power)) {
  1772. + status = PTR_ERR(gpio_dgpu_power);
  1773. + goto err_out;
  1774. + }
  1775. +
  1776. + gpio_dgpu_presence = devm_gpiod_get(&pdev->dev, "dgpu_presence", GPIOD_IN);
  1777. + if (IS_ERR(gpio_dgpu_presence)) {
  1778. + status = PTR_ERR(gpio_dgpu_presence);
  1779. + goto err_out;
  1780. + }
  1781. +
  1782. + gpio_base_presence = devm_gpiod_get(&pdev->dev, "base_presence", GPIOD_IN);
  1783. + if (IS_ERR(gpio_base_presence)) {
  1784. + status = PTR_ERR(gpio_base_presence);
  1785. + goto err_out;
  1786. + }
  1787. +
  1788. + // export GPIOs
  1789. + status = gpiod_export(gpio_dgpu_power, false);
  1790. + if (status)
  1791. + goto err_out;
  1792. +
  1793. + status = gpiod_export(gpio_dgpu_presence, false);
  1794. + if (status)
  1795. + goto err_export_dgpu_presence;
  1796. +
  1797. + status = gpiod_export(gpio_base_presence, false);
  1798. + if (status)
  1799. + goto err_export_base_presence;
  1800. +
  1801. + // create sysfs links
  1802. + status = gpiod_export_link(&pdev->dev, "gpio-dgpu_power", gpio_dgpu_power);
  1803. + if (status)
  1804. + goto err_link_dgpu_power;
  1805. +
  1806. + status = gpiod_export_link(&pdev->dev, "gpio-dgpu_presence", gpio_dgpu_presence);
  1807. + if (status)
  1808. + goto err_link_dgpu_presence;
  1809. +
  1810. + status = gpiod_export_link(&pdev->dev, "gpio-base_presence", gpio_base_presence);
  1811. + if (status)
  1812. + goto err_link_base_presence;
  1813. +
  1814. + drvdata->gpio_dgpu_power = gpio_dgpu_power;
  1815. + drvdata->gpio_dgpu_presence = gpio_dgpu_presence;
  1816. + drvdata->gpio_base_presence = gpio_base_presence;
  1817. + return 0;
  1818. +
  1819. +err_link_base_presence:
  1820. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_presence");
  1821. +err_link_dgpu_presence:
  1822. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_power");
  1823. +err_link_dgpu_power:
  1824. + gpiod_unexport(gpio_base_presence);
  1825. +err_export_base_presence:
  1826. + gpiod_unexport(gpio_dgpu_presence);
  1827. +err_export_dgpu_presence:
  1828. + gpiod_unexport(gpio_dgpu_power);
  1829. +err_out:
  1830. + return status;
  1831. +}
  1832. +
  1833. +static void shps_gpios_remove(struct platform_device *pdev)
  1834. +{
  1835. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1836. +
  1837. + sysfs_remove_link(&pdev->dev.kobj, "gpio-base_presence");
  1838. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_presence");
  1839. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_power");
  1840. + gpiod_unexport(drvdata->gpio_base_presence);
  1841. + gpiod_unexport(drvdata->gpio_dgpu_presence);
  1842. + gpiod_unexport(drvdata->gpio_dgpu_power);
  1843. +}
  1844. +
  1845. +static int shps_gpios_setup_irq(struct platform_device *pdev)
  1846. +{
  1847. + const int irqf_dgpu = IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
  1848. + const int irqf_base = IRQF_SHARED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
  1849. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1850. + int status;
  1851. +
  1852. + status = gpiod_to_irq(drvdata->gpio_base_presence);
  1853. + if (status < 0)
  1854. + return status;
  1855. + drvdata->irq_base_presence = status;
  1856. +
  1857. + status = gpiod_to_irq(drvdata->gpio_dgpu_presence);
  1858. + if (status < 0)
  1859. + return status;
  1860. + drvdata->irq_dgpu_presence = status;
  1861. +
  1862. + status = request_irq(drvdata->irq_base_presence,
  1863. + shps_base_presence_irq, irqf_base,
  1864. + "shps_base_presence_irq", pdev);
  1865. + if (status)
  1866. + return status;
  1867. +
  1868. + status = request_threaded_irq(drvdata->irq_dgpu_presence,
  1869. + NULL, shps_dgpu_presence_irq, irqf_dgpu,
  1870. + "shps_dgpu_presence_irq", pdev);
  1871. + if (status) {
  1872. + free_irq(drvdata->irq_base_presence, pdev);
  1873. + return status;
  1874. + }
  1875. +
  1876. + return 0;
  1877. +}
  1878. +
  1879. +static void shps_gpios_remove_irq(struct platform_device *pdev)
  1880. +{
  1881. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1882. +
  1883. + free_irq(drvdata->irq_base_presence, pdev);
  1884. + free_irq(drvdata->irq_dgpu_presence, pdev);
  1885. +}
  1886. +
  1887. +static int shps_probe(struct platform_device *pdev)
  1888. +{
  1889. + struct acpi_device *shps_dev = ACPI_COMPANION(&pdev->dev);
  1890. + struct shps_driver_data *drvdata;
  1891. + struct device_link *link;
  1892. + int power, status;
  1893. +
  1894. + if (gpiod_count(&pdev->dev, NULL) < 0)
  1895. + return -ENODEV;
  1896. +
  1897. + // link to SSH
  1898. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  1899. + if (status)
  1900. + return status == -ENXIO ? -EPROBE_DEFER : status;
  1901. +
  1902. + // link to SAN
  1903. + status = surface_sam_san_consumer_register(&pdev->dev, 0);
  1904. + if (status)
  1905. + return status == -ENXIO ? -EPROBE_DEFER : status;
  1906. +
  1907. + status = acpi_dev_add_driver_gpios(shps_dev, shps_acpi_gpios);
  1908. + if (status)
  1909. + return status;
  1910. +
  1911. + drvdata = kzalloc(sizeof(struct shps_driver_data), GFP_KERNEL);
  1912. + if (!drvdata) {
  1913. + status = -ENOMEM;
  1914. + goto err_drvdata;
  1915. + }
  1916. + mutex_init(&drvdata->lock);
  1917. + platform_set_drvdata(pdev, drvdata);
  1918. +
  1919. + drvdata->dgpu_root_port = shps_dgpu_dsm_get_pci_dev(pdev, SHPS_DSM_GPU_ADDRS_RP);
  1920. + if (IS_ERR(drvdata->dgpu_root_port)) {
  1921. + status = PTR_ERR(drvdata->dgpu_root_port);
  1922. + goto err_rp_lookup;
  1923. + }
  1924. +
  1925. + status = shps_gpios_setup(pdev);
  1926. + if (status)
  1927. + goto err_gpio;
  1928. +
  1929. + status = shps_gpios_setup_irq(pdev);
  1930. + if (status)
  1931. + goto err_gpio_irqs;
  1932. +
  1933. + status = device_add_groups(&pdev->dev, shps_power_groups);
  1934. + if (status)
  1935. + goto err_devattr;
  1936. +
  1937. + link = device_link_add(&pdev->dev, &drvdata->dgpu_root_port->dev,
  1938. + DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER);
  1939. + if (!link)
  1940. + goto err_devlink;
  1941. +
  1942. + surface_sam_san_set_rqsg_handler(shps_dgpu_handle_rqsg, pdev);
  1943. +
  1944. + // if dGPU is not present turn-off root-port, else obey module param
  1945. + status = shps_dgpu_is_present(pdev);
  1946. + if (status < 0)
  1947. + goto err_devlink;
  1948. +
  1949. + power = status == 0 ? SHPS_DGPU_POWER_OFF : param_dgpu_power_init;
  1950. + if (power != SHPS_DGPU_MP_POWER_ASIS) {
  1951. + status = shps_dgpu_set_power(pdev, power);
  1952. + if (status)
  1953. + goto err_devlink;
  1954. + }
  1955. +
  1956. + device_init_wakeup(&pdev->dev, true);
  1957. + return 0;
  1958. +
  1959. +err_devlink:
  1960. + device_remove_groups(&pdev->dev, shps_power_groups);
  1961. +err_devattr:
  1962. + shps_gpios_remove_irq(pdev);
  1963. +err_gpio_irqs:
  1964. + shps_gpios_remove(pdev);
  1965. +err_gpio:
  1966. + pci_dev_put(drvdata->dgpu_root_port);
  1967. +err_rp_lookup:
  1968. + platform_set_drvdata(pdev, NULL);
  1969. + kfree(drvdata);
  1970. +err_drvdata:
  1971. + acpi_dev_remove_driver_gpios(shps_dev);
  1972. + return status;
  1973. +}
  1974. +
  1975. +static int shps_remove(struct platform_device *pdev)
  1976. +{
  1977. + struct acpi_device *shps_dev = ACPI_COMPANION(&pdev->dev);
  1978. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1979. + int status;
  1980. +
  1981. + if (param_dgpu_power_exit != SHPS_DGPU_MP_POWER_ASIS) {
  1982. + status = shps_dgpu_set_power(pdev, param_dgpu_power_exit);
  1983. + if (status)
  1984. + dev_err(&pdev->dev, "failed to set dGPU power state: %d\n", status);
  1985. + }
  1986. +
  1987. + device_set_wakeup_capable(&pdev->dev, false);
  1988. + surface_sam_san_set_rqsg_handler(NULL, NULL);
  1989. + device_remove_groups(&pdev->dev, shps_power_groups);
  1990. + shps_gpios_remove_irq(pdev);
  1991. + shps_gpios_remove(pdev);
  1992. + pci_dev_put(drvdata->dgpu_root_port);
  1993. + platform_set_drvdata(pdev, NULL);
  1994. + kfree(drvdata);
  1995. +
  1996. + acpi_dev_remove_driver_gpios(shps_dev);
  1997. + return 0;
  1998. +}
  1999. +
  2000. +
  2001. +static const struct dev_pm_ops shps_pm_ops = {
  2002. + .prepare = shps_pm_prepare,
  2003. + .complete = shps_pm_complete,
  2004. + .suspend = shps_pm_suspend,
  2005. + .resume = shps_pm_resume,
  2006. +};
  2007. +
  2008. +static const struct acpi_device_id shps_acpi_match[] = {
  2009. + { "MSHW0153", 0 },
  2010. + { },
  2011. +};
  2012. +MODULE_DEVICE_TABLE(acpi, shps_acpi_match);
  2013. +
  2014. +static struct platform_driver surface_sam_hps = {
  2015. + .probe = shps_probe,
  2016. + .remove = shps_remove,
  2017. + .shutdown = shps_shutdown,
  2018. + .driver = {
  2019. + .name = "surface_dgpu_hps",
  2020. + .acpi_match_table = ACPI_PTR(shps_acpi_match),
  2021. + .pm = &shps_pm_ops,
  2022. + },
  2023. +};
  2024. +module_platform_driver(surface_sam_hps);
  2025. +
  2026. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  2027. +MODULE_DESCRIPTION("Surface Hot-Plug System (HPS) and dGPU power-state Driver for Surface Book 2");
  2028. +MODULE_LICENSE("GPL v2");
  2029. diff --git a/drivers/platform/x86/surface_sam/surface_sam_san.c b/drivers/platform/x86/surface_sam/surface_sam_san.c
  2030. new file mode 100644
  2031. index 000000000000..63478945e6b2
  2032. --- /dev/null
  2033. +++ b/drivers/platform/x86/surface_sam/surface_sam_san.c
  2034. @@ -0,0 +1,883 @@
  2035. +// SPDX-License-Identifier: GPL-2.0
  2036. +/*
  2037. + * Surface ACPI Notify (SAN) and ACPI integration driver for SAM.
  2038. + * Translates communication from ACPI to SSH and back.
  2039. + */
  2040. +
  2041. +#include <linux/acpi.h>
  2042. +#include <linux/delay.h>
  2043. +#include <linux/jiffies.h>
  2044. +#include <linux/kernel.h>
  2045. +#include <linux/platform_device.h>
  2046. +
  2047. +#include "surface_sam_ssh.h"
  2048. +#include "surface_sam_san.h"
  2049. +
  2050. +
  2051. +#define SAN_RQST_RETRY 5
  2052. +
  2053. +#define SAN_DSM_REVISION 0
  2054. +#define SAN_DSM_FN_NOTIFY_SENSOR_TRIP_POINT 0x09
  2055. +
  2056. +static const guid_t SAN_DSM_UUID =
  2057. + GUID_INIT(0x93b666c5, 0x70c6, 0x469f, 0xa2, 0x15, 0x3d,
  2058. + 0x48, 0x7c, 0x91, 0xab, 0x3c);
  2059. +
  2060. +#define SAM_EVENT_DELAY_PWR_ADAPTER msecs_to_jiffies(5000)
  2061. +#define SAM_EVENT_DELAY_PWR_BST msecs_to_jiffies(2500)
  2062. +
  2063. +#define SAM_EVENT_PWR_TC 0x02
  2064. +#define SAM_EVENT_PWR_RQID 0x0002
  2065. +#define SAM_EVENT_PWR_CID_BIX 0x15
  2066. +#define SAM_EVENT_PWR_CID_BST 0x16
  2067. +#define SAM_EVENT_PWR_CID_ADAPTER 0x17
  2068. +#define SAM_EVENT_PWR_CID_DPTF 0x4f
  2069. +
  2070. +#define SAM_EVENT_TEMP_TC 0x03
  2071. +#define SAM_EVENT_TEMP_RQID 0x0003
  2072. +#define SAM_EVENT_TEMP_CID_NOTIFY_SENSOR_TRIP_POINT 0x0b
  2073. +
  2074. +#define SAN_RQST_TAG "surface_sam_san: rqst: "
  2075. +#define SAN_RQSG_TAG "surface_sam_san: rqsg: "
  2076. +
  2077. +#define SAN_QUIRK_BASE_STATE_DELAY 1000
  2078. +
  2079. +
  2080. +struct san_acpi_consumer {
  2081. + char *path;
  2082. + bool required;
  2083. + u32 flags;
  2084. +};
  2085. +
  2086. +struct san_opreg_context {
  2087. + struct acpi_connection_info connection;
  2088. + struct device *dev;
  2089. +};
  2090. +
  2091. +struct san_consumer_link {
  2092. + const struct san_acpi_consumer *properties;
  2093. + struct device_link *link;
  2094. +};
  2095. +
  2096. +struct san_consumers {
  2097. + u32 num;
  2098. + struct san_consumer_link *links;
  2099. +};
  2100. +
  2101. +struct san_drvdata {
  2102. + struct san_opreg_context opreg_ctx;
  2103. + struct san_consumers consumers;
  2104. + bool has_power_events;
  2105. +};
  2106. +
  2107. +struct gsb_data_in {
  2108. + u8 cv;
  2109. +} __packed;
  2110. +
  2111. +struct gsb_data_rqsx {
  2112. + u8 cv; // command value (should be 0x01 or 0x03)
  2113. + u8 tc; // target controller
  2114. + u8 tid; // expected to be 0x01, could be revision
  2115. + u8 iid; // target sub-controller (e.g. primary vs. secondary battery)
  2116. + u8 snc; // expect-response-flag
  2117. + u8 cid; // command ID
  2118. + u8 cdl; // payload length
  2119. + u8 _pad; // padding
  2120. + u8 pld[0]; // payload
  2121. +} __packed;
  2122. +
  2123. +struct gsb_data_etwl {
  2124. + u8 cv; // command value (should be 0x02)
  2125. + u8 etw3; // ?
  2126. + u8 etw4; // ?
  2127. + u8 msg[0]; // error message (ASCIIZ)
  2128. +} __packed;
  2129. +
  2130. +struct gsb_data_out {
  2131. + u8 status; // _SSH communication status
  2132. + u8 len; // _SSH payload length
  2133. + u8 pld[0]; // _SSH payload
  2134. +} __packed;
  2135. +
  2136. +union gsb_buffer_data {
  2137. + struct gsb_data_in in; // common input
  2138. + struct gsb_data_rqsx rqsx; // RQSX input
  2139. + struct gsb_data_etwl etwl; // ETWL input
  2140. + struct gsb_data_out out; // output
  2141. +};
  2142. +
  2143. +struct gsb_buffer {
  2144. + u8 status; // GSB AttribRawProcess status
  2145. + u8 len; // GSB AttribRawProcess length
  2146. + union gsb_buffer_data data;
  2147. +} __packed;
  2148. +
  2149. +
  2150. +enum san_pwr_event {
  2151. + SAN_PWR_EVENT_BAT1_STAT = 0x03,
  2152. + SAN_PWR_EVENT_BAT1_INFO = 0x04,
  2153. + SAN_PWR_EVENT_ADP1_STAT = 0x05,
  2154. + SAN_PWR_EVENT_ADP1_INFO = 0x06,
  2155. + SAN_PWR_EVENT_BAT2_STAT = 0x07,
  2156. + SAN_PWR_EVENT_BAT2_INFO = 0x08,
  2157. +};
  2158. +
  2159. +
  2160. +static int sam_san_default_rqsg_handler(struct surface_sam_san_rqsg *rqsg, void *data);
  2161. +
  2162. +struct sam_san_rqsg_if {
  2163. + struct mutex lock;
  2164. + struct device *san_dev;
  2165. + surface_sam_san_rqsg_handler_fn handler;
  2166. + void *handler_data;
  2167. +};
  2168. +
  2169. +static struct sam_san_rqsg_if rqsg_if = {
  2170. + .lock = __MUTEX_INITIALIZER(rqsg_if.lock),
  2171. + .san_dev = NULL,
  2172. + .handler = sam_san_default_rqsg_handler,
  2173. + .handler_data = NULL,
  2174. +};
  2175. +
  2176. +int surface_sam_san_consumer_register(struct device *consumer, u32 flags)
  2177. +{
  2178. + const u32 valid = DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE;
  2179. + int status;
  2180. +
  2181. + if ((flags | valid) != valid)
  2182. + return -EINVAL;
  2183. +
  2184. + flags |= DL_FLAG_AUTOREMOVE_CONSUMER;
  2185. +
  2186. + mutex_lock(&rqsg_if.lock);
  2187. + if (rqsg_if.san_dev)
  2188. + status = device_link_add(consumer, rqsg_if.san_dev, flags) ? 0 : -EINVAL;
  2189. + else
  2190. + status = -ENXIO;
  2191. + mutex_unlock(&rqsg_if.lock);
  2192. + return status;
  2193. +}
  2194. +EXPORT_SYMBOL_GPL(surface_sam_san_consumer_register);
  2195. +
  2196. +int surface_sam_san_set_rqsg_handler(surface_sam_san_rqsg_handler_fn fn, void *data)
  2197. +{
  2198. + int status = -EBUSY;
  2199. +
  2200. + mutex_lock(&rqsg_if.lock);
  2201. +
  2202. + if (rqsg_if.handler == sam_san_default_rqsg_handler || !fn) {
  2203. + rqsg_if.handler = fn ? fn : sam_san_default_rqsg_handler;
  2204. + rqsg_if.handler_data = data;
  2205. + status = 0;
  2206. + }
  2207. +
  2208. + mutex_unlock(&rqsg_if.lock);
  2209. + return status;
  2210. +}
  2211. +EXPORT_SYMBOL_GPL(surface_sam_san_set_rqsg_handler);
  2212. +
  2213. +int san_call_rqsg_handler(struct surface_sam_san_rqsg *rqsg)
  2214. +{
  2215. + int status;
  2216. +
  2217. + mutex_lock(&rqsg_if.lock);
  2218. + status = rqsg_if.handler(rqsg, rqsg_if.handler_data);
  2219. + mutex_unlock(&rqsg_if.lock);
  2220. +
  2221. + return status;
  2222. +}
  2223. +
  2224. +static int sam_san_default_rqsg_handler(struct surface_sam_san_rqsg *rqsg, void *data)
  2225. +{
  2226. + pr_warn(SAN_RQSG_TAG "unhandled request: RQSG(0x%02x, 0x%02x, 0x%02x)\n",
  2227. + rqsg->tc, rqsg->cid, rqsg->iid);
  2228. +
  2229. + return 0;
  2230. +}
  2231. +
  2232. +
  2233. +static int san_acpi_notify_power_event(struct device *dev, enum san_pwr_event event)
  2234. +{
  2235. + acpi_handle san = ACPI_HANDLE(dev);
  2236. + union acpi_object *obj;
  2237. +
  2238. + dev_dbg(dev, "notify power event 0x%02x\n", event);
  2239. + obj = acpi_evaluate_dsm_typed(san, &SAN_DSM_UUID, SAN_DSM_REVISION,
  2240. + (u8) event, NULL, ACPI_TYPE_BUFFER);
  2241. +
  2242. + if (IS_ERR_OR_NULL(obj))
  2243. + return obj ? PTR_ERR(obj) : -ENXIO;
  2244. +
  2245. + if (obj->buffer.length != 1 || obj->buffer.pointer[0] != 0) {
  2246. + dev_err(dev, "got unexpected result from _DSM\n");
  2247. + return -EFAULT;
  2248. + }
  2249. +
  2250. + ACPI_FREE(obj);
  2251. + return 0;
  2252. +}
  2253. +
  2254. +static int san_acpi_notify_sensor_trip_point(struct device *dev, u8 iid)
  2255. +{
  2256. + acpi_handle san = ACPI_HANDLE(dev);
  2257. + union acpi_object *obj;
  2258. + union acpi_object param;
  2259. +
  2260. + param.type = ACPI_TYPE_INTEGER;
  2261. + param.integer.value = iid;
  2262. +
  2263. + obj = acpi_evaluate_dsm_typed(san, &SAN_DSM_UUID, SAN_DSM_REVISION,
  2264. + SAN_DSM_FN_NOTIFY_SENSOR_TRIP_POINT,
  2265. + &param, ACPI_TYPE_BUFFER);
  2266. +
  2267. + if (IS_ERR_OR_NULL(obj))
  2268. + return obj ? PTR_ERR(obj) : -ENXIO;
  2269. +
  2270. + if (obj->buffer.length != 1 || obj->buffer.pointer[0] != 0) {
  2271. + dev_err(dev, "got unexpected result from _DSM\n");
  2272. + return -EFAULT;
  2273. + }
  2274. +
  2275. + ACPI_FREE(obj);
  2276. + return 0;
  2277. +}
  2278. +
  2279. +
  2280. +static inline int san_evt_power_adapter(struct device *dev, struct surface_sam_ssh_event *event)
  2281. +{
  2282. + int status;
  2283. +
  2284. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_ADP1_STAT);
  2285. + if (status) {
  2286. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2287. + return status;
  2288. + }
  2289. +
  2290. + /*
  2291. + * Enusre that the battery states get updated correctly.
  2292. + * When the battery is fully charged and an adapter is plugged in, it
  2293. + * sometimes is not updated correctly, instead showing it as charging.
  2294. + * Explicitly trigger battery updates to fix this.
  2295. + */
  2296. +
  2297. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_BAT1_STAT);
  2298. + if (status) {
  2299. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2300. + return status;
  2301. + }
  2302. +
  2303. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_BAT2_STAT);
  2304. + if (status) {
  2305. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2306. + return status;
  2307. + }
  2308. +
  2309. + return 0;
  2310. +}
  2311. +
  2312. +static inline int san_evt_power_bix(struct device *dev, struct surface_sam_ssh_event *event)
  2313. +{
  2314. + enum san_pwr_event evcode;
  2315. + int status;
  2316. +
  2317. + if (event->iid == 0x02)
  2318. + evcode = SAN_PWR_EVENT_BAT2_INFO;
  2319. + else
  2320. + evcode = SAN_PWR_EVENT_BAT1_INFO;
  2321. +
  2322. + status = san_acpi_notify_power_event(dev, evcode);
  2323. + if (status) {
  2324. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2325. + return status;
  2326. + }
  2327. +
  2328. + return 0;
  2329. +}
  2330. +
  2331. +static inline int san_evt_power_bst(struct device *dev, struct surface_sam_ssh_event *event)
  2332. +{
  2333. + enum san_pwr_event evcode;
  2334. + int status;
  2335. +
  2336. + if (event->iid == 0x02)
  2337. + evcode = SAN_PWR_EVENT_BAT2_STAT;
  2338. + else
  2339. + evcode = SAN_PWR_EVENT_BAT1_STAT;
  2340. +
  2341. + status = san_acpi_notify_power_event(dev, evcode);
  2342. + if (status) {
  2343. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2344. + return status;
  2345. + }
  2346. +
  2347. + return 0;
  2348. +}
  2349. +
  2350. +static unsigned long san_evt_power_delay(struct surface_sam_ssh_event *event, void *data)
  2351. +{
  2352. + switch (event->cid) {
  2353. + case SAM_EVENT_PWR_CID_ADAPTER:
  2354. + /*
  2355. + * Wait for battery state to update before signalling adapter change.
  2356. + */
  2357. + return SAM_EVENT_DELAY_PWR_ADAPTER;
  2358. +
  2359. + case SAM_EVENT_PWR_CID_BST:
  2360. + /*
  2361. + * Ensure we do not miss anything important due to caching.
  2362. + */
  2363. + return SAM_EVENT_DELAY_PWR_BST;
  2364. +
  2365. + case SAM_EVENT_PWR_CID_BIX:
  2366. + case SAM_EVENT_PWR_CID_DPTF:
  2367. + default:
  2368. + return 0;
  2369. + }
  2370. +}
  2371. +
  2372. +static int san_evt_power(struct surface_sam_ssh_event *event, void *data)
  2373. +{
  2374. + struct device *dev = (struct device *)data;
  2375. +
  2376. + switch (event->cid) {
  2377. + case SAM_EVENT_PWR_CID_BIX:
  2378. + return san_evt_power_bix(dev, event);
  2379. +
  2380. + case SAM_EVENT_PWR_CID_BST:
  2381. + return san_evt_power_bst(dev, event);
  2382. +
  2383. + case SAM_EVENT_PWR_CID_ADAPTER:
  2384. + return san_evt_power_adapter(dev, event);
  2385. +
  2386. + case SAM_EVENT_PWR_CID_DPTF:
  2387. + /*
  2388. + * Ignored for now.
  2389. + * This signals a change in Intel DPTF PMAX, and possibly other
  2390. + * fields. Ignore for now as there is no corresponding _DSM call and
  2391. + * DPTF is implemented via a separate INT3407 device.
  2392. + *
  2393. + * The payload of this event is: [u32 PMAX, unknown...].
  2394. + */
  2395. + return 0;
  2396. +
  2397. + default:
  2398. + dev_warn(dev, "unhandled power event (cid = %x)\n", event->cid);
  2399. + }
  2400. +
  2401. + return 0;
  2402. +}
  2403. +
  2404. +
  2405. +static inline int san_evt_thermal_notify(struct device *dev, struct surface_sam_ssh_event *event)
  2406. +{
  2407. + int status;
  2408. +
  2409. + status = san_acpi_notify_sensor_trip_point(dev, event->iid);
  2410. + if (status) {
  2411. + dev_err(dev, "error handling thermal event (cid = %x)\n", event->cid);
  2412. + return status;
  2413. + }
  2414. +
  2415. + return 0;
  2416. +}
  2417. +
  2418. +static int san_evt_thermal(struct surface_sam_ssh_event *event, void *data)
  2419. +{
  2420. + struct device *dev = (struct device *)data;
  2421. +
  2422. + switch (event->cid) {
  2423. + case SAM_EVENT_TEMP_CID_NOTIFY_SENSOR_TRIP_POINT:
  2424. + return san_evt_thermal_notify(dev, event);
  2425. +
  2426. + default:
  2427. + dev_warn(dev, "unhandled thermal event (cid = %x)\n", event->cid);
  2428. + }
  2429. +
  2430. + return 0;
  2431. +}
  2432. +
  2433. +
  2434. +static struct gsb_data_rqsx
  2435. +*san_validate_rqsx(struct device *dev, const char *type, struct gsb_buffer *buffer)
  2436. +{
  2437. + struct gsb_data_rqsx *rqsx = &buffer->data.rqsx;
  2438. +
  2439. + if (buffer->len < 8) {
  2440. + dev_err(dev, "invalid %s package (len = %d)\n",
  2441. + type, buffer->len);
  2442. + return NULL;
  2443. + }
  2444. +
  2445. + if (rqsx->cdl != buffer->len - 8) {
  2446. + dev_err(dev, "bogus %s package (len = %d, cdl = %d)\n",
  2447. + type, buffer->len, rqsx->cdl);
  2448. + return NULL;
  2449. + }
  2450. +
  2451. + if (rqsx->tid != 0x01) {
  2452. + dev_warn(dev, "unsupported %s package (tid = 0x%02x)\n",
  2453. + type, rqsx->tid);
  2454. + return NULL;
  2455. + }
  2456. +
  2457. + return rqsx;
  2458. +}
  2459. +
  2460. +static acpi_status
  2461. +san_etwl(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2462. +{
  2463. + struct gsb_data_etwl *etwl = &buffer->data.etwl;
  2464. +
  2465. + if (buffer->len < 3) {
  2466. + dev_err(ctx->dev, "invalid ETWL package (len = %d)\n", buffer->len);
  2467. + return AE_OK;
  2468. + }
  2469. +
  2470. + dev_err(ctx->dev, "ETWL(0x%02x, 0x%02x): %.*s\n",
  2471. + etwl->etw3, etwl->etw4,
  2472. + buffer->len - 3, (char *)etwl->msg);
  2473. +
  2474. + // indicate success
  2475. + buffer->status = 0x00;
  2476. + buffer->len = 0x00;
  2477. +
  2478. + return AE_OK;
  2479. +}
  2480. +
  2481. +static acpi_status
  2482. +san_rqst(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2483. +{
  2484. + struct gsb_data_rqsx *gsb_rqst = san_validate_rqsx(ctx->dev, "RQST", buffer);
  2485. + struct surface_sam_ssh_rqst rqst = {};
  2486. + struct surface_sam_ssh_buf result = {};
  2487. + int status = 0;
  2488. + int try;
  2489. +
  2490. + if (!gsb_rqst)
  2491. + return AE_OK;
  2492. +
  2493. + rqst.tc = gsb_rqst->tc;
  2494. + rqst.cid = gsb_rqst->cid;
  2495. + rqst.iid = gsb_rqst->iid;
  2496. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  2497. + rqst.snc = gsb_rqst->snc;
  2498. + rqst.cdl = gsb_rqst->cdl;
  2499. + rqst.pld = &gsb_rqst->pld[0];
  2500. +
  2501. + result.cap = SURFACE_SAM_SSH_MAX_RQST_RESPONSE;
  2502. + result.len = 0;
  2503. + result.data = kzalloc(result.cap, GFP_KERNEL);
  2504. +
  2505. + if (!result.data)
  2506. + return AE_NO_MEMORY;
  2507. +
  2508. + for (try = 0; try < SAN_RQST_RETRY; try++) {
  2509. + if (try)
  2510. + dev_warn(ctx->dev, SAN_RQST_TAG "IO error occurred, trying again\n");
  2511. +
  2512. + status = surface_sam_ssh_rqst(&rqst, &result);
  2513. + if (status != -EIO)
  2514. + break;
  2515. + }
  2516. +
  2517. + if (rqst.tc == 0x11 && rqst.cid == 0x0D && status == -EPERM) {
  2518. + /* Base state quirk:
  2519. + * The base state may be queried from ACPI when the EC is still
  2520. + * suspended. In this case it will return '-EPERM'. This query
  2521. + * will only be triggered from the ACPI lid GPE interrupt, thus
  2522. + * we are either in laptop or studio mode (base status 0x01 or
  2523. + * 0x02). Furthermore, we will only get here if the device (and
  2524. + * EC) have been suspended.
  2525. + *
  2526. + * We now assume that the device is in laptop mode (0x01). This
  2527. + * has the drawback that it will wake the device when unfolding
  2528. + * it in studio mode, but it also allows us to avoid actively
  2529. + * waiting for the EC to wake up, which may incur a notable
  2530. + * delay.
  2531. + */
  2532. +
  2533. + buffer->status = 0x00;
  2534. + buffer->len = 0x03;
  2535. + buffer->data.out.status = 0x00;
  2536. + buffer->data.out.len = 0x01;
  2537. + buffer->data.out.pld[0] = 0x01;
  2538. +
  2539. + } else if (!status) { // success
  2540. + buffer->status = 0x00;
  2541. + buffer->len = result.len + 2;
  2542. + buffer->data.out.status = 0x00;
  2543. + buffer->data.out.len = result.len;
  2544. + memcpy(&buffer->data.out.pld[0], result.data, result.len);
  2545. +
  2546. + } else { // failure
  2547. + dev_err(ctx->dev, SAN_RQST_TAG "failed with error %d\n", status);
  2548. + buffer->status = 0x00;
  2549. + buffer->len = 0x02;
  2550. + buffer->data.out.status = 0x01; // indicate _SSH error
  2551. + buffer->data.out.len = 0x00;
  2552. + }
  2553. +
  2554. + kfree(result.data);
  2555. +
  2556. + return AE_OK;
  2557. +}
  2558. +
  2559. +static acpi_status
  2560. +san_rqsg(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2561. +{
  2562. + struct gsb_data_rqsx *gsb_rqsg = san_validate_rqsx(ctx->dev, "RQSG", buffer);
  2563. + struct surface_sam_san_rqsg rqsg = {};
  2564. + int status;
  2565. +
  2566. + if (!gsb_rqsg)
  2567. + return AE_OK;
  2568. +
  2569. + rqsg.tc = gsb_rqsg->tc;
  2570. + rqsg.cid = gsb_rqsg->cid;
  2571. + rqsg.iid = gsb_rqsg->iid;
  2572. + rqsg.cdl = gsb_rqsg->cdl;
  2573. + rqsg.pld = &gsb_rqsg->pld[0];
  2574. +
  2575. + status = san_call_rqsg_handler(&rqsg);
  2576. + if (!status) {
  2577. + buffer->status = 0x00;
  2578. + buffer->len = 0x02;
  2579. + buffer->data.out.status = 0x00;
  2580. + buffer->data.out.len = 0x00;
  2581. + } else {
  2582. + dev_err(ctx->dev, SAN_RQSG_TAG "failed with error %d\n", status);
  2583. + buffer->status = 0x00;
  2584. + buffer->len = 0x02;
  2585. + buffer->data.out.status = 0x01; // indicate _SSH error
  2586. + buffer->data.out.len = 0x00;
  2587. + }
  2588. +
  2589. + return AE_OK;
  2590. +}
  2591. +
  2592. +
  2593. +static acpi_status
  2594. +san_opreg_handler(u32 function, acpi_physical_address command,
  2595. + u32 bits, u64 *value64,
  2596. + void *opreg_context, void *region_context)
  2597. +{
  2598. + struct san_opreg_context *context = opreg_context;
  2599. + struct gsb_buffer *buffer = (struct gsb_buffer *)value64;
  2600. + int accessor_type = (0xFFFF0000 & function) >> 16;
  2601. +
  2602. + if (command != 0) {
  2603. + dev_warn(context->dev, "unsupported command: 0x%02llx\n", command);
  2604. + return AE_OK;
  2605. + }
  2606. +
  2607. + if (accessor_type != ACPI_GSB_ACCESS_ATTRIB_RAW_PROCESS) {
  2608. + dev_err(context->dev, "invalid access type: 0x%02x\n", accessor_type);
  2609. + return AE_OK;
  2610. + }
  2611. +
  2612. + // buffer must have at least contain the command-value
  2613. + if (buffer->len == 0) {
  2614. + dev_err(context->dev, "request-package too small\n");
  2615. + return AE_OK;
  2616. + }
  2617. +
  2618. + switch (buffer->data.in.cv) {
  2619. + case 0x01: return san_rqst(context, buffer);
  2620. + case 0x02: return san_etwl(context, buffer);
  2621. + case 0x03: return san_rqsg(context, buffer);
  2622. + }
  2623. +
  2624. + dev_warn(context->dev, "unsupported SAN0 request (cv: 0x%02x)\n", buffer->data.in.cv);
  2625. + return AE_OK;
  2626. +}
  2627. +
  2628. +static int san_enable_power_events(struct platform_device *pdev)
  2629. +{
  2630. + int status;
  2631. +
  2632. + status = surface_sam_ssh_set_delayed_event_handler(
  2633. + SAM_EVENT_PWR_RQID, san_evt_power,
  2634. + san_evt_power_delay, &pdev->dev);
  2635. + if (status)
  2636. + return status;
  2637. +
  2638. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_PWR_TC, 0x01, SAM_EVENT_PWR_RQID);
  2639. + if (status) {
  2640. + surface_sam_ssh_remove_event_handler(SAM_EVENT_PWR_RQID);
  2641. + return status;
  2642. + }
  2643. +
  2644. + return 0;
  2645. +}
  2646. +
  2647. +static int san_enable_thermal_events(struct platform_device *pdev)
  2648. +{
  2649. + int status;
  2650. +
  2651. + status = surface_sam_ssh_set_event_handler(
  2652. + SAM_EVENT_TEMP_RQID, san_evt_thermal,
  2653. + &pdev->dev);
  2654. + if (status)
  2655. + return status;
  2656. +
  2657. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_TEMP_TC, 0x01, SAM_EVENT_TEMP_RQID);
  2658. + if (status) {
  2659. + surface_sam_ssh_remove_event_handler(SAM_EVENT_TEMP_RQID);
  2660. + return status;
  2661. + }
  2662. +
  2663. + return 0;
  2664. +}
  2665. +
  2666. +static void san_disable_power_events(void)
  2667. +{
  2668. + surface_sam_ssh_disable_event_source(SAM_EVENT_PWR_TC, 0x01, SAM_EVENT_PWR_RQID);
  2669. + surface_sam_ssh_remove_event_handler(SAM_EVENT_PWR_RQID);
  2670. +}
  2671. +
  2672. +static void san_disable_thermal_events(void)
  2673. +{
  2674. + surface_sam_ssh_disable_event_source(SAM_EVENT_TEMP_TC, 0x01, SAM_EVENT_TEMP_RQID);
  2675. + surface_sam_ssh_remove_event_handler(SAM_EVENT_TEMP_RQID);
  2676. +}
  2677. +
  2678. +
  2679. +static int san_enable_events(struct platform_device *pdev)
  2680. +{
  2681. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2682. + int status;
  2683. +
  2684. + status = san_enable_thermal_events(pdev);
  2685. + if (status)
  2686. + return status;
  2687. +
  2688. + /*
  2689. + * We have to figure out if this device uses SAN or requires a separate
  2690. + * driver for the battery. If it uses the separate driver, that driver
  2691. + * will enable and handle power events.
  2692. + */
  2693. + drvdata->has_power_events = acpi_has_method(NULL, "\\_SB.BAT1._BST");
  2694. + if (drvdata->has_power_events) {
  2695. + status = san_enable_power_events(pdev);
  2696. + if (status)
  2697. + goto err;
  2698. + }
  2699. +
  2700. + return 0;
  2701. +
  2702. +err:
  2703. + san_disable_thermal_events();
  2704. + return status;
  2705. +}
  2706. +
  2707. +static void san_disable_events(struct platform_device *pdev)
  2708. +{
  2709. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2710. +
  2711. + san_disable_thermal_events();
  2712. + if (drvdata->has_power_events)
  2713. + san_disable_power_events();
  2714. +}
  2715. +
  2716. +
  2717. +static int san_consumers_link(struct platform_device *pdev,
  2718. + const struct san_acpi_consumer *cons,
  2719. + struct san_consumers *out)
  2720. +{
  2721. + const struct san_acpi_consumer *con;
  2722. + struct san_consumer_link *links, *link;
  2723. + struct acpi_device *adev;
  2724. + acpi_handle handle;
  2725. + u32 max_links = 0;
  2726. + int status;
  2727. +
  2728. + if (!cons)
  2729. + return 0;
  2730. +
  2731. + // count links
  2732. + for (con = cons; con->path; ++con)
  2733. + max_links += 1;
  2734. +
  2735. + // allocate
  2736. + links = kcalloc(max_links, sizeof(struct san_consumer_link), GFP_KERNEL);
  2737. + link = &links[0];
  2738. +
  2739. + if (!links)
  2740. + return -ENOMEM;
  2741. +
  2742. + // create links
  2743. + for (con = cons; con->path; ++con) {
  2744. + status = acpi_get_handle(NULL, con->path, &handle);
  2745. + if (status) {
  2746. + if (con->required || status != AE_NOT_FOUND) {
  2747. + status = -ENXIO;
  2748. + goto cleanup;
  2749. + } else {
  2750. + continue;
  2751. + }
  2752. + }
  2753. +
  2754. + status = acpi_bus_get_device(handle, &adev);
  2755. + if (status)
  2756. + goto cleanup;
  2757. +
  2758. + link->link = device_link_add(&adev->dev, &pdev->dev, con->flags);
  2759. + if (!(link->link)) {
  2760. + status = -EFAULT;
  2761. + goto cleanup;
  2762. + }
  2763. + link->properties = con;
  2764. +
  2765. + link += 1;
  2766. + }
  2767. +
  2768. + out->num = link - links;
  2769. + out->links = links;
  2770. +
  2771. + return 0;
  2772. +
  2773. +cleanup:
  2774. + for (link = link - 1; link >= links; --link) {
  2775. + if (link->properties->flags & DL_FLAG_STATELESS)
  2776. + device_link_del(link->link);
  2777. + }
  2778. +
  2779. + return status;
  2780. +}
  2781. +
  2782. +static void san_consumers_unlink(struct san_consumers *consumers)
  2783. +{
  2784. + u32 i;
  2785. +
  2786. + if (!consumers)
  2787. + return;
  2788. +
  2789. + for (i = 0; i < consumers->num; ++i) {
  2790. + if (consumers->links[i].properties->flags & DL_FLAG_STATELESS)
  2791. + device_link_del(consumers->links[i].link);
  2792. + }
  2793. +
  2794. + kfree(consumers->links);
  2795. +
  2796. + consumers->num = 0;
  2797. + consumers->links = NULL;
  2798. +}
  2799. +
  2800. +static int surface_sam_san_probe(struct platform_device *pdev)
  2801. +{
  2802. + const struct san_acpi_consumer *cons;
  2803. + struct san_drvdata *drvdata;
  2804. + acpi_handle san = ACPI_HANDLE(&pdev->dev); // _SAN device node
  2805. + int status;
  2806. +
  2807. + /*
  2808. + * Defer probe if the _SSH driver has not set up the controller yet. This
  2809. + * makes sure we do not fail any initial requests (e.g. _STA request without
  2810. + * which the battery does not get set up correctly). Otherwise register as
  2811. + * consumer to set up a device_link.
  2812. + */
  2813. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  2814. + if (status)
  2815. + return status == -ENXIO ? -EPROBE_DEFER : status;
  2816. +
  2817. + drvdata = kzalloc(sizeof(struct san_drvdata), GFP_KERNEL);
  2818. + if (!drvdata)
  2819. + return -ENOMEM;
  2820. +
  2821. + drvdata->opreg_ctx.dev = &pdev->dev;
  2822. +
  2823. + cons = acpi_device_get_match_data(&pdev->dev);
  2824. + status = san_consumers_link(pdev, cons, &drvdata->consumers);
  2825. + if (status)
  2826. + goto err_consumers;
  2827. +
  2828. + platform_set_drvdata(pdev, drvdata);
  2829. +
  2830. + status = acpi_install_address_space_handler(san,
  2831. + ACPI_ADR_SPACE_GSBUS,
  2832. + &san_opreg_handler,
  2833. + NULL, &drvdata->opreg_ctx);
  2834. +
  2835. + if (ACPI_FAILURE(status)) {
  2836. + status = -ENODEV;
  2837. + goto err_install_handler;
  2838. + }
  2839. +
  2840. + status = san_enable_events(pdev);
  2841. + if (status)
  2842. + goto err_enable_events;
  2843. +
  2844. + mutex_lock(&rqsg_if.lock);
  2845. + if (!rqsg_if.san_dev)
  2846. + rqsg_if.san_dev = &pdev->dev;
  2847. + else
  2848. + status = -EBUSY;
  2849. + mutex_unlock(&rqsg_if.lock);
  2850. +
  2851. + if (status)
  2852. + goto err_install_dev;
  2853. +
  2854. + acpi_walk_dep_device_list(san);
  2855. + return 0;
  2856. +
  2857. +err_install_dev:
  2858. + san_disable_events(pdev);
  2859. +err_enable_events:
  2860. + acpi_remove_address_space_handler(san, ACPI_ADR_SPACE_GSBUS, &san_opreg_handler);
  2861. +err_install_handler:
  2862. + platform_set_drvdata(san, NULL);
  2863. + san_consumers_unlink(&drvdata->consumers);
  2864. +err_consumers:
  2865. + kfree(drvdata);
  2866. + return status;
  2867. +}
  2868. +
  2869. +static int surface_sam_san_remove(struct platform_device *pdev)
  2870. +{
  2871. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2872. + acpi_handle san = ACPI_HANDLE(&pdev->dev); // _SAN device node
  2873. + acpi_status status = AE_OK;
  2874. +
  2875. + mutex_lock(&rqsg_if.lock);
  2876. + rqsg_if.san_dev = NULL;
  2877. + mutex_unlock(&rqsg_if.lock);
  2878. +
  2879. + acpi_remove_address_space_handler(san, ACPI_ADR_SPACE_GSBUS, &san_opreg_handler);
  2880. + san_disable_events(pdev);
  2881. +
  2882. + san_consumers_unlink(&drvdata->consumers);
  2883. + kfree(drvdata);
  2884. +
  2885. + platform_set_drvdata(pdev, NULL);
  2886. + return status;
  2887. +}
  2888. +
  2889. +
  2890. +static const struct san_acpi_consumer san_mshw0091_consumers[] = {
  2891. + { "\\_SB.SRTC", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2892. + { "\\ADP1", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2893. + { "\\_SB.BAT1", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2894. + { "\\_SB.BAT2", false, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2895. + { },
  2896. +};
  2897. +
  2898. +static const struct acpi_device_id surface_sam_san_match[] = {
  2899. + { "MSHW0091", (unsigned long) san_mshw0091_consumers },
  2900. + { },
  2901. +};
  2902. +MODULE_DEVICE_TABLE(acpi, surface_sam_san_match);
  2903. +
  2904. +static struct platform_driver surface_sam_san = {
  2905. + .probe = surface_sam_san_probe,
  2906. + .remove = surface_sam_san_remove,
  2907. + .driver = {
  2908. + .name = "surface_sam_san",
  2909. + .acpi_match_table = ACPI_PTR(surface_sam_san_match),
  2910. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  2911. + },
  2912. +};
  2913. +module_platform_driver(surface_sam_san);
  2914. +
  2915. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  2916. +MODULE_DESCRIPTION("Surface ACPI Notify Driver for 5th Generation Surface Devices");
  2917. +MODULE_LICENSE("GPL v2");
  2918. diff --git a/drivers/platform/x86/surface_sam/surface_sam_san.h b/drivers/platform/x86/surface_sam/surface_sam_san.h
  2919. new file mode 100644
  2920. index 000000000000..85b6d6569947
  2921. --- /dev/null
  2922. +++ b/drivers/platform/x86/surface_sam/surface_sam_san.h
  2923. @@ -0,0 +1,30 @@
  2924. +/* SPDX-License-Identifier: GPL-2.0 */
  2925. +/*
  2926. + * Interface for Surface ACPI/Notify (SAN).
  2927. + *
  2928. + * The SAN is the main interface between the Surface Serial Hub (SSH) and the
  2929. + * Surface/System Aggregator Module (SAM). It allows requests to be translated
  2930. + * from ACPI to SSH/SAM. It also interfaces with the discrete GPU hot-plug
  2931. + * driver.
  2932. + */
  2933. +
  2934. +#ifndef _SURFACE_SAM_SAN_H
  2935. +#define _SURFACE_SAM_SAN_H
  2936. +
  2937. +#include <linux/types.h>
  2938. +
  2939. +
  2940. +struct surface_sam_san_rqsg {
  2941. + u8 tc; // target category
  2942. + u8 cid; // command ID
  2943. + u8 iid; // instance ID
  2944. + u8 cdl; // command data length (length of payload)
  2945. + u8 *pld; // pointer to payload of length cdl
  2946. +};
  2947. +
  2948. +typedef int (*surface_sam_san_rqsg_handler_fn)(struct surface_sam_san_rqsg *rqsg, void *data);
  2949. +
  2950. +int surface_sam_san_consumer_register(struct device *consumer, u32 flags);
  2951. +int surface_sam_san_set_rqsg_handler(surface_sam_san_rqsg_handler_fn fn, void *data);
  2952. +
  2953. +#endif /* _SURFACE_SAM_SAN_H */
  2954. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid.c b/drivers/platform/x86/surface_sam/surface_sam_sid.c
  2955. new file mode 100644
  2956. index 000000000000..fb49d0e00808
  2957. --- /dev/null
  2958. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid.c
  2959. @@ -0,0 +1,137 @@
  2960. +// SPDX-License-Identifier: GPL-2.0
  2961. +/*
  2962. + * Surface Integration Driver.
  2963. + * MFD driver to provide device/model dependent functionality.
  2964. + */
  2965. +
  2966. +#include <linux/acpi.h>
  2967. +#include <linux/kernel.h>
  2968. +#include <linux/module.h>
  2969. +#include <linux/platform_device.h>
  2970. +#include <linux/mfd/core.h>
  2971. +
  2972. +
  2973. +static const struct mfd_cell sid_devs_sp4[] = {
  2974. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2975. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  2976. + { },
  2977. +};
  2978. +
  2979. +static const struct mfd_cell sid_devs_sp7[] = {
  2980. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2981. + { .name = "surface_sam_sid_ac", .id = -1 },
  2982. + { .name = "surface_sam_sid_battery", .id = -1 },
  2983. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  2984. + { },
  2985. +};
  2986. +
  2987. +static const struct mfd_cell sid_devs_sb1[] = {
  2988. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2989. + { },
  2990. +};
  2991. +
  2992. +static const struct mfd_cell sid_devs_sb2[] = {
  2993. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2994. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  2995. + { },
  2996. +};
  2997. +
  2998. +static const struct mfd_cell sid_devs_sl1[] = {
  2999. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3000. + { },
  3001. +};
  3002. +
  3003. +static const struct mfd_cell sid_devs_sl2[] = {
  3004. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3005. + { },
  3006. +};
  3007. +
  3008. +static const struct mfd_cell sid_devs_sl3_13[] = {
  3009. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3010. + { .name = "surface_sam_sid_vhf", .id = -1 },
  3011. + { .name = "surface_sam_sid_ac", .id = -1 },
  3012. + { .name = "surface_sam_sid_battery", .id = -1 },
  3013. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  3014. + { },
  3015. +};
  3016. +
  3017. +static const struct mfd_cell sid_devs_sl3_15[] = {
  3018. + { .name = "surface_sam_sid_vhf", .id = -1 },
  3019. + { .name = "surface_sam_sid_ac", .id = -1 },
  3020. + { .name = "surface_sam_sid_battery", .id = -1 },
  3021. + { },
  3022. +};
  3023. +
  3024. +static const struct acpi_device_id surface_sam_sid_match[] = {
  3025. + /* Surface Pro 4, 5, and 6 */
  3026. + { "MSHW0081", (unsigned long)sid_devs_sp4 },
  3027. +
  3028. + /* Surface Pro 7 */
  3029. + { "MSHW0116", (unsigned long)sid_devs_sp7 },
  3030. +
  3031. + /* Surface Book 1 */
  3032. + { "MSHW0080", (unsigned long)sid_devs_sb1 },
  3033. +
  3034. + /* Surface Book 2 */
  3035. + { "MSHW0107", (unsigned long)sid_devs_sb2 },
  3036. +
  3037. + /* Surface Laptop 1 */
  3038. + { "MSHW0086", (unsigned long)sid_devs_sl1 },
  3039. +
  3040. + /* Surface Laptop 2 */
  3041. + { "MSHW0112", (unsigned long)sid_devs_sl2 },
  3042. +
  3043. + /* Surface Laptop 3 (13") */
  3044. + { "MSHW0114", (unsigned long)sid_devs_sl3_13 },
  3045. +
  3046. + /* Surface Laptop 3 (15") */
  3047. + { "MSHW0110", (unsigned long)sid_devs_sl3_15 },
  3048. +
  3049. + { },
  3050. +};
  3051. +MODULE_DEVICE_TABLE(acpi, surface_sam_sid_match);
  3052. +
  3053. +
  3054. +static int surface_sam_sid_probe(struct platform_device *pdev)
  3055. +{
  3056. + const struct acpi_device_id *match;
  3057. + const struct mfd_cell *cells, *p;
  3058. +
  3059. + match = acpi_match_device(surface_sam_sid_match, &pdev->dev);
  3060. + if (!match)
  3061. + return -ENODEV;
  3062. +
  3063. + cells = (struct mfd_cell *)match->driver_data;
  3064. + if (!cells)
  3065. + return -ENODEV;
  3066. +
  3067. + for (p = cells; p->name; ++p) {
  3068. + /* just count */
  3069. + }
  3070. +
  3071. + if (p == cells)
  3072. + return -ENODEV;
  3073. +
  3074. + return mfd_add_devices(&pdev->dev, 0, cells, p - cells, NULL, 0, NULL);
  3075. +}
  3076. +
  3077. +static int surface_sam_sid_remove(struct platform_device *pdev)
  3078. +{
  3079. + mfd_remove_devices(&pdev->dev);
  3080. + return 0;
  3081. +}
  3082. +
  3083. +static struct platform_driver surface_sam_sid = {
  3084. + .probe = surface_sam_sid_probe,
  3085. + .remove = surface_sam_sid_remove,
  3086. + .driver = {
  3087. + .name = "surface_sam_sid",
  3088. + .acpi_match_table = ACPI_PTR(surface_sam_sid_match),
  3089. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3090. + },
  3091. +};
  3092. +module_platform_driver(surface_sam_sid);
  3093. +
  3094. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3095. +MODULE_DESCRIPTION("Surface Integration Driver for 5th Generation Surface Devices");
  3096. +MODULE_LICENSE("GPL v2");
  3097. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c b/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  3098. new file mode 100644
  3099. index 000000000000..286411701d36
  3100. --- /dev/null
  3101. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  3102. @@ -0,0 +1,224 @@
  3103. +// SPDX-License-Identifier: GPL-2.0
  3104. +/*
  3105. + * Surface Lid driver to enable wakeup from suspend via the lid.
  3106. + */
  3107. +
  3108. +#include <linux/acpi.h>
  3109. +#include <linux/dmi.h>
  3110. +#include <linux/kernel.h>
  3111. +#include <linux/module.h>
  3112. +#include <linux/platform_device.h>
  3113. +
  3114. +
  3115. +struct sid_lid_device {
  3116. + const char *acpi_path;
  3117. + const u32 gpe_number;
  3118. +};
  3119. +
  3120. +
  3121. +static const struct sid_lid_device lid_device_l17 = {
  3122. + .acpi_path = "\\_SB.LID0",
  3123. + .gpe_number = 0x17,
  3124. +};
  3125. +
  3126. +static const struct sid_lid_device lid_device_l4D = {
  3127. + .acpi_path = "\\_SB.LID0",
  3128. + .gpe_number = 0x4D,
  3129. +};
  3130. +
  3131. +static const struct sid_lid_device lid_device_l4F = {
  3132. + .acpi_path = "\\_SB.LID0",
  3133. + .gpe_number = 0x4F,
  3134. +};
  3135. +
  3136. +static const struct sid_lid_device lid_device_l57 = {
  3137. + .acpi_path = "\\_SB.LID0",
  3138. + .gpe_number = 0x57,
  3139. +};
  3140. +
  3141. +
  3142. +static const struct dmi_system_id dmi_lid_device_table[] = {
  3143. + {
  3144. + .ident = "Surface Pro 4",
  3145. + .matches = {
  3146. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3147. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 4"),
  3148. + },
  3149. + .driver_data = (void *)&lid_device_l17,
  3150. + },
  3151. + {
  3152. + .ident = "Surface Pro 5",
  3153. + .matches = {
  3154. + /* match for SKU here due to generic product name "Surface Pro" */
  3155. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3156. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1796"),
  3157. + },
  3158. + .driver_data = (void *)&lid_device_l4F,
  3159. + },
  3160. + {
  3161. + .ident = "Surface Pro 5 (LTE)",
  3162. + .matches = {
  3163. + /* match for SKU here due to generic product name "Surface Pro" */
  3164. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3165. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1807"),
  3166. + },
  3167. + .driver_data = (void *)&lid_device_l4F,
  3168. + },
  3169. + {
  3170. + .ident = "Surface Pro 6",
  3171. + .matches = {
  3172. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3173. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 6"),
  3174. + },
  3175. + .driver_data = (void *)&lid_device_l4F,
  3176. + },
  3177. + {
  3178. + .ident = "Surface Pro 7",
  3179. + .matches = {
  3180. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3181. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 7"),
  3182. + },
  3183. + .driver_data = (void *)&lid_device_l4D,
  3184. + },
  3185. + {
  3186. + .ident = "Surface Book 1",
  3187. + .matches = {
  3188. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3189. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book"),
  3190. + },
  3191. + .driver_data = (void *)&lid_device_l17,
  3192. + },
  3193. + {
  3194. + .ident = "Surface Book 2",
  3195. + .matches = {
  3196. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3197. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book 2"),
  3198. + },
  3199. + .driver_data = (void *)&lid_device_l17,
  3200. + },
  3201. + {
  3202. + .ident = "Surface Laptop 1",
  3203. + .matches = {
  3204. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3205. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop"),
  3206. + },
  3207. + .driver_data = (void *)&lid_device_l57,
  3208. + },
  3209. + {
  3210. + .ident = "Surface Laptop 2",
  3211. + .matches = {
  3212. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3213. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop 2"),
  3214. + },
  3215. + .driver_data = (void *)&lid_device_l57,
  3216. + },
  3217. + {
  3218. + .ident = "Surface Laptop 3 (13\")",
  3219. + .matches = {
  3220. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3221. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Laptop_3_1867:1868"),
  3222. + },
  3223. + .driver_data = (void *)&lid_device_l4D,
  3224. + },
  3225. + { }
  3226. +};
  3227. +
  3228. +
  3229. +static int sid_lid_enable_wakeup(const struct sid_lid_device *dev, bool enable)
  3230. +{
  3231. + int action = enable ? ACPI_GPE_ENABLE : ACPI_GPE_DISABLE;
  3232. + int status;
  3233. +
  3234. + status = acpi_set_gpe_wake_mask(NULL, dev->gpe_number, action);
  3235. + if (status)
  3236. + return -EFAULT;
  3237. +
  3238. + return 0;
  3239. +}
  3240. +
  3241. +
  3242. +static int surface_sam_sid_gpelid_suspend(struct device *dev)
  3243. +{
  3244. + const struct sid_lid_device *ldev;
  3245. +
  3246. + ldev = dev_get_drvdata(dev);
  3247. + return sid_lid_enable_wakeup(ldev, true);
  3248. +}
  3249. +
  3250. +static int surface_sam_sid_gpelid_resume(struct device *dev)
  3251. +{
  3252. + const struct sid_lid_device *ldev;
  3253. +
  3254. + ldev = dev_get_drvdata(dev);
  3255. + return sid_lid_enable_wakeup(ldev, false);
  3256. +}
  3257. +
  3258. +static SIMPLE_DEV_PM_OPS(surface_sam_sid_gpelid_pm,
  3259. + surface_sam_sid_gpelid_suspend,
  3260. + surface_sam_sid_gpelid_resume);
  3261. +
  3262. +
  3263. +static int surface_sam_sid_gpelid_probe(struct platform_device *pdev)
  3264. +{
  3265. + const struct dmi_system_id *match;
  3266. + struct sid_lid_device *dev;
  3267. + acpi_handle lid_handle;
  3268. + int status;
  3269. +
  3270. + match = dmi_first_match(dmi_lid_device_table);
  3271. + if (!match)
  3272. + return -ENODEV;
  3273. +
  3274. + dev = match->driver_data;
  3275. + if (!dev)
  3276. + return -ENODEV;
  3277. +
  3278. + status = acpi_get_handle(NULL, (acpi_string)dev->acpi_path, &lid_handle);
  3279. + if (status)
  3280. + return -EFAULT;
  3281. +
  3282. + status = acpi_setup_gpe_for_wake(lid_handle, NULL, dev->gpe_number);
  3283. + if (status)
  3284. + return -EFAULT;
  3285. +
  3286. + status = acpi_enable_gpe(NULL, dev->gpe_number);
  3287. + if (status)
  3288. + return -EFAULT;
  3289. +
  3290. + status = sid_lid_enable_wakeup(dev, false);
  3291. + if (status) {
  3292. + acpi_disable_gpe(NULL, dev->gpe_number);
  3293. + return status;
  3294. + }
  3295. +
  3296. + platform_set_drvdata(pdev, dev);
  3297. + return 0;
  3298. +}
  3299. +
  3300. +static int surface_sam_sid_gpelid_remove(struct platform_device *pdev)
  3301. +{
  3302. + struct sid_lid_device *dev = platform_get_drvdata(pdev);
  3303. +
  3304. + /* restore default behavior without this module */
  3305. + sid_lid_enable_wakeup(dev, false);
  3306. + acpi_disable_gpe(NULL, dev->gpe_number);
  3307. +
  3308. + platform_set_drvdata(pdev, NULL);
  3309. + return 0;
  3310. +}
  3311. +
  3312. +static struct platform_driver surface_sam_sid_gpelid = {
  3313. + .probe = surface_sam_sid_gpelid_probe,
  3314. + .remove = surface_sam_sid_gpelid_remove,
  3315. + .driver = {
  3316. + .name = "surface_sam_sid_gpelid",
  3317. + .pm = &surface_sam_sid_gpelid_pm,
  3318. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3319. + },
  3320. +};
  3321. +module_platform_driver(surface_sam_sid_gpelid);
  3322. +
  3323. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3324. +MODULE_DESCRIPTION("Surface Lid Driver for 5th Generation Surface Devices");
  3325. +MODULE_LICENSE("GPL v2");
  3326. +MODULE_ALIAS("platform:surface_sam_sid_gpelid");
  3327. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c b/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  3328. new file mode 100644
  3329. index 000000000000..f74e2b51604d
  3330. --- /dev/null
  3331. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  3332. @@ -0,0 +1,216 @@
  3333. +// SPDX-License-Identifier: GPL-2.0
  3334. +/*
  3335. + * Surface Performance Mode Driver.
  3336. + * Allows to change cooling capabilities based on user preference.
  3337. + */
  3338. +
  3339. +#include <asm/unaligned.h>
  3340. +#include <linux/kernel.h>
  3341. +#include <linux/module.h>
  3342. +#include <linux/platform_device.h>
  3343. +
  3344. +#include "surface_sam_ssh.h"
  3345. +
  3346. +
  3347. +#define SID_PARAM_PERM 0644
  3348. +
  3349. +enum sam_perf_mode {
  3350. + SAM_PERF_MODE_NORMAL = 1,
  3351. + SAM_PERF_MODE_BATTERY = 2,
  3352. + SAM_PERF_MODE_PERF1 = 3,
  3353. + SAM_PERF_MODE_PERF2 = 4,
  3354. +
  3355. + __SAM_PERF_MODE__START = 1,
  3356. + __SAM_PERF_MODE__END = 4,
  3357. +};
  3358. +
  3359. +enum sid_param_perf_mode {
  3360. + SID_PARAM_PERF_MODE_AS_IS = 0,
  3361. + SID_PARAM_PERF_MODE_NORMAL = SAM_PERF_MODE_NORMAL,
  3362. + SID_PARAM_PERF_MODE_BATTERY = SAM_PERF_MODE_BATTERY,
  3363. + SID_PARAM_PERF_MODE_PERF1 = SAM_PERF_MODE_PERF1,
  3364. + SID_PARAM_PERF_MODE_PERF2 = SAM_PERF_MODE_PERF2,
  3365. +
  3366. + __SID_PARAM_PERF_MODE__START = 0,
  3367. + __SID_PARAM_PERF_MODE__END = 4,
  3368. +};
  3369. +
  3370. +
  3371. +static int surface_sam_perf_mode_get(void)
  3372. +{
  3373. + u8 result_buf[8] = { 0 };
  3374. + int status;
  3375. +
  3376. + struct surface_sam_ssh_rqst rqst = {
  3377. + .tc = 0x03,
  3378. + .cid = 0x02,
  3379. + .iid = 0x00,
  3380. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  3381. + .snc = 0x01,
  3382. + .cdl = 0x00,
  3383. + .pld = NULL,
  3384. + };
  3385. +
  3386. + struct surface_sam_ssh_buf result = {
  3387. + .cap = ARRAY_SIZE(result_buf),
  3388. + .len = 0,
  3389. + .data = result_buf,
  3390. + };
  3391. +
  3392. + status = surface_sam_ssh_rqst(&rqst, &result);
  3393. + if (status)
  3394. + return status;
  3395. +
  3396. + if (result.len != 8)
  3397. + return -EFAULT;
  3398. +
  3399. + return get_unaligned_le32(&result.data[0]);
  3400. +}
  3401. +
  3402. +static int surface_sam_perf_mode_set(int perf_mode)
  3403. +{
  3404. + u8 payload[4] = { 0 };
  3405. +
  3406. + struct surface_sam_ssh_rqst rqst = {
  3407. + .tc = 0x03,
  3408. + .cid = 0x03,
  3409. + .iid = 0x00,
  3410. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  3411. + .snc = 0x00,
  3412. + .cdl = ARRAY_SIZE(payload),
  3413. + .pld = payload,
  3414. + };
  3415. +
  3416. + if (perf_mode < __SAM_PERF_MODE__START || perf_mode > __SAM_PERF_MODE__END)
  3417. + return -EINVAL;
  3418. +
  3419. + put_unaligned_le32(perf_mode, &rqst.pld[0]);
  3420. + return surface_sam_ssh_rqst(&rqst, NULL);
  3421. +}
  3422. +
  3423. +
  3424. +static int param_perf_mode_set(const char *val, const struct kernel_param *kp)
  3425. +{
  3426. + int perf_mode;
  3427. + int status;
  3428. +
  3429. + status = kstrtoint(val, 0, &perf_mode);
  3430. + if (status)
  3431. + return status;
  3432. +
  3433. + if (perf_mode < __SID_PARAM_PERF_MODE__START || perf_mode > __SID_PARAM_PERF_MODE__END)
  3434. + return -EINVAL;
  3435. +
  3436. + return param_set_int(val, kp);
  3437. +}
  3438. +
  3439. +static const struct kernel_param_ops param_perf_mode_ops = {
  3440. + .set = param_perf_mode_set,
  3441. + .get = param_get_int,
  3442. +};
  3443. +
  3444. +static int param_perf_mode_init = SID_PARAM_PERF_MODE_AS_IS;
  3445. +static int param_perf_mode_exit = SID_PARAM_PERF_MODE_AS_IS;
  3446. +
  3447. +module_param_cb(perf_mode_init, &param_perf_mode_ops, &param_perf_mode_init, SID_PARAM_PERM);
  3448. +module_param_cb(perf_mode_exit, &param_perf_mode_ops, &param_perf_mode_exit, SID_PARAM_PERM);
  3449. +
  3450. +MODULE_PARM_DESC(perf_mode_init, "Performance-mode to be set on module initialization");
  3451. +MODULE_PARM_DESC(perf_mode_exit, "Performance-mode to be set on module exit");
  3452. +
  3453. +
  3454. +static ssize_t perf_mode_show(struct device *dev, struct device_attribute *attr, char *data)
  3455. +{
  3456. + int perf_mode;
  3457. +
  3458. + perf_mode = surface_sam_perf_mode_get();
  3459. + if (perf_mode < 0) {
  3460. + dev_err(dev, "failed to get current performance mode: %d", perf_mode);
  3461. + return -EIO;
  3462. + }
  3463. +
  3464. + return sprintf(data, "%d\n", perf_mode);
  3465. +}
  3466. +
  3467. +static ssize_t perf_mode_store(struct device *dev, struct device_attribute *attr,
  3468. + const char *data, size_t count)
  3469. +{
  3470. + int perf_mode;
  3471. + int status;
  3472. +
  3473. + status = kstrtoint(data, 0, &perf_mode);
  3474. + if (status)
  3475. + return status;
  3476. +
  3477. + status = surface_sam_perf_mode_set(perf_mode);
  3478. + if (status)
  3479. + return status;
  3480. +
  3481. + // TODO: Should we notify ACPI here?
  3482. + //
  3483. + // There is a _DSM call described as
  3484. + // WSID._DSM: Notify DPTF on Slider State change
  3485. + // which calls
  3486. + // ODV3 = ToInteger (Arg3)
  3487. + // Notify(IETM, 0x88)
  3488. + // IETM is an INT3400 Intel Dynamic Power Performance Management
  3489. + // device, part of the DPTF framework. From the corresponding
  3490. + // kernel driver, it looks like event 0x88 is being ignored. Also
  3491. + // it is currently unknown what the consequecnes of setting ODV3
  3492. + // are.
  3493. +
  3494. + return count;
  3495. +}
  3496. +
  3497. +const static DEVICE_ATTR_RW(perf_mode);
  3498. +
  3499. +
  3500. +static int surface_sam_sid_perfmode_probe(struct platform_device *pdev)
  3501. +{
  3502. + int status;
  3503. +
  3504. + // link to ec
  3505. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  3506. + if (status)
  3507. + return status == -ENXIO ? -EPROBE_DEFER : status;
  3508. +
  3509. + // set initial perf_mode
  3510. + if (param_perf_mode_init != SID_PARAM_PERF_MODE_AS_IS) {
  3511. + status = surface_sam_perf_mode_set(param_perf_mode_init);
  3512. + if (status)
  3513. + return status;
  3514. + }
  3515. +
  3516. + // register perf_mode attribute
  3517. + status = sysfs_create_file(&pdev->dev.kobj, &dev_attr_perf_mode.attr);
  3518. + if (status)
  3519. + goto err_sysfs;
  3520. +
  3521. + return 0;
  3522. +
  3523. +err_sysfs:
  3524. + surface_sam_perf_mode_set(param_perf_mode_exit);
  3525. + return status;
  3526. +}
  3527. +
  3528. +static int surface_sam_sid_perfmode_remove(struct platform_device *pdev)
  3529. +{
  3530. + sysfs_remove_file(&pdev->dev.kobj, &dev_attr_perf_mode.attr);
  3531. + surface_sam_perf_mode_set(param_perf_mode_exit);
  3532. + return 0;
  3533. +}
  3534. +
  3535. +static struct platform_driver surface_sam_sid_perfmode = {
  3536. + .probe = surface_sam_sid_perfmode_probe,
  3537. + .remove = surface_sam_sid_perfmode_remove,
  3538. + .driver = {
  3539. + .name = "surface_sam_sid_perfmode",
  3540. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3541. + },
  3542. +};
  3543. +module_platform_driver(surface_sam_sid_perfmode);
  3544. +
  3545. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3546. +MODULE_DESCRIPTION("Surface Performance Mode Driver for 5th Generation Surface Devices");
  3547. +MODULE_LICENSE("GPL v2");
  3548. +MODULE_ALIAS("platform:surface_sam_sid_perfmode");
  3549. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_power.c b/drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  3550. new file mode 100644
  3551. index 000000000000..eb925bdda883
  3552. --- /dev/null
  3553. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  3554. @@ -0,0 +1,1264 @@
  3555. +// SPDX-License-Identifier: GPL-2.0
  3556. +/*
  3557. + * Surface SID Battery/AC Driver.
  3558. + * Provides support for the battery and AC on 7th generation Surface devices.
  3559. + */
  3560. +
  3561. +#include <linux/kernel.h>
  3562. +#include <linux/delay.h>
  3563. +#include <linux/jiffies.h>
  3564. +#include <linux/module.h>
  3565. +#include <linux/platform_device.h>
  3566. +#include <linux/power_supply.h>
  3567. +#include <linux/workqueue.h>
  3568. +
  3569. +#include "surface_sam_ssh.h"
  3570. +
  3571. +#define SPWR_WARN KERN_WARNING KBUILD_MODNAME ": "
  3572. +#define SPWR_DEBUG KERN_DEBUG KBUILD_MODNAME ": "
  3573. +
  3574. +
  3575. +// TODO: check BIX/BST for unknown/unsupported 0xffffffff entries
  3576. +// TODO: DPTF (/SAN notifications)?
  3577. +// TODO: other properties?
  3578. +
  3579. +
  3580. +static unsigned int cache_time = 1000;
  3581. +module_param(cache_time, uint, 0644);
  3582. +MODULE_PARM_DESC(cache_time, "battery state chaching time in milliseconds [default: 1000]");
  3583. +
  3584. +#define SPWR_AC_BAT_UPDATE_DELAY msecs_to_jiffies(5000)
  3585. +
  3586. +
  3587. +/*
  3588. + * SAM Interface.
  3589. + */
  3590. +
  3591. +#define SAM_PWR_TC 0x02
  3592. +#define SAM_PWR_RQID 0x0002
  3593. +
  3594. +#define SAM_RQST_PWR_CID_STA 0x01
  3595. +#define SAM_RQST_PWR_CID_BIX 0x02
  3596. +#define SAM_RQST_PWR_CID_BST 0x03
  3597. +#define SAM_RQST_PWR_CID_BTP 0x04
  3598. +
  3599. +#define SAM_RQST_PWR_CID_PMAX 0x0b
  3600. +#define SAM_RQST_PWR_CID_PSOC 0x0c
  3601. +#define SAM_RQST_PWR_CID_PSRC 0x0d
  3602. +#define SAM_RQST_PWR_CID_CHGI 0x0e
  3603. +#define SAM_RQST_PWR_CID_ARTG 0x0f
  3604. +
  3605. +#define SAM_EVENT_PWR_CID_BIX 0x15
  3606. +#define SAM_EVENT_PWR_CID_BST 0x16
  3607. +#define SAM_EVENT_PWR_CID_ADAPTER 0x17
  3608. +#define SAM_EVENT_PWR_CID_DPTF 0x4f
  3609. +
  3610. +#define SAM_BATTERY_STA_OK 0x0f
  3611. +#define SAM_BATTERY_STA_PRESENT 0x10
  3612. +
  3613. +#define SAM_BATTERY_STATE_DISCHARGING 0x01
  3614. +#define SAM_BATTERY_STATE_CHARGING 0x02
  3615. +#define SAM_BATTERY_STATE_CRITICAL 0x04
  3616. +
  3617. +#define SAM_BATTERY_POWER_UNIT_MA 1
  3618. +
  3619. +
  3620. +/* Equivalent to data returned in ACPI _BIX method */
  3621. +struct spwr_bix {
  3622. + u8 revision;
  3623. + u32 power_unit;
  3624. + u32 design_cap;
  3625. + u32 last_full_charge_cap;
  3626. + u32 technology;
  3627. + u32 design_voltage;
  3628. + u32 design_cap_warn;
  3629. + u32 design_cap_low;
  3630. + u32 cycle_count;
  3631. + u32 measurement_accuracy;
  3632. + u32 max_sampling_time;
  3633. + u32 min_sampling_time;
  3634. + u32 max_avg_interval;
  3635. + u32 min_avg_interval;
  3636. + u32 bat_cap_granularity_1;
  3637. + u32 bat_cap_granularity_2;
  3638. + u8 model[21];
  3639. + u8 serial[11];
  3640. + u8 type[5];
  3641. + u8 oem_info[21];
  3642. +} __packed;
  3643. +
  3644. +/* Equivalent to data returned in ACPI _BST method */
  3645. +struct spwr_bst {
  3646. + u32 state;
  3647. + u32 present_rate;
  3648. + u32 remaining_cap;
  3649. + u32 present_voltage;
  3650. +} __packed;
  3651. +
  3652. +/* DPTF event payload */
  3653. +struct spwr_event_dptf {
  3654. + u32 pmax;
  3655. + u32 _1; /* currently unknown */
  3656. + u32 _2; /* currently unknown */
  3657. +} __packed;
  3658. +
  3659. +
  3660. +/* Get battery status (_STA) */
  3661. +static int sam_psy_get_sta(u8 iid, u32 *sta)
  3662. +{
  3663. + struct surface_sam_ssh_rqst rqst;
  3664. + struct surface_sam_ssh_buf result;
  3665. +
  3666. + rqst.tc = SAM_PWR_TC;
  3667. + rqst.cid = SAM_RQST_PWR_CID_STA;
  3668. + rqst.iid = iid;
  3669. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3670. + rqst.snc = 0x01;
  3671. + rqst.cdl = 0x00;
  3672. + rqst.pld = NULL;
  3673. +
  3674. + result.cap = sizeof(u32);
  3675. + result.len = 0;
  3676. + result.data = (u8 *)sta;
  3677. +
  3678. + return surface_sam_ssh_rqst(&rqst, &result);
  3679. +}
  3680. +
  3681. +/* Get battery static information (_BIX) */
  3682. +static int sam_psy_get_bix(u8 iid, struct spwr_bix *bix)
  3683. +{
  3684. + struct surface_sam_ssh_rqst rqst;
  3685. + struct surface_sam_ssh_buf result;
  3686. +
  3687. + rqst.tc = SAM_PWR_TC;
  3688. + rqst.cid = SAM_RQST_PWR_CID_BIX;
  3689. + rqst.iid = iid;
  3690. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3691. + rqst.snc = 0x01;
  3692. + rqst.cdl = 0x00;
  3693. + rqst.pld = NULL;
  3694. +
  3695. + result.cap = sizeof(struct spwr_bix);
  3696. + result.len = 0;
  3697. + result.data = (u8 *)bix;
  3698. +
  3699. + return surface_sam_ssh_rqst(&rqst, &result);
  3700. +}
  3701. +
  3702. +/* Get battery dynamic information (_BST) */
  3703. +static int sam_psy_get_bst(u8 iid, struct spwr_bst *bst)
  3704. +{
  3705. + struct surface_sam_ssh_rqst rqst;
  3706. + struct surface_sam_ssh_buf result;
  3707. +
  3708. + rqst.tc = SAM_PWR_TC;
  3709. + rqst.cid = SAM_RQST_PWR_CID_BST;
  3710. + rqst.iid = iid;
  3711. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3712. + rqst.snc = 0x01;
  3713. + rqst.cdl = 0x00;
  3714. + rqst.pld = NULL;
  3715. +
  3716. + result.cap = sizeof(struct spwr_bst);
  3717. + result.len = 0;
  3718. + result.data = (u8 *)bst;
  3719. +
  3720. + return surface_sam_ssh_rqst(&rqst, &result);
  3721. +}
  3722. +
  3723. +/* Set battery trip point (_BTP) */
  3724. +static int sam_psy_set_btp(u8 iid, u32 btp)
  3725. +{
  3726. + struct surface_sam_ssh_rqst rqst;
  3727. +
  3728. + rqst.tc = SAM_PWR_TC;
  3729. + rqst.cid = SAM_RQST_PWR_CID_BTP;
  3730. + rqst.iid = iid;
  3731. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3732. + rqst.snc = 0x00;
  3733. + rqst.cdl = sizeof(u32);
  3734. + rqst.pld = (u8 *)&btp;
  3735. +
  3736. + return surface_sam_ssh_rqst(&rqst, NULL);
  3737. +}
  3738. +
  3739. +/* Get platform power soruce for battery (DPTF PSRC) */
  3740. +static int sam_psy_get_psrc(u8 iid, u32 *psrc)
  3741. +{
  3742. + struct surface_sam_ssh_rqst rqst;
  3743. + struct surface_sam_ssh_buf result;
  3744. +
  3745. + rqst.tc = SAM_PWR_TC;
  3746. + rqst.cid = SAM_RQST_PWR_CID_PSRC;
  3747. + rqst.iid = iid;
  3748. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3749. + rqst.snc = 0x01;
  3750. + rqst.cdl = 0x00;
  3751. + rqst.pld = NULL;
  3752. +
  3753. + result.cap = sizeof(u32);
  3754. + result.len = 0;
  3755. + result.data = (u8 *)psrc;
  3756. +
  3757. + return surface_sam_ssh_rqst(&rqst, &result);
  3758. +}
  3759. +
  3760. +/* Get maximum platform power for battery (DPTF PMAX) */
  3761. +__always_unused
  3762. +static int sam_psy_get_pmax(u8 iid, u32 *pmax)
  3763. +{
  3764. + struct surface_sam_ssh_rqst rqst;
  3765. + struct surface_sam_ssh_buf result;
  3766. +
  3767. + rqst.tc = SAM_PWR_TC;
  3768. + rqst.cid = SAM_RQST_PWR_CID_PMAX;
  3769. + rqst.iid = iid;
  3770. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3771. + rqst.snc = 0x01;
  3772. + rqst.cdl = 0x00;
  3773. + rqst.pld = NULL;
  3774. +
  3775. + result.cap = sizeof(u32);
  3776. + result.len = 0;
  3777. + result.data = (u8 *)pmax;
  3778. +
  3779. + return surface_sam_ssh_rqst(&rqst, &result);
  3780. +}
  3781. +
  3782. +/* Get adapter rating (DPTF ARTG) */
  3783. +__always_unused
  3784. +static int sam_psy_get_artg(u8 iid, u32 *artg)
  3785. +{
  3786. + struct surface_sam_ssh_rqst rqst;
  3787. + struct surface_sam_ssh_buf result;
  3788. +
  3789. + rqst.tc = SAM_PWR_TC;
  3790. + rqst.cid = SAM_RQST_PWR_CID_ARTG;
  3791. + rqst.iid = iid;
  3792. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3793. + rqst.snc = 0x01;
  3794. + rqst.cdl = 0x00;
  3795. + rqst.pld = NULL;
  3796. +
  3797. + result.cap = sizeof(u32);
  3798. + result.len = 0;
  3799. + result.data = (u8 *)artg;
  3800. +
  3801. + return surface_sam_ssh_rqst(&rqst, &result);
  3802. +}
  3803. +
  3804. +/* Unknown (DPTF PSOC) */
  3805. +__always_unused
  3806. +static int sam_psy_get_psoc(u8 iid, u32 *psoc)
  3807. +{
  3808. + struct surface_sam_ssh_rqst rqst;
  3809. + struct surface_sam_ssh_buf result;
  3810. +
  3811. + rqst.tc = SAM_PWR_TC;
  3812. + rqst.cid = SAM_RQST_PWR_CID_PSOC;
  3813. + rqst.iid = iid;
  3814. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3815. + rqst.snc = 0x01;
  3816. + rqst.cdl = 0x00;
  3817. + rqst.pld = NULL;
  3818. +
  3819. + result.cap = sizeof(u32);
  3820. + result.len = 0;
  3821. + result.data = (u8 *)psoc;
  3822. +
  3823. + return surface_sam_ssh_rqst(&rqst, &result);
  3824. +}
  3825. +
  3826. +/* Unknown (DPTF CHGI/ INT3403 SPPC) */
  3827. +__always_unused
  3828. +static int sam_psy_set_chgi(u8 iid, u32 chgi)
  3829. +{
  3830. + struct surface_sam_ssh_rqst rqst;
  3831. +
  3832. + rqst.tc = SAM_PWR_TC;
  3833. + rqst.cid = SAM_RQST_PWR_CID_CHGI;
  3834. + rqst.iid = iid;
  3835. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3836. + rqst.snc = 0x00;
  3837. + rqst.cdl = sizeof(u32);
  3838. + rqst.pld = (u8 *)&chgi;
  3839. +
  3840. + return surface_sam_ssh_rqst(&rqst, NULL);
  3841. +}
  3842. +
  3843. +
  3844. +/*
  3845. + * Common Power-Subsystem Interface.
  3846. + */
  3847. +
  3848. +enum spwr_battery_id {
  3849. + SPWR_BAT1,
  3850. + SPWR_BAT2,
  3851. + __SPWR_NUM_BAT,
  3852. +};
  3853. +#define SPWR_BAT_SINGLE PLATFORM_DEVID_NONE
  3854. +
  3855. +struct spwr_battery_device {
  3856. + struct platform_device *pdev;
  3857. + enum spwr_battery_id id;
  3858. +
  3859. + char name[32];
  3860. + struct power_supply *psy;
  3861. + struct power_supply_desc psy_desc;
  3862. +
  3863. + struct delayed_work update_work;
  3864. +
  3865. + struct mutex lock;
  3866. + unsigned long timestamp;
  3867. +
  3868. + u32 sta;
  3869. + struct spwr_bix bix;
  3870. + struct spwr_bst bst;
  3871. + u32 alarm;
  3872. +};
  3873. +
  3874. +struct spwr_ac_device {
  3875. + struct platform_device *pdev;
  3876. +
  3877. + char name[32];
  3878. + struct power_supply *psy;
  3879. + struct power_supply_desc psy_desc;
  3880. +
  3881. + struct mutex lock;
  3882. +
  3883. + u32 state;
  3884. +};
  3885. +
  3886. +struct spwr_subsystem {
  3887. + struct mutex lock;
  3888. +
  3889. + unsigned int refcount;
  3890. + struct spwr_ac_device *ac;
  3891. + struct spwr_battery_device *battery[__SPWR_NUM_BAT];
  3892. +};
  3893. +
  3894. +static struct spwr_subsystem spwr_subsystem = {
  3895. + .lock = __MUTEX_INITIALIZER(spwr_subsystem.lock),
  3896. +};
  3897. +
  3898. +static enum power_supply_property spwr_ac_props[] = {
  3899. + POWER_SUPPLY_PROP_ONLINE,
  3900. +};
  3901. +
  3902. +static enum power_supply_property spwr_battery_props_chg[] = {
  3903. + POWER_SUPPLY_PROP_STATUS,
  3904. + POWER_SUPPLY_PROP_PRESENT,
  3905. + POWER_SUPPLY_PROP_TECHNOLOGY,
  3906. + POWER_SUPPLY_PROP_CYCLE_COUNT,
  3907. + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  3908. + POWER_SUPPLY_PROP_VOLTAGE_NOW,
  3909. + POWER_SUPPLY_PROP_CURRENT_NOW,
  3910. + POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
  3911. + POWER_SUPPLY_PROP_CHARGE_FULL,
  3912. + POWER_SUPPLY_PROP_CHARGE_NOW,
  3913. + POWER_SUPPLY_PROP_CAPACITY,
  3914. + POWER_SUPPLY_PROP_CAPACITY_LEVEL,
  3915. + POWER_SUPPLY_PROP_MODEL_NAME,
  3916. + POWER_SUPPLY_PROP_MANUFACTURER,
  3917. + POWER_SUPPLY_PROP_SERIAL_NUMBER,
  3918. +};
  3919. +
  3920. +static enum power_supply_property spwr_battery_props_eng[] = {
  3921. + POWER_SUPPLY_PROP_STATUS,
  3922. + POWER_SUPPLY_PROP_PRESENT,
  3923. + POWER_SUPPLY_PROP_TECHNOLOGY,
  3924. + POWER_SUPPLY_PROP_CYCLE_COUNT,
  3925. + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  3926. + POWER_SUPPLY_PROP_VOLTAGE_NOW,
  3927. + POWER_SUPPLY_PROP_POWER_NOW,
  3928. + POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN,
  3929. + POWER_SUPPLY_PROP_ENERGY_FULL,
  3930. + POWER_SUPPLY_PROP_ENERGY_NOW,
  3931. + POWER_SUPPLY_PROP_CAPACITY,
  3932. + POWER_SUPPLY_PROP_CAPACITY_LEVEL,
  3933. + POWER_SUPPLY_PROP_MODEL_NAME,
  3934. + POWER_SUPPLY_PROP_MANUFACTURER,
  3935. + POWER_SUPPLY_PROP_SERIAL_NUMBER,
  3936. +};
  3937. +
  3938. +
  3939. +static int spwr_battery_register(struct spwr_battery_device *bat, struct platform_device *pdev,
  3940. + enum spwr_battery_id id);
  3941. +
  3942. +static int spwr_battery_unregister(struct spwr_battery_device *bat);
  3943. +
  3944. +
  3945. +static inline bool spwr_battery_present(struct spwr_battery_device *bat)
  3946. +{
  3947. + return bat->sta & SAM_BATTERY_STA_PRESENT;
  3948. +}
  3949. +
  3950. +
  3951. +static inline int spwr_battery_load_sta(struct spwr_battery_device *bat)
  3952. +{
  3953. + return sam_psy_get_sta(bat->id + 1, &bat->sta);
  3954. +}
  3955. +
  3956. +static inline int spwr_battery_load_bix(struct spwr_battery_device *bat)
  3957. +{
  3958. + if (!spwr_battery_present(bat))
  3959. + return 0;
  3960. +
  3961. + return sam_psy_get_bix(bat->id + 1, &bat->bix);
  3962. +}
  3963. +
  3964. +static inline int spwr_battery_load_bst(struct spwr_battery_device *bat)
  3965. +{
  3966. + if (!spwr_battery_present(bat))
  3967. + return 0;
  3968. +
  3969. + return sam_psy_get_bst(bat->id + 1, &bat->bst);
  3970. +}
  3971. +
  3972. +
  3973. +static inline int spwr_battery_set_alarm_unlocked(struct spwr_battery_device *bat, u32 value)
  3974. +{
  3975. + bat->alarm = value;
  3976. + return sam_psy_set_btp(bat->id + 1, bat->alarm);
  3977. +}
  3978. +
  3979. +static inline int spwr_battery_set_alarm(struct spwr_battery_device *bat, u32 value)
  3980. +{
  3981. + int status;
  3982. +
  3983. + mutex_lock(&bat->lock);
  3984. + status = spwr_battery_set_alarm_unlocked(bat, value);
  3985. + mutex_unlock(&bat->lock);
  3986. +
  3987. + return status;
  3988. +}
  3989. +
  3990. +static inline int spwr_battery_update_bst_unlocked(struct spwr_battery_device *bat, bool cached)
  3991. +{
  3992. + unsigned long cache_deadline = bat->timestamp + msecs_to_jiffies(cache_time);
  3993. + int status;
  3994. +
  3995. + if (cached && bat->timestamp && time_is_after_jiffies(cache_deadline))
  3996. + return 0;
  3997. +
  3998. + status = spwr_battery_load_sta(bat);
  3999. + if (status)
  4000. + return status;
  4001. +
  4002. + status = spwr_battery_load_bst(bat);
  4003. + if (status)
  4004. + return status;
  4005. +
  4006. + bat->timestamp = jiffies;
  4007. + return 0;
  4008. +}
  4009. +
  4010. +static int spwr_battery_update_bst(struct spwr_battery_device *bat, bool cached)
  4011. +{
  4012. + int status;
  4013. +
  4014. + mutex_lock(&bat->lock);
  4015. + status = spwr_battery_update_bst_unlocked(bat, cached);
  4016. + mutex_unlock(&bat->lock);
  4017. +
  4018. + return status;
  4019. +}
  4020. +
  4021. +static inline int spwr_battery_update_bix_unlocked(struct spwr_battery_device *bat)
  4022. +{
  4023. + int status;
  4024. +
  4025. + status = spwr_battery_load_sta(bat);
  4026. + if (status)
  4027. + return status;
  4028. +
  4029. + status = spwr_battery_load_bix(bat);
  4030. + if (status)
  4031. + return status;
  4032. +
  4033. + status = spwr_battery_load_bst(bat);
  4034. + if (status)
  4035. + return status;
  4036. +
  4037. + bat->timestamp = jiffies;
  4038. + return 0;
  4039. +}
  4040. +
  4041. +static int spwr_battery_update_bix(struct spwr_battery_device *bat)
  4042. +{
  4043. + int status;
  4044. +
  4045. + mutex_lock(&bat->lock);
  4046. + status = spwr_battery_update_bix_unlocked(bat);
  4047. + mutex_unlock(&bat->lock);
  4048. +
  4049. + return status;
  4050. +}
  4051. +
  4052. +static inline int spwr_ac_update_unlocked(struct spwr_ac_device *ac)
  4053. +{
  4054. + return sam_psy_get_psrc(0x00, &ac->state);
  4055. +}
  4056. +
  4057. +static int spwr_ac_update(struct spwr_ac_device *ac)
  4058. +{
  4059. + int status;
  4060. +
  4061. + mutex_lock(&ac->lock);
  4062. + status = spwr_ac_update_unlocked(ac);
  4063. + mutex_unlock(&ac->lock);
  4064. +
  4065. + return status;
  4066. +}
  4067. +
  4068. +
  4069. +static int spwr_battery_recheck(struct spwr_battery_device *bat)
  4070. +{
  4071. + bool present = spwr_battery_present(bat);
  4072. + u32 unit = bat->bix.power_unit;
  4073. + int status;
  4074. +
  4075. + status = spwr_battery_update_bix(bat);
  4076. + if (status)
  4077. + return status;
  4078. +
  4079. + // if battery has been attached, (re-)initialize alarm
  4080. + if (!present && spwr_battery_present(bat)) {
  4081. + status = spwr_battery_set_alarm(bat, bat->bix.design_cap_warn);
  4082. + if (status)
  4083. + return status;
  4084. + }
  4085. +
  4086. + // if the unit has changed, re-add the battery
  4087. + if (unit != bat->bix.power_unit) {
  4088. + mutex_unlock(&spwr_subsystem.lock);
  4089. +
  4090. + status = spwr_battery_unregister(bat);
  4091. + if (status)
  4092. + return status;
  4093. +
  4094. + status = spwr_battery_register(bat, bat->pdev, bat->id);
  4095. + }
  4096. +
  4097. + return status;
  4098. +}
  4099. +
  4100. +
  4101. +static int spwr_handle_event_bix(struct surface_sam_ssh_event *event)
  4102. +{
  4103. + struct spwr_battery_device *bat;
  4104. + enum spwr_battery_id bat_id = event->iid - 1;
  4105. + int status = 0;
  4106. +
  4107. + if (bat_id < 0 || bat_id >= __SPWR_NUM_BAT) {
  4108. + printk(SPWR_WARN "invalid BIX event iid 0x%02x\n", event->iid);
  4109. + bat_id = SPWR_BAT1;
  4110. + }
  4111. +
  4112. + mutex_lock(&spwr_subsystem.lock);
  4113. + bat = spwr_subsystem.battery[bat_id];
  4114. + if (bat) {
  4115. + status = spwr_battery_recheck(bat);
  4116. + if (!status)
  4117. + power_supply_changed(bat->psy);
  4118. + }
  4119. +
  4120. + mutex_unlock(&spwr_subsystem.lock);
  4121. + return status;
  4122. +}
  4123. +
  4124. +static int spwr_handle_event_bst(struct surface_sam_ssh_event *event)
  4125. +{
  4126. + struct spwr_battery_device *bat;
  4127. + enum spwr_battery_id bat_id = event->iid - 1;
  4128. + int status = 0;
  4129. +
  4130. + if (bat_id < 0 || bat_id >= __SPWR_NUM_BAT) {
  4131. + printk(SPWR_WARN "invalid BST event iid 0x%02x\n", event->iid);
  4132. + bat_id = SPWR_BAT1;
  4133. + }
  4134. +
  4135. + mutex_lock(&spwr_subsystem.lock);
  4136. +
  4137. + bat = spwr_subsystem.battery[bat_id];
  4138. + if (bat) {
  4139. + status = spwr_battery_update_bst(bat, false);
  4140. + if (!status)
  4141. + power_supply_changed(bat->psy);
  4142. + }
  4143. +
  4144. + mutex_unlock(&spwr_subsystem.lock);
  4145. + return status;
  4146. +}
  4147. +
  4148. +static int spwr_handle_event_adapter(struct surface_sam_ssh_event *event)
  4149. +{
  4150. + struct spwr_battery_device *bat1 = NULL;
  4151. + struct spwr_battery_device *bat2 = NULL;
  4152. + struct spwr_ac_device *ac;
  4153. + int status = 0;
  4154. +
  4155. + mutex_lock(&spwr_subsystem.lock);
  4156. +
  4157. + ac = spwr_subsystem.ac;
  4158. + if (ac) {
  4159. + status = spwr_ac_update(ac);
  4160. + if (status)
  4161. + goto out;
  4162. +
  4163. + power_supply_changed(ac->psy);
  4164. + }
  4165. +
  4166. + /*
  4167. + * Handle battery update quirk:
  4168. + * When the battery is fully charged and the adapter is plugged in or
  4169. + * removed, the EC does not send a separate event for the state
  4170. + * (charging/discharging) change. Furthermore it may take some time until
  4171. + * the state is updated on the battery. Schedule an update to solve this.
  4172. + */
  4173. +
  4174. + bat1 = spwr_subsystem.battery[SPWR_BAT1];
  4175. + if (bat1 && bat1->bst.remaining_cap >= bat1->bix.last_full_charge_cap)
  4176. + schedule_delayed_work(&bat1->update_work, SPWR_AC_BAT_UPDATE_DELAY);
  4177. +
  4178. + bat2 = spwr_subsystem.battery[SPWR_BAT2];
  4179. + if (bat2 && bat2->bst.remaining_cap >= bat2->bix.last_full_charge_cap)
  4180. + schedule_delayed_work(&bat2->update_work, SPWR_AC_BAT_UPDATE_DELAY);
  4181. +
  4182. +out:
  4183. + mutex_unlock(&spwr_subsystem.lock);
  4184. + return status;
  4185. +}
  4186. +
  4187. +static int spwr_handle_event_dptf(struct surface_sam_ssh_event *event)
  4188. +{
  4189. + return 0; // TODO: spwr_handle_event_dptf
  4190. +}
  4191. +
  4192. +static int spwr_handle_event(struct surface_sam_ssh_event *event, void *data)
  4193. +{
  4194. + printk(SPWR_DEBUG "power event (cid = 0x%02x)\n", event->cid);
  4195. +
  4196. + switch (event->cid) {
  4197. + case SAM_EVENT_PWR_CID_BIX:
  4198. + return spwr_handle_event_bix(event);
  4199. +
  4200. + case SAM_EVENT_PWR_CID_BST:
  4201. + return spwr_handle_event_bst(event);
  4202. +
  4203. + case SAM_EVENT_PWR_CID_ADAPTER:
  4204. + return spwr_handle_event_adapter(event);
  4205. +
  4206. + case SAM_EVENT_PWR_CID_DPTF:
  4207. + return spwr_handle_event_dptf(event);
  4208. +
  4209. + default:
  4210. + printk(SPWR_WARN "unhandled power event (cid = 0x%02x)\n", event->cid);
  4211. + return 0;
  4212. + }
  4213. +}
  4214. +
  4215. +static void spwr_battery_update_bst_workfn(struct work_struct *work)
  4216. +{
  4217. + struct delayed_work *dwork = to_delayed_work(work);
  4218. + struct spwr_battery_device *bat = container_of(dwork, struct spwr_battery_device, update_work);
  4219. + int status;
  4220. +
  4221. + status = spwr_battery_update_bst(bat, false);
  4222. + if (!status)
  4223. + power_supply_changed(bat->psy);
  4224. +
  4225. + if (status)
  4226. + dev_err(&bat->pdev->dev, "failed to update battery state: %d\n", status);
  4227. +}
  4228. +
  4229. +
  4230. +static inline int spwr_battery_prop_status(struct spwr_battery_device *bat)
  4231. +{
  4232. + if (bat->bst.state & SAM_BATTERY_STATE_DISCHARGING)
  4233. + return POWER_SUPPLY_STATUS_DISCHARGING;
  4234. +
  4235. + if (bat->bst.state & SAM_BATTERY_STATE_CHARGING)
  4236. + return POWER_SUPPLY_STATUS_CHARGING;
  4237. +
  4238. + if (bat->bix.last_full_charge_cap == bat->bst.remaining_cap)
  4239. + return POWER_SUPPLY_STATUS_FULL;
  4240. +
  4241. + if (bat->bst.present_rate == 0)
  4242. + return POWER_SUPPLY_STATUS_NOT_CHARGING;
  4243. +
  4244. + return POWER_SUPPLY_STATUS_UNKNOWN;
  4245. +}
  4246. +
  4247. +static inline int spwr_battery_prop_technology(struct spwr_battery_device *bat)
  4248. +{
  4249. + if (!strcasecmp("NiCd", bat->bix.type))
  4250. + return POWER_SUPPLY_TECHNOLOGY_NiCd;
  4251. +
  4252. + if (!strcasecmp("NiMH", bat->bix.type))
  4253. + return POWER_SUPPLY_TECHNOLOGY_NiMH;
  4254. +
  4255. + if (!strcasecmp("LION", bat->bix.type))
  4256. + return POWER_SUPPLY_TECHNOLOGY_LION;
  4257. +
  4258. + if (!strncasecmp("LI-ION", bat->bix.type, 6))
  4259. + return POWER_SUPPLY_TECHNOLOGY_LION;
  4260. +
  4261. + if (!strcasecmp("LiP", bat->bix.type))
  4262. + return POWER_SUPPLY_TECHNOLOGY_LIPO;
  4263. +
  4264. + return POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
  4265. +}
  4266. +
  4267. +static inline int spwr_battery_prop_capacity(struct spwr_battery_device *bat)
  4268. +{
  4269. + if (bat->bst.remaining_cap && bat->bix.last_full_charge_cap)
  4270. + return bat->bst.remaining_cap * 100 / bat->bix.last_full_charge_cap;
  4271. + else
  4272. + return 0;
  4273. +}
  4274. +
  4275. +static inline int spwr_battery_prop_capacity_level(struct spwr_battery_device *bat)
  4276. +{
  4277. + if (bat->bst.state & SAM_BATTERY_STATE_CRITICAL)
  4278. + return POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
  4279. +
  4280. + if (bat->bst.remaining_cap >= bat->bix.last_full_charge_cap)
  4281. + return POWER_SUPPLY_CAPACITY_LEVEL_FULL;
  4282. +
  4283. + if (bat->bst.remaining_cap <= bat->alarm)
  4284. + return POWER_SUPPLY_CAPACITY_LEVEL_LOW;
  4285. +
  4286. + return POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
  4287. +}
  4288. +
  4289. +static int spwr_ac_get_property(struct power_supply *psy,
  4290. + enum power_supply_property psp,
  4291. + union power_supply_propval *val)
  4292. +{
  4293. + struct spwr_ac_device *ac = power_supply_get_drvdata(psy);
  4294. + int status;
  4295. +
  4296. + mutex_lock(&ac->lock);
  4297. +
  4298. + status = spwr_ac_update_unlocked(ac);
  4299. + if (status)
  4300. + goto out;
  4301. +
  4302. + switch (psp) {
  4303. + case POWER_SUPPLY_PROP_ONLINE:
  4304. + val->intval = ac->state == 1;
  4305. + break;
  4306. +
  4307. + default:
  4308. + status = -EINVAL;
  4309. + goto out;
  4310. + }
  4311. +
  4312. +out:
  4313. + mutex_unlock(&ac->lock);
  4314. + return status;
  4315. +}
  4316. +
  4317. +static int spwr_battery_get_property(struct power_supply *psy,
  4318. + enum power_supply_property psp,
  4319. + union power_supply_propval *val)
  4320. +{
  4321. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4322. + int status;
  4323. +
  4324. + mutex_lock(&bat->lock);
  4325. +
  4326. + status = spwr_battery_update_bst_unlocked(bat, true);
  4327. + if (status)
  4328. + goto out;
  4329. +
  4330. + // abort if battery is not present
  4331. + if (!spwr_battery_present(bat) && psp != POWER_SUPPLY_PROP_PRESENT) {
  4332. + status = -ENODEV;
  4333. + goto out;
  4334. + }
  4335. +
  4336. + switch (psp) {
  4337. + case POWER_SUPPLY_PROP_STATUS:
  4338. + val->intval = spwr_battery_prop_status(bat);
  4339. + break;
  4340. +
  4341. + case POWER_SUPPLY_PROP_PRESENT:
  4342. + val->intval = spwr_battery_present(bat);
  4343. + break;
  4344. +
  4345. + case POWER_SUPPLY_PROP_TECHNOLOGY:
  4346. + val->intval = spwr_battery_prop_technology(bat);
  4347. + break;
  4348. +
  4349. + case POWER_SUPPLY_PROP_CYCLE_COUNT:
  4350. + val->intval = bat->bix.cycle_count;
  4351. + break;
  4352. +
  4353. + case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
  4354. + val->intval = bat->bix.design_voltage * 1000;
  4355. + break;
  4356. +
  4357. + case POWER_SUPPLY_PROP_VOLTAGE_NOW:
  4358. + val->intval = bat->bst.present_voltage * 1000;
  4359. + break;
  4360. +
  4361. + case POWER_SUPPLY_PROP_CURRENT_NOW:
  4362. + case POWER_SUPPLY_PROP_POWER_NOW:
  4363. + val->intval = bat->bst.present_rate * 1000;
  4364. + break;
  4365. +
  4366. + case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
  4367. + case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
  4368. + val->intval = bat->bix.design_cap * 1000;
  4369. + break;
  4370. +
  4371. + case POWER_SUPPLY_PROP_CHARGE_FULL:
  4372. + case POWER_SUPPLY_PROP_ENERGY_FULL:
  4373. + val->intval = bat->bix.last_full_charge_cap * 1000;
  4374. + break;
  4375. +
  4376. + case POWER_SUPPLY_PROP_CHARGE_NOW:
  4377. + case POWER_SUPPLY_PROP_ENERGY_NOW:
  4378. + val->intval = bat->bst.remaining_cap * 1000;
  4379. + break;
  4380. +
  4381. + case POWER_SUPPLY_PROP_CAPACITY:
  4382. + val->intval = spwr_battery_prop_capacity(bat);
  4383. + break;
  4384. +
  4385. + case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
  4386. + val->intval = spwr_battery_prop_capacity_level(bat);
  4387. + break;
  4388. +
  4389. + case POWER_SUPPLY_PROP_MODEL_NAME:
  4390. + val->strval = bat->bix.model;
  4391. + break;
  4392. +
  4393. + case POWER_SUPPLY_PROP_MANUFACTURER:
  4394. + val->strval = bat->bix.oem_info;
  4395. + break;
  4396. +
  4397. + case POWER_SUPPLY_PROP_SERIAL_NUMBER:
  4398. + val->strval = bat->bix.serial;
  4399. + break;
  4400. +
  4401. + default:
  4402. + status = -EINVAL;
  4403. + goto out;
  4404. + }
  4405. +
  4406. +out:
  4407. + mutex_unlock(&bat->lock);
  4408. + return status;
  4409. +}
  4410. +
  4411. +
  4412. +static ssize_t spwr_battery_alarm_show(struct device *dev,
  4413. + struct device_attribute *attr,
  4414. + char *buf)
  4415. +{
  4416. + struct power_supply *psy = dev_get_drvdata(dev);
  4417. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4418. +
  4419. + return sprintf(buf, "%d\n", bat->alarm * 1000);
  4420. +}
  4421. +
  4422. +static ssize_t spwr_battery_alarm_store(struct device *dev,
  4423. + struct device_attribute *attr,
  4424. + const char *buf, size_t count)
  4425. +{
  4426. + struct power_supply *psy = dev_get_drvdata(dev);
  4427. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4428. + unsigned long value;
  4429. + int status;
  4430. +
  4431. + status = kstrtoul(buf, 0, &value);
  4432. + if (status)
  4433. + return status;
  4434. +
  4435. + if (!spwr_battery_present(bat))
  4436. + return -ENODEV;
  4437. +
  4438. + status = spwr_battery_set_alarm(bat, value / 1000);
  4439. + if (status)
  4440. + return status;
  4441. +
  4442. + return count;
  4443. +}
  4444. +
  4445. +static const struct device_attribute alarm_attr = {
  4446. + .attr = {.name = "alarm", .mode = 0644},
  4447. + .show = spwr_battery_alarm_show,
  4448. + .store = spwr_battery_alarm_store,
  4449. +};
  4450. +
  4451. +
  4452. +static int spwr_subsys_init_unlocked(void)
  4453. +{
  4454. + int status;
  4455. +
  4456. + status = surface_sam_ssh_set_event_handler(SAM_PWR_RQID, spwr_handle_event, NULL);
  4457. + if (status)
  4458. + goto err_handler;
  4459. +
  4460. + status = surface_sam_ssh_enable_event_source(SAM_PWR_TC, 0x01, SAM_PWR_RQID);
  4461. + if (status)
  4462. + goto err_source;
  4463. +
  4464. + return 0;
  4465. +
  4466. +err_source:
  4467. + surface_sam_ssh_remove_event_handler(SAM_PWR_RQID);
  4468. +err_handler:
  4469. + return status;
  4470. +}
  4471. +
  4472. +static int spwr_subsys_deinit_unlocked(void)
  4473. +{
  4474. + surface_sam_ssh_disable_event_source(SAM_PWR_TC, 0x01, SAM_PWR_RQID);
  4475. + surface_sam_ssh_remove_event_handler(SAM_PWR_RQID);
  4476. + return 0;
  4477. +}
  4478. +
  4479. +static inline int spwr_subsys_ref_unlocked(void)
  4480. +{
  4481. + int status = 0;
  4482. +
  4483. + if (!spwr_subsystem.refcount)
  4484. + status = spwr_subsys_init_unlocked();
  4485. +
  4486. + spwr_subsystem.refcount += 1;
  4487. + return status;
  4488. +}
  4489. +
  4490. +static inline int spwr_subsys_unref_unlocked(void)
  4491. +{
  4492. + int status = 0;
  4493. +
  4494. + if (spwr_subsystem.refcount)
  4495. + spwr_subsystem.refcount -= 1;
  4496. +
  4497. + if (!spwr_subsystem.refcount)
  4498. + status = spwr_subsys_deinit_unlocked();
  4499. +
  4500. + return status;
  4501. +}
  4502. +
  4503. +
  4504. +static int spwr_ac_register(struct spwr_ac_device *ac, struct platform_device *pdev)
  4505. +{
  4506. + struct power_supply_config psy_cfg = {};
  4507. + u32 sta;
  4508. + int status;
  4509. +
  4510. + // make sure the device is there and functioning properly
  4511. + status = sam_psy_get_sta(0x00, &sta);
  4512. + if (status)
  4513. + return status;
  4514. +
  4515. + if ((sta & SAM_BATTERY_STA_OK) != SAM_BATTERY_STA_OK)
  4516. + return -ENODEV;
  4517. +
  4518. + psy_cfg.drv_data = ac;
  4519. +
  4520. + ac->pdev = pdev;
  4521. + mutex_init(&ac->lock);
  4522. +
  4523. + snprintf(ac->name, ARRAY_SIZE(ac->name), "ADP0");
  4524. +
  4525. + ac->psy_desc.name = ac->name;
  4526. + ac->psy_desc.type = POWER_SUPPLY_TYPE_MAINS;
  4527. + ac->psy_desc.properties = spwr_ac_props;
  4528. + ac->psy_desc.num_properties = ARRAY_SIZE(spwr_ac_props);
  4529. + ac->psy_desc.get_property = spwr_ac_get_property;
  4530. +
  4531. + mutex_lock(&spwr_subsystem.lock);
  4532. + if (spwr_subsystem.ac) {
  4533. + status = -EEXIST;
  4534. + goto err;
  4535. + }
  4536. +
  4537. + status = spwr_subsys_ref_unlocked();
  4538. + if (status)
  4539. + goto err;
  4540. +
  4541. + ac->psy = power_supply_register(&ac->pdev->dev, &ac->psy_desc, &psy_cfg);
  4542. + if (IS_ERR(ac->psy)) {
  4543. + status = PTR_ERR(ac->psy);
  4544. + goto err_unref;
  4545. + }
  4546. +
  4547. + spwr_subsystem.ac = ac;
  4548. + mutex_unlock(&spwr_subsystem.lock);
  4549. + return 0;
  4550. +
  4551. +err_unref:
  4552. + spwr_subsys_unref_unlocked();
  4553. +err:
  4554. + mutex_unlock(&spwr_subsystem.lock);
  4555. + mutex_destroy(&ac->lock);
  4556. + return status;
  4557. +}
  4558. +
  4559. +static int spwr_ac_unregister(struct spwr_ac_device *ac)
  4560. +{
  4561. + int status;
  4562. +
  4563. + mutex_lock(&spwr_subsystem.lock);
  4564. + if (spwr_subsystem.ac != ac) {
  4565. + mutex_unlock(&spwr_subsystem.lock);
  4566. + return -EINVAL;
  4567. + }
  4568. +
  4569. + spwr_subsystem.ac = NULL;
  4570. + power_supply_unregister(ac->psy);
  4571. +
  4572. + status = spwr_subsys_unref_unlocked();
  4573. + mutex_unlock(&spwr_subsystem.lock);
  4574. +
  4575. + mutex_destroy(&ac->lock);
  4576. + return status;
  4577. +}
  4578. +
  4579. +static int spwr_battery_register(struct spwr_battery_device *bat, struct platform_device *pdev,
  4580. + enum spwr_battery_id id)
  4581. +{
  4582. + struct power_supply_config psy_cfg = {};
  4583. + u32 sta;
  4584. + int status;
  4585. +
  4586. + if ((id < 0 || id >= __SPWR_NUM_BAT) && id != SPWR_BAT_SINGLE)
  4587. + return -EINVAL;
  4588. +
  4589. + bat->pdev = pdev;
  4590. + bat->id = id != SPWR_BAT_SINGLE ? id : SPWR_BAT1;
  4591. +
  4592. + // make sure the device is there and functioning properly
  4593. + status = sam_psy_get_sta(bat->id + 1, &sta);
  4594. + if (status)
  4595. + return status;
  4596. +
  4597. + if ((sta & SAM_BATTERY_STA_OK) != SAM_BATTERY_STA_OK)
  4598. + return -ENODEV;
  4599. +
  4600. + status = spwr_battery_update_bix_unlocked(bat);
  4601. + if (status)
  4602. + return status;
  4603. +
  4604. + if (spwr_battery_present(bat)) {
  4605. + status = spwr_battery_set_alarm_unlocked(bat, bat->bix.design_cap_warn);
  4606. + if (status)
  4607. + return status;
  4608. + }
  4609. +
  4610. + snprintf(bat->name, ARRAY_SIZE(bat->name), "BAT%d", bat->id);
  4611. + bat->psy_desc.name = bat->name;
  4612. + bat->psy_desc.type = POWER_SUPPLY_TYPE_BATTERY;
  4613. +
  4614. + if (bat->bix.power_unit == SAM_BATTERY_POWER_UNIT_MA) {
  4615. + bat->psy_desc.properties = spwr_battery_props_chg;
  4616. + bat->psy_desc.num_properties = ARRAY_SIZE(spwr_battery_props_chg);
  4617. + } else {
  4618. + bat->psy_desc.properties = spwr_battery_props_eng;
  4619. + bat->psy_desc.num_properties = ARRAY_SIZE(spwr_battery_props_eng);
  4620. + }
  4621. +
  4622. + bat->psy_desc.get_property = spwr_battery_get_property;
  4623. +
  4624. + mutex_init(&bat->lock);
  4625. + psy_cfg.drv_data = bat;
  4626. +
  4627. + INIT_DELAYED_WORK(&bat->update_work, spwr_battery_update_bst_workfn);
  4628. +
  4629. + mutex_lock(&spwr_subsystem.lock);
  4630. + if (spwr_subsystem.battery[bat->id]) {
  4631. + status = -EEXIST;
  4632. + goto err;
  4633. + }
  4634. +
  4635. + status = spwr_subsys_ref_unlocked();
  4636. + if (status)
  4637. + goto err;
  4638. +
  4639. + bat->psy = power_supply_register(&bat->pdev->dev, &bat->psy_desc, &psy_cfg);
  4640. + if (IS_ERR(bat->psy)) {
  4641. + status = PTR_ERR(bat->psy);
  4642. + goto err_unref;
  4643. + }
  4644. +
  4645. + status = device_create_file(&bat->psy->dev, &alarm_attr);
  4646. + if (status)
  4647. + goto err_dereg;
  4648. +
  4649. + spwr_subsystem.battery[bat->id] = bat;
  4650. + mutex_unlock(&spwr_subsystem.lock);
  4651. + return 0;
  4652. +
  4653. +err_dereg:
  4654. + power_supply_unregister(bat->psy);
  4655. +err_unref:
  4656. + spwr_subsys_unref_unlocked();
  4657. +err:
  4658. + mutex_unlock(&spwr_subsystem.lock);
  4659. + return status;
  4660. +}
  4661. +
  4662. +static int spwr_battery_unregister(struct spwr_battery_device *bat)
  4663. +{
  4664. + int status;
  4665. +
  4666. + if (bat->id < 0 || bat->id >= __SPWR_NUM_BAT)
  4667. + return -EINVAL;
  4668. +
  4669. + mutex_lock(&spwr_subsystem.lock);
  4670. + if (spwr_subsystem.battery[bat->id] != bat) {
  4671. + mutex_unlock(&spwr_subsystem.lock);
  4672. + return -EINVAL;
  4673. + }
  4674. +
  4675. + spwr_subsystem.battery[bat->id] = NULL;
  4676. +
  4677. + status = spwr_subsys_unref_unlocked();
  4678. + mutex_unlock(&spwr_subsystem.lock);
  4679. +
  4680. + cancel_delayed_work_sync(&bat->update_work);
  4681. + device_remove_file(&bat->psy->dev, &alarm_attr);
  4682. + power_supply_unregister(bat->psy);
  4683. +
  4684. + mutex_destroy(&bat->lock);
  4685. + return status;
  4686. +}
  4687. +
  4688. +
  4689. +/*
  4690. + * Battery Driver.
  4691. + */
  4692. +
  4693. +#ifdef CONFIG_PM_SLEEP
  4694. +static int surface_sam_sid_battery_resume(struct device *dev)
  4695. +{
  4696. + struct spwr_battery_device *bat;
  4697. +
  4698. + bat = dev_get_drvdata(dev);
  4699. + return spwr_battery_recheck(bat);
  4700. +}
  4701. +#else
  4702. +#define surface_sam_sid_battery_resume NULL
  4703. +#endif
  4704. +
  4705. +SIMPLE_DEV_PM_OPS(surface_sam_sid_battery_pm, NULL, surface_sam_sid_battery_resume);
  4706. +
  4707. +static int surface_sam_sid_battery_probe(struct platform_device *pdev)
  4708. +{
  4709. + int status;
  4710. + struct spwr_battery_device *bat;
  4711. +
  4712. + // link to ec
  4713. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  4714. + if (status)
  4715. + return status == -ENXIO ? -EPROBE_DEFER : status;
  4716. +
  4717. + bat = devm_kzalloc(&pdev->dev, sizeof(struct spwr_battery_device), GFP_KERNEL);
  4718. + if (!bat)
  4719. + return -ENOMEM;
  4720. +
  4721. + platform_set_drvdata(pdev, bat);
  4722. + return spwr_battery_register(bat, pdev, pdev->id);
  4723. +}
  4724. +
  4725. +static int surface_sam_sid_battery_remove(struct platform_device *pdev)
  4726. +{
  4727. + struct spwr_battery_device *bat;
  4728. +
  4729. + bat = platform_get_drvdata(pdev);
  4730. + return spwr_battery_unregister(bat);
  4731. +}
  4732. +
  4733. +static struct platform_driver surface_sam_sid_battery = {
  4734. + .probe = surface_sam_sid_battery_probe,
  4735. + .remove = surface_sam_sid_battery_remove,
  4736. + .driver = {
  4737. + .name = "surface_sam_sid_battery",
  4738. + .pm = &surface_sam_sid_battery_pm,
  4739. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4740. + },
  4741. +};
  4742. +
  4743. +
  4744. +/*
  4745. + * AC Driver.
  4746. + */
  4747. +
  4748. +static int surface_sam_sid_ac_probe(struct platform_device *pdev)
  4749. +{
  4750. + int status;
  4751. + struct spwr_ac_device *ac;
  4752. +
  4753. + // link to ec
  4754. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  4755. + if (status)
  4756. + return status == -ENXIO ? -EPROBE_DEFER : status;
  4757. +
  4758. + ac = devm_kzalloc(&pdev->dev, sizeof(struct spwr_ac_device), GFP_KERNEL);
  4759. + if (!ac)
  4760. + return -ENOMEM;
  4761. +
  4762. + status = spwr_ac_register(ac, pdev);
  4763. + if (status)
  4764. + return status;
  4765. +
  4766. + platform_set_drvdata(pdev, ac);
  4767. + return 0;
  4768. +}
  4769. +
  4770. +static int surface_sam_sid_ac_remove(struct platform_device *pdev)
  4771. +{
  4772. + struct spwr_ac_device *ac;
  4773. +
  4774. + ac = platform_get_drvdata(pdev);
  4775. + return spwr_ac_unregister(ac);
  4776. +}
  4777. +
  4778. +static struct platform_driver surface_sam_sid_ac = {
  4779. + .probe = surface_sam_sid_ac_probe,
  4780. + .remove = surface_sam_sid_ac_remove,
  4781. + .driver = {
  4782. + .name = "surface_sam_sid_ac",
  4783. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4784. + },
  4785. +};
  4786. +
  4787. +
  4788. +static int __init surface_sam_sid_power_init(void)
  4789. +{
  4790. + int status;
  4791. +
  4792. + status = platform_driver_register(&surface_sam_sid_battery);
  4793. + if (status)
  4794. + return status;
  4795. +
  4796. + status = platform_driver_register(&surface_sam_sid_ac);
  4797. + if (status) {
  4798. + platform_driver_unregister(&surface_sam_sid_battery);
  4799. + return status;
  4800. + }
  4801. +
  4802. + return 0;
  4803. +}
  4804. +
  4805. +static void __exit surface_sam_sid_power_exit(void)
  4806. +{
  4807. + platform_driver_unregister(&surface_sam_sid_battery);
  4808. + platform_driver_unregister(&surface_sam_sid_ac);
  4809. +}
  4810. +
  4811. +module_init(surface_sam_sid_power_init);
  4812. +module_exit(surface_sam_sid_power_exit);
  4813. +
  4814. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  4815. +MODULE_DESCRIPTION("Surface Battery/AC Driver for 7th Generation Surface Devices");
  4816. +MODULE_LICENSE("GPL v2");
  4817. +MODULE_ALIAS("platform:surface_sam_sid_ac");
  4818. +MODULE_ALIAS("platform:surface_sam_sid_battery");
  4819. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c b/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  4820. new file mode 100644
  4821. index 000000000000..9cf912a44171
  4822. --- /dev/null
  4823. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  4824. @@ -0,0 +1,428 @@
  4825. +// SPDX-License-Identifier: GPL-2.0
  4826. +/*
  4827. + * Microsofs Surface HID (VHF) driver for HID input events via SAM.
  4828. + * Used for keyboard input events on the 7th generation Surface Laptops.
  4829. + */
  4830. +
  4831. +#include <linux/acpi.h>
  4832. +#include <linux/hid.h>
  4833. +#include <linux/input.h>
  4834. +#include <linux/platform_device.h>
  4835. +#include <linux/types.h>
  4836. +
  4837. +#include "surface_sam_ssh.h"
  4838. +
  4839. +#define SID_VHF_INPUT_NAME "Microsoft Surface HID"
  4840. +
  4841. +/*
  4842. + * Request ID for VHF events. This value is based on the output of the Surface
  4843. + * EC and should not be changed.
  4844. + */
  4845. +#define SAM_EVENT_SID_VHF_RQID 0x0015
  4846. +#define SAM_EVENT_SID_VHF_TC 0x15
  4847. +
  4848. +#define VHF_HID_STARTED 0
  4849. +
  4850. +struct sid_vhf_evtctx {
  4851. + struct device *dev;
  4852. + struct hid_device *hid;
  4853. + unsigned long flags;
  4854. +};
  4855. +
  4856. +struct sid_vhf_drvdata {
  4857. + struct sid_vhf_evtctx event_ctx;
  4858. +};
  4859. +
  4860. +
  4861. +static int sid_vhf_hid_start(struct hid_device *hid)
  4862. +{
  4863. + hid_dbg(hid, "%s\n", __func__);
  4864. + return 0;
  4865. +}
  4866. +
  4867. +static void sid_vhf_hid_stop(struct hid_device *hid)
  4868. +{
  4869. + hid_dbg(hid, "%s\n", __func__);
  4870. +}
  4871. +
  4872. +static int sid_vhf_hid_open(struct hid_device *hid)
  4873. +{
  4874. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(to_platform_device(hid->dev.parent));
  4875. +
  4876. + hid_dbg(hid, "%s\n", __func__);
  4877. +
  4878. + set_bit(VHF_HID_STARTED, &drvdata->event_ctx.flags);
  4879. + return 0;
  4880. +}
  4881. +
  4882. +static void sid_vhf_hid_close(struct hid_device *hid)
  4883. +{
  4884. +
  4885. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(to_platform_device(hid->dev.parent));
  4886. +
  4887. + hid_dbg(hid, "%s\n", __func__);
  4888. +
  4889. + clear_bit(VHF_HID_STARTED, &drvdata->event_ctx.flags);
  4890. +}
  4891. +
  4892. +struct surface_sam_sid_vhf_meta_rqst {
  4893. + u8 id;
  4894. + u32 offset;
  4895. + u32 length; // buffer limit on send, length of data received on receive
  4896. + u8 end; // 0x01 if end was reached
  4897. +} __packed;
  4898. +
  4899. +struct vhf_device_metadata_info {
  4900. + u8 len;
  4901. + u8 _2;
  4902. + u8 _3;
  4903. + u8 _4;
  4904. + u8 _5;
  4905. + u8 _6;
  4906. + u8 _7;
  4907. + u16 hid_len; // hid descriptor length
  4908. +} __packed;
  4909. +
  4910. +struct vhf_device_metadata {
  4911. + u32 len;
  4912. + u16 vendor_id;
  4913. + u16 product_id;
  4914. + u8 _1[24];
  4915. +} __packed;
  4916. +
  4917. +union vhf_buffer_data {
  4918. + struct vhf_device_metadata_info info;
  4919. + u8 pld[0x76];
  4920. + struct vhf_device_metadata meta;
  4921. +};
  4922. +
  4923. +struct surface_sam_sid_vhf_meta_resp {
  4924. + struct surface_sam_sid_vhf_meta_rqst rqst;
  4925. + union vhf_buffer_data data;
  4926. +} __packed;
  4927. +
  4928. +
  4929. +static int vhf_get_metadata(u8 iid, struct vhf_device_metadata *meta)
  4930. +{
  4931. + int status;
  4932. +
  4933. + struct surface_sam_sid_vhf_meta_resp resp = {
  4934. + .rqst = {
  4935. + .id = 2,
  4936. + .offset = 0,
  4937. + .length = 0x76,
  4938. + .end = 0
  4939. + }
  4940. + };
  4941. +
  4942. + struct surface_sam_ssh_rqst rqst = {
  4943. + .tc = 0x15,
  4944. + .cid = 0x04,
  4945. + .iid = iid,
  4946. + .pri = 0x02,
  4947. + .snc = 0x01,
  4948. + .cdl = sizeof(struct surface_sam_sid_vhf_meta_rqst),
  4949. + .pld = (u8 *)&resp.rqst,
  4950. + };
  4951. +
  4952. + struct surface_sam_ssh_buf result = {
  4953. + .cap = sizeof(struct surface_sam_sid_vhf_meta_resp),
  4954. + .len = 0,
  4955. + .data = (u8 *)&resp,
  4956. + };
  4957. +
  4958. + status = surface_sam_ssh_rqst(&rqst, &result);
  4959. + if (status)
  4960. + return status;
  4961. +
  4962. + *meta = resp.data.meta;
  4963. +
  4964. + return 0;
  4965. +}
  4966. +
  4967. +static int vhf_get_hid_descriptor(struct hid_device *hid, u8 iid, u8 **desc, int *size)
  4968. +{
  4969. + int status, len;
  4970. + u8 *buf;
  4971. +
  4972. + struct surface_sam_sid_vhf_meta_resp resp = {
  4973. + .rqst = {
  4974. + .id = 0,
  4975. + .offset = 0,
  4976. + .length = 0x76,
  4977. + .end = 0,
  4978. + }
  4979. + };
  4980. +
  4981. + struct surface_sam_ssh_rqst rqst = {
  4982. + .tc = 0x15,
  4983. + .cid = 0x04,
  4984. + .iid = iid,
  4985. + .pri = 0x02,
  4986. + .snc = 0x01,
  4987. + .cdl = sizeof(struct surface_sam_sid_vhf_meta_rqst),
  4988. + .pld = (u8 *)&resp.rqst,
  4989. + };
  4990. +
  4991. + struct surface_sam_ssh_buf result = {
  4992. + .cap = sizeof(struct surface_sam_sid_vhf_meta_resp),
  4993. + .len = 0,
  4994. + .data = (u8 *)&resp,
  4995. + };
  4996. +
  4997. + // first fetch 00 to get the total length
  4998. + status = surface_sam_ssh_rqst(&rqst, &result);
  4999. + if (status)
  5000. + return status;
  5001. +
  5002. + len = resp.data.info.hid_len;
  5003. +
  5004. + // allocate a buffer for the descriptor
  5005. + buf = kzalloc(len, GFP_KERNEL);
  5006. +
  5007. + // then, iterate and write into buffer, copying out bytes
  5008. + resp.rqst.id = 1;
  5009. + resp.rqst.offset = 0;
  5010. + resp.rqst.length = 0x76;
  5011. + resp.rqst.end = 0;
  5012. +
  5013. + while (!resp.rqst.end && resp.rqst.offset < len) {
  5014. + status = surface_sam_ssh_rqst(&rqst, &result);
  5015. + if (status) {
  5016. + kfree(buf);
  5017. + return status;
  5018. + }
  5019. + memcpy(buf + resp.rqst.offset, resp.data.pld, resp.rqst.length);
  5020. +
  5021. + resp.rqst.offset += resp.rqst.length;
  5022. + }
  5023. +
  5024. + *desc = buf;
  5025. + *size = len;
  5026. +
  5027. + return 0;
  5028. +}
  5029. +
  5030. +static int sid_vhf_hid_parse(struct hid_device *hid)
  5031. +{
  5032. + int ret = 0, size;
  5033. + u8 *buf;
  5034. +
  5035. + ret = vhf_get_hid_descriptor(hid, 0x00, &buf, &size);
  5036. + if (ret != 0) {
  5037. + hid_err(hid, "Failed to read HID descriptor from device: %d\n", ret);
  5038. + return -EIO;
  5039. + }
  5040. + hid_dbg(hid, "HID descriptor of device:");
  5041. + print_hex_dump_debug("descriptor:", DUMP_PREFIX_OFFSET, 16, 1, buf, size, false);
  5042. +
  5043. + ret = hid_parse_report(hid, buf, size);
  5044. + kfree(buf);
  5045. + return ret;
  5046. +
  5047. +}
  5048. +
  5049. +static int sid_vhf_hid_raw_request(struct hid_device *hid, unsigned char
  5050. + reportnum, u8 *buf, size_t len, unsigned char rtype, int
  5051. + reqtype)
  5052. +{
  5053. + int status;
  5054. + u8 cid;
  5055. + struct surface_sam_ssh_rqst rqst = {};
  5056. + struct surface_sam_ssh_buf result = {};
  5057. +
  5058. + hid_dbg(hid, "%s: reportnum=%#04x rtype=%i reqtype=%i\n", __func__, reportnum, rtype, reqtype);
  5059. + print_hex_dump_debug("report:", DUMP_PREFIX_OFFSET, 16, 1, buf, len, false);
  5060. +
  5061. + // Byte 0 is the report number. Report data starts at byte 1.
  5062. + buf[0] = reportnum;
  5063. +
  5064. + switch (rtype) {
  5065. + case HID_OUTPUT_REPORT:
  5066. + cid = 0x01;
  5067. + break;
  5068. + case HID_FEATURE_REPORT:
  5069. + switch (reqtype) {
  5070. + case HID_REQ_GET_REPORT:
  5071. + // The EC doesn't respond to GET FEATURE for these touchpad reports
  5072. + // we immediately discard to avoid waiting for a timeout.
  5073. + if (reportnum == 6 || reportnum == 7 || reportnum == 8 || reportnum == 9 || reportnum == 0x0b) {
  5074. + hid_dbg(hid, "%s: skipping get feature report for 0x%02x\n", __func__, reportnum);
  5075. + return 0;
  5076. + }
  5077. +
  5078. + cid = 0x02;
  5079. + break;
  5080. + case HID_REQ_SET_REPORT:
  5081. + cid = 0x03;
  5082. + break;
  5083. + default:
  5084. + hid_err(hid, "%s: unknown req type 0x%02x\n", __func__, rtype);
  5085. + return -EIO;
  5086. + }
  5087. + break;
  5088. + default:
  5089. + hid_err(hid, "%s: unknown report type 0x%02x\n", __func__, reportnum);
  5090. + return -EIO;
  5091. + }
  5092. +
  5093. + rqst.tc = SAM_EVENT_SID_VHF_TC;
  5094. + rqst.pri = SURFACE_SAM_PRIORITY_HIGH;
  5095. + rqst.iid = 0x00; // windows tends to distinguish iids, but EC will take it
  5096. + rqst.cid = cid;
  5097. + rqst.snc = reqtype == HID_REQ_GET_REPORT ? 0x01 : 0x00;
  5098. + rqst.cdl = reqtype == HID_REQ_GET_REPORT ? 0x01 : len;
  5099. + rqst.pld = buf;
  5100. +
  5101. + result.cap = len;
  5102. + result.len = 0;
  5103. + result.data = buf;
  5104. +
  5105. + hid_dbg(hid, "%s: sending to cid=%#04x snc=%#04x\n", __func__, cid, HID_REQ_GET_REPORT == reqtype);
  5106. +
  5107. + status = surface_sam_ssh_rqst(&rqst, &result);
  5108. + hid_dbg(hid, "%s: status %i\n", __func__, status);
  5109. +
  5110. + if (status)
  5111. + return status;
  5112. +
  5113. + if (result.len > 0)
  5114. + print_hex_dump_debug("response:", DUMP_PREFIX_OFFSET, 16, 1, result.data, result.len, false);
  5115. +
  5116. + return result.len;
  5117. +}
  5118. +
  5119. +static struct hid_ll_driver sid_vhf_hid_ll_driver = {
  5120. + .start = sid_vhf_hid_start,
  5121. + .stop = sid_vhf_hid_stop,
  5122. + .open = sid_vhf_hid_open,
  5123. + .close = sid_vhf_hid_close,
  5124. + .parse = sid_vhf_hid_parse,
  5125. + .raw_request = sid_vhf_hid_raw_request,
  5126. +};
  5127. +
  5128. +
  5129. +static struct hid_device *sid_vhf_create_hid_device(struct platform_device *pdev, struct vhf_device_metadata *meta)
  5130. +{
  5131. + struct hid_device *hid;
  5132. +
  5133. + hid = hid_allocate_device();
  5134. + if (IS_ERR(hid))
  5135. + return hid;
  5136. +
  5137. + hid->dev.parent = &pdev->dev;
  5138. +
  5139. + hid->bus = BUS_VIRTUAL;
  5140. + hid->vendor = meta->vendor_id;
  5141. + hid->product = meta->product_id;
  5142. +
  5143. + hid->ll_driver = &sid_vhf_hid_ll_driver;
  5144. +
  5145. + sprintf(hid->name, "%s", SID_VHF_INPUT_NAME);
  5146. +
  5147. + return hid;
  5148. +}
  5149. +
  5150. +static int sid_vhf_event_handler(struct surface_sam_ssh_event *event, void *data)
  5151. +{
  5152. + struct sid_vhf_evtctx *ctx = (struct sid_vhf_evtctx *)data;
  5153. +
  5154. + // skip if HID hasn't started yet
  5155. + if (!test_bit(VHF_HID_STARTED, &ctx->flags))
  5156. + return 0;
  5157. +
  5158. + if (event->tc == SAM_EVENT_SID_VHF_TC && (event->cid == 0x00 || event->cid == 0x03 || event->cid == 0x04))
  5159. + return hid_input_report(ctx->hid, HID_INPUT_REPORT, event->pld, event->len, 1);
  5160. +
  5161. + dev_warn(ctx->dev, "unsupported event (tc = %d, cid = %d)\n", event->tc, event->cid);
  5162. + return 0;
  5163. +}
  5164. +
  5165. +static int surface_sam_sid_vhf_probe(struct platform_device *pdev)
  5166. +{
  5167. + struct sid_vhf_drvdata *drvdata;
  5168. + struct vhf_device_metadata meta = {};
  5169. + struct hid_device *hid;
  5170. + int status;
  5171. +
  5172. + // add device link to EC
  5173. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  5174. + if (status)
  5175. + return status == -ENXIO ? -EPROBE_DEFER : status;
  5176. +
  5177. + drvdata = kzalloc(sizeof(struct sid_vhf_drvdata), GFP_KERNEL);
  5178. + if (!drvdata)
  5179. + return -ENOMEM;
  5180. +
  5181. + status = vhf_get_metadata(0x00, &meta);
  5182. + if (status)
  5183. + goto err_create_hid;
  5184. +
  5185. + hid = sid_vhf_create_hid_device(pdev, &meta);
  5186. + if (IS_ERR(hid)) {
  5187. + status = PTR_ERR(hid);
  5188. + goto err_create_hid;
  5189. + }
  5190. +
  5191. + drvdata->event_ctx.dev = &pdev->dev;
  5192. + drvdata->event_ctx.hid = hid;
  5193. +
  5194. + platform_set_drvdata(pdev, drvdata);
  5195. +
  5196. + status = surface_sam_ssh_set_event_handler(
  5197. + SAM_EVENT_SID_VHF_RQID,
  5198. + sid_vhf_event_handler,
  5199. + &drvdata->event_ctx);
  5200. + if (status)
  5201. + goto err_event_handler;
  5202. +
  5203. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5204. + if (status)
  5205. + goto err_event_source;
  5206. +
  5207. + status = hid_add_device(hid);
  5208. + if (status)
  5209. + goto err_add_hid;
  5210. +
  5211. + return 0;
  5212. +
  5213. +err_add_hid:
  5214. + surface_sam_ssh_disable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5215. +err_event_source:
  5216. + surface_sam_ssh_remove_event_handler(SAM_EVENT_SID_VHF_RQID);
  5217. +err_event_handler:
  5218. + hid_destroy_device(hid);
  5219. + platform_set_drvdata(pdev, NULL);
  5220. +err_create_hid:
  5221. + kfree(drvdata);
  5222. + return status;
  5223. +}
  5224. +
  5225. +static int surface_sam_sid_vhf_remove(struct platform_device *pdev)
  5226. +{
  5227. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(pdev);
  5228. +
  5229. + surface_sam_ssh_disable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5230. + surface_sam_ssh_remove_event_handler(SAM_EVENT_SID_VHF_RQID);
  5231. +
  5232. + hid_destroy_device(drvdata->event_ctx.hid);
  5233. + kfree(drvdata);
  5234. +
  5235. + platform_set_drvdata(pdev, NULL);
  5236. + return 0;
  5237. +}
  5238. +
  5239. +static struct platform_driver surface_sam_sid_vhf = {
  5240. + .probe = surface_sam_sid_vhf_probe,
  5241. + .remove = surface_sam_sid_vhf_remove,
  5242. + .driver = {
  5243. + .name = "surface_sam_sid_vhf",
  5244. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  5245. + },
  5246. +};
  5247. +module_platform_driver(surface_sam_sid_vhf);
  5248. +
  5249. +MODULE_AUTHOR("Blaž Hrastnik <blaz@mxxn.io>");
  5250. +MODULE_DESCRIPTION("Driver for HID devices connected via Surface SAM");
  5251. +MODULE_LICENSE("GPL v2");
  5252. +MODULE_ALIAS("platform:surface_sam_sid_vhf");
  5253. diff --git a/drivers/platform/x86/surface_sam/surface_sam_ssh.c b/drivers/platform/x86/surface_sam/surface_sam_ssh.c
  5254. new file mode 100644
  5255. index 000000000000..988be7c2d286
  5256. --- /dev/null
  5257. +++ b/drivers/platform/x86/surface_sam/surface_sam_ssh.c
  5258. @@ -0,0 +1,1744 @@
  5259. +// SPDX-License-Identifier: GPL-2.0
  5260. +/*
  5261. + * Surface Serial Hub (SSH) driver for communication with the Surface/System
  5262. + * Aggregator Module.
  5263. + */
  5264. +
  5265. +#include <asm/unaligned.h>
  5266. +#include <linux/acpi.h>
  5267. +#include <linux/completion.h>
  5268. +#include <linux/crc-ccitt.h>
  5269. +#include <linux/dmaengine.h>
  5270. +#include <linux/gpio/consumer.h>
  5271. +#include <linux/interrupt.h>
  5272. +#include <linux/jiffies.h>
  5273. +#include <linux/kernel.h>
  5274. +#include <linux/kfifo.h>
  5275. +#include <linux/mutex.h>
  5276. +#include <linux/pm.h>
  5277. +#include <linux/refcount.h>
  5278. +#include <linux/serdev.h>
  5279. +#include <linux/spinlock.h>
  5280. +#include <linux/workqueue.h>
  5281. +
  5282. +#include "surface_sam_ssh.h"
  5283. +
  5284. +
  5285. +#define SSH_RQST_TAG_FULL "surface_sam_ssh_rqst: "
  5286. +#define SSH_RQST_TAG "rqst: "
  5287. +#define SSH_EVENT_TAG "event: "
  5288. +#define SSH_RECV_TAG "recv: "
  5289. +
  5290. +#define SSH_SUPPORTED_FLOW_CONTROL_MASK (~((u8) ACPI_UART_FLOW_CONTROL_HW))
  5291. +
  5292. +#define SSH_BYTELEN_SYNC 2
  5293. +#define SSH_BYTELEN_TERM 2
  5294. +#define SSH_BYTELEN_CRC 2
  5295. +#define SSH_BYTELEN_CTRL 4 // command-header, ACK, or RETRY
  5296. +#define SSH_BYTELEN_CMDFRAME 8 // without payload
  5297. +
  5298. +#define SSH_MAX_WRITE ( \
  5299. + SSH_BYTELEN_SYNC \
  5300. + + SSH_BYTELEN_CTRL \
  5301. + + SSH_BYTELEN_CRC \
  5302. + + SSH_BYTELEN_CMDFRAME \
  5303. + + SURFACE_SAM_SSH_MAX_RQST_PAYLOAD \
  5304. + + SSH_BYTELEN_CRC \
  5305. +)
  5306. +
  5307. +#define SSH_MSG_LEN_CTRL ( \
  5308. + SSH_BYTELEN_SYNC \
  5309. + + SSH_BYTELEN_CTRL \
  5310. + + SSH_BYTELEN_CRC \
  5311. + + SSH_BYTELEN_TERM \
  5312. +)
  5313. +
  5314. +#define SSH_MSG_LEN_CMD_BASE ( \
  5315. + SSH_BYTELEN_SYNC \
  5316. + + SSH_BYTELEN_CTRL \
  5317. + + SSH_BYTELEN_CRC \
  5318. + + SSH_BYTELEN_CRC \
  5319. +) // without payload and command-frame
  5320. +
  5321. +#define SSH_WRITE_TIMEOUT msecs_to_jiffies(1000)
  5322. +#define SSH_READ_TIMEOUT msecs_to_jiffies(1000)
  5323. +#define SSH_NUM_RETRY 3
  5324. +
  5325. +#define SSH_WRITE_BUF_LEN SSH_MAX_WRITE
  5326. +#define SSH_READ_BUF_LEN 512 // must be power of 2
  5327. +#define SSH_EVAL_BUF_LEN SSH_MAX_WRITE // also works for reading
  5328. +
  5329. +#define SSH_FRAME_TYPE_CMD_NOACK 0x00 // request/event that does not to be ACKed
  5330. +#define SSH_FRAME_TYPE_CMD 0x80 // request/event
  5331. +#define SSH_FRAME_TYPE_ACK 0x40 // ACK for request/event
  5332. +#define SSH_FRAME_TYPE_RETRY 0x04 // error or retry indicator
  5333. +
  5334. +#define SSH_FRAME_OFFS_CTRL SSH_BYTELEN_SYNC
  5335. +#define SSH_FRAME_OFFS_CTRL_CRC (SSH_FRAME_OFFS_CTRL + SSH_BYTELEN_CTRL)
  5336. +#define SSH_FRAME_OFFS_TERM (SSH_FRAME_OFFS_CTRL_CRC + SSH_BYTELEN_CRC)
  5337. +#define SSH_FRAME_OFFS_CMD SSH_FRAME_OFFS_TERM // either TERM or CMD
  5338. +#define SSH_FRAME_OFFS_CMD_PLD (SSH_FRAME_OFFS_CMD + SSH_BYTELEN_CMDFRAME)
  5339. +
  5340. +/*
  5341. + * A note on Request IDs (RQIDs):
  5342. + * 0x0000 is not a valid RQID
  5343. + * 0x0001 is valid, but reserved for Surface Laptop keyboard events
  5344. + */
  5345. +#define SAM_NUM_EVENT_TYPES ((1 << SURFACE_SAM_SSH_RQID_EVENT_BITS) - 1)
  5346. +
  5347. +/*
  5348. + * Sync: aa 55
  5349. + * Terminate: ff ff
  5350. + *
  5351. + * Request Message: sync cmd-hdr crc(cmd-hdr) cmd-rqst-frame crc(cmd-rqst-frame)
  5352. + * Ack Message: sync ack crc(ack) terminate
  5353. + * Retry Message: sync retry crc(retry) terminate
  5354. + * Response Message: sync cmd-hdr crc(cmd-hdr) cmd-resp-frame crc(cmd-resp-frame)
  5355. + *
  5356. + * Command Header: 80 LEN 00 SEQ
  5357. + * Ack: 40 00 00 SEQ
  5358. + * Retry: 04 00 00 00
  5359. + * Command Request Frame: 80 RTC 01 00 RIID RQID RCID PLD
  5360. + * Command Response Frame: 80 RTC 00 01 RIID RQID RCID PLD
  5361. + */
  5362. +
  5363. +struct ssh_frame_ctrl {
  5364. + u8 type;
  5365. + u8 len; // without crc
  5366. + u8 pad;
  5367. + u8 seq;
  5368. +} __packed;
  5369. +
  5370. +struct ssh_frame_cmd {
  5371. + u8 type;
  5372. + u8 tc;
  5373. + u8 pri_out;
  5374. + u8 pri_in;
  5375. + u8 iid;
  5376. + u8 rqid_lo; // id for request/response matching (low byte)
  5377. + u8 rqid_hi; // id for request/response matching (high byte)
  5378. + u8 cid;
  5379. +} __packed;
  5380. +
  5381. +
  5382. +enum ssh_ec_state {
  5383. + SSH_EC_UNINITIALIZED,
  5384. + SSH_EC_INITIALIZED,
  5385. + SSH_EC_SUSPENDED,
  5386. +};
  5387. +
  5388. +struct ssh_counters {
  5389. + u8 seq; // control sequence id
  5390. + u16 rqid; // id for request/response matching
  5391. +};
  5392. +
  5393. +struct ssh_writer {
  5394. + u8 *data;
  5395. + u8 *ptr;
  5396. +} __packed;
  5397. +
  5398. +enum ssh_receiver_state {
  5399. + SSH_RCV_DISCARD,
  5400. + SSH_RCV_CONTROL,
  5401. + SSH_RCV_COMMAND,
  5402. +};
  5403. +
  5404. +struct ssh_receiver {
  5405. + spinlock_t lock;
  5406. + enum ssh_receiver_state state;
  5407. + struct completion signal;
  5408. + struct kfifo fifo;
  5409. + struct {
  5410. + bool pld;
  5411. + u8 seq;
  5412. + u16 rqid;
  5413. + } expect;
  5414. + struct {
  5415. + u16 cap;
  5416. + u16 len;
  5417. + u8 *ptr;
  5418. + } eval_buf;
  5419. +};
  5420. +
  5421. +struct ssh_event_handler {
  5422. + surface_sam_ssh_event_handler_fn handler;
  5423. + surface_sam_ssh_event_handler_delay delay;
  5424. + void *data;
  5425. +};
  5426. +
  5427. +struct ssh_events {
  5428. + spinlock_t lock;
  5429. + struct workqueue_struct *queue_ack;
  5430. + struct workqueue_struct *queue_evt;
  5431. + struct ssh_event_handler handler[SAM_NUM_EVENT_TYPES];
  5432. +};
  5433. +
  5434. +struct sam_ssh_ec {
  5435. + struct mutex lock;
  5436. + enum ssh_ec_state state;
  5437. + struct serdev_device *serdev;
  5438. + struct ssh_counters counter;
  5439. + struct ssh_writer writer;
  5440. + struct ssh_receiver receiver;
  5441. + struct ssh_events events;
  5442. + int irq;
  5443. + bool irq_wakeup_enabled;
  5444. +};
  5445. +
  5446. +struct ssh_fifo_packet {
  5447. + u8 type; // packet type (ACK/RETRY/CMD)
  5448. + u8 seq;
  5449. + u8 len;
  5450. +};
  5451. +
  5452. +struct ssh_event_work {
  5453. + refcount_t refcount;
  5454. + struct sam_ssh_ec *ec;
  5455. + struct work_struct work_ack;
  5456. + struct delayed_work work_evt;
  5457. + struct surface_sam_ssh_event event;
  5458. + u8 seq;
  5459. +};
  5460. +
  5461. +
  5462. +static struct sam_ssh_ec ssh_ec = {
  5463. + .lock = __MUTEX_INITIALIZER(ssh_ec.lock),
  5464. + .state = SSH_EC_UNINITIALIZED,
  5465. + .serdev = NULL,
  5466. + .counter = {
  5467. + .seq = 0,
  5468. + .rqid = 0,
  5469. + },
  5470. + .writer = {
  5471. + .data = NULL,
  5472. + .ptr = NULL,
  5473. + },
  5474. + .receiver = {
  5475. + .lock = __SPIN_LOCK_UNLOCKED(),
  5476. + .state = SSH_RCV_DISCARD,
  5477. + .expect = {},
  5478. + },
  5479. + .events = {
  5480. + .lock = __SPIN_LOCK_UNLOCKED(),
  5481. + .handler = {},
  5482. + },
  5483. + .irq = -1,
  5484. +};
  5485. +
  5486. +
  5487. +static inline struct sam_ssh_ec *surface_sam_ssh_acquire(void)
  5488. +{
  5489. + struct sam_ssh_ec *ec = &ssh_ec;
  5490. +
  5491. + mutex_lock(&ec->lock);
  5492. + return ec;
  5493. +}
  5494. +
  5495. +static inline void surface_sam_ssh_release(struct sam_ssh_ec *ec)
  5496. +{
  5497. + mutex_unlock(&ec->lock);
  5498. +}
  5499. +
  5500. +static inline struct sam_ssh_ec *surface_sam_ssh_acquire_init(void)
  5501. +{
  5502. + struct sam_ssh_ec *ec = surface_sam_ssh_acquire();
  5503. +
  5504. + if (ec->state == SSH_EC_UNINITIALIZED) {
  5505. + surface_sam_ssh_release(ec);
  5506. + return NULL;
  5507. + }
  5508. +
  5509. + return ec;
  5510. +}
  5511. +
  5512. +int surface_sam_ssh_consumer_register(struct device *consumer)
  5513. +{
  5514. + u32 flags = DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER;
  5515. + struct sam_ssh_ec *ec;
  5516. + struct device_link *link;
  5517. +
  5518. + ec = surface_sam_ssh_acquire_init();
  5519. + if (!ec)
  5520. + return -ENXIO;
  5521. +
  5522. + link = device_link_add(consumer, &ec->serdev->dev, flags);
  5523. + if (!link)
  5524. + return -EFAULT;
  5525. +
  5526. + surface_sam_ssh_release(ec);
  5527. + return 0;
  5528. +}
  5529. +EXPORT_SYMBOL_GPL(surface_sam_ssh_consumer_register);
  5530. +
  5531. +
  5532. +static inline u16 sam_rqid_to_rqst(u16 rqid)
  5533. +{
  5534. + return rqid << SURFACE_SAM_SSH_RQID_EVENT_BITS;
  5535. +}
  5536. +
  5537. +static inline bool sam_rqid_is_event(u16 rqid)
  5538. +{
  5539. + const u16 mask = (1 << SURFACE_SAM_SSH_RQID_EVENT_BITS) - 1;
  5540. +
  5541. + return rqid != 0 && (rqid | mask) == mask;
  5542. +}
  5543. +
  5544. +int surface_sam_ssh_enable_event_source(u8 tc, u8 unknown, u16 rqid)
  5545. +{
  5546. + u8 pld[4] = { tc, unknown, rqid & 0xff, rqid >> 8 };
  5547. + u8 buf[1] = { 0x00 };
  5548. +
  5549. + struct surface_sam_ssh_rqst rqst = {
  5550. + .tc = 0x01,
  5551. + .cid = 0x0b,
  5552. + .iid = 0x00,
  5553. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5554. + .snc = 0x01,
  5555. + .cdl = 0x04,
  5556. + .pld = pld,
  5557. + };
  5558. +
  5559. + struct surface_sam_ssh_buf result = {
  5560. + result.cap = ARRAY_SIZE(buf),
  5561. + result.len = 0,
  5562. + result.data = buf,
  5563. + };
  5564. +
  5565. + int status;
  5566. +
  5567. + // only allow RQIDs that lie within event spectrum
  5568. + if (!sam_rqid_is_event(rqid))
  5569. + return -EINVAL;
  5570. +
  5571. + status = surface_sam_ssh_rqst(&rqst, &result);
  5572. +
  5573. + if (buf[0] != 0x00) {
  5574. + pr_warn(SSH_RQST_TAG_FULL
  5575. + "unexpected result while enabling event source: 0x%02x\n",
  5576. + buf[0]);
  5577. + }
  5578. +
  5579. + return status;
  5580. +
  5581. +}
  5582. +EXPORT_SYMBOL_GPL(surface_sam_ssh_enable_event_source);
  5583. +
  5584. +int surface_sam_ssh_disable_event_source(u8 tc, u8 unknown, u16 rqid)
  5585. +{
  5586. + u8 pld[4] = { tc, unknown, rqid & 0xff, rqid >> 8 };
  5587. + u8 buf[1] = { 0x00 };
  5588. +
  5589. + struct surface_sam_ssh_rqst rqst = {
  5590. + .tc = 0x01,
  5591. + .cid = 0x0c,
  5592. + .iid = 0x00,
  5593. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5594. + .snc = 0x01,
  5595. + .cdl = 0x04,
  5596. + .pld = pld,
  5597. + };
  5598. +
  5599. + struct surface_sam_ssh_buf result = {
  5600. + result.cap = ARRAY_SIZE(buf),
  5601. + result.len = 0,
  5602. + result.data = buf,
  5603. + };
  5604. +
  5605. + int status;
  5606. +
  5607. + // only allow RQIDs that lie within event spectrum
  5608. + if (!sam_rqid_is_event(rqid))
  5609. + return -EINVAL;
  5610. +
  5611. + status = surface_sam_ssh_rqst(&rqst, &result);
  5612. +
  5613. + if (buf[0] != 0x00) {
  5614. + pr_warn(SSH_RQST_TAG_FULL
  5615. + "unexpected result while disabling event source: 0x%02x\n",
  5616. + buf[0]);
  5617. + }
  5618. +
  5619. + return status;
  5620. +}
  5621. +EXPORT_SYMBOL_GPL(surface_sam_ssh_disable_event_source);
  5622. +
  5623. +static unsigned long sam_event_default_delay(struct surface_sam_ssh_event *event, void *data)
  5624. +{
  5625. + return event->pri == SURFACE_SAM_PRIORITY_HIGH ? SURFACE_SAM_SSH_EVENT_IMMEDIATE : 0;
  5626. +}
  5627. +
  5628. +int surface_sam_ssh_set_delayed_event_handler(
  5629. + u16 rqid, surface_sam_ssh_event_handler_fn fn,
  5630. + surface_sam_ssh_event_handler_delay delay,
  5631. + void *data)
  5632. +{
  5633. + struct sam_ssh_ec *ec;
  5634. + unsigned long flags;
  5635. +
  5636. + if (!sam_rqid_is_event(rqid))
  5637. + return -EINVAL;
  5638. +
  5639. + ec = surface_sam_ssh_acquire_init();
  5640. + if (!ec)
  5641. + return -ENXIO;
  5642. +
  5643. + if (!delay)
  5644. + delay = sam_event_default_delay;
  5645. +
  5646. + spin_lock_irqsave(&ec->events.lock, flags);
  5647. + // check if we already have a handler
  5648. + if (ec->events.handler[rqid - 1].handler) {
  5649. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5650. + return -EINVAL;
  5651. + }
  5652. +
  5653. + // 0 is not a valid event RQID
  5654. + ec->events.handler[rqid - 1].handler = fn;
  5655. + ec->events.handler[rqid - 1].delay = delay;
  5656. + ec->events.handler[rqid - 1].data = data;
  5657. +
  5658. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5659. + surface_sam_ssh_release(ec);
  5660. +
  5661. + return 0;
  5662. +}
  5663. +EXPORT_SYMBOL_GPL(surface_sam_ssh_set_delayed_event_handler);
  5664. +
  5665. +int surface_sam_ssh_remove_event_handler(u16 rqid)
  5666. +{
  5667. + struct sam_ssh_ec *ec;
  5668. + unsigned long flags;
  5669. +
  5670. + if (!sam_rqid_is_event(rqid))
  5671. + return -EINVAL;
  5672. +
  5673. + ec = surface_sam_ssh_acquire_init();
  5674. + if (!ec)
  5675. + return -ENXIO;
  5676. +
  5677. + spin_lock_irqsave(&ec->events.lock, flags);
  5678. +
  5679. + // 0 is not a valid event RQID
  5680. + ec->events.handler[rqid - 1].handler = NULL;
  5681. + ec->events.handler[rqid - 1].delay = NULL;
  5682. + ec->events.handler[rqid - 1].data = NULL;
  5683. +
  5684. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5685. + surface_sam_ssh_release(ec);
  5686. +
  5687. + /*
  5688. + * Make sure that the handler is not in use any more after we've
  5689. + * removed it.
  5690. + */
  5691. + flush_workqueue(ec->events.queue_evt);
  5692. +
  5693. + return 0;
  5694. +}
  5695. +EXPORT_SYMBOL_GPL(surface_sam_ssh_remove_event_handler);
  5696. +
  5697. +
  5698. +static inline u16 ssh_crc(const u8 *buf, size_t size)
  5699. +{
  5700. + return crc_ccitt_false(0xffff, buf, size);
  5701. +}
  5702. +
  5703. +static inline void ssh_write_u16(struct ssh_writer *writer, u16 in)
  5704. +{
  5705. + put_unaligned_le16(in, writer->ptr);
  5706. + writer->ptr += 2;
  5707. +}
  5708. +
  5709. +static inline void ssh_write_crc(struct ssh_writer *writer,
  5710. + const u8 *buf, size_t size)
  5711. +{
  5712. + ssh_write_u16(writer, ssh_crc(buf, size));
  5713. +}
  5714. +
  5715. +static inline void ssh_write_syn(struct ssh_writer *writer)
  5716. +{
  5717. + u8 *w = writer->ptr;
  5718. +
  5719. + *w++ = 0xaa;
  5720. + *w++ = 0x55;
  5721. +
  5722. + writer->ptr = w;
  5723. +}
  5724. +
  5725. +static inline void ssh_write_ter(struct ssh_writer *writer)
  5726. +{
  5727. + u8 *w = writer->ptr;
  5728. +
  5729. + *w++ = 0xff;
  5730. + *w++ = 0xff;
  5731. +
  5732. + writer->ptr = w;
  5733. +}
  5734. +
  5735. +static inline void ssh_write_buf(struct ssh_writer *writer,
  5736. + u8 *in, size_t len)
  5737. +{
  5738. + writer->ptr = memcpy(writer->ptr, in, len) + len;
  5739. +}
  5740. +
  5741. +static inline void ssh_write_hdr(struct ssh_writer *writer,
  5742. + const struct surface_sam_ssh_rqst *rqst,
  5743. + struct sam_ssh_ec *ec)
  5744. +{
  5745. + struct ssh_frame_ctrl *hdr = (struct ssh_frame_ctrl *)writer->ptr;
  5746. + u8 *begin = writer->ptr;
  5747. +
  5748. + hdr->type = SSH_FRAME_TYPE_CMD;
  5749. + hdr->len = SSH_BYTELEN_CMDFRAME + rqst->cdl; // without CRC
  5750. + hdr->pad = 0x00;
  5751. + hdr->seq = ec->counter.seq;
  5752. +
  5753. + writer->ptr += sizeof(*hdr);
  5754. +
  5755. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5756. +}
  5757. +
  5758. +static inline void ssh_write_cmd(struct ssh_writer *writer,
  5759. + const struct surface_sam_ssh_rqst *rqst,
  5760. + struct sam_ssh_ec *ec)
  5761. +{
  5762. + struct ssh_frame_cmd *cmd = (struct ssh_frame_cmd *)writer->ptr;
  5763. + u8 *begin = writer->ptr;
  5764. +
  5765. + u16 rqid = sam_rqid_to_rqst(ec->counter.rqid);
  5766. + u8 rqid_lo = rqid & 0xFF;
  5767. + u8 rqid_hi = rqid >> 8;
  5768. +
  5769. + cmd->type = SSH_FRAME_TYPE_CMD;
  5770. + cmd->tc = rqst->tc;
  5771. + cmd->pri_out = rqst->pri;
  5772. + cmd->pri_in = 0x00;
  5773. + cmd->iid = rqst->iid;
  5774. + cmd->rqid_lo = rqid_lo;
  5775. + cmd->rqid_hi = rqid_hi;
  5776. + cmd->cid = rqst->cid;
  5777. +
  5778. + writer->ptr += sizeof(*cmd);
  5779. +
  5780. + ssh_write_buf(writer, rqst->pld, rqst->cdl);
  5781. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5782. +}
  5783. +
  5784. +static inline void ssh_write_ack(struct ssh_writer *writer, u8 seq)
  5785. +{
  5786. + struct ssh_frame_ctrl *ack = (struct ssh_frame_ctrl *)writer->ptr;
  5787. + u8 *begin = writer->ptr;
  5788. +
  5789. + ack->type = SSH_FRAME_TYPE_ACK;
  5790. + ack->len = 0x00;
  5791. + ack->pad = 0x00;
  5792. + ack->seq = seq;
  5793. +
  5794. + writer->ptr += sizeof(*ack);
  5795. +
  5796. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5797. +}
  5798. +
  5799. +static inline void ssh_writer_reset(struct ssh_writer *writer)
  5800. +{
  5801. + writer->ptr = writer->data;
  5802. +}
  5803. +
  5804. +static inline int ssh_writer_flush(struct sam_ssh_ec *ec)
  5805. +{
  5806. + struct ssh_writer *writer = &ec->writer;
  5807. + struct serdev_device *serdev = ec->serdev;
  5808. + int status;
  5809. +
  5810. + size_t len = writer->ptr - writer->data;
  5811. +
  5812. + dev_dbg(&ec->serdev->dev, "sending message\n");
  5813. + print_hex_dump_debug("send: ", DUMP_PREFIX_OFFSET, 16, 1,
  5814. + writer->data, writer->ptr - writer->data, false);
  5815. +
  5816. + status = serdev_device_write(serdev, writer->data, len, SSH_WRITE_TIMEOUT);
  5817. + return status >= 0 ? 0 : status;
  5818. +}
  5819. +
  5820. +static inline void ssh_write_msg_cmd(struct sam_ssh_ec *ec,
  5821. + const struct surface_sam_ssh_rqst *rqst)
  5822. +{
  5823. + ssh_writer_reset(&ec->writer);
  5824. + ssh_write_syn(&ec->writer);
  5825. + ssh_write_hdr(&ec->writer, rqst, ec);
  5826. + ssh_write_cmd(&ec->writer, rqst, ec);
  5827. +}
  5828. +
  5829. +static inline void ssh_write_msg_ack(struct sam_ssh_ec *ec, u8 seq)
  5830. +{
  5831. + ssh_writer_reset(&ec->writer);
  5832. + ssh_write_syn(&ec->writer);
  5833. + ssh_write_ack(&ec->writer, seq);
  5834. + ssh_write_ter(&ec->writer);
  5835. +}
  5836. +
  5837. +static inline void ssh_receiver_restart(struct sam_ssh_ec *ec,
  5838. + const struct surface_sam_ssh_rqst *rqst)
  5839. +{
  5840. + unsigned long flags;
  5841. +
  5842. + spin_lock_irqsave(&ec->receiver.lock, flags);
  5843. + reinit_completion(&ec->receiver.signal);
  5844. + ec->receiver.state = SSH_RCV_CONTROL;
  5845. + ec->receiver.expect.pld = rqst->snc;
  5846. + ec->receiver.expect.seq = ec->counter.seq;
  5847. + ec->receiver.expect.rqid = sam_rqid_to_rqst(ec->counter.rqid);
  5848. + ec->receiver.eval_buf.len = 0;
  5849. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  5850. +}
  5851. +
  5852. +static inline void ssh_receiver_discard(struct sam_ssh_ec *ec)
  5853. +{
  5854. + unsigned long flags;
  5855. +
  5856. + spin_lock_irqsave(&ec->receiver.lock, flags);
  5857. + ec->receiver.state = SSH_RCV_DISCARD;
  5858. + ec->receiver.eval_buf.len = 0;
  5859. + kfifo_reset(&ec->receiver.fifo);
  5860. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  5861. +}
  5862. +
  5863. +static int surface_sam_ssh_rqst_unlocked(struct sam_ssh_ec *ec,
  5864. + const struct surface_sam_ssh_rqst *rqst,
  5865. + struct surface_sam_ssh_buf *result)
  5866. +{
  5867. + struct device *dev = &ec->serdev->dev;
  5868. + struct ssh_fifo_packet packet = {};
  5869. + int status;
  5870. + int try;
  5871. + unsigned int rem;
  5872. +
  5873. + if (rqst->cdl > SURFACE_SAM_SSH_MAX_RQST_PAYLOAD) {
  5874. + dev_err(dev, SSH_RQST_TAG "request payload too large\n");
  5875. + return -EINVAL;
  5876. + }
  5877. +
  5878. + // write command in buffer, we may need it multiple times
  5879. + ssh_write_msg_cmd(ec, rqst);
  5880. + ssh_receiver_restart(ec, rqst);
  5881. +
  5882. + // send command, try to get an ack response
  5883. + for (try = 0; try < SSH_NUM_RETRY; try++) {
  5884. + status = ssh_writer_flush(ec);
  5885. + if (status)
  5886. + goto out;
  5887. +
  5888. + rem = wait_for_completion_timeout(&ec->receiver.signal, SSH_READ_TIMEOUT);
  5889. + if (rem) {
  5890. + // completion assures valid packet, thus ignore returned length
  5891. + (void) !kfifo_out(&ec->receiver.fifo, &packet, sizeof(packet));
  5892. +
  5893. + if (packet.type == SSH_FRAME_TYPE_ACK)
  5894. + break;
  5895. + }
  5896. + }
  5897. +
  5898. + // check if we ran out of tries?
  5899. + if (try >= SSH_NUM_RETRY) {
  5900. + dev_err(dev, SSH_RQST_TAG "communication failed %d times, giving up\n", try);
  5901. + status = -EIO;
  5902. + goto out;
  5903. + }
  5904. +
  5905. + ec->counter.seq += 1;
  5906. + ec->counter.rqid += 1;
  5907. +
  5908. + // get command response/payload
  5909. + if (rqst->snc && result) {
  5910. + rem = wait_for_completion_timeout(&ec->receiver.signal, SSH_READ_TIMEOUT);
  5911. + if (rem) {
  5912. + // completion assures valid packet, thus ignore returned length
  5913. + (void) !kfifo_out(&ec->receiver.fifo, &packet, sizeof(packet));
  5914. +
  5915. + if (result->cap < packet.len) {
  5916. + status = -EINVAL;
  5917. + goto out;
  5918. + }
  5919. +
  5920. + // completion assures valid packet, thus ignore returned length
  5921. + (void) !kfifo_out(&ec->receiver.fifo, result->data, packet.len);
  5922. + result->len = packet.len;
  5923. + } else {
  5924. + dev_err(dev, SSH_RQST_TAG "communication timed out\n");
  5925. + status = -EIO;
  5926. + goto out;
  5927. + }
  5928. +
  5929. + // send ACK
  5930. + if (packet.type == SSH_FRAME_TYPE_CMD) {
  5931. + ssh_write_msg_ack(ec, packet.seq);
  5932. + status = ssh_writer_flush(ec);
  5933. + if (status)
  5934. + goto out;
  5935. + }
  5936. + }
  5937. +
  5938. +out:
  5939. + ssh_receiver_discard(ec);
  5940. + return status;
  5941. +}
  5942. +
  5943. +int surface_sam_ssh_rqst(const struct surface_sam_ssh_rqst *rqst, struct surface_sam_ssh_buf *result)
  5944. +{
  5945. + struct sam_ssh_ec *ec;
  5946. + int status;
  5947. +
  5948. + ec = surface_sam_ssh_acquire_init();
  5949. + if (!ec) {
  5950. + pr_warn(SSH_RQST_TAG_FULL "embedded controller is uninitialized\n");
  5951. + return -ENXIO;
  5952. + }
  5953. +
  5954. + if (ec->state == SSH_EC_SUSPENDED) {
  5955. + dev_warn(&ec->serdev->dev, SSH_RQST_TAG "embedded controller is suspended\n");
  5956. +
  5957. + surface_sam_ssh_release(ec);
  5958. + return -EPERM;
  5959. + }
  5960. +
  5961. + status = surface_sam_ssh_rqst_unlocked(ec, rqst, result);
  5962. +
  5963. + surface_sam_ssh_release(ec);
  5964. + return status;
  5965. +}
  5966. +EXPORT_SYMBOL_GPL(surface_sam_ssh_rqst);
  5967. +
  5968. +
  5969. +static int surface_sam_ssh_ec_resume(struct sam_ssh_ec *ec)
  5970. +{
  5971. + u8 buf[1] = { 0x00 };
  5972. +
  5973. + struct surface_sam_ssh_rqst rqst = {
  5974. + .tc = 0x01,
  5975. + .cid = 0x16,
  5976. + .iid = 0x00,
  5977. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5978. + .snc = 0x01,
  5979. + .cdl = 0x00,
  5980. + .pld = NULL,
  5981. + };
  5982. +
  5983. + struct surface_sam_ssh_buf result = {
  5984. + result.cap = ARRAY_SIZE(buf),
  5985. + result.len = 0,
  5986. + result.data = buf,
  5987. + };
  5988. +
  5989. + int status;
  5990. +
  5991. + status = surface_sam_ssh_rqst_unlocked(ec, &rqst, &result);
  5992. + if (status)
  5993. + return status;
  5994. +
  5995. + if (buf[0] != 0x00) {
  5996. + dev_warn(&ec->serdev->dev,
  5997. + "unexpected result while trying to resume EC: 0x%02x\n",
  5998. + buf[0]);
  5999. + }
  6000. +
  6001. + return 0;
  6002. +}
  6003. +
  6004. +static int surface_sam_ssh_ec_suspend(struct sam_ssh_ec *ec)
  6005. +{
  6006. + u8 buf[1] = { 0x00 };
  6007. +
  6008. + struct surface_sam_ssh_rqst rqst = {
  6009. + .tc = 0x01,
  6010. + .cid = 0x15,
  6011. + .iid = 0x00,
  6012. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  6013. + .snc = 0x01,
  6014. + .cdl = 0x00,
  6015. + .pld = NULL,
  6016. + };
  6017. +
  6018. + struct surface_sam_ssh_buf result = {
  6019. + result.cap = ARRAY_SIZE(buf),
  6020. + result.len = 0,
  6021. + result.data = buf,
  6022. + };
  6023. +
  6024. + int status;
  6025. +
  6026. + status = surface_sam_ssh_rqst_unlocked(ec, &rqst, &result);
  6027. + if (status)
  6028. + return status;
  6029. +
  6030. + if (buf[0] != 0x00) {
  6031. + dev_warn(&ec->serdev->dev,
  6032. + "unexpected result while trying to suspend EC: 0x%02x\n",
  6033. + buf[0]);
  6034. + }
  6035. +
  6036. + return 0;
  6037. +}
  6038. +
  6039. +
  6040. +static inline bool ssh_is_valid_syn(const u8 *ptr)
  6041. +{
  6042. + return ptr[0] == 0xaa && ptr[1] == 0x55;
  6043. +}
  6044. +
  6045. +static inline bool ssh_is_valid_ter(const u8 *ptr)
  6046. +{
  6047. + return ptr[0] == 0xff && ptr[1] == 0xff;
  6048. +}
  6049. +
  6050. +static inline bool ssh_is_valid_crc(const u8 *begin, const u8 *end)
  6051. +{
  6052. + u16 crc;
  6053. +
  6054. + crc = ssh_crc(begin, end - begin);
  6055. + return (end[0] == (crc & 0xff)) && (end[1] == (crc >> 8));
  6056. +}
  6057. +
  6058. +
  6059. +static int surface_sam_ssh_send_ack(struct sam_ssh_ec *ec, u8 seq)
  6060. +{
  6061. + int status;
  6062. + u8 buf[SSH_MSG_LEN_CTRL];
  6063. + u16 crc;
  6064. +
  6065. + buf[0] = 0xaa;
  6066. + buf[1] = 0x55;
  6067. + buf[2] = 0x40;
  6068. + buf[3] = 0x00;
  6069. + buf[4] = 0x00;
  6070. + buf[5] = seq;
  6071. +
  6072. + crc = ssh_crc(buf + SSH_FRAME_OFFS_CTRL, SSH_BYTELEN_CTRL);
  6073. + buf[6] = crc & 0xff;
  6074. + buf[7] = crc >> 8;
  6075. +
  6076. + buf[8] = 0xff;
  6077. + buf[9] = 0xff;
  6078. +
  6079. + dev_dbg(&ec->serdev->dev, "sending message\n");
  6080. + print_hex_dump_debug("send: ", DUMP_PREFIX_OFFSET, 16, 1,
  6081. + buf, SSH_MSG_LEN_CTRL, false);
  6082. +
  6083. + status = serdev_device_write(ec->serdev, buf, SSH_MSG_LEN_CTRL, SSH_WRITE_TIMEOUT);
  6084. + return status >= 0 ? 0 : status;
  6085. +}
  6086. +
  6087. +static void surface_sam_ssh_event_work_ack_handler(struct work_struct *_work)
  6088. +{
  6089. + struct surface_sam_ssh_event *event;
  6090. + struct ssh_event_work *work;
  6091. + struct sam_ssh_ec *ec;
  6092. + struct device *dev;
  6093. + int status;
  6094. +
  6095. + work = container_of(_work, struct ssh_event_work, work_ack);
  6096. + event = &work->event;
  6097. + ec = work->ec;
  6098. + dev = &ec->serdev->dev;
  6099. +
  6100. + /* make sure we load a fresh ec state */
  6101. + smp_mb();
  6102. +
  6103. + if (ec->state == SSH_EC_INITIALIZED) {
  6104. + status = surface_sam_ssh_send_ack(ec, work->seq);
  6105. + if (status)
  6106. + dev_err(dev, SSH_EVENT_TAG "failed to send ACK: %d\n", status);
  6107. + }
  6108. +
  6109. + if (refcount_dec_and_test(&work->refcount))
  6110. + kfree(work);
  6111. +}
  6112. +
  6113. +static void surface_sam_ssh_event_work_evt_handler(struct work_struct *_work)
  6114. +{
  6115. + struct delayed_work *dwork = (struct delayed_work *)_work;
  6116. + struct ssh_event_work *work;
  6117. + struct surface_sam_ssh_event *event;
  6118. + struct sam_ssh_ec *ec;
  6119. + struct device *dev;
  6120. + unsigned long flags;
  6121. +
  6122. + surface_sam_ssh_event_handler_fn handler;
  6123. + void *handler_data;
  6124. +
  6125. + int status = 0;
  6126. +
  6127. + work = container_of(dwork, struct ssh_event_work, work_evt);
  6128. + event = &work->event;
  6129. + ec = work->ec;
  6130. + dev = &ec->serdev->dev;
  6131. +
  6132. + spin_lock_irqsave(&ec->events.lock, flags);
  6133. + handler = ec->events.handler[event->rqid - 1].handler;
  6134. + handler_data = ec->events.handler[event->rqid - 1].data;
  6135. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6136. +
  6137. + /*
  6138. + * During handler removal or driver release, we ensure every event gets
  6139. + * handled before return of that function. Thus a handler obtained here is
  6140. + * guaranteed to be valid at least until this function returns.
  6141. + */
  6142. +
  6143. + if (handler)
  6144. + status = handler(event, handler_data);
  6145. + else
  6146. + dev_warn(dev, SSH_EVENT_TAG "unhandled event (rqid: %04x)\n", event->rqid);
  6147. +
  6148. + if (status)
  6149. + dev_err(dev, SSH_EVENT_TAG "error handling event: %d\n", status);
  6150. +
  6151. + if (refcount_dec_and_test(&work->refcount))
  6152. + kfree(work);
  6153. +}
  6154. +
  6155. +static void ssh_handle_event(struct sam_ssh_ec *ec, const u8 *buf)
  6156. +{
  6157. + const struct ssh_frame_ctrl *ctrl;
  6158. + const struct ssh_frame_cmd *cmd;
  6159. + struct ssh_event_work *work;
  6160. + unsigned long flags;
  6161. + u16 pld_len;
  6162. +
  6163. + surface_sam_ssh_event_handler_delay delay_fn;
  6164. + void *handler_data;
  6165. + unsigned long delay;
  6166. +
  6167. + ctrl = (const struct ssh_frame_ctrl *)(buf + SSH_FRAME_OFFS_CTRL);
  6168. + cmd = (const struct ssh_frame_cmd *)(buf + SSH_FRAME_OFFS_CMD);
  6169. +
  6170. + pld_len = ctrl->len - SSH_BYTELEN_CMDFRAME;
  6171. +
  6172. + work = kzalloc(sizeof(struct ssh_event_work) + pld_len, GFP_ATOMIC);
  6173. + if (!work)
  6174. + return;
  6175. +
  6176. + refcount_set(&work->refcount, 1);
  6177. + work->ec = ec;
  6178. + work->seq = ctrl->seq;
  6179. + work->event.rqid = (cmd->rqid_hi << 8) | cmd->rqid_lo;
  6180. + work->event.tc = cmd->tc;
  6181. + work->event.cid = cmd->cid;
  6182. + work->event.iid = cmd->iid;
  6183. + work->event.pri = cmd->pri_in;
  6184. + work->event.len = pld_len;
  6185. + work->event.pld = ((u8 *)work) + sizeof(struct ssh_event_work);
  6186. +
  6187. + memcpy(work->event.pld, buf + SSH_FRAME_OFFS_CMD_PLD, pld_len);
  6188. +
  6189. + // queue ACK for if required
  6190. + if (ctrl->type == SSH_FRAME_TYPE_CMD) {
  6191. + refcount_set(&work->refcount, 2);
  6192. + INIT_WORK(&work->work_ack, surface_sam_ssh_event_work_ack_handler);
  6193. + queue_work(ec->events.queue_ack, &work->work_ack);
  6194. + }
  6195. +
  6196. + spin_lock_irqsave(&ec->events.lock, flags);
  6197. + handler_data = ec->events.handler[work->event.rqid - 1].data;
  6198. + delay_fn = ec->events.handler[work->event.rqid - 1].delay;
  6199. +
  6200. + /* Note:
  6201. + * We need to check delay_fn here: This may have never been set as we
  6202. + * can't guarantee that events only occur when they have been enabled.
  6203. + */
  6204. + delay = delay_fn ? delay_fn(&work->event, handler_data) : 0;
  6205. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6206. +
  6207. + // immediate execution for high priority events (e.g. keyboard)
  6208. + if (delay == SURFACE_SAM_SSH_EVENT_IMMEDIATE) {
  6209. + surface_sam_ssh_event_work_evt_handler(&work->work_evt.work);
  6210. + } else {
  6211. + INIT_DELAYED_WORK(&work->work_evt, surface_sam_ssh_event_work_evt_handler);
  6212. + queue_delayed_work(ec->events.queue_evt, &work->work_evt, delay);
  6213. + }
  6214. +}
  6215. +
  6216. +static int ssh_receive_msg_ctrl(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6217. +{
  6218. + struct device *dev = &ec->serdev->dev;
  6219. + struct ssh_receiver *rcv = &ec->receiver;
  6220. + const struct ssh_frame_ctrl *ctrl;
  6221. + struct ssh_fifo_packet packet;
  6222. +
  6223. + const u8 *ctrl_begin = buf + SSH_FRAME_OFFS_CTRL;
  6224. + const u8 *ctrl_end = buf + SSH_FRAME_OFFS_CTRL_CRC;
  6225. +
  6226. + ctrl = (const struct ssh_frame_ctrl *)(ctrl_begin);
  6227. +
  6228. + // actual length check
  6229. + if (size < SSH_MSG_LEN_CTRL)
  6230. + return 0; // need more bytes
  6231. +
  6232. + // validate TERM
  6233. + if (!ssh_is_valid_ter(buf + SSH_FRAME_OFFS_TERM)) {
  6234. + dev_err(dev, SSH_RECV_TAG "invalid end of message\n");
  6235. + return size; // discard everything
  6236. + }
  6237. +
  6238. + // validate CRC
  6239. + if (!ssh_is_valid_crc(ctrl_begin, ctrl_end)) {
  6240. + dev_err(dev, SSH_RECV_TAG "invalid checksum (ctrl)\n");
  6241. + return SSH_MSG_LEN_CTRL; // only discard message
  6242. + }
  6243. +
  6244. + // check if we expect the message
  6245. + if (rcv->state != SSH_RCV_CONTROL) {
  6246. + dev_err(dev, SSH_RECV_TAG "discarding message: ctrl not expected\n");
  6247. + return SSH_MSG_LEN_CTRL; // discard message
  6248. + }
  6249. +
  6250. + // check if it is for our request
  6251. + if (ctrl->type == SSH_FRAME_TYPE_ACK && ctrl->seq != rcv->expect.seq) {
  6252. + dev_err(dev, SSH_RECV_TAG "discarding message: ack does not match\n");
  6253. + return SSH_MSG_LEN_CTRL; // discard message
  6254. + }
  6255. +
  6256. + // we now have a valid & expected ACK/RETRY message
  6257. + dev_dbg(dev, SSH_RECV_TAG "valid control message received (type: 0x%02x)\n", ctrl->type);
  6258. +
  6259. + packet.type = ctrl->type;
  6260. + packet.seq = ctrl->seq;
  6261. + packet.len = 0;
  6262. +
  6263. + if (kfifo_avail(&rcv->fifo) >= sizeof(packet)) {
  6264. + kfifo_in(&rcv->fifo, (u8 *) &packet, sizeof(packet));
  6265. +
  6266. + } else {
  6267. + dev_warn(dev, SSH_RECV_TAG
  6268. + "dropping frame: not enough space in fifo (type = %d)\n",
  6269. + ctrl->type);
  6270. +
  6271. + return SSH_MSG_LEN_CTRL; // discard message
  6272. + }
  6273. +
  6274. + // update decoder state
  6275. + if (ctrl->type == SSH_FRAME_TYPE_ACK) {
  6276. + rcv->state = rcv->expect.pld
  6277. + ? SSH_RCV_COMMAND
  6278. + : SSH_RCV_DISCARD;
  6279. + }
  6280. +
  6281. + complete(&rcv->signal);
  6282. + return SSH_MSG_LEN_CTRL; // handled message
  6283. +}
  6284. +
  6285. +static int ssh_receive_msg_cmd(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6286. +{
  6287. + struct device *dev = &ec->serdev->dev;
  6288. + struct ssh_receiver *rcv = &ec->receiver;
  6289. + const struct ssh_frame_ctrl *ctrl;
  6290. + const struct ssh_frame_cmd *cmd;
  6291. + struct ssh_fifo_packet packet;
  6292. +
  6293. + const u8 *ctrl_begin = buf + SSH_FRAME_OFFS_CTRL;
  6294. + const u8 *ctrl_end = buf + SSH_FRAME_OFFS_CTRL_CRC;
  6295. + const u8 *cmd_begin = buf + SSH_FRAME_OFFS_CMD;
  6296. + const u8 *cmd_begin_pld = buf + SSH_FRAME_OFFS_CMD_PLD;
  6297. + const u8 *cmd_end;
  6298. +
  6299. + size_t msg_len;
  6300. +
  6301. + ctrl = (const struct ssh_frame_ctrl *)(ctrl_begin);
  6302. + cmd = (const struct ssh_frame_cmd *)(cmd_begin);
  6303. +
  6304. + // we need at least a full control frame
  6305. + if (size < (SSH_BYTELEN_SYNC + SSH_BYTELEN_CTRL + SSH_BYTELEN_CRC))
  6306. + return 0; // need more bytes
  6307. +
  6308. + // validate control-frame CRC
  6309. + if (!ssh_is_valid_crc(ctrl_begin, ctrl_end)) {
  6310. + dev_err(dev, SSH_RECV_TAG "invalid checksum (cmd-ctrl)\n");
  6311. + /*
  6312. + * We can't be sure here if length is valid, thus
  6313. + * discard everything.
  6314. + */
  6315. + return size;
  6316. + }
  6317. +
  6318. + // actual length check (ctrl->len contains command-frame but not crc)
  6319. + msg_len = SSH_MSG_LEN_CMD_BASE + ctrl->len;
  6320. + if (size < msg_len)
  6321. + return 0; // need more bytes
  6322. +
  6323. + cmd_end = cmd_begin + ctrl->len;
  6324. +
  6325. + // validate command-frame type
  6326. + if (cmd->type != SSH_FRAME_TYPE_CMD) {
  6327. + dev_err(dev, SSH_RECV_TAG "expected command frame type but got 0x%02x\n", cmd->type);
  6328. + return size; // discard everything
  6329. + }
  6330. +
  6331. + // validate command-frame CRC
  6332. + if (!ssh_is_valid_crc(cmd_begin, cmd_end)) {
  6333. + dev_err(dev, SSH_RECV_TAG "invalid checksum (cmd-pld)\n");
  6334. +
  6335. + /*
  6336. + * The message length is provided in the control frame. As we
  6337. + * already validated that, we can be sure here that it's
  6338. + * correct, so we only need to discard the message.
  6339. + */
  6340. + return msg_len;
  6341. + }
  6342. +
  6343. + // check if we received an event notification
  6344. + if (sam_rqid_is_event((cmd->rqid_hi << 8) | cmd->rqid_lo)) {
  6345. + ssh_handle_event(ec, buf);
  6346. + return msg_len; // handled message
  6347. + }
  6348. +
  6349. + // check if we expect the message
  6350. + if (rcv->state != SSH_RCV_COMMAND) {
  6351. + dev_dbg(dev, SSH_RECV_TAG "discarding message: command not expected\n");
  6352. + return msg_len; // discard message
  6353. + }
  6354. +
  6355. + // check if response is for our request
  6356. + if (rcv->expect.rqid != (cmd->rqid_lo | (cmd->rqid_hi << 8))) {
  6357. + dev_dbg(dev, SSH_RECV_TAG "discarding message: command not a match\n");
  6358. + return msg_len; // discard message
  6359. + }
  6360. +
  6361. + // we now have a valid & expected command message
  6362. + dev_dbg(dev, SSH_RECV_TAG "valid command message received\n");
  6363. +
  6364. + packet.type = ctrl->type;
  6365. + packet.seq = ctrl->seq;
  6366. + packet.len = cmd_end - cmd_begin_pld;
  6367. +
  6368. + if (kfifo_avail(&rcv->fifo) >= sizeof(packet) + packet.len) {
  6369. + kfifo_in(&rcv->fifo, &packet, sizeof(packet));
  6370. + kfifo_in(&rcv->fifo, cmd_begin_pld, packet.len);
  6371. +
  6372. + } else {
  6373. + dev_warn(dev, SSH_RECV_TAG
  6374. + "dropping frame: not enough space in fifo (type = %d)\n",
  6375. + ctrl->type);
  6376. +
  6377. + return SSH_MSG_LEN_CTRL; // discard message
  6378. + }
  6379. +
  6380. + rcv->state = SSH_RCV_DISCARD;
  6381. +
  6382. + complete(&rcv->signal);
  6383. + return msg_len; // handled message
  6384. +}
  6385. +
  6386. +static int ssh_eval_buf(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6387. +{
  6388. + struct device *dev = &ec->serdev->dev;
  6389. + struct ssh_frame_ctrl *ctrl;
  6390. +
  6391. + // we need at least a control frame to check what to do
  6392. + if (size < (SSH_BYTELEN_SYNC + SSH_BYTELEN_CTRL))
  6393. + return 0; // need more bytes
  6394. +
  6395. + // make sure we're actually at the start of a new message
  6396. + if (!ssh_is_valid_syn(buf)) {
  6397. + dev_err(dev, SSH_RECV_TAG "invalid start of message\n");
  6398. + return size; // discard everything
  6399. + }
  6400. +
  6401. + // handle individual message types separately
  6402. + ctrl = (struct ssh_frame_ctrl *)(buf + SSH_FRAME_OFFS_CTRL);
  6403. +
  6404. + switch (ctrl->type) {
  6405. + case SSH_FRAME_TYPE_ACK:
  6406. + case SSH_FRAME_TYPE_RETRY:
  6407. + return ssh_receive_msg_ctrl(ec, buf, size);
  6408. +
  6409. + case SSH_FRAME_TYPE_CMD:
  6410. + case SSH_FRAME_TYPE_CMD_NOACK:
  6411. + return ssh_receive_msg_cmd(ec, buf, size);
  6412. +
  6413. + default:
  6414. + dev_err(dev, SSH_RECV_TAG "unknown frame type 0x%02x\n", ctrl->type);
  6415. + return size; // discard everything
  6416. + }
  6417. +}
  6418. +
  6419. +static int ssh_receive_buf(struct serdev_device *serdev,
  6420. + const unsigned char *buf, size_t size)
  6421. +{
  6422. + struct sam_ssh_ec *ec = serdev_device_get_drvdata(serdev);
  6423. + struct ssh_receiver *rcv = &ec->receiver;
  6424. + unsigned long flags;
  6425. + int offs = 0;
  6426. + int used, n;
  6427. +
  6428. + dev_dbg(&serdev->dev, SSH_RECV_TAG "received buffer (size: %zu)\n", size);
  6429. + print_hex_dump_debug(SSH_RECV_TAG, DUMP_PREFIX_OFFSET, 16, 1, buf, size, false);
  6430. +
  6431. + /*
  6432. + * The battery _BIX message gets a bit long, thus we have to add some
  6433. + * additional buffering here.
  6434. + */
  6435. +
  6436. + spin_lock_irqsave(&rcv->lock, flags);
  6437. +
  6438. + // copy to eval-buffer
  6439. + used = min(size, (size_t)(rcv->eval_buf.cap - rcv->eval_buf.len));
  6440. + memcpy(rcv->eval_buf.ptr + rcv->eval_buf.len, buf, used);
  6441. + rcv->eval_buf.len += used;
  6442. +
  6443. + // evaluate buffer until we need more bytes or eval-buf is empty
  6444. + while (offs < rcv->eval_buf.len) {
  6445. + n = rcv->eval_buf.len - offs;
  6446. + n = ssh_eval_buf(ec, rcv->eval_buf.ptr + offs, n);
  6447. + if (n <= 0)
  6448. + break; // need more bytes
  6449. +
  6450. + offs += n;
  6451. + }
  6452. +
  6453. + // throw away the evaluated parts
  6454. + rcv->eval_buf.len -= offs;
  6455. + memmove(rcv->eval_buf.ptr, rcv->eval_buf.ptr + offs, rcv->eval_buf.len);
  6456. +
  6457. + spin_unlock_irqrestore(&rcv->lock, flags);
  6458. +
  6459. + return used;
  6460. +}
  6461. +
  6462. +
  6463. +#ifdef CONFIG_SURFACE_SAM_SSH_DEBUG_DEVICE
  6464. +
  6465. +#include <linux/sysfs.h>
  6466. +
  6467. +static char sam_ssh_debug_rqst_buf_sysfs[SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1] = { 0 };
  6468. +static char sam_ssh_debug_rqst_buf_pld[SURFACE_SAM_SSH_MAX_RQST_PAYLOAD] = { 0 };
  6469. +static char sam_ssh_debug_rqst_buf_res[SURFACE_SAM_SSH_MAX_RQST_RESPONSE] = { 0 };
  6470. +
  6471. +struct sysfs_rqst {
  6472. + u8 tc;
  6473. + u8 cid;
  6474. + u8 iid;
  6475. + u8 pri;
  6476. + u8 snc;
  6477. + u8 cdl;
  6478. + u8 pld[0];
  6479. +} __packed;
  6480. +
  6481. +static ssize_t rqst_read(struct file *f, struct kobject *kobj, struct bin_attribute *attr,
  6482. + char *buf, loff_t offs, size_t count)
  6483. +{
  6484. + if (offs < 0 || count + offs > SURFACE_SAM_SSH_MAX_RQST_RESPONSE)
  6485. + return -EINVAL;
  6486. +
  6487. + memcpy(buf, sam_ssh_debug_rqst_buf_sysfs + offs, count);
  6488. + return count;
  6489. +}
  6490. +
  6491. +static ssize_t rqst_write(struct file *f, struct kobject *kobj, struct bin_attribute *attr,
  6492. + char *buf, loff_t offs, size_t count)
  6493. +{
  6494. + struct sysfs_rqst *input;
  6495. + struct surface_sam_ssh_rqst rqst = {};
  6496. + struct surface_sam_ssh_buf result = {};
  6497. + int status;
  6498. +
  6499. + // check basic write constriants
  6500. + if (offs != 0 || count > SURFACE_SAM_SSH_MAX_RQST_PAYLOAD + sizeof(struct sysfs_rqst))
  6501. + return -EINVAL;
  6502. +
  6503. + if (count < sizeof(struct sysfs_rqst))
  6504. + return -EINVAL;
  6505. +
  6506. + input = (struct sysfs_rqst *)buf;
  6507. +
  6508. + // payload length should be consistent with data provided
  6509. + if (input->cdl + sizeof(struct sysfs_rqst) != count)
  6510. + return -EINVAL;
  6511. +
  6512. + rqst.tc = input->tc;
  6513. + rqst.cid = input->cid;
  6514. + rqst.iid = input->iid;
  6515. + rqst.pri = input->pri;
  6516. + rqst.snc = input->snc;
  6517. + rqst.cdl = input->cdl;
  6518. + rqst.pld = sam_ssh_debug_rqst_buf_pld;
  6519. + memcpy(sam_ssh_debug_rqst_buf_pld, &input->pld[0], input->cdl);
  6520. +
  6521. + result.cap = SURFACE_SAM_SSH_MAX_RQST_RESPONSE;
  6522. + result.len = 0;
  6523. + result.data = sam_ssh_debug_rqst_buf_res;
  6524. +
  6525. + status = surface_sam_ssh_rqst(&rqst, &result);
  6526. + if (status)
  6527. + return status;
  6528. +
  6529. + sam_ssh_debug_rqst_buf_sysfs[0] = result.len;
  6530. + memcpy(sam_ssh_debug_rqst_buf_sysfs + 1, result.data, result.len);
  6531. + memset(sam_ssh_debug_rqst_buf_sysfs + result.len + 1, 0,
  6532. + SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1 - result.len);
  6533. +
  6534. + return count;
  6535. +}
  6536. +
  6537. +static const BIN_ATTR_RW(rqst, SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1);
  6538. +
  6539. +
  6540. +static int surface_sam_ssh_sysfs_register(struct device *dev)
  6541. +{
  6542. + return sysfs_create_bin_file(&dev->kobj, &bin_attr_rqst);
  6543. +}
  6544. +
  6545. +static void surface_sam_ssh_sysfs_unregister(struct device *dev)
  6546. +{
  6547. + sysfs_remove_bin_file(&dev->kobj, &bin_attr_rqst);
  6548. +}
  6549. +
  6550. +#else /* CONFIG_SURFACE_ACPI_SSH_DEBUG_DEVICE */
  6551. +
  6552. +static int surface_sam_ssh_sysfs_register(struct device *dev)
  6553. +{
  6554. + return 0;
  6555. +}
  6556. +
  6557. +static void surface_sam_ssh_sysfs_unregister(struct device *dev)
  6558. +{
  6559. +}
  6560. +
  6561. +#endif /* CONFIG_SURFACE_SAM_SSH_DEBUG_DEVICE */
  6562. +
  6563. +
  6564. +static const struct acpi_gpio_params gpio_sam_wakeup_int = { 0, 0, false };
  6565. +static const struct acpi_gpio_params gpio_sam_wakeup = { 1, 0, false };
  6566. +
  6567. +static const struct acpi_gpio_mapping surface_sam_acpi_gpios[] = {
  6568. + { "sam_wakeup-int-gpio", &gpio_sam_wakeup_int, 1 },
  6569. + { "sam_wakeup-gpio", &gpio_sam_wakeup, 1 },
  6570. + { },
  6571. +};
  6572. +
  6573. +static irqreturn_t surface_sam_irq_handler(int irq, void *dev_id)
  6574. +{
  6575. + struct serdev_device *serdev = dev_id;
  6576. +
  6577. + dev_info(&serdev->dev, "wake irq triggered\n");
  6578. + return IRQ_HANDLED;
  6579. +}
  6580. +
  6581. +static int surface_sam_setup_irq(struct serdev_device *serdev)
  6582. +{
  6583. + const int irqf = IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_RISING;
  6584. + struct gpio_desc *gpiod;
  6585. + int irq;
  6586. + int status;
  6587. +
  6588. + gpiod = gpiod_get(&serdev->dev, "sam_wakeup-int", GPIOD_ASIS);
  6589. + if (IS_ERR(gpiod))
  6590. + return PTR_ERR(gpiod);
  6591. +
  6592. + irq = gpiod_to_irq(gpiod);
  6593. + gpiod_put(gpiod);
  6594. +
  6595. + if (irq < 0)
  6596. + return irq;
  6597. +
  6598. + status = request_threaded_irq(irq, NULL, surface_sam_irq_handler,
  6599. + irqf, "surface_sam_wakeup", serdev);
  6600. + if (status)
  6601. + return status;
  6602. +
  6603. + return irq;
  6604. +}
  6605. +
  6606. +
  6607. +static acpi_status
  6608. +ssh_setup_from_resource(struct acpi_resource *resource, void *context)
  6609. +{
  6610. + struct serdev_device *serdev = context;
  6611. + struct acpi_resource_common_serialbus *serial;
  6612. + struct acpi_resource_uart_serialbus *uart;
  6613. + int status = 0;
  6614. +
  6615. + if (resource->type != ACPI_RESOURCE_TYPE_SERIAL_BUS)
  6616. + return AE_OK;
  6617. +
  6618. + serial = &resource->data.common_serial_bus;
  6619. + if (serial->type != ACPI_RESOURCE_SERIAL_TYPE_UART)
  6620. + return AE_OK;
  6621. +
  6622. + uart = &resource->data.uart_serial_bus;
  6623. +
  6624. + // set up serdev device
  6625. + serdev_device_set_baudrate(serdev, uart->default_baud_rate);
  6626. +
  6627. + // serdev currently only supports RTSCTS flow control
  6628. + if (uart->flow_control & SSH_SUPPORTED_FLOW_CONTROL_MASK)
  6629. + dev_warn(&serdev->dev, "unsupported flow control (value: 0x%02x)\n", uart->flow_control);
  6630. +
  6631. + // set RTSCTS flow control
  6632. + serdev_device_set_flow_control(serdev, uart->flow_control & ACPI_UART_FLOW_CONTROL_HW);
  6633. +
  6634. + // serdev currently only supports EVEN/ODD parity
  6635. + switch (uart->parity) {
  6636. + case ACPI_UART_PARITY_NONE:
  6637. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE);
  6638. + break;
  6639. + case ACPI_UART_PARITY_EVEN:
  6640. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_EVEN);
  6641. + break;
  6642. + case ACPI_UART_PARITY_ODD:
  6643. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_ODD);
  6644. + break;
  6645. + default:
  6646. + dev_warn(&serdev->dev, "unsupported parity (value: 0x%02x)\n", uart->parity);
  6647. + break;
  6648. + }
  6649. +
  6650. + if (status) {
  6651. + dev_err(&serdev->dev, "failed to set parity (value: 0x%02x)\n", uart->parity);
  6652. + return status;
  6653. + }
  6654. +
  6655. + return AE_CTRL_TERMINATE; // we've found the resource and are done
  6656. +}
  6657. +
  6658. +
  6659. +static int surface_sam_ssh_suspend(struct device *dev)
  6660. +{
  6661. + struct sam_ssh_ec *ec;
  6662. + int status;
  6663. +
  6664. + dev_dbg(dev, "suspending\n");
  6665. +
  6666. + ec = surface_sam_ssh_acquire_init();
  6667. + if (ec) {
  6668. + status = surface_sam_ssh_ec_suspend(ec);
  6669. + if (status) {
  6670. + surface_sam_ssh_release(ec);
  6671. + return status;
  6672. + }
  6673. +
  6674. + if (device_may_wakeup(dev)) {
  6675. + status = enable_irq_wake(ec->irq);
  6676. + if (status) {
  6677. + surface_sam_ssh_release(ec);
  6678. + return status;
  6679. + }
  6680. +
  6681. + ec->irq_wakeup_enabled = true;
  6682. + } else {
  6683. + ec->irq_wakeup_enabled = false;
  6684. + }
  6685. +
  6686. + ec->state = SSH_EC_SUSPENDED;
  6687. + surface_sam_ssh_release(ec);
  6688. + }
  6689. +
  6690. + return 0;
  6691. +}
  6692. +
  6693. +static int surface_sam_ssh_resume(struct device *dev)
  6694. +{
  6695. + struct sam_ssh_ec *ec;
  6696. + int status;
  6697. +
  6698. + dev_dbg(dev, "resuming\n");
  6699. +
  6700. + ec = surface_sam_ssh_acquire_init();
  6701. + if (ec) {
  6702. + ec->state = SSH_EC_INITIALIZED;
  6703. +
  6704. + if (ec->irq_wakeup_enabled) {
  6705. + status = disable_irq_wake(ec->irq);
  6706. + if (status) {
  6707. + surface_sam_ssh_release(ec);
  6708. + return status;
  6709. + }
  6710. +
  6711. + ec->irq_wakeup_enabled = false;
  6712. + }
  6713. +
  6714. + status = surface_sam_ssh_ec_resume(ec);
  6715. + if (status) {
  6716. + surface_sam_ssh_release(ec);
  6717. + return status;
  6718. + }
  6719. +
  6720. + surface_sam_ssh_release(ec);
  6721. + }
  6722. +
  6723. + return 0;
  6724. +}
  6725. +
  6726. +static SIMPLE_DEV_PM_OPS(surface_sam_ssh_pm_ops, surface_sam_ssh_suspend, surface_sam_ssh_resume);
  6727. +
  6728. +
  6729. +static const struct serdev_device_ops ssh_device_ops = {
  6730. + .receive_buf = ssh_receive_buf,
  6731. + .write_wakeup = serdev_device_write_wakeup,
  6732. +};
  6733. +
  6734. +
  6735. +static int surface_sam_ssh_sysfs_register(struct device *dev);
  6736. +static void surface_sam_ssh_sysfs_unregister(struct device *dev);
  6737. +
  6738. +static int surface_sam_ssh_probe(struct serdev_device *serdev)
  6739. +{
  6740. + struct sam_ssh_ec *ec;
  6741. + struct workqueue_struct *event_queue_ack;
  6742. + struct workqueue_struct *event_queue_evt;
  6743. + u8 *write_buf;
  6744. + u8 *read_buf;
  6745. + u8 *eval_buf;
  6746. + acpi_handle *ssh = ACPI_HANDLE(&serdev->dev);
  6747. + acpi_status status;
  6748. + int irq;
  6749. +
  6750. + dev_dbg(&serdev->dev, "probing\n");
  6751. +
  6752. + if (gpiod_count(&serdev->dev, NULL) < 0)
  6753. + return -ENODEV;
  6754. +
  6755. + status = devm_acpi_dev_add_driver_gpios(&serdev->dev, surface_sam_acpi_gpios);
  6756. + if (status)
  6757. + return status;
  6758. +
  6759. + // allocate buffers
  6760. + write_buf = kzalloc(SSH_WRITE_BUF_LEN, GFP_KERNEL);
  6761. + if (!write_buf) {
  6762. + status = -ENOMEM;
  6763. + goto err_write_buf;
  6764. + }
  6765. +
  6766. + read_buf = kzalloc(SSH_READ_BUF_LEN, GFP_KERNEL);
  6767. + if (!read_buf) {
  6768. + status = -ENOMEM;
  6769. + goto err_read_buf;
  6770. + }
  6771. +
  6772. + eval_buf = kzalloc(SSH_EVAL_BUF_LEN, GFP_KERNEL);
  6773. + if (!eval_buf) {
  6774. + status = -ENOMEM;
  6775. + goto err_eval_buf;
  6776. + }
  6777. +
  6778. + event_queue_ack = create_singlethread_workqueue("surface_sh_ackq");
  6779. + if (!event_queue_ack) {
  6780. + status = -ENOMEM;
  6781. + goto err_ackq;
  6782. + }
  6783. +
  6784. + event_queue_evt = create_workqueue("surface_sh_evtq");
  6785. + if (!event_queue_evt) {
  6786. + status = -ENOMEM;
  6787. + goto err_evtq;
  6788. + }
  6789. +
  6790. + irq = surface_sam_setup_irq(serdev);
  6791. + if (irq < 0) {
  6792. + status = irq;
  6793. + goto err_irq;
  6794. + }
  6795. +
  6796. + // set up EC
  6797. + ec = surface_sam_ssh_acquire();
  6798. + if (ec->state != SSH_EC_UNINITIALIZED) {
  6799. + dev_err(&serdev->dev, "embedded controller already initialized\n");
  6800. + surface_sam_ssh_release(ec);
  6801. +
  6802. + status = -EBUSY;
  6803. + goto err_busy;
  6804. + }
  6805. +
  6806. + ec->serdev = serdev;
  6807. + ec->irq = irq;
  6808. + ec->writer.data = write_buf;
  6809. + ec->writer.ptr = write_buf;
  6810. +
  6811. + // initialize receiver
  6812. + init_completion(&ec->receiver.signal);
  6813. + kfifo_init(&ec->receiver.fifo, read_buf, SSH_READ_BUF_LEN);
  6814. + ec->receiver.eval_buf.ptr = eval_buf;
  6815. + ec->receiver.eval_buf.cap = SSH_EVAL_BUF_LEN;
  6816. + ec->receiver.eval_buf.len = 0;
  6817. +
  6818. + // initialize event handling
  6819. + ec->events.queue_ack = event_queue_ack;
  6820. + ec->events.queue_evt = event_queue_evt;
  6821. +
  6822. + ec->state = SSH_EC_INITIALIZED;
  6823. +
  6824. + serdev_device_set_drvdata(serdev, ec);
  6825. +
  6826. + /* ensure everything is properly set-up before we open the device */
  6827. + smp_mb();
  6828. +
  6829. + serdev_device_set_client_ops(serdev, &ssh_device_ops);
  6830. + status = serdev_device_open(serdev);
  6831. + if (status)
  6832. + goto err_open;
  6833. +
  6834. + status = acpi_walk_resources(ssh, METHOD_NAME__CRS,
  6835. + ssh_setup_from_resource, serdev);
  6836. + if (ACPI_FAILURE(status))
  6837. + goto err_devinit;
  6838. +
  6839. + status = surface_sam_ssh_ec_resume(ec);
  6840. + if (status)
  6841. + goto err_devinit;
  6842. +
  6843. + status = surface_sam_ssh_sysfs_register(&serdev->dev);
  6844. + if (status)
  6845. + goto err_devinit;
  6846. +
  6847. + surface_sam_ssh_release(ec);
  6848. +
  6849. + // TODO: The EC can wake up the system via the associated GPIO interrupt in
  6850. + // multiple situations. One of which is the remaining battery capacity
  6851. + // falling below a certain threshold. Normally, we should use the
  6852. + // device_init_wakeup function, however, the EC also seems to have other
  6853. + // reasons for waking up the system and it seems that Windows has
  6854. + // additional checks whether the system should be resumed. In short, this
  6855. + // causes some spourious unwanted wake-ups. For now let's thus default
  6856. + // power/wakeup to false.
  6857. + device_set_wakeup_capable(&serdev->dev, true);
  6858. + acpi_walk_dep_device_list(ssh);
  6859. +
  6860. + return 0;
  6861. +
  6862. +err_devinit:
  6863. + serdev_device_close(serdev);
  6864. +err_open:
  6865. + ec->state = SSH_EC_UNINITIALIZED;
  6866. + serdev_device_set_drvdata(serdev, NULL);
  6867. + surface_sam_ssh_release(ec);
  6868. +err_busy:
  6869. + free_irq(irq, serdev);
  6870. +err_irq:
  6871. + destroy_workqueue(event_queue_evt);
  6872. +err_evtq:
  6873. + destroy_workqueue(event_queue_ack);
  6874. +err_ackq:
  6875. + kfree(eval_buf);
  6876. +err_eval_buf:
  6877. + kfree(read_buf);
  6878. +err_read_buf:
  6879. + kfree(write_buf);
  6880. +err_write_buf:
  6881. + return status;
  6882. +}
  6883. +
  6884. +static void surface_sam_ssh_remove(struct serdev_device *serdev)
  6885. +{
  6886. + struct sam_ssh_ec *ec;
  6887. + unsigned long flags;
  6888. + int status;
  6889. +
  6890. + ec = surface_sam_ssh_acquire_init();
  6891. + if (!ec)
  6892. + return;
  6893. +
  6894. + free_irq(ec->irq, serdev);
  6895. + surface_sam_ssh_sysfs_unregister(&serdev->dev);
  6896. +
  6897. + // suspend EC and disable events
  6898. + status = surface_sam_ssh_ec_suspend(ec);
  6899. + if (status)
  6900. + dev_err(&serdev->dev, "failed to suspend EC: %d\n", status);
  6901. +
  6902. + // make sure all events (received up to now) have been properly handled
  6903. + flush_workqueue(ec->events.queue_ack);
  6904. + flush_workqueue(ec->events.queue_evt);
  6905. +
  6906. + // remove event handlers
  6907. + spin_lock_irqsave(&ec->events.lock, flags);
  6908. + memset(ec->events.handler, 0,
  6909. + sizeof(struct ssh_event_handler)
  6910. + * SAM_NUM_EVENT_TYPES);
  6911. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6912. +
  6913. + // set device to deinitialized state
  6914. + ec->state = SSH_EC_UNINITIALIZED;
  6915. + ec->serdev = NULL;
  6916. +
  6917. + /* ensure state and serdev get set before continuing */
  6918. + smp_mb();
  6919. +
  6920. + /*
  6921. + * Flush any event that has not been processed yet to ensure we're not going to
  6922. + * use the serial device any more (e.g. for ACKing).
  6923. + */
  6924. + flush_workqueue(ec->events.queue_ack);
  6925. + flush_workqueue(ec->events.queue_evt);
  6926. +
  6927. + serdev_device_close(serdev);
  6928. +
  6929. + /*
  6930. + * Only at this point, no new events can be received. Destroying the
  6931. + * workqueue here flushes all remaining events. Those events will be
  6932. + * silently ignored and neither ACKed nor any handler gets called.
  6933. + */
  6934. + destroy_workqueue(ec->events.queue_ack);
  6935. + destroy_workqueue(ec->events.queue_evt);
  6936. +
  6937. + // free writer
  6938. + kfree(ec->writer.data);
  6939. + ec->writer.data = NULL;
  6940. + ec->writer.ptr = NULL;
  6941. +
  6942. + // free receiver
  6943. + spin_lock_irqsave(&ec->receiver.lock, flags);
  6944. + ec->receiver.state = SSH_RCV_DISCARD;
  6945. + kfifo_free(&ec->receiver.fifo);
  6946. +
  6947. + kfree(ec->receiver.eval_buf.ptr);
  6948. + ec->receiver.eval_buf.ptr = NULL;
  6949. + ec->receiver.eval_buf.cap = 0;
  6950. + ec->receiver.eval_buf.len = 0;
  6951. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  6952. +
  6953. + device_set_wakeup_capable(&serdev->dev, false);
  6954. + serdev_device_set_drvdata(serdev, NULL);
  6955. + surface_sam_ssh_release(ec);
  6956. +}
  6957. +
  6958. +
  6959. +static const struct acpi_device_id surface_sam_ssh_match[] = {
  6960. + { "MSHW0084", 0 },
  6961. + { },
  6962. +};
  6963. +MODULE_DEVICE_TABLE(acpi, surface_sam_ssh_match);
  6964. +
  6965. +static struct serdev_device_driver surface_sam_ssh = {
  6966. + .probe = surface_sam_ssh_probe,
  6967. + .remove = surface_sam_ssh_remove,
  6968. + .driver = {
  6969. + .name = "surface_sam_ssh",
  6970. + .acpi_match_table = ACPI_PTR(surface_sam_ssh_match),
  6971. + .pm = &surface_sam_ssh_pm_ops,
  6972. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  6973. + },
  6974. +};
  6975. +
  6976. +
  6977. +static int __init surface_sam_ssh_init(void)
  6978. +{
  6979. + return serdev_device_driver_register(&surface_sam_ssh);
  6980. +}
  6981. +
  6982. +static void __exit surface_sam_ssh_exit(void)
  6983. +{
  6984. + serdev_device_driver_unregister(&surface_sam_ssh);
  6985. +}
  6986. +
  6987. +/*
  6988. + * Ensure that the driver is loaded late due to some issues with the UART
  6989. + * communication. Specifically, we want to ensure that DMA is ready and being
  6990. + * used. Not using DMA can result in spurious communication failures,
  6991. + * especially during boot, which among other things will result in wrong
  6992. + * battery information (via ACPI _BIX) being displayed. Using a late init_call
  6993. + * instead of the normal module_init gives the DMA subsystem time to
  6994. + * initialize and via that results in a more stable communication, avoiding
  6995. + * such failures.
  6996. + */
  6997. +late_initcall(surface_sam_ssh_init);
  6998. +module_exit(surface_sam_ssh_exit);
  6999. +
  7000. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  7001. +MODULE_DESCRIPTION("Surface Serial Hub Driver for 5th Generation Surface Devices");
  7002. +MODULE_LICENSE("GPL v2");
  7003. diff --git a/drivers/platform/x86/surface_sam/surface_sam_ssh.h b/drivers/platform/x86/surface_sam/surface_sam_ssh.h
  7004. new file mode 100644
  7005. index 000000000000..435b5c7bac9a
  7006. --- /dev/null
  7007. +++ b/drivers/platform/x86/surface_sam/surface_sam_ssh.h
  7008. @@ -0,0 +1,98 @@
  7009. +/* SPDX-License-Identifier: GPL-2.0 */
  7010. +/*
  7011. + * Interface for Surface Serial Hub (SSH).
  7012. + *
  7013. + * The SSH is the main communication hub for communication between host and
  7014. + * the Surface/System Aggregator Module (SAM) on newer Microsoft Surface
  7015. + * devices (Book 2, Pro 5, Laptops, ...). Also referred to as SAM-over-SSH.
  7016. + * Older devices (Book 1, Pro 4) use SAM-over-I2C.
  7017. + */
  7018. +
  7019. +#ifndef _SURFACE_SAM_SSH_H
  7020. +#define _SURFACE_SAM_SSH_H
  7021. +
  7022. +#include <linux/types.h>
  7023. +#include <linux/device.h>
  7024. +
  7025. +
  7026. +/*
  7027. + * Maximum request payload size in bytes.
  7028. + * Value based on ACPI (255 bytes minus header/status bytes).
  7029. + */
  7030. +#define SURFACE_SAM_SSH_MAX_RQST_PAYLOAD (255 - 10)
  7031. +
  7032. +/*
  7033. + * Maximum response payload size in bytes.
  7034. + * Value based on ACPI (255 bytes minus header/status bytes).
  7035. + */
  7036. +#define SURFACE_SAM_SSH_MAX_RQST_RESPONSE (255 - 4)
  7037. +
  7038. +/*
  7039. + * The number of (lower) bits of the request ID (RQID) reserved for events.
  7040. + * These bits may only be used exclusively for events sent from the EC to the
  7041. + * host.
  7042. + */
  7043. +#define SURFACE_SAM_SSH_RQID_EVENT_BITS 5
  7044. +
  7045. +/*
  7046. + * Special event-handler delay value indicating that the corresponding event
  7047. + * should be handled immediately in the interrupt and not be relayed through
  7048. + * the workqueue. Intended for low-latency events, such as keyboard events.
  7049. + */
  7050. +#define SURFACE_SAM_SSH_EVENT_IMMEDIATE ((unsigned long) -1)
  7051. +
  7052. +
  7053. +#define SURFACE_SAM_PRIORITY_NORMAL 1
  7054. +#define SURFACE_SAM_PRIORITY_HIGH 2
  7055. +
  7056. +
  7057. +struct surface_sam_ssh_buf {
  7058. + u8 cap;
  7059. + u8 len;
  7060. + u8 *data;
  7061. +};
  7062. +
  7063. +struct surface_sam_ssh_rqst {
  7064. + u8 tc; // target category
  7065. + u8 cid; // command ID
  7066. + u8 iid; // instance ID
  7067. + u8 pri; // priority
  7068. + u8 snc; // expect response flag
  7069. + u8 cdl; // command data length (length of payload)
  7070. + u8 *pld; // pointer to payload of length cdl
  7071. +};
  7072. +
  7073. +struct surface_sam_ssh_event {
  7074. + u16 rqid; // event type/source ID
  7075. + u8 tc; // target category
  7076. + u8 cid; // command ID
  7077. + u8 iid; // instance ID
  7078. + u8 pri; // priority
  7079. + u8 len; // length of payload
  7080. + u8 *pld; // payload of length len
  7081. +};
  7082. +
  7083. +
  7084. +typedef int (*surface_sam_ssh_event_handler_fn)(struct surface_sam_ssh_event *event, void *data);
  7085. +typedef unsigned long (*surface_sam_ssh_event_handler_delay)(struct surface_sam_ssh_event *event, void *data);
  7086. +
  7087. +int surface_sam_ssh_consumer_register(struct device *consumer);
  7088. +
  7089. +int surface_sam_ssh_rqst(const struct surface_sam_ssh_rqst *rqst, struct surface_sam_ssh_buf *result);
  7090. +
  7091. +int surface_sam_ssh_enable_event_source(u8 tc, u8 unknown, u16 rqid);
  7092. +int surface_sam_ssh_disable_event_source(u8 tc, u8 unknown, u16 rqid);
  7093. +int surface_sam_ssh_remove_event_handler(u16 rqid);
  7094. +
  7095. +int surface_sam_ssh_set_delayed_event_handler(u16 rqid,
  7096. + surface_sam_ssh_event_handler_fn fn,
  7097. + surface_sam_ssh_event_handler_delay delay,
  7098. + void *data);
  7099. +
  7100. +static inline int surface_sam_ssh_set_event_handler(u16 rqid, surface_sam_ssh_event_handler_fn fn, void *data)
  7101. +{
  7102. + return surface_sam_ssh_set_delayed_event_handler(rqid, fn, NULL, data);
  7103. +}
  7104. +
  7105. +
  7106. +#endif /* _SURFACE_SAM_SSH_H */
  7107. diff --git a/drivers/platform/x86/surface_sam/surface_sam_vhf.c b/drivers/platform/x86/surface_sam/surface_sam_vhf.c
  7108. new file mode 100644
  7109. index 000000000000..a00763805eca
  7110. --- /dev/null
  7111. +++ b/drivers/platform/x86/surface_sam/surface_sam_vhf.c
  7112. @@ -0,0 +1,270 @@
  7113. +// SPDX-License-Identifier: GPL-2.0
  7114. +/*
  7115. + * Virtual HID Framework (VHF) driver for input events via SAM.
  7116. + * Used for keyboard input events on the Surface Laptops.
  7117. + */
  7118. +
  7119. +#include <linux/acpi.h>
  7120. +#include <linux/hid.h>
  7121. +#include <linux/input.h>
  7122. +#include <linux/platform_device.h>
  7123. +#include <linux/types.h>
  7124. +
  7125. +#include "surface_sam_ssh.h"
  7126. +
  7127. +
  7128. +#define USB_VENDOR_ID_MICROSOFT 0x045e
  7129. +#define USB_DEVICE_ID_MS_VHF 0xf001
  7130. +
  7131. +#define VHF_INPUT_NAME "Microsoft Virtual HID Framework Device"
  7132. +
  7133. +/*
  7134. + * Request ID for VHF events. This value is based on the output of the Surface
  7135. + * EC and should not be changed.
  7136. + */
  7137. +#define SAM_EVENT_VHF_RQID 0x0001
  7138. +#define SAM_EVENT_VHF_TC 0x08
  7139. +
  7140. +
  7141. +struct vhf_evtctx {
  7142. + struct device *dev;
  7143. + struct hid_device *hid;
  7144. +};
  7145. +
  7146. +struct vhf_drvdata {
  7147. + struct vhf_evtctx event_ctx;
  7148. +};
  7149. +
  7150. +
  7151. +/*
  7152. + * These report descriptors have been extracted from a Surface Book 2.
  7153. + * They seems to be similar enough to be usable on the Surface Laptop.
  7154. + */
  7155. +static const u8 vhf_hid_desc[] = {
  7156. + // keyboard descriptor (event command ID 0x03)
  7157. + 0x05, 0x01, /* Usage Page (Desktop), */
  7158. + 0x09, 0x06, /* Usage (Keyboard), */
  7159. + 0xA1, 0x01, /* Collection (Application), */
  7160. + 0x85, 0x01, /* Report ID (1), */
  7161. + 0x15, 0x00, /* Logical Minimum (0), */
  7162. + 0x25, 0x01, /* Logical Maximum (1), */
  7163. + 0x75, 0x01, /* Report Size (1), */
  7164. + 0x95, 0x08, /* Report Count (8), */
  7165. + 0x05, 0x07, /* Usage Page (Keyboard), */
  7166. + 0x19, 0xE0, /* Usage Minimum (KB Leftcontrol), */
  7167. + 0x29, 0xE7, /* Usage Maximum (KB Right GUI), */
  7168. + 0x81, 0x02, /* Input (Variable), */
  7169. + 0x75, 0x08, /* Report Size (8), */
  7170. + 0x95, 0x0A, /* Report Count (10), */
  7171. + 0x19, 0x00, /* Usage Minimum (None), */
  7172. + 0x29, 0x91, /* Usage Maximum (KB LANG2), */
  7173. + 0x26, 0xFF, 0x00, /* Logical Maximum (255), */
  7174. + 0x81, 0x00, /* Input, */
  7175. + 0x05, 0x0C, /* Usage Page (Consumer), */
  7176. + 0x0A, 0xC0, 0x02, /* Usage (02C0h), */
  7177. + 0xA1, 0x02, /* Collection (Logical), */
  7178. + 0x1A, 0xC1, 0x02, /* Usage Minimum (02C1h), */
  7179. + 0x2A, 0xC6, 0x02, /* Usage Maximum (02C6h), */
  7180. + 0x95, 0x06, /* Report Count (6), */
  7181. + 0xB1, 0x03, /* Feature (Constant, Variable), */
  7182. + 0xC0, /* End Collection, */
  7183. + 0x05, 0x08, /* Usage Page (LED), */
  7184. + 0x19, 0x01, /* Usage Minimum (01h), */
  7185. + 0x29, 0x03, /* Usage Maximum (03h), */
  7186. + 0x75, 0x01, /* Report Size (1), */
  7187. + 0x95, 0x03, /* Report Count (3), */
  7188. + 0x25, 0x01, /* Logical Maximum (1), */
  7189. + 0x91, 0x02, /* Output (Variable), */
  7190. + 0x95, 0x05, /* Report Count (5), */
  7191. + 0x91, 0x01, /* Output (Constant), */
  7192. + 0xC0, /* End Collection, */
  7193. +
  7194. + // media key descriptor (event command ID 0x04)
  7195. + 0x05, 0x0C, /* Usage Page (Consumer), */
  7196. + 0x09, 0x01, /* Usage (Consumer Control), */
  7197. + 0xA1, 0x01, /* Collection (Application), */
  7198. + 0x85, 0x03, /* Report ID (3), */
  7199. + 0x75, 0x10, /* Report Size (16), */
  7200. + 0x15, 0x00, /* Logical Minimum (0), */
  7201. + 0x26, 0xFF, 0x03, /* Logical Maximum (1023), */
  7202. + 0x19, 0x00, /* Usage Minimum (00h), */
  7203. + 0x2A, 0xFF, 0x03, /* Usage Maximum (03FFh), */
  7204. + 0x81, 0x00, /* Input, */
  7205. + 0xC0, /* End Collection, */
  7206. +};
  7207. +
  7208. +
  7209. +static int vhf_hid_start(struct hid_device *hid)
  7210. +{
  7211. + hid_dbg(hid, "%s\n", __func__);
  7212. + return 0;
  7213. +}
  7214. +
  7215. +static void vhf_hid_stop(struct hid_device *hid)
  7216. +{
  7217. + hid_dbg(hid, "%s\n", __func__);
  7218. +}
  7219. +
  7220. +static int vhf_hid_open(struct hid_device *hid)
  7221. +{
  7222. + hid_dbg(hid, "%s\n", __func__);
  7223. + return 0;
  7224. +}
  7225. +
  7226. +static void vhf_hid_close(struct hid_device *hid)
  7227. +{
  7228. + hid_dbg(hid, "%s\n", __func__);
  7229. +}
  7230. +
  7231. +static int vhf_hid_parse(struct hid_device *hid)
  7232. +{
  7233. + return hid_parse_report(hid, (u8 *)vhf_hid_desc, ARRAY_SIZE(vhf_hid_desc));
  7234. +}
  7235. +
  7236. +static int vhf_hid_raw_request(struct hid_device *hid, unsigned char reportnum,
  7237. + u8 *buf, size_t len, unsigned char rtype,
  7238. + int reqtype)
  7239. +{
  7240. + hid_dbg(hid, "%s\n", __func__);
  7241. + return 0;
  7242. +}
  7243. +
  7244. +static int vhf_hid_output_report(struct hid_device *hid, u8 *buf, size_t len)
  7245. +{
  7246. + hid_dbg(hid, "%s\n", __func__);
  7247. + print_hex_dump_debug("report:", DUMP_PREFIX_OFFSET, 16, 1, buf, len, false);
  7248. +
  7249. + return len;
  7250. +}
  7251. +
  7252. +static struct hid_ll_driver vhf_hid_ll_driver = {
  7253. + .start = vhf_hid_start,
  7254. + .stop = vhf_hid_stop,
  7255. + .open = vhf_hid_open,
  7256. + .close = vhf_hid_close,
  7257. + .parse = vhf_hid_parse,
  7258. + .raw_request = vhf_hid_raw_request,
  7259. + .output_report = vhf_hid_output_report,
  7260. +};
  7261. +
  7262. +
  7263. +static struct hid_device *vhf_create_hid_device(struct platform_device *pdev)
  7264. +{
  7265. + struct hid_device *hid;
  7266. +
  7267. + hid = hid_allocate_device();
  7268. + if (IS_ERR(hid))
  7269. + return hid;
  7270. +
  7271. + hid->dev.parent = &pdev->dev;
  7272. +
  7273. + hid->bus = BUS_VIRTUAL;
  7274. + hid->vendor = USB_VENDOR_ID_MICROSOFT;
  7275. + hid->product = USB_DEVICE_ID_MS_VHF;
  7276. +
  7277. + hid->ll_driver = &vhf_hid_ll_driver;
  7278. +
  7279. + sprintf(hid->name, "%s", VHF_INPUT_NAME);
  7280. +
  7281. + return hid;
  7282. +}
  7283. +
  7284. +static int vhf_event_handler(struct surface_sam_ssh_event *event, void *data)
  7285. +{
  7286. + struct vhf_evtctx *ctx = (struct vhf_evtctx *)data;
  7287. +
  7288. + if (event->tc == 0x08 && (event->cid == 0x03 || event->cid == 0x04))
  7289. + return hid_input_report(ctx->hid, HID_INPUT_REPORT, event->pld, event->len, 1);
  7290. +
  7291. + dev_warn(ctx->dev, "unsupported event (tc = %d, cid = %d)\n", event->tc, event->cid);
  7292. + return 0;
  7293. +}
  7294. +
  7295. +static int surface_sam_vhf_probe(struct platform_device *pdev)
  7296. +{
  7297. + struct vhf_drvdata *drvdata;
  7298. + struct hid_device *hid;
  7299. + int status;
  7300. +
  7301. + // add device link to EC
  7302. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  7303. + if (status)
  7304. + return status == -ENXIO ? -EPROBE_DEFER : status;
  7305. +
  7306. + drvdata = kzalloc(sizeof(struct vhf_drvdata), GFP_KERNEL);
  7307. + if (!drvdata)
  7308. + return -ENOMEM;
  7309. +
  7310. + hid = vhf_create_hid_device(pdev);
  7311. + if (IS_ERR(hid)) {
  7312. + status = PTR_ERR(hid);
  7313. + goto err_probe_hid;
  7314. + }
  7315. +
  7316. + status = hid_add_device(hid);
  7317. + if (status)
  7318. + goto err_add_hid;
  7319. +
  7320. + drvdata->event_ctx.dev = &pdev->dev;
  7321. + drvdata->event_ctx.hid = hid;
  7322. +
  7323. + platform_set_drvdata(pdev, drvdata);
  7324. +
  7325. + status = surface_sam_ssh_set_event_handler(
  7326. + SAM_EVENT_VHF_RQID,
  7327. + vhf_event_handler,
  7328. + &drvdata->event_ctx);
  7329. + if (status)
  7330. + goto err_add_hid;
  7331. +
  7332. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_VHF_TC, 0x01, SAM_EVENT_VHF_RQID);
  7333. + if (status)
  7334. + goto err_event_source;
  7335. +
  7336. + return 0;
  7337. +
  7338. +err_event_source:
  7339. + surface_sam_ssh_remove_event_handler(SAM_EVENT_VHF_RQID);
  7340. +err_add_hid:
  7341. + hid_destroy_device(hid);
  7342. + platform_set_drvdata(pdev, NULL);
  7343. +err_probe_hid:
  7344. + kfree(drvdata);
  7345. + return status;
  7346. +}
  7347. +
  7348. +static int surface_sam_vhf_remove(struct platform_device *pdev)
  7349. +{
  7350. + struct vhf_drvdata *drvdata = platform_get_drvdata(pdev);
  7351. +
  7352. + surface_sam_ssh_disable_event_source(SAM_EVENT_VHF_TC, 0x01, SAM_EVENT_VHF_RQID);
  7353. + surface_sam_ssh_remove_event_handler(SAM_EVENT_VHF_RQID);
  7354. +
  7355. + hid_destroy_device(drvdata->event_ctx.hid);
  7356. + kfree(drvdata);
  7357. +
  7358. + platform_set_drvdata(pdev, NULL);
  7359. + return 0;
  7360. +}
  7361. +
  7362. +
  7363. +static const struct acpi_device_id surface_sam_vhf_match[] = {
  7364. + { "MSHW0096" },
  7365. + { },
  7366. +};
  7367. +MODULE_DEVICE_TABLE(acpi, surface_sam_vhf_match);
  7368. +
  7369. +static struct platform_driver surface_sam_vhf = {
  7370. + .probe = surface_sam_vhf_probe,
  7371. + .remove = surface_sam_vhf_remove,
  7372. + .driver = {
  7373. + .name = "surface_sam_vhf",
  7374. + .acpi_match_table = ACPI_PTR(surface_sam_vhf_match),
  7375. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  7376. + },
  7377. +};
  7378. +module_platform_driver(surface_sam_vhf);
  7379. +
  7380. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  7381. +MODULE_DESCRIPTION("Virtual HID Framework Driver for 5th Generation Surface Devices");
  7382. +MODULE_LICENSE("GPL v2");
  7383. diff --git a/drivers/tty/serdev/core.c b/drivers/tty/serdev/core.c
  7384. index c66a04d24f1d..6b48fdfb2005 100644
  7385. --- a/drivers/tty/serdev/core.c
  7386. +++ b/drivers/tty/serdev/core.c
  7387. @@ -496,16 +496,97 @@ static int of_serdev_register_devices(struct serdev_controller *ctrl)
  7388. }
  7389. #ifdef CONFIG_ACPI
  7390. +
  7391. +#define SERDEV_ACPI_MAX_SCAN_DEPTH 32
  7392. +
  7393. +struct acpi_serdev_lookup {
  7394. + acpi_handle device_handle;
  7395. + acpi_handle controller_handle;
  7396. + int n;
  7397. + int index;
  7398. +};
  7399. +
  7400. +static int acpi_serdev_parse_resource(struct acpi_resource *ares, void *data)
  7401. +{
  7402. + struct acpi_serdev_lookup *lookup = data;
  7403. + struct acpi_resource_uart_serialbus *sb;
  7404. + acpi_status status;
  7405. +
  7406. + if (ares->type != ACPI_RESOURCE_TYPE_SERIAL_BUS)
  7407. + return 1;
  7408. +
  7409. + if (ares->data.common_serial_bus.type != ACPI_RESOURCE_SERIAL_TYPE_UART)
  7410. + return 1;
  7411. +
  7412. + if (lookup->index != -1 && lookup->n++ != lookup->index)
  7413. + return 1;
  7414. +
  7415. + sb = &ares->data.uart_serial_bus;
  7416. +
  7417. + status = acpi_get_handle(lookup->device_handle,
  7418. + sb->resource_source.string_ptr,
  7419. + &lookup->controller_handle);
  7420. + if (ACPI_FAILURE(status))
  7421. + return 1;
  7422. +
  7423. + /*
  7424. + * NOTE: Ideally, we would also want to retreive other properties here,
  7425. + * once setting them before opening the device is supported by serdev.
  7426. + */
  7427. +
  7428. + return 1;
  7429. +}
  7430. +
  7431. +static int acpi_serdev_do_lookup(struct acpi_device *adev,
  7432. + struct acpi_serdev_lookup *lookup)
  7433. +{
  7434. + struct list_head resource_list;
  7435. + int ret;
  7436. +
  7437. + lookup->device_handle = acpi_device_handle(adev);
  7438. + lookup->controller_handle = NULL;
  7439. + lookup->n = 0;
  7440. +
  7441. + INIT_LIST_HEAD(&resource_list);
  7442. + ret = acpi_dev_get_resources(adev, &resource_list,
  7443. + acpi_serdev_parse_resource, lookup);
  7444. + acpi_dev_free_resource_list(&resource_list);
  7445. +
  7446. + if (ret < 0)
  7447. + return -EINVAL;
  7448. +
  7449. + return 0;
  7450. +}
  7451. +
  7452. +static int acpi_serdev_check_resources(struct serdev_controller *ctrl,
  7453. + struct acpi_device *adev)
  7454. +{
  7455. + struct acpi_serdev_lookup lookup;
  7456. + int ret;
  7457. +
  7458. + if (acpi_bus_get_status(adev) || !adev->status.present)
  7459. + return -EINVAL;
  7460. +
  7461. + /* Look for UARTSerialBusV2 resource */
  7462. + lookup.index = -1; // we only care for the last device
  7463. +
  7464. + ret = acpi_serdev_do_lookup(adev, &lookup);
  7465. + if (ret)
  7466. + return ret;
  7467. +
  7468. + /* Make sure controller and ResourceSource handle match */
  7469. + if (ACPI_HANDLE(ctrl->dev.parent) != lookup.controller_handle)
  7470. + return -ENODEV;
  7471. +
  7472. + return 0;
  7473. +}
  7474. +
  7475. static acpi_status acpi_serdev_register_device(struct serdev_controller *ctrl,
  7476. - struct acpi_device *adev)
  7477. + struct acpi_device *adev)
  7478. {
  7479. - struct serdev_device *serdev = NULL;
  7480. + struct serdev_device *serdev;
  7481. int err;
  7482. - if (acpi_bus_get_status(adev) || !adev->status.present ||
  7483. - acpi_device_enumerated(adev))
  7484. - return AE_OK;
  7485. -
  7486. serdev = serdev_device_alloc(ctrl);
  7487. if (!serdev) {
  7488. dev_err(&ctrl->dev, "failed to allocate serdev device for %s\n",
  7489. @@ -533,7 +614,7 @@ static const struct acpi_device_id serdev_acpi_devices_blacklist[] = {
  7490. };
  7491. static acpi_status acpi_serdev_add_device(acpi_handle handle, u32 level,
  7492. - void *data, void **return_value)
  7493. + void *data, void **return_value)
  7494. {
  7495. struct serdev_controller *ctrl = data;
  7496. struct acpi_device *adev;
  7497. @@ -541,26 +622,31 @@ static acpi_status acpi_serdev_add_device(acpi_handle handle, u32 level,
  7498. if (acpi_bus_get_device(handle, &adev))
  7499. return AE_OK;
  7500. + if (acpi_device_enumerated(adev))
  7501. + return AE_OK;
  7502. +
  7503. /* Skip if black listed */
  7504. if (!acpi_match_device_ids(adev, serdev_acpi_devices_blacklist))
  7505. return AE_OK;
  7506. + if (acpi_serdev_check_resources(ctrl, adev))
  7507. + return AE_OK;
  7508. +
  7509. return acpi_serdev_register_device(ctrl, adev);
  7510. }
  7511. static int acpi_serdev_register_devices(struct serdev_controller *ctrl)
  7512. {
  7513. acpi_status status;
  7514. - acpi_handle handle;
  7515. - handle = ACPI_HANDLE(ctrl->dev.parent);
  7516. - if (!handle)
  7517. + if (!has_acpi_companion(ctrl->dev.parent))
  7518. return -ENODEV;
  7519. - status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1,
  7520. + status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
  7521. + SERDEV_ACPI_MAX_SCAN_DEPTH,
  7522. acpi_serdev_add_device, NULL, ctrl, NULL);
  7523. if (ACPI_FAILURE(status))
  7524. - dev_dbg(&ctrl->dev, "failed to enumerate serdev slaves\n");
  7525. + dev_warn(&ctrl->dev, "failed to enumerate serdev slaves\n");
  7526. if (!ctrl->serdev)
  7527. return -ENODEV;
  7528. --
  7529. 2.26.2