0005-surface-sam.patch 198 KB

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  1. From bab81477b7af1b95845d7a35d418a6395136d434 Mon Sep 17 00:00:00 2001
  2. From: qzed <qzed@users.noreply.github.com>
  3. Date: Mon, 26 Aug 2019 01:11:08 +0200
  4. Subject: [PATCH 5/7] surface-sam
  5. ---
  6. drivers/acpi/acpica/dsopcode.c | 2 +-
  7. drivers/acpi/acpica/exfield.c | 12 +-
  8. drivers/platform/x86/Kconfig | 1 +
  9. drivers/platform/x86/Makefile | 1 +
  10. drivers/platform/x86/surface_sam/Kconfig | 163 ++
  11. drivers/platform/x86/surface_sam/Makefile | 10 +
  12. .../x86/surface_sam/surface_sam_dtx.c | 623 ++++++
  13. .../x86/surface_sam/surface_sam_hps.c | 1110 +++++++++++
  14. .../x86/surface_sam/surface_sam_san.c | 901 +++++++++
  15. .../x86/surface_sam/surface_sam_san.h | 29 +
  16. .../x86/surface_sam/surface_sam_sid.c | 117 ++
  17. .../x86/surface_sam/surface_sam_sid_gpelid.c | 219 ++
  18. .../surface_sam/surface_sam_sid_perfmode.c | 225 +++
  19. .../x86/surface_sam/surface_sam_sid_power.c | 1259 ++++++++++++
  20. .../x86/surface_sam/surface_sam_sid_vhf.c | 440 ++++
  21. .../x86/surface_sam/surface_sam_ssh.c | 1773 +++++++++++++++++
  22. .../x86/surface_sam/surface_sam_ssh.h | 97 +
  23. .../x86/surface_sam/surface_sam_vhf.c | 276 +++
  24. drivers/tty/serdev/core.c | 111 +-
  25. 19 files changed, 7353 insertions(+), 16 deletions(-)
  26. create mode 100644 drivers/platform/x86/surface_sam/Kconfig
  27. create mode 100644 drivers/platform/x86/surface_sam/Makefile
  28. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_dtx.c
  29. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_hps.c
  30. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_san.c
  31. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_san.h
  32. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid.c
  33. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  34. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  35. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  36. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  37. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_ssh.c
  38. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_ssh.h
  39. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_vhf.c
  40. diff --git a/drivers/acpi/acpica/dsopcode.c b/drivers/acpi/acpica/dsopcode.c
  41. index 10f32b62608e..7b2a4987f050 100644
  42. --- a/drivers/acpi/acpica/dsopcode.c
  43. +++ b/drivers/acpi/acpica/dsopcode.c
  44. @@ -123,7 +123,7 @@ acpi_ds_init_buffer_field(u16 aml_opcode,
  45. /* Offset is in bits, count is in bits */
  46. - field_flags = AML_FIELD_ACCESS_BYTE;
  47. + field_flags = AML_FIELD_ACCESS_BUFFER;
  48. bit_offset = offset;
  49. bit_count = (u32) length_desc->integer.value;
  50. diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c
  51. index d3d2dbfba680..0b7f617a6e9b 100644
  52. --- a/drivers/acpi/acpica/exfield.c
  53. +++ b/drivers/acpi/acpica/exfield.c
  54. @@ -109,6 +109,7 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
  55. union acpi_operand_object *buffer_desc;
  56. void *buffer;
  57. u32 buffer_length;
  58. + u8 field_flags;
  59. ACPI_FUNCTION_TRACE_PTR(ex_read_data_from_field, obj_desc);
  60. @@ -157,11 +158,16 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
  61. * Note: Field.length is in bits.
  62. */
  63. buffer_length =
  64. - (acpi_size)ACPI_ROUND_BITS_UP_TO_BYTES(obj_desc->field.bit_length);
  65. + (acpi_size)ACPI_ROUND_BITS_UP_TO_BYTES(obj_desc->common_field.bit_length);
  66. + field_flags = obj_desc->common_field.field_flags;
  67. - if (buffer_length > acpi_gbl_integer_byte_width) {
  68. + if (buffer_length > acpi_gbl_integer_byte_width ||
  69. + (field_flags & AML_FIELD_ACCESS_TYPE_MASK) == AML_FIELD_ACCESS_BUFFER) {
  70. - /* Field is too large for an Integer, create a Buffer instead */
  71. + /*
  72. + * Field is either too large for an Integer, or a actually of type
  73. + * buffer, so create a Buffer.
  74. + */
  75. buffer_desc = acpi_ut_create_buffer_object(buffer_length);
  76. if (!buffer_desc) {
  77. diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
  78. index 348c795019fa..d25067a838a3 100644
  79. --- a/drivers/platform/x86/Kconfig
  80. +++ b/drivers/platform/x86/Kconfig
  81. @@ -1342,6 +1342,7 @@ config PCENGINES_APU2
  82. will be called pcengines-apuv2.
  83. source "drivers/platform/x86/intel_speed_select_if/Kconfig"
  84. +source "drivers/platform/x86/surface_sam/Kconfig"
  85. endif # X86_PLATFORM_DEVICES
  86. diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
  87. index 6dd955ad9bf1..19b56f2181eb 100644
  88. --- a/drivers/platform/x86/Makefile
  89. +++ b/drivers/platform/x86/Makefile
  90. @@ -101,3 +101,4 @@ obj-$(CONFIG_I2C_MULTI_INSTANTIATE) += i2c-multi-instantiate.o
  91. obj-$(CONFIG_INTEL_ATOMISP2_PM) += intel_atomisp2_pm.o
  92. obj-$(CONFIG_PCENGINES_APU2) += pcengines-apuv2.o
  93. obj-$(CONFIG_INTEL_SPEED_SELECT_INTERFACE) += intel_speed_select_if/
  94. +obj-$(CONFIG_SURFACE_SAM) += surface_sam/
  95. diff --git a/drivers/platform/x86/surface_sam/Kconfig b/drivers/platform/x86/surface_sam/Kconfig
  96. new file mode 100644
  97. index 000000000000..b4513c234c4d
  98. --- /dev/null
  99. +++ b/drivers/platform/x86/surface_sam/Kconfig
  100. @@ -0,0 +1,163 @@
  101. +menuconfig SURFACE_SAM
  102. + depends on ACPI
  103. + tristate "Microsoft Surface/System Aggregator Module and Platform Drivers"
  104. + ---help---
  105. + Drivers for the Surface/System Aggregator Module (SAM) of Microsoft
  106. + Surface devices.
  107. +
  108. + SAM is an embedded controller that provides access to various
  109. + functionalities on these devices, including battery status, keyboard
  110. + events (on the Laptops) and many more.
  111. +
  112. + Say M/Y here if you have a Microsoft Surface device with a SAM device
  113. + (i.e. 5th generation or later).
  114. +
  115. +config SURFACE_SAM_SSH
  116. + tristate "Surface Serial Hub Driver"
  117. + depends on SURFACE_SAM
  118. + depends on SERIAL_DEV_CTRL_TTYPORT
  119. + select CRC_CCITT
  120. + default m
  121. + ---help---
  122. + Surface Serial Hub driver for 5th generation (or later) Microsoft
  123. + Surface devices.
  124. +
  125. + This is the base driver for the embedded serial controller found on
  126. + 5th generation (and later) Microsoft Surface devices (e.g. Book 2,
  127. + Laptop, Laptop 2, Pro 2017, Pro 6, ...). This driver itself only
  128. + provides access to the embedded controller (SAM) and subsequent
  129. + drivers are required for the respective functionalities.
  130. +
  131. + If you have a 5th generation (or later) Microsoft Surface device, say
  132. + Y or M here.
  133. +
  134. +config SURFACE_SAM_SSH_DEBUG_DEVICE
  135. + bool "Surface Serial Hub Debug Device"
  136. + depends on SURFACE_SAM_SSH
  137. + depends on SYSFS
  138. + default n
  139. + ---help---
  140. + Debug device for direct communication with the embedded controller
  141. + found on 5th generation (and later) Microsoft Surface devices (e.g.
  142. + Book 2, Laptop, Laptop 2, Pro 2017, Pro 6, ...) via sysfs.
  143. +
  144. + If you are not sure, say N here.
  145. +
  146. +config SURFACE_SAM_SAN
  147. + tristate "Surface ACPI Notify Driver"
  148. + depends on SURFACE_SAM_SSH
  149. + default m
  150. + ---help---
  151. + Surface ACPI Notify driver for 5th generation (or later) Microsoft
  152. + Surface devices.
  153. +
  154. + This driver enables basic ACPI events and requests, such as battery
  155. + status requests/events, thermal events, lid status, and possibly more,
  156. + which would otherwise not work on these devices.
  157. +
  158. + If you are not sure, say M here.
  159. +
  160. +config SURFACE_SAM_VHF
  161. + tristate "Surface Virtual HID Framework Driver"
  162. + depends on SURFACE_SAM_SSH
  163. + depends on HID
  164. + default m
  165. + ---help---
  166. + Surface Virtual HID Framework driver for 5th generation (or later)
  167. + Microsoft Surface devices.
  168. +
  169. + This driver provides support for the Microsoft Virtual HID framework,
  170. + which is required for keyboard support on the Surface Laptop 1 and 2.
  171. +
  172. + If you are not sure, say M here.
  173. +
  174. +config SURFACE_SAM_DTX
  175. + tristate "Surface Detachment System (DTX) Driver"
  176. + depends on SURFACE_SAM_SSH
  177. + depends on INPUT
  178. + default m
  179. + ---help---
  180. + Surface Detachment System (DTX) driver for the Microsoft Surface Book
  181. + 2. This driver provides support for proper detachment handling in
  182. + user-space, status-events relating to the base and support for
  183. + the safe-guard keeping the base attached when the discrete GPU
  184. + contained in it is running via the special /dev/surface-dtx device.
  185. +
  186. + Also provides a standard input device to provide SW_TABLET_MODE events
  187. + upon device mode change.
  188. +
  189. + If you are not sure, say M here.
  190. +
  191. +config SURFACE_SAM_HPS
  192. + tristate "Surface dGPU Hot-Plug System (dGPU-HPS) Driver"
  193. + depends on SURFACE_SAM_SSH
  194. + depends on SURFACE_SAM_SAN
  195. + default m
  196. + ---help---
  197. + Driver to properly handle hot-plugging and explicit power-on/power-off
  198. + of the discrete GPU (dGPU) on the Surface Book 2.
  199. +
  200. + If you are not sure, say M here.
  201. +
  202. +config SURFACE_SAM_SID
  203. + tristate "Surface Platform Integration Driver"
  204. + depends on SURFACE_SAM_SSH
  205. + default m
  206. + ---help---
  207. + Surface Platform Integration Driver for the Microsoft Surface Devices.
  208. + This driver loads various model-specific sub-drivers, including
  209. + battery and keyboard support on 7th generation Surface devices, proper
  210. + lid setup to enable device wakeup when the lid is opened on multiple
  211. + models, as well as performance mode setting support on the Surface
  212. + Book 2.
  213. +
  214. + If you are not sure, say M here.
  215. +
  216. +config SURFACE_SAM_SID_GPELID
  217. + tristate "Surface Lid Wakeup Driver"
  218. + depends on SURFACE_SAM_SID
  219. + default m
  220. + ---help---
  221. + Driver to set up device wake-up via lid on Intel-based Microsoft
  222. + Surface devices. These devices do not wake up from sleep as their GPE
  223. + interrupt is not configured automatically. This driver solves that
  224. + problem.
  225. +
  226. + If you are not sure, say M here.
  227. +
  228. +config SURFACE_SAM_SID_PERFMODE
  229. + tristate "Surface Performance Mode Driver"
  230. + depends on SURFACE_SAM_SID
  231. + depends on SYSFS
  232. + default m
  233. + ---help---
  234. + This driver provides suport for setting performance-modes on Surface
  235. + devices via the perf_mode sysfs attribute. Currently only supports the
  236. + Surface Book 2. Performance-modes directly influence the fan-profile
  237. + of the device, allowing to choose between higher performance or
  238. + quieter operation.
  239. +
  240. + If you are not sure, say M here.
  241. +
  242. +config SURFACE_SAM_SID_VHF
  243. + tristate "Surface SAM HID Driver"
  244. + depends on SURFACE_SAM_SID
  245. + depends on HID
  246. + default m
  247. + ---help---
  248. + This driver provides support for HID devices connected via the Surface
  249. + SAM embedded controller. It provides support for keyboard and touchpad
  250. + on the Surface Laptop 3 models.
  251. +
  252. + If you are not sure, say M here.
  253. +
  254. +config SURFACE_SAM_SID_POWER
  255. + tristate "Surface SAM Battery/AC Driver"
  256. + depends on SURFACE_SAM_SID
  257. + select POWER_SUPPLY
  258. + default m
  259. + ---help---
  260. + This driver provides support for the battery and AC on 7th generation
  261. + Surface devices.
  262. +
  263. + If you are not sure, say M here.
  264. diff --git a/drivers/platform/x86/surface_sam/Makefile b/drivers/platform/x86/surface_sam/Makefile
  265. new file mode 100644
  266. index 000000000000..188975ccde5c
  267. --- /dev/null
  268. +++ b/drivers/platform/x86/surface_sam/Makefile
  269. @@ -0,0 +1,10 @@
  270. +obj-$(CONFIG_SURFACE_SAM_SSH) += surface_sam_ssh.o
  271. +obj-$(CONFIG_SURFACE_SAM_SAN) += surface_sam_san.o
  272. +obj-$(CONFIG_SURFACE_SAM_DTX) += surface_sam_dtx.o
  273. +obj-$(CONFIG_SURFACE_SAM_HPS) += surface_sam_hps.o
  274. +obj-$(CONFIG_SURFACE_SAM_VHF) += surface_sam_vhf.o
  275. +obj-$(CONFIG_SURFACE_SAM_SID) += surface_sam_sid.o
  276. +obj-$(CONFIG_SURFACE_SAM_SID_GPELID) += surface_sam_sid_gpelid.o
  277. +obj-$(CONFIG_SURFACE_SAM_SID_PERFMODE) += surface_sam_sid_perfmode.o
  278. +obj-$(CONFIG_SURFACE_SAM_SID_POWER) += surface_sam_sid_power.o
  279. +obj-$(CONFIG_SURFACE_SAM_SID_VHF) += surface_sam_sid_vhf.o
  280. diff --git a/drivers/platform/x86/surface_sam/surface_sam_dtx.c b/drivers/platform/x86/surface_sam/surface_sam_dtx.c
  281. new file mode 100644
  282. index 000000000000..4b924de6ab09
  283. --- /dev/null
  284. +++ b/drivers/platform/x86/surface_sam/surface_sam_dtx.c
  285. @@ -0,0 +1,623 @@
  286. +/*
  287. + * Detachment system (DTX) driver for Microsoft Surface Book 2.
  288. + */
  289. +
  290. +#include <linux/acpi.h>
  291. +#include <linux/delay.h>
  292. +#include <linux/fs.h>
  293. +#include <linux/input.h>
  294. +#include <linux/ioctl.h>
  295. +#include <linux/kernel.h>
  296. +#include <linux/miscdevice.h>
  297. +#include <linux/module.h>
  298. +#include <linux/poll.h>
  299. +#include <linux/rculist.h>
  300. +#include <linux/slab.h>
  301. +#include <linux/spinlock.h>
  302. +#include <linux/platform_device.h>
  303. +
  304. +#include "surface_sam_ssh.h"
  305. +
  306. +
  307. +#define USB_VENDOR_ID_MICROSOFT 0x045e
  308. +#define USB_DEVICE_ID_MS_SURFACE_BASE_2_INTEGRATION 0x0922
  309. +
  310. +// name copied from MS device manager
  311. +#define DTX_INPUT_NAME "Microsoft Surface Base 2 Integration Device"
  312. +
  313. +
  314. +#define DTX_CMD_LATCH_LOCK _IO(0x11, 0x01)
  315. +#define DTX_CMD_LATCH_UNLOCK _IO(0x11, 0x02)
  316. +#define DTX_CMD_LATCH_REQUEST _IO(0x11, 0x03)
  317. +#define DTX_CMD_LATCH_OPEN _IO(0x11, 0x04)
  318. +#define DTX_CMD_GET_OPMODE _IOR(0x11, 0x05, int)
  319. +
  320. +#define SAM_RQST_DTX_TC 0x11
  321. +#define SAM_RQST_DTX_CID_LATCH_LOCK 0x06
  322. +#define SAM_RQST_DTX_CID_LATCH_UNLOCK 0x07
  323. +#define SAM_RQST_DTX_CID_LATCH_REQUEST 0x08
  324. +#define SAM_RQST_DTX_CID_LATCH_OPEN 0x09
  325. +#define SAM_RQST_DTX_CID_GET_OPMODE 0x0D
  326. +
  327. +#define SAM_EVENT_DTX_TC 0x11
  328. +#define SAM_EVENT_DTX_RQID 0x0011
  329. +#define SAM_EVENT_DTX_CID_CONNECTION 0x0c
  330. +#define SAM_EVENT_DTX_CID_BUTTON 0x0e
  331. +#define SAM_EVENT_DTX_CID_ERROR 0x0f
  332. +#define SAM_EVENT_DTX_CID_LATCH_STATUS 0x11
  333. +
  334. +#define DTX_OPMODE_TABLET 0x00
  335. +#define DTX_OPMODE_LAPTOP 0x01
  336. +#define DTX_OPMODE_STUDIO 0x02
  337. +
  338. +#define DTX_LATCH_CLOSED 0x00
  339. +#define DTX_LATCH_OPENED 0x01
  340. +
  341. +
  342. +// Warning: This must always be a power of 2!
  343. +#define DTX_CLIENT_BUF_SIZE 16
  344. +
  345. +#define DTX_CONNECT_OPMODE_DELAY 1000
  346. +
  347. +#define DTX_ERR KERN_ERR "surface_sam_dtx: "
  348. +#define DTX_WARN KERN_WARNING "surface_sam_dtx: "
  349. +
  350. +
  351. +struct surface_dtx_event {
  352. + u8 type;
  353. + u8 code;
  354. + u8 arg0;
  355. + u8 arg1;
  356. +} __packed;
  357. +
  358. +struct surface_dtx_dev {
  359. + wait_queue_head_t waitq;
  360. + struct miscdevice mdev;
  361. + spinlock_t client_lock;
  362. + struct list_head client_list;
  363. + struct mutex mutex;
  364. + bool active;
  365. + spinlock_t input_lock;
  366. + struct input_dev *input_dev;
  367. +};
  368. +
  369. +struct surface_dtx_client {
  370. + struct list_head node;
  371. + struct surface_dtx_dev *ddev;
  372. + struct fasync_struct *fasync;
  373. + spinlock_t buffer_lock;
  374. + unsigned int buffer_head;
  375. + unsigned int buffer_tail;
  376. + struct surface_dtx_event buffer[DTX_CLIENT_BUF_SIZE];
  377. +};
  378. +
  379. +
  380. +static struct surface_dtx_dev surface_dtx_dev;
  381. +
  382. +
  383. +static int surface_sam_query_opmpde(void)
  384. +{
  385. + u8 result_buf[1];
  386. + int status;
  387. +
  388. + struct surface_sam_ssh_rqst rqst = {
  389. + .tc = SAM_RQST_DTX_TC,
  390. + .cid = SAM_RQST_DTX_CID_GET_OPMODE,
  391. + .iid = 0,
  392. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  393. + .snc = 1,
  394. + .cdl = 0,
  395. + .pld = NULL,
  396. + };
  397. +
  398. + struct surface_sam_ssh_buf result = {
  399. + .cap = 1,
  400. + .len = 0,
  401. + .data = result_buf,
  402. + };
  403. +
  404. + status = surface_sam_ssh_rqst(&rqst, &result);
  405. + if (status) {
  406. + return status;
  407. + }
  408. +
  409. + if (result.len != 1) {
  410. + return -EFAULT;
  411. + }
  412. +
  413. + return result.data[0];
  414. +}
  415. +
  416. +
  417. +static int dtx_cmd_simple(u8 cid)
  418. +{
  419. + struct surface_sam_ssh_rqst rqst = {
  420. + .tc = SAM_RQST_DTX_TC,
  421. + .cid = cid,
  422. + .iid = 0,
  423. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  424. + .snc = 0,
  425. + .cdl = 0,
  426. + .pld = NULL,
  427. + };
  428. +
  429. + return surface_sam_ssh_rqst(&rqst, NULL);
  430. +}
  431. +
  432. +static int dtx_cmd_get_opmode(int __user *buf)
  433. +{
  434. + int opmode = surface_sam_query_opmpde();
  435. + if (opmode < 0) {
  436. + return opmode;
  437. + }
  438. +
  439. + if (put_user(opmode, buf)) {
  440. + return -EACCES;
  441. + }
  442. +
  443. + return 0;
  444. +}
  445. +
  446. +
  447. +static int surface_dtx_open(struct inode *inode, struct file *file)
  448. +{
  449. + struct surface_dtx_dev *ddev = container_of(file->private_data, struct surface_dtx_dev, mdev);
  450. + struct surface_dtx_client *client;
  451. +
  452. + // initialize client
  453. + client = kzalloc(sizeof(struct surface_dtx_client), GFP_KERNEL);
  454. + if (!client) {
  455. + return -ENOMEM;
  456. + }
  457. +
  458. + spin_lock_init(&client->buffer_lock);
  459. + client->buffer_head = 0;
  460. + client->buffer_tail = 0;
  461. + client->ddev = ddev;
  462. +
  463. + // attach client
  464. + spin_lock(&ddev->client_lock);
  465. + list_add_tail_rcu(&client->node, &ddev->client_list);
  466. + spin_unlock(&ddev->client_lock);
  467. +
  468. + file->private_data = client;
  469. + nonseekable_open(inode, file);
  470. +
  471. + return 0;
  472. +}
  473. +
  474. +static int surface_dtx_release(struct inode *inode, struct file *file)
  475. +{
  476. + struct surface_dtx_client *client = file->private_data;
  477. +
  478. + // detach client
  479. + spin_lock(&client->ddev->client_lock);
  480. + list_del_rcu(&client->node);
  481. + spin_unlock(&client->ddev->client_lock);
  482. + synchronize_rcu();
  483. +
  484. + kfree(client);
  485. + file->private_data = NULL;
  486. +
  487. + return 0;
  488. +}
  489. +
  490. +static ssize_t surface_dtx_read(struct file *file, char __user *buf, size_t count, loff_t *offs)
  491. +{
  492. + struct surface_dtx_client *client = file->private_data;
  493. + struct surface_dtx_dev *ddev = client->ddev;
  494. + struct surface_dtx_event event;
  495. + size_t read = 0;
  496. + int status = 0;
  497. +
  498. + if (count != 0 && count < sizeof(struct surface_dtx_event)) {
  499. + return -EINVAL;
  500. + }
  501. +
  502. + if (!ddev->active) {
  503. + return -ENODEV;
  504. + }
  505. +
  506. + // check availability
  507. + if (client->buffer_head == client->buffer_tail){
  508. + if (file->f_flags & O_NONBLOCK) {
  509. + return -EAGAIN;
  510. + }
  511. +
  512. + status = wait_event_interruptible(ddev->waitq,
  513. + client->buffer_head != client->buffer_tail ||
  514. + !ddev->active);
  515. + if (status) {
  516. + return status;
  517. + }
  518. +
  519. + if (!ddev->active) {
  520. + return -ENODEV;
  521. + }
  522. + }
  523. +
  524. + // copy events one by one
  525. + while (read + sizeof(struct surface_dtx_event) <= count) {
  526. + spin_lock_irq(&client->buffer_lock);
  527. +
  528. + if(client->buffer_head == client->buffer_tail) {
  529. + spin_unlock_irq(&client->buffer_lock);
  530. + break;
  531. + }
  532. +
  533. + // get one event
  534. + event = client->buffer[client->buffer_tail];
  535. + client->buffer_tail = (client->buffer_tail + 1) & (DTX_CLIENT_BUF_SIZE - 1);
  536. + spin_unlock_irq(&client->buffer_lock);
  537. +
  538. + // copy to userspace
  539. + if(copy_to_user(buf, &event, sizeof(struct surface_dtx_event))) {
  540. + return -EFAULT;
  541. + }
  542. +
  543. + read += sizeof(struct surface_dtx_event);
  544. + }
  545. +
  546. + return read;
  547. +}
  548. +
  549. +static __poll_t surface_dtx_poll(struct file *file, struct poll_table_struct *pt)
  550. +{
  551. + struct surface_dtx_client *client = file->private_data;
  552. + int mask;
  553. +
  554. + poll_wait(file, &client->ddev->waitq, pt);
  555. +
  556. + if (client->ddev->active) {
  557. + mask = EPOLLOUT | EPOLLWRNORM;
  558. + } else {
  559. + mask = EPOLLHUP | EPOLLERR;
  560. + }
  561. +
  562. + if (client->buffer_head != client->buffer_tail) {
  563. + mask |= EPOLLIN | EPOLLRDNORM;
  564. + }
  565. +
  566. + return mask;
  567. +}
  568. +
  569. +static int surface_dtx_fasync(int fd, struct file *file, int on)
  570. +{
  571. + struct surface_dtx_client *client = file->private_data;
  572. +
  573. + return fasync_helper(fd, file, on, &client->fasync);
  574. +}
  575. +
  576. +static long surface_dtx_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  577. +{
  578. + struct surface_dtx_client *client = file->private_data;
  579. + struct surface_dtx_dev *ddev = client->ddev;
  580. + int status;
  581. +
  582. + status = mutex_lock_interruptible(&ddev->mutex);
  583. + if (status) {
  584. + return status;
  585. + }
  586. +
  587. + if (!ddev->active) {
  588. + mutex_unlock(&ddev->mutex);
  589. + return -ENODEV;
  590. + }
  591. +
  592. + switch (cmd) {
  593. + case DTX_CMD_LATCH_LOCK:
  594. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_LOCK);
  595. + break;
  596. +
  597. + case DTX_CMD_LATCH_UNLOCK:
  598. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_UNLOCK);
  599. + break;
  600. +
  601. + case DTX_CMD_LATCH_REQUEST:
  602. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_REQUEST);
  603. + break;
  604. +
  605. + case DTX_CMD_LATCH_OPEN:
  606. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_OPEN);
  607. + break;
  608. +
  609. + case DTX_CMD_GET_OPMODE:
  610. + status = dtx_cmd_get_opmode((int __user *)arg);
  611. + break;
  612. +
  613. + default:
  614. + status = -EINVAL;
  615. + break;
  616. + }
  617. +
  618. + mutex_unlock(&ddev->mutex);
  619. + return status;
  620. +}
  621. +
  622. +static const struct file_operations surface_dtx_fops = {
  623. + .owner = THIS_MODULE,
  624. + .open = surface_dtx_open,
  625. + .release = surface_dtx_release,
  626. + .read = surface_dtx_read,
  627. + .poll = surface_dtx_poll,
  628. + .fasync = surface_dtx_fasync,
  629. + .unlocked_ioctl = surface_dtx_ioctl,
  630. + .llseek = no_llseek,
  631. +};
  632. +
  633. +static struct surface_dtx_dev surface_dtx_dev = {
  634. + .mdev = {
  635. + .minor = MISC_DYNAMIC_MINOR,
  636. + .name = "surface_dtx",
  637. + .fops = &surface_dtx_fops,
  638. + },
  639. + .client_lock = __SPIN_LOCK_UNLOCKED(),
  640. + .input_lock = __SPIN_LOCK_UNLOCKED(),
  641. + .mutex = __MUTEX_INITIALIZER(surface_dtx_dev.mutex),
  642. + .active = false,
  643. +};
  644. +
  645. +
  646. +static void surface_dtx_push_event(struct surface_dtx_dev *ddev, struct surface_dtx_event *event)
  647. +{
  648. + struct surface_dtx_client *client;
  649. +
  650. + rcu_read_lock();
  651. + list_for_each_entry_rcu(client, &ddev->client_list, node) {
  652. + spin_lock(&client->buffer_lock);
  653. +
  654. + client->buffer[client->buffer_head++] = *event;
  655. + client->buffer_head &= DTX_CLIENT_BUF_SIZE - 1;
  656. +
  657. + if (unlikely(client->buffer_head == client->buffer_tail)) {
  658. + printk(DTX_WARN "event buffer overrun\n");
  659. + client->buffer_tail = (client->buffer_tail + 1) & (DTX_CLIENT_BUF_SIZE - 1);
  660. + }
  661. +
  662. + spin_unlock(&client->buffer_lock);
  663. +
  664. + kill_fasync(&client->fasync, SIGIO, POLL_IN);
  665. + }
  666. + rcu_read_unlock();
  667. +
  668. + wake_up_interruptible(&ddev->waitq);
  669. +}
  670. +
  671. +
  672. +static void surface_dtx_update_opmpde(struct surface_dtx_dev *ddev)
  673. +{
  674. + struct surface_dtx_event event;
  675. + int opmode;
  676. +
  677. + // get operation mode
  678. + opmode = surface_sam_query_opmpde();
  679. + if (opmode < 0) {
  680. + printk(DTX_ERR "EC request failed with error %d\n", opmode);
  681. + }
  682. +
  683. + // send DTX event
  684. + event.type = 0x11;
  685. + event.code = 0x0D;
  686. + event.arg0 = opmode;
  687. + event.arg1 = 0x00;
  688. +
  689. + surface_dtx_push_event(ddev, &event);
  690. +
  691. + // send SW_TABLET_MODE event
  692. + spin_lock(&ddev->input_lock);
  693. + input_report_switch(ddev->input_dev, SW_TABLET_MODE, opmode == 0x00);
  694. + input_sync(ddev->input_dev);
  695. + spin_unlock(&ddev->input_lock);
  696. +}
  697. +
  698. +static int surface_dtx_evt_dtx(struct surface_sam_ssh_event *in_event, void *data)
  699. +{
  700. + struct surface_dtx_dev *ddev = data;
  701. + struct surface_dtx_event event;
  702. +
  703. + switch (in_event->cid) {
  704. + case SAM_EVENT_DTX_CID_CONNECTION:
  705. + case SAM_EVENT_DTX_CID_BUTTON:
  706. + case SAM_EVENT_DTX_CID_ERROR:
  707. + case SAM_EVENT_DTX_CID_LATCH_STATUS:
  708. + if (in_event->len > 2) {
  709. + printk(DTX_ERR "unexpected payload size (cid: %x, len: %u)\n",
  710. + in_event->cid, in_event->len);
  711. + return 0;
  712. + }
  713. +
  714. + event.type = in_event->tc;
  715. + event.code = in_event->cid;
  716. + event.arg0 = in_event->len >= 1 ? in_event->pld[0] : 0x00;
  717. + event.arg1 = in_event->len >= 2 ? in_event->pld[1] : 0x00;
  718. + surface_dtx_push_event(ddev, &event);
  719. + break;
  720. +
  721. + default:
  722. + printk(DTX_WARN "unhandled dtx event (cid: %x)\n", in_event->cid);
  723. + }
  724. +
  725. + // update device mode
  726. + if (in_event->cid == SAM_EVENT_DTX_CID_CONNECTION) {
  727. + if (in_event->pld[0]) {
  728. + // Note: we're already in a workqueue task
  729. + msleep(DTX_CONNECT_OPMODE_DELAY);
  730. + }
  731. +
  732. + surface_dtx_update_opmpde(ddev);
  733. + }
  734. +
  735. + return 0;
  736. +}
  737. +
  738. +static int surface_dtx_events_setup(struct surface_dtx_dev *ddev)
  739. +{
  740. + int status;
  741. +
  742. + status = surface_sam_ssh_set_event_handler(SAM_EVENT_DTX_RQID, surface_dtx_evt_dtx, ddev);
  743. + if (status) {
  744. + goto err_handler;
  745. + }
  746. +
  747. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_DTX_TC, 0x01, SAM_EVENT_DTX_RQID);
  748. + if (status) {
  749. + goto err_source;
  750. + }
  751. +
  752. + return 0;
  753. +
  754. +err_source:
  755. + surface_sam_ssh_remove_event_handler(SAM_EVENT_DTX_RQID);
  756. +err_handler:
  757. + return status;
  758. +}
  759. +
  760. +static void surface_dtx_events_disable(void)
  761. +{
  762. + surface_sam_ssh_disable_event_source(SAM_EVENT_DTX_TC, 0x01, SAM_EVENT_DTX_RQID);
  763. + surface_sam_ssh_remove_event_handler(SAM_EVENT_DTX_RQID);
  764. +}
  765. +
  766. +
  767. +static struct input_dev *surface_dtx_register_inputdev(struct platform_device *pdev)
  768. +{
  769. + struct input_dev *input_dev;
  770. + int status;
  771. +
  772. + input_dev = input_allocate_device();
  773. + if (!input_dev) {
  774. + return ERR_PTR(-ENOMEM);
  775. + }
  776. +
  777. + input_dev->name = DTX_INPUT_NAME;
  778. + input_dev->dev.parent = &pdev->dev;
  779. + input_dev->id.bustype = BUS_VIRTUAL;
  780. + input_dev->id.vendor = USB_VENDOR_ID_MICROSOFT;
  781. + input_dev->id.product = USB_DEVICE_ID_MS_SURFACE_BASE_2_INTEGRATION;
  782. +
  783. + input_set_capability(input_dev, EV_SW, SW_TABLET_MODE);
  784. +
  785. + status = surface_sam_query_opmpde();
  786. + if (status < 0) {
  787. + input_free_device(input_dev);
  788. + return ERR_PTR(status);
  789. + }
  790. +
  791. + input_report_switch(input_dev, SW_TABLET_MODE, status == 0x00);
  792. +
  793. + status = input_register_device(input_dev);
  794. + if (status) {
  795. + input_unregister_device(input_dev);
  796. + return ERR_PTR(status);
  797. + }
  798. +
  799. + return input_dev;
  800. +}
  801. +
  802. +
  803. +static int surface_sam_dtx_probe(struct platform_device *pdev)
  804. +{
  805. + struct surface_dtx_dev *ddev = &surface_dtx_dev;
  806. + struct input_dev *input_dev;
  807. + int status;
  808. +
  809. + // link to ec
  810. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  811. + if (status) {
  812. + return status == -ENXIO ? -EPROBE_DEFER : status;
  813. + }
  814. +
  815. + input_dev = surface_dtx_register_inputdev(pdev);
  816. + if (IS_ERR(input_dev)) {
  817. + return PTR_ERR(input_dev);
  818. + }
  819. +
  820. + // initialize device
  821. + mutex_lock(&ddev->mutex);
  822. + if (ddev->active) {
  823. + mutex_unlock(&ddev->mutex);
  824. + status = -ENODEV;
  825. + goto err_register;
  826. + }
  827. +
  828. + INIT_LIST_HEAD(&ddev->client_list);
  829. + init_waitqueue_head(&ddev->waitq);
  830. + ddev->active = true;
  831. + ddev->input_dev = input_dev;
  832. + mutex_unlock(&ddev->mutex);
  833. +
  834. + status = misc_register(&ddev->mdev);
  835. + if (status) {
  836. + goto err_register;
  837. + }
  838. +
  839. + // enable events
  840. + status = surface_dtx_events_setup(ddev);
  841. + if (status) {
  842. + goto err_events_setup;
  843. + }
  844. +
  845. + return 0;
  846. +
  847. +err_events_setup:
  848. + misc_deregister(&ddev->mdev);
  849. +err_register:
  850. + input_unregister_device(ddev->input_dev);
  851. + return status;
  852. +}
  853. +
  854. +static int surface_sam_dtx_remove(struct platform_device *pdev)
  855. +{
  856. + struct surface_dtx_dev *ddev = &surface_dtx_dev;
  857. + struct surface_dtx_client *client;
  858. +
  859. + mutex_lock(&ddev->mutex);
  860. + if (!ddev->active) {
  861. + mutex_unlock(&ddev->mutex);
  862. + return 0;
  863. + }
  864. +
  865. + // mark as inactive
  866. + ddev->active = false;
  867. + mutex_unlock(&ddev->mutex);
  868. +
  869. + // After this call we're guaranteed that no more input events will arive
  870. + surface_dtx_events_disable();
  871. +
  872. + // wake up clients
  873. + spin_lock(&ddev->client_lock);
  874. + list_for_each_entry(client, &ddev->client_list, node) {
  875. + kill_fasync(&client->fasync, SIGIO, POLL_HUP);
  876. + }
  877. + spin_unlock(&ddev->client_lock);
  878. +
  879. + wake_up_interruptible(&ddev->waitq);
  880. +
  881. + // unregister user-space devices
  882. + input_unregister_device(ddev->input_dev);
  883. + misc_deregister(&ddev->mdev);
  884. +
  885. + return 0;
  886. +}
  887. +
  888. +
  889. +static const struct acpi_device_id surface_sam_dtx_match[] = {
  890. + { "MSHW0133", 0 },
  891. + { },
  892. +};
  893. +MODULE_DEVICE_TABLE(acpi, surface_sam_dtx_match);
  894. +
  895. +static struct platform_driver surface_sam_dtx = {
  896. + .probe = surface_sam_dtx_probe,
  897. + .remove = surface_sam_dtx_remove,
  898. + .driver = {
  899. + .name = "surface_sam_dtx",
  900. + .acpi_match_table = ACPI_PTR(surface_sam_dtx_match),
  901. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  902. + },
  903. +};
  904. +module_platform_driver(surface_sam_dtx);
  905. +
  906. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  907. +MODULE_DESCRIPTION("Surface Detachment System (DTX) Driver for 5th Generation Surface Devices");
  908. +MODULE_LICENSE("GPL v2");
  909. diff --git a/drivers/platform/x86/surface_sam/surface_sam_hps.c b/drivers/platform/x86/surface_sam/surface_sam_hps.c
  910. new file mode 100644
  911. index 000000000000..3b123bd3dcfe
  912. --- /dev/null
  913. +++ b/drivers/platform/x86/surface_sam/surface_sam_hps.c
  914. @@ -0,0 +1,1110 @@
  915. +/*
  916. + * Surface dGPU hot-plug system driver.
  917. + * Supports explicit setting of the dGPU power-state on the Surface Book 2 and
  918. + * properly handles hot-plugging by detaching the base.
  919. + */
  920. +
  921. +#include <linux/acpi.h>
  922. +#include <linux/delay.h>
  923. +#include <linux/gpio.h>
  924. +#include <linux/kernel.h>
  925. +#include <linux/module.h>
  926. +#include <linux/mutex.h>
  927. +#include <linux/pci.h>
  928. +#include <linux/platform_device.h>
  929. +#include <linux/sysfs.h>
  930. +
  931. +#include "surface_sam_ssh.h"
  932. +#include "surface_sam_san.h"
  933. +
  934. +
  935. +// TODO: vgaswitcheroo integration
  936. +
  937. +
  938. +static void dbg_dump_drvsta(struct platform_device *pdev, const char *prefix);
  939. +
  940. +
  941. +#define SHPS_DSM_REVISION 1
  942. +#define SHPS_DSM_GPU_ADDRS 0x02
  943. +#define SHPS_DSM_GPU_POWER 0x05
  944. +static const guid_t SHPS_DSM_UUID =
  945. + GUID_INIT(0x5515a847, 0xed55, 0x4b27, 0x83, 0x52, 0xcd,
  946. + 0x32, 0x0e, 0x10, 0x36, 0x0a);
  947. +
  948. +
  949. +#define SAM_DGPU_TC 0x13
  950. +#define SAM_DGPU_CID_POWERON 0x02
  951. +
  952. +#define SAM_DTX_TC 0x11
  953. +#define SAM_DTX_CID_LATCH_LOCK 0x06
  954. +#define SAM_DTX_CID_LATCH_UNLOCK 0x07
  955. +
  956. +#define SHPS_DSM_GPU_ADDRS_RP "RP5_PCIE"
  957. +#define SHPS_DSM_GPU_ADDRS_DGPU "DGPU_PCIE"
  958. +
  959. +
  960. +static const struct acpi_gpio_params gpio_base_presence_int = { 0, 0, false };
  961. +static const struct acpi_gpio_params gpio_base_presence = { 1, 0, false };
  962. +static const struct acpi_gpio_params gpio_dgpu_power_int = { 2, 0, false };
  963. +static const struct acpi_gpio_params gpio_dgpu_power = { 3, 0, false };
  964. +static const struct acpi_gpio_params gpio_dgpu_presence_int = { 4, 0, false };
  965. +static const struct acpi_gpio_params gpio_dgpu_presence = { 5, 0, false };
  966. +
  967. +static const struct acpi_gpio_mapping shps_acpi_gpios[] = {
  968. + { "base_presence-int-gpio", &gpio_base_presence_int, 1 },
  969. + { "base_presence-gpio", &gpio_base_presence, 1 },
  970. + { "dgpu_power-int-gpio", &gpio_dgpu_power_int, 1 },
  971. + { "dgpu_power-gpio", &gpio_dgpu_power, 1 },
  972. + { "dgpu_presence-int-gpio", &gpio_dgpu_presence_int, 1 },
  973. + { "dgpu_presence-gpio", &gpio_dgpu_presence, 1 },
  974. + { },
  975. +};
  976. +
  977. +
  978. +enum shps_dgpu_power {
  979. + SHPS_DGPU_POWER_OFF = 0,
  980. + SHPS_DGPU_POWER_ON = 1,
  981. + SHPS_DGPU_POWER_UNKNOWN = 2,
  982. +};
  983. +
  984. +static const char* shps_dgpu_power_str(enum shps_dgpu_power power) {
  985. + if (power == SHPS_DGPU_POWER_OFF)
  986. + return "off";
  987. + else if (power == SHPS_DGPU_POWER_ON)
  988. + return "on";
  989. + else if (power == SHPS_DGPU_POWER_UNKNOWN)
  990. + return "unknown";
  991. + else
  992. + return "<invalid>";
  993. +}
  994. +
  995. +
  996. +struct shps_driver_data {
  997. + struct mutex lock;
  998. + struct pci_dev *dgpu_root_port;
  999. + struct pci_saved_state *dgpu_root_port_state;
  1000. + struct gpio_desc *gpio_dgpu_power;
  1001. + struct gpio_desc *gpio_dgpu_presence;
  1002. + struct gpio_desc *gpio_base_presence;
  1003. + unsigned int irq_dgpu_presence;
  1004. + unsigned int irq_base_presence;
  1005. + unsigned long state;
  1006. +};
  1007. +
  1008. +#define SHPS_STATE_BIT_PWRTGT 0 /* desired power state: 1 for on, 0 for off */
  1009. +#define SHPS_STATE_BIT_RPPWRON_SYNC 1 /* synchronous/requested power-up in progress */
  1010. +#define SHPS_STATE_BIT_WAKE_ENABLED 2 /* wakeup via base-presence GPIO enabled */
  1011. +
  1012. +
  1013. +#define SHPS_DGPU_PARAM_PERM (S_IRUGO | S_IWUSR)
  1014. +
  1015. +enum shps_dgpu_power_mp {
  1016. + SHPS_DGPU_MP_POWER_OFF = SHPS_DGPU_POWER_OFF,
  1017. + SHPS_DGPU_MP_POWER_ON = SHPS_DGPU_POWER_ON,
  1018. + SHPS_DGPU_MP_POWER_ASIS = -1,
  1019. +
  1020. + __SHPS_DGPU_MP_POWER_START = -1,
  1021. + __SHPS_DGPU_MP_POWER_END = 1,
  1022. +};
  1023. +
  1024. +static int param_dgpu_power_set(const char *val, const struct kernel_param *kp)
  1025. +{
  1026. + int power = SHPS_DGPU_MP_POWER_OFF;
  1027. + int status;
  1028. +
  1029. + status = kstrtoint(val, 0, &power);
  1030. + if (status) {
  1031. + return status;
  1032. + }
  1033. +
  1034. + if (power < __SHPS_DGPU_MP_POWER_START || power > __SHPS_DGPU_MP_POWER_END) {
  1035. + return -EINVAL;
  1036. + }
  1037. +
  1038. + return param_set_int(val, kp);
  1039. +}
  1040. +
  1041. +static const struct kernel_param_ops param_dgpu_power_ops = {
  1042. + .set = param_dgpu_power_set,
  1043. + .get = param_get_int,
  1044. +};
  1045. +
  1046. +static int param_dgpu_power_init = SHPS_DGPU_MP_POWER_OFF;
  1047. +static int param_dgpu_power_exit = SHPS_DGPU_MP_POWER_ON;
  1048. +static int param_dgpu_power_susp = SHPS_DGPU_MP_POWER_ASIS;
  1049. +static bool param_dtx_latch = true;
  1050. +
  1051. +module_param_cb(dgpu_power_init, &param_dgpu_power_ops, &param_dgpu_power_init, SHPS_DGPU_PARAM_PERM);
  1052. +module_param_cb(dgpu_power_exit, &param_dgpu_power_ops, &param_dgpu_power_exit, SHPS_DGPU_PARAM_PERM);
  1053. +module_param_cb(dgpu_power_susp, &param_dgpu_power_ops, &param_dgpu_power_susp, SHPS_DGPU_PARAM_PERM);
  1054. +module_param_named(dtx_latch, param_dtx_latch, bool, SHPS_DGPU_PARAM_PERM);
  1055. +
  1056. +MODULE_PARM_DESC(dgpu_power_init, "dGPU power state to be set on init (0: off / 1: on / 2: as-is, default: off)");
  1057. +MODULE_PARM_DESC(dgpu_power_exit, "dGPU power state to be set on exit (0: off / 1: on / 2: as-is, default: on)");
  1058. +MODULE_PARM_DESC(dgpu_power_susp, "dGPU power state to be set on exit (0: off / 1: on / 2: as-is, default: as-is)");
  1059. +MODULE_PARM_DESC(dtx_latch, "lock/unlock DTX base latch in accordance to power-state (Y/n)");
  1060. +
  1061. +
  1062. +static int dtx_cmd_simple(u8 cid)
  1063. +{
  1064. + struct surface_sam_ssh_rqst rqst = {
  1065. + .tc = SAM_DTX_TC,
  1066. + .cid = cid,
  1067. + .iid = 0,
  1068. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  1069. + .snc = 0,
  1070. + .cdl = 0,
  1071. + .pld = NULL,
  1072. + };
  1073. +
  1074. + return surface_sam_ssh_rqst(&rqst, NULL);
  1075. +}
  1076. +
  1077. +inline static int shps_dtx_latch_lock(void)
  1078. +{
  1079. + return dtx_cmd_simple(SAM_DTX_CID_LATCH_LOCK);
  1080. +}
  1081. +
  1082. +inline static int shps_dtx_latch_unlock(void)
  1083. +{
  1084. + return dtx_cmd_simple(SAM_DTX_CID_LATCH_UNLOCK);
  1085. +}
  1086. +
  1087. +
  1088. +static int shps_dgpu_dsm_get_pci_addr(struct platform_device *pdev, const char* entry)
  1089. +{
  1090. + acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  1091. + union acpi_object *result;
  1092. + union acpi_object *e0;
  1093. + union acpi_object *e1;
  1094. + union acpi_object *e2;
  1095. + u64 device_addr = 0;
  1096. + u8 bus, dev, fun;
  1097. + int i;
  1098. +
  1099. + result = acpi_evaluate_dsm_typed(handle, &SHPS_DSM_UUID, SHPS_DSM_REVISION,
  1100. + SHPS_DSM_GPU_ADDRS, NULL, ACPI_TYPE_PACKAGE);
  1101. +
  1102. + if (IS_ERR_OR_NULL(result))
  1103. + return result ? PTR_ERR(result) : -EIO;
  1104. +
  1105. + // three entries per device: name, address, <integer>
  1106. + for (i = 0; i + 2 < result->package.count; i += 3) {
  1107. + e0 = &result->package.elements[i];
  1108. + e1 = &result->package.elements[i + 1];
  1109. + e2 = &result->package.elements[i + 2];
  1110. +
  1111. + if (e0->type != ACPI_TYPE_STRING) {
  1112. + ACPI_FREE(result);
  1113. + return -EIO;
  1114. + }
  1115. +
  1116. + if (e1->type != ACPI_TYPE_INTEGER) {
  1117. + ACPI_FREE(result);
  1118. + return -EIO;
  1119. + }
  1120. +
  1121. + if (e2->type != ACPI_TYPE_INTEGER) {
  1122. + ACPI_FREE(result);
  1123. + return -EIO;
  1124. + }
  1125. +
  1126. + if (strncmp(e0->string.pointer, entry, 64) == 0)
  1127. + device_addr = e1->integer.value;
  1128. + }
  1129. +
  1130. + ACPI_FREE(result);
  1131. + if (device_addr == 0)
  1132. + return -ENODEV;
  1133. +
  1134. + // convert address
  1135. + bus = (device_addr & 0x0FF00000) >> 20;
  1136. + dev = (device_addr & 0x000F8000) >> 15;
  1137. + fun = (device_addr & 0x00007000) >> 12;
  1138. +
  1139. + return bus << 8 | PCI_DEVFN(dev, fun);
  1140. +}
  1141. +
  1142. +static struct pci_dev *shps_dgpu_dsm_get_pci_dev(struct platform_device *pdev, const char* entry)
  1143. +{
  1144. + struct pci_dev *dev;
  1145. + int addr;
  1146. +
  1147. + addr = shps_dgpu_dsm_get_pci_addr(pdev, entry);
  1148. + if (addr < 0)
  1149. + return ERR_PTR(addr);
  1150. +
  1151. + dev = pci_get_domain_bus_and_slot(0, (addr & 0xFF00) >> 8, addr & 0xFF);
  1152. + return dev ? dev : ERR_PTR(-ENODEV);
  1153. +}
  1154. +
  1155. +
  1156. +static int shps_dgpu_dsm_get_power_unlocked(struct platform_device *pdev)
  1157. +{
  1158. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1159. + struct gpio_desc *gpio = drvdata->gpio_dgpu_power;
  1160. + int status;
  1161. +
  1162. + status = gpiod_get_value_cansleep(gpio);
  1163. + if (status < 0)
  1164. + return status;
  1165. +
  1166. + return status == 0 ? SHPS_DGPU_POWER_OFF : SHPS_DGPU_POWER_ON;
  1167. +}
  1168. +
  1169. +static int shps_dgpu_dsm_get_power(struct platform_device *pdev)
  1170. +{
  1171. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1172. + int status;
  1173. +
  1174. + mutex_lock(&drvdata->lock);
  1175. + status = shps_dgpu_dsm_get_power_unlocked(pdev);
  1176. + mutex_unlock(&drvdata->lock);
  1177. +
  1178. + return status;
  1179. +}
  1180. +
  1181. +static int __shps_dgpu_dsm_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1182. +{
  1183. + acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  1184. + union acpi_object *result;
  1185. + union acpi_object param;
  1186. +
  1187. + dev_info(&pdev->dev, "setting dGPU direct power to \'%s\'\n", shps_dgpu_power_str(power));
  1188. +
  1189. + param.type = ACPI_TYPE_INTEGER;
  1190. + param.integer.value = power == SHPS_DGPU_POWER_ON;
  1191. +
  1192. + result = acpi_evaluate_dsm_typed(handle, &SHPS_DSM_UUID, SHPS_DSM_REVISION,
  1193. + SHPS_DSM_GPU_POWER, &param, ACPI_TYPE_BUFFER);
  1194. +
  1195. + if (IS_ERR_OR_NULL(result))
  1196. + return result ? PTR_ERR(result) : -EIO;
  1197. +
  1198. + // check for the expected result
  1199. + if (result->buffer.length != 1 || result->buffer.pointer[0] != 0) {
  1200. + ACPI_FREE(result);
  1201. + return -EIO;
  1202. + }
  1203. +
  1204. + ACPI_FREE(result);
  1205. + return 0;
  1206. +}
  1207. +
  1208. +static int shps_dgpu_dsm_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1209. +{
  1210. + int status;
  1211. +
  1212. + if (power != SHPS_DGPU_POWER_ON && power != SHPS_DGPU_POWER_OFF)
  1213. + return -EINVAL;
  1214. +
  1215. + status = shps_dgpu_dsm_get_power_unlocked(pdev);
  1216. + if (status < 0)
  1217. + return status;
  1218. + if (status == power)
  1219. + return 0;
  1220. +
  1221. + return __shps_dgpu_dsm_set_power_unlocked(pdev, power);
  1222. +}
  1223. +
  1224. +static int shps_dgpu_dsm_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1225. +{
  1226. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1227. + int status;
  1228. +
  1229. + mutex_lock(&drvdata->lock);
  1230. + status = shps_dgpu_dsm_set_power_unlocked(pdev, power);
  1231. + mutex_unlock(&drvdata->lock);
  1232. +
  1233. + return status;
  1234. +}
  1235. +
  1236. +
  1237. +static bool shps_rp_link_up(struct pci_dev *rp)
  1238. +{
  1239. + u16 lnksta = 0, sltsta = 0;
  1240. +
  1241. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA, &lnksta);
  1242. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA, &sltsta);
  1243. +
  1244. + return (lnksta & PCI_EXP_LNKSTA_DLLLA) || (sltsta & PCI_EXP_SLTSTA_PDS);
  1245. +}
  1246. +
  1247. +
  1248. +static int shps_dgpu_rp_get_power_unlocked(struct platform_device *pdev)
  1249. +{
  1250. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1251. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1252. +
  1253. + if (rp->current_state == PCI_D3hot || rp->current_state == PCI_D3cold)
  1254. + return SHPS_DGPU_POWER_OFF;
  1255. + else if (rp->current_state == PCI_UNKNOWN || rp->current_state == PCI_POWER_ERROR)
  1256. + return SHPS_DGPU_POWER_UNKNOWN;
  1257. + else
  1258. + return SHPS_DGPU_POWER_ON;
  1259. +}
  1260. +
  1261. +static int shps_dgpu_rp_get_power(struct platform_device *pdev)
  1262. +{
  1263. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1264. + int status;
  1265. +
  1266. + mutex_lock(&drvdata->lock);
  1267. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1268. + mutex_unlock(&drvdata->lock);
  1269. +
  1270. + return status;
  1271. +}
  1272. +
  1273. +static int __shps_dgpu_rp_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1274. +{
  1275. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1276. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1277. + int status, i;
  1278. +
  1279. + dev_info(&pdev->dev, "setting dGPU power state to \'%s\'\n", shps_dgpu_power_str(power));
  1280. +
  1281. + dbg_dump_drvsta(pdev, "__shps_dgpu_rp_set_power_unlocked.1");
  1282. + if (power == SHPS_DGPU_POWER_ON) {
  1283. + set_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state);
  1284. + pci_set_power_state(rp, PCI_D0);
  1285. +
  1286. + if (drvdata->dgpu_root_port_state)
  1287. + pci_load_and_free_saved_state(rp, &drvdata->dgpu_root_port_state);
  1288. +
  1289. + pci_restore_state(rp);
  1290. +
  1291. + if (!pci_is_enabled(rp))
  1292. + pci_enable_device(rp);
  1293. +
  1294. + pci_set_master(rp);
  1295. + clear_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state);
  1296. +
  1297. + set_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1298. + } else {
  1299. + if (!drvdata->dgpu_root_port_state) {
  1300. + pci_save_state(rp);
  1301. + drvdata->dgpu_root_port_state = pci_store_saved_state(rp);
  1302. + }
  1303. +
  1304. + /*
  1305. + * To properly update the hot-plug system we need to "remove" the dGPU
  1306. + * before disabling it and sending it to D3cold. Following this, we
  1307. + * need to wait for the link and slot status to actually change.
  1308. + */
  1309. + status = shps_dgpu_dsm_set_power_unlocked(pdev, SHPS_DGPU_POWER_OFF);
  1310. + if (status)
  1311. + return status;
  1312. +
  1313. + for (i = 0; i < 20 && shps_rp_link_up(rp); i++)
  1314. + msleep(50);
  1315. +
  1316. + if (shps_rp_link_up(rp))
  1317. + dev_err(&pdev->dev, "dGPU removal via DSM timed out\n");
  1318. +
  1319. + pci_clear_master(rp);
  1320. +
  1321. + if (pci_is_enabled(rp))
  1322. + pci_disable_device(rp);
  1323. +
  1324. + pci_set_power_state(rp, PCI_D3cold);
  1325. +
  1326. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1327. + }
  1328. + dbg_dump_drvsta(pdev, "__shps_dgpu_rp_set_power_unlocked.2");
  1329. +
  1330. + return 0;
  1331. +}
  1332. +
  1333. +static int shps_dgpu_rp_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1334. +{
  1335. + int status;
  1336. +
  1337. + if (power != SHPS_DGPU_POWER_ON && power != SHPS_DGPU_POWER_OFF)
  1338. + return -EINVAL;
  1339. +
  1340. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1341. + if (status < 0)
  1342. + return status;
  1343. + if (status == power)
  1344. + return 0;
  1345. +
  1346. + return __shps_dgpu_rp_set_power_unlocked(pdev, power);
  1347. +}
  1348. +
  1349. +static int shps_dgpu_rp_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1350. +{
  1351. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1352. + int status;
  1353. +
  1354. + mutex_lock(&drvdata->lock);
  1355. + status = shps_dgpu_rp_set_power_unlocked(pdev, power);
  1356. + mutex_unlock(&drvdata->lock);
  1357. +
  1358. + return status;
  1359. +}
  1360. +
  1361. +
  1362. +static int shps_dgpu_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1363. +{
  1364. + int status;
  1365. +
  1366. + if (!param_dtx_latch)
  1367. + return shps_dgpu_rp_set_power(pdev, power);
  1368. +
  1369. + if (power == SHPS_DGPU_POWER_ON) {
  1370. + status = shps_dtx_latch_lock();
  1371. + if (status)
  1372. + return status;
  1373. +
  1374. + status = shps_dgpu_rp_set_power(pdev, power);
  1375. + if (status)
  1376. + shps_dtx_latch_unlock();
  1377. +
  1378. + return status;
  1379. + } else {
  1380. + status = shps_dgpu_rp_set_power(pdev, power);
  1381. + if (status)
  1382. + return status;
  1383. +
  1384. + return shps_dtx_latch_unlock();
  1385. + }
  1386. +}
  1387. +
  1388. +
  1389. +static int shps_dgpu_is_present(struct platform_device *pdev)
  1390. +{
  1391. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1392. + return gpiod_get_value_cansleep(drvdata->gpio_dgpu_presence);
  1393. +}
  1394. +
  1395. +
  1396. +static ssize_t dgpu_power_show(struct device *dev, struct device_attribute *attr, char *data)
  1397. +{
  1398. + struct platform_device *pdev = to_platform_device(dev);
  1399. + int power = shps_dgpu_rp_get_power(pdev);
  1400. +
  1401. + if (power < 0)
  1402. + return power;
  1403. +
  1404. + return sprintf(data, "%s\n", shps_dgpu_power_str(power));
  1405. +}
  1406. +
  1407. +static ssize_t dgpu_power_store(struct device *dev, struct device_attribute *attr,
  1408. + const char *data, size_t count)
  1409. +{
  1410. + struct platform_device *pdev = to_platform_device(dev);
  1411. + enum shps_dgpu_power power;
  1412. + bool b = false;
  1413. + int status;
  1414. +
  1415. + status = kstrtobool(data, &b);
  1416. + if (status)
  1417. + return status;
  1418. +
  1419. + status = shps_dgpu_is_present(pdev);
  1420. + if (status <= 0)
  1421. + return status < 0 ? status : -EPERM;
  1422. +
  1423. + power = b ? SHPS_DGPU_POWER_ON : SHPS_DGPU_POWER_OFF;
  1424. + status = shps_dgpu_set_power(pdev, power);
  1425. +
  1426. + return status < 0 ? status : count;
  1427. +}
  1428. +
  1429. +static ssize_t dgpu_power_dsm_show(struct device *dev, struct device_attribute *attr, char *data)
  1430. +{
  1431. + struct platform_device *pdev = to_platform_device(dev);
  1432. + int power = shps_dgpu_dsm_get_power(pdev);
  1433. +
  1434. + if (power < 0)
  1435. + return power;
  1436. +
  1437. + return sprintf(data, "%s\n", shps_dgpu_power_str(power));
  1438. +}
  1439. +
  1440. +static ssize_t dgpu_power_dsm_store(struct device *dev, struct device_attribute *attr,
  1441. + const char *data, size_t count)
  1442. +{
  1443. + struct platform_device *pdev = to_platform_device(dev);
  1444. + enum shps_dgpu_power power;
  1445. + bool b = false;
  1446. + int status;
  1447. +
  1448. + status = kstrtobool(data, &b);
  1449. + if (status)
  1450. + return status;
  1451. +
  1452. + status = shps_dgpu_is_present(pdev);
  1453. + if (status <= 0)
  1454. + return status < 0 ? status : -EPERM;
  1455. +
  1456. + power = b ? SHPS_DGPU_POWER_ON : SHPS_DGPU_POWER_OFF;
  1457. + status = shps_dgpu_dsm_set_power(pdev, power);
  1458. +
  1459. + return status < 0 ? status : count;
  1460. +}
  1461. +
  1462. +static DEVICE_ATTR_RW(dgpu_power);
  1463. +static DEVICE_ATTR_RW(dgpu_power_dsm);
  1464. +
  1465. +static struct attribute *shps_power_attrs[] = {
  1466. + &dev_attr_dgpu_power.attr,
  1467. + &dev_attr_dgpu_power_dsm.attr,
  1468. + NULL,
  1469. +};
  1470. +ATTRIBUTE_GROUPS(shps_power);
  1471. +
  1472. +
  1473. +static void dbg_dump_power_states(struct platform_device *pdev, const char *prefix)
  1474. +{
  1475. + enum shps_dgpu_power power_dsm;
  1476. + enum shps_dgpu_power power_rp;
  1477. + int status;
  1478. +
  1479. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1480. + if (status < 0)
  1481. + dev_err(&pdev->dev, "%s: failed to get root-port power state: %d\n", prefix, status);
  1482. + power_rp = status;
  1483. +
  1484. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1485. + if (status < 0)
  1486. + dev_err(&pdev->dev, "%s: failed to get direct power state: %d\n", prefix, status);
  1487. + power_dsm = status;
  1488. +
  1489. + dev_dbg(&pdev->dev, "%s: root-port power state: %d\n", prefix, power_rp);
  1490. + dev_dbg(&pdev->dev, "%s: direct power state: %d\n", prefix, power_dsm);
  1491. +}
  1492. +
  1493. +static void dbg_dump_pciesta(struct platform_device *pdev, const char *prefix)
  1494. +{
  1495. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1496. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1497. + u16 lnksta, lnksta2, sltsta, sltsta2;
  1498. +
  1499. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA, &lnksta);
  1500. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA2, &lnksta2);
  1501. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA, &sltsta);
  1502. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA2, &sltsta2);
  1503. +
  1504. + dev_dbg(&pdev->dev, "%s: LNKSTA: 0x%04x", prefix, lnksta);
  1505. + dev_dbg(&pdev->dev, "%s: LNKSTA2: 0x%04x", prefix, lnksta2);
  1506. + dev_dbg(&pdev->dev, "%s: SLTSTA: 0x%04x", prefix, sltsta);
  1507. + dev_dbg(&pdev->dev, "%s: SLTSTA2: 0x%04x", prefix, sltsta2);
  1508. +}
  1509. +
  1510. +static void dbg_dump_drvsta(struct platform_device *pdev, const char *prefix)
  1511. +{
  1512. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1513. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1514. +
  1515. + dev_dbg(&pdev->dev, "%s: RP power: %d", prefix, rp->current_state);
  1516. + dev_dbg(&pdev->dev, "%s: RP state saved: %d", prefix, rp->state_saved);
  1517. + dev_dbg(&pdev->dev, "%s: RP state stored: %d", prefix, !!drvdata->dgpu_root_port_state);
  1518. + dev_dbg(&pdev->dev, "%s: RP enabled: %d", prefix, atomic_read(&rp->enable_cnt));
  1519. + dev_dbg(&pdev->dev, "%s: RP mastered: %d", prefix, rp->is_busmaster);
  1520. +}
  1521. +
  1522. +
  1523. +static int shps_pm_prepare(struct device *dev)
  1524. +{
  1525. + struct platform_device *pdev = to_platform_device(dev);
  1526. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1527. + bool pwrtgt;
  1528. + int status = 0;
  1529. +
  1530. + dbg_dump_power_states(pdev, "shps_pm_prepare");
  1531. +
  1532. + if (param_dgpu_power_susp != SHPS_DGPU_MP_POWER_ASIS) {
  1533. + pwrtgt = test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1534. +
  1535. + status = shps_dgpu_set_power(pdev, param_dgpu_power_susp);
  1536. + if (status) {
  1537. + dev_err(&pdev->dev, "failed to power %s dGPU: %d\n",
  1538. + param_dgpu_power_susp == SHPS_DGPU_MP_POWER_OFF ? "off" : "on",
  1539. + status);
  1540. + return status;
  1541. + }
  1542. +
  1543. + if (pwrtgt)
  1544. + set_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1545. + else
  1546. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1547. + }
  1548. +
  1549. + return 0;
  1550. +}
  1551. +
  1552. +static void shps_pm_complete(struct device *dev)
  1553. +{
  1554. + struct platform_device *pdev = to_platform_device(dev);
  1555. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1556. + int status;
  1557. +
  1558. + dbg_dump_power_states(pdev, "shps_pm_complete");
  1559. + dbg_dump_pciesta(pdev, "shps_pm_complete");
  1560. + dbg_dump_drvsta(pdev, "shps_pm_complete.1");
  1561. +
  1562. + // update power target, dGPU may have been detached while suspended
  1563. + status = shps_dgpu_is_present(pdev);
  1564. + if (status < 0) {
  1565. + dev_err(&pdev->dev, "failed to get dGPU presence: %d\n", status);
  1566. + return;
  1567. + } else if (status == 0) {
  1568. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1569. + }
  1570. +
  1571. + /*
  1572. + * During resume, the PCIe core will power on the root-port, which in turn
  1573. + * will power on the dGPU. Most of the state synchronization is already
  1574. + * handled via the SAN RQSG handler, so it is in a fully consistent
  1575. + * on-state here. If requested, turn it off here.
  1576. + *
  1577. + * As there seem to be some synchronization issues turning off the dGPU
  1578. + * directly after the power-on SAN RQSG notification during the resume
  1579. + * process, let's do this here.
  1580. + *
  1581. + * TODO/FIXME:
  1582. + * This does not combat unhandled power-ons when the device is not fully
  1583. + * resumed, i.e. re-suspended before shps_pm_complete is called. Those
  1584. + * should normally not be an issue, but the dGPU does get hot even though
  1585. + * it is suspended, so ideally we want to keep it off.
  1586. + */
  1587. + if (!test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state)) {
  1588. + status = shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_OFF);
  1589. + if (status)
  1590. + dev_err(&pdev->dev, "failed to power-off dGPU: %d\n", status);
  1591. + }
  1592. +
  1593. + dbg_dump_drvsta(pdev, "shps_pm_complete.2");
  1594. +}
  1595. +
  1596. +static int shps_pm_suspend(struct device *dev)
  1597. +{
  1598. + struct platform_device *pdev = to_platform_device(dev);
  1599. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1600. + int status;
  1601. +
  1602. + if (device_may_wakeup(dev)) {
  1603. + status = enable_irq_wake(drvdata->irq_base_presence);
  1604. + if (status)
  1605. + return status;
  1606. +
  1607. + set_bit(SHPS_STATE_BIT_WAKE_ENABLED, &drvdata->state);
  1608. + }
  1609. +
  1610. + return 0;
  1611. +}
  1612. +
  1613. +static int shps_pm_resume(struct device *dev)
  1614. +{
  1615. + struct platform_device *pdev = to_platform_device(dev);
  1616. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1617. + int status = 0;
  1618. +
  1619. + if (test_and_clear_bit(SHPS_STATE_BIT_WAKE_ENABLED, &drvdata->state)) {
  1620. + status = disable_irq_wake(drvdata->irq_base_presence);
  1621. + }
  1622. +
  1623. + return status;
  1624. +}
  1625. +
  1626. +static void shps_shutdown(struct platform_device *pdev)
  1627. +{
  1628. + int status;
  1629. +
  1630. + /*
  1631. + * Turn on dGPU before shutting down. This allows the core drivers to
  1632. + * properly shut down the device. If we don't do this, the pcieport driver
  1633. + * will complain that the device has already been disabled.
  1634. + */
  1635. + status = shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_ON);
  1636. + if (status)
  1637. + dev_err(&pdev->dev, "failed to turn on dGPU: %d\n", status);
  1638. +}
  1639. +
  1640. +static int shps_dgpu_detached(struct platform_device *pdev)
  1641. +{
  1642. + dbg_dump_power_states(pdev, "shps_dgpu_detached");
  1643. + return shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_OFF);
  1644. +}
  1645. +
  1646. +static int shps_dgpu_attached(struct platform_device *pdev)
  1647. +{
  1648. + dbg_dump_power_states(pdev, "shps_dgpu_attached");
  1649. + return 0;
  1650. +}
  1651. +
  1652. +static int shps_dgpu_powered_on(struct platform_device *pdev)
  1653. +{
  1654. + /*
  1655. + * This function gets called directly after a power-state transition of
  1656. + * the dGPU root port out of D3cold state, indicating a power-on of the
  1657. + * dGPU. Specifically, this function is called from the RQSG handler of
  1658. + * SAN, invoked by the ACPI _ON method of the dGPU root port. This means
  1659. + * that this function is run inside `pci_set_power_state(rp, ...)`
  1660. + * syncrhonously and thus returns before the `pci_set_power_state` call
  1661. + * does.
  1662. + *
  1663. + * `pci_set_power_state` may either be called by us or when the PCI
  1664. + * subsystem decides to power up the root port (e.g. during resume). Thus
  1665. + * we should use this function to ensure that the dGPU and root port
  1666. + * states are consistent when an unexpected power-up is encountered.
  1667. + */
  1668. +
  1669. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1670. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1671. + int status;
  1672. +
  1673. + dbg_dump_drvsta(pdev, "shps_dgpu_powered_on.1");
  1674. +
  1675. + // if we caused the root port to power-on, return
  1676. + if (test_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state))
  1677. + return 0;
  1678. +
  1679. + // if dGPU is not present, force power-target to off and return
  1680. + status = shps_dgpu_is_present(pdev);
  1681. + if (status == 0)
  1682. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1683. + if (status <= 0)
  1684. + return status;
  1685. +
  1686. + mutex_lock(&drvdata->lock);
  1687. +
  1688. + dbg_dump_power_states(pdev, "shps_dgpu_powered_on.1");
  1689. + dbg_dump_pciesta(pdev, "shps_dgpu_powered_on.1");
  1690. + if (drvdata->dgpu_root_port_state)
  1691. + pci_load_and_free_saved_state(rp, &drvdata->dgpu_root_port_state);
  1692. + pci_restore_state(rp);
  1693. + if (!pci_is_enabled(rp))
  1694. + pci_enable_device(rp);
  1695. + pci_set_master(rp);
  1696. + dbg_dump_drvsta(pdev, "shps_dgpu_powered_on.2");
  1697. + dbg_dump_power_states(pdev, "shps_dgpu_powered_on.2");
  1698. + dbg_dump_pciesta(pdev, "shps_dgpu_powered_on.2");
  1699. +
  1700. + mutex_unlock(&drvdata->lock);
  1701. +
  1702. + if (!test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state)) {
  1703. + dev_warn(&pdev->dev, "unexpected dGPU power-on detected");
  1704. + // TODO: schedule state re-check and update
  1705. + }
  1706. +
  1707. + return 0;
  1708. +}
  1709. +
  1710. +
  1711. +static int shps_dgpu_handle_rqsg(struct surface_sam_san_rqsg *rqsg, void *data)
  1712. +{
  1713. + struct platform_device *pdev = data;
  1714. +
  1715. + if (rqsg->tc == SAM_DGPU_TC && rqsg->cid == SAM_DGPU_CID_POWERON)
  1716. + return shps_dgpu_powered_on(pdev);
  1717. +
  1718. + dev_warn(&pdev->dev, "unimplemented dGPU request: RQSG(0x%02x, 0x%02x, 0x%02x)",
  1719. + rqsg->tc, rqsg->cid, rqsg->iid);
  1720. + return 0;
  1721. +}
  1722. +
  1723. +static irqreturn_t shps_dgpu_presence_irq(int irq, void *data)
  1724. +{
  1725. + struct platform_device *pdev = data;
  1726. + bool dgpu_present;
  1727. + int status;
  1728. +
  1729. + status = shps_dgpu_is_present(pdev);
  1730. + if (status < 0) {
  1731. + dev_err(&pdev->dev, "failed to check physical dGPU presence: %d\n", status);
  1732. + return IRQ_HANDLED;
  1733. + }
  1734. +
  1735. + dgpu_present = status != 0;
  1736. + dev_info(&pdev->dev, "dGPU physically %s\n", dgpu_present ? "attached" : "detached");
  1737. +
  1738. + if (dgpu_present)
  1739. + status = shps_dgpu_attached(pdev);
  1740. + else
  1741. + status = shps_dgpu_detached(pdev);
  1742. +
  1743. + if (status)
  1744. + dev_err(&pdev->dev, "error handling dGPU interrupt: %d\n", status);
  1745. +
  1746. + return IRQ_HANDLED;
  1747. +}
  1748. +
  1749. +static irqreturn_t shps_base_presence_irq(int irq, void *data)
  1750. +{
  1751. + return IRQ_HANDLED; // nothing to do, just wake
  1752. +}
  1753. +
  1754. +
  1755. +static int shps_gpios_setup(struct platform_device *pdev)
  1756. +{
  1757. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1758. + struct gpio_desc *gpio_dgpu_power;
  1759. + struct gpio_desc *gpio_dgpu_presence;
  1760. + struct gpio_desc *gpio_base_presence;
  1761. + int status;
  1762. +
  1763. + // get GPIOs
  1764. + gpio_dgpu_power = devm_gpiod_get(&pdev->dev, "dgpu_power", GPIOD_IN);
  1765. + if (IS_ERR(gpio_dgpu_power)) {
  1766. + status = PTR_ERR(gpio_dgpu_power);
  1767. + goto err_out;
  1768. + }
  1769. +
  1770. + gpio_dgpu_presence = devm_gpiod_get(&pdev->dev, "dgpu_presence", GPIOD_IN);
  1771. + if (IS_ERR(gpio_dgpu_presence)) {
  1772. + status = PTR_ERR(gpio_dgpu_presence);
  1773. + goto err_out;
  1774. + }
  1775. +
  1776. + gpio_base_presence = devm_gpiod_get(&pdev->dev, "base_presence", GPIOD_IN);
  1777. + if (IS_ERR(gpio_base_presence)) {
  1778. + status = PTR_ERR(gpio_base_presence);
  1779. + goto err_out;
  1780. + }
  1781. +
  1782. + // export GPIOs
  1783. + status = gpiod_export(gpio_dgpu_power, false);
  1784. + if (status)
  1785. + goto err_out;
  1786. +
  1787. + status = gpiod_export(gpio_dgpu_presence, false);
  1788. + if (status)
  1789. + goto err_export_dgpu_presence;
  1790. +
  1791. + status = gpiod_export(gpio_base_presence, false);
  1792. + if (status)
  1793. + goto err_export_base_presence;
  1794. +
  1795. + // create sysfs links
  1796. + status = gpiod_export_link(&pdev->dev, "gpio-dgpu_power", gpio_dgpu_power);
  1797. + if (status)
  1798. + goto err_link_dgpu_power;
  1799. +
  1800. + status = gpiod_export_link(&pdev->dev, "gpio-dgpu_presence", gpio_dgpu_presence);
  1801. + if (status)
  1802. + goto err_link_dgpu_presence;
  1803. +
  1804. + status = gpiod_export_link(&pdev->dev, "gpio-base_presence", gpio_base_presence);
  1805. + if (status)
  1806. + goto err_link_base_presence;
  1807. +
  1808. + drvdata->gpio_dgpu_power = gpio_dgpu_power;
  1809. + drvdata->gpio_dgpu_presence = gpio_dgpu_presence;
  1810. + drvdata->gpio_base_presence = gpio_base_presence;
  1811. + return 0;
  1812. +
  1813. +err_link_base_presence:
  1814. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_presence");
  1815. +err_link_dgpu_presence:
  1816. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_power");
  1817. +err_link_dgpu_power:
  1818. + gpiod_unexport(gpio_base_presence);
  1819. +err_export_base_presence:
  1820. + gpiod_unexport(gpio_dgpu_presence);
  1821. +err_export_dgpu_presence:
  1822. + gpiod_unexport(gpio_dgpu_power);
  1823. +err_out:
  1824. + return status;
  1825. +}
  1826. +
  1827. +static void shps_gpios_remove(struct platform_device *pdev)
  1828. +{
  1829. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1830. +
  1831. + sysfs_remove_link(&pdev->dev.kobj, "gpio-base_presence");
  1832. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_presence");
  1833. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_power");
  1834. + gpiod_unexport(drvdata->gpio_base_presence);
  1835. + gpiod_unexport(drvdata->gpio_dgpu_presence);
  1836. + gpiod_unexport(drvdata->gpio_dgpu_power);
  1837. +}
  1838. +
  1839. +static int shps_gpios_setup_irq(struct platform_device *pdev)
  1840. +{
  1841. + const int irqf_dgpu = IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
  1842. + const int irqf_base = IRQF_SHARED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
  1843. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1844. + int status;
  1845. +
  1846. + status = gpiod_to_irq(drvdata->gpio_base_presence);
  1847. + if (status < 0)
  1848. + return status;
  1849. + drvdata->irq_base_presence = status;
  1850. +
  1851. + status = gpiod_to_irq(drvdata->gpio_dgpu_presence);
  1852. + if (status < 0)
  1853. + return status;
  1854. + drvdata->irq_dgpu_presence = status;
  1855. +
  1856. + status = request_irq(drvdata->irq_base_presence,
  1857. + shps_base_presence_irq, irqf_base,
  1858. + "shps_base_presence_irq", pdev);
  1859. + if (status)
  1860. + return status;
  1861. +
  1862. + status = request_threaded_irq(drvdata->irq_dgpu_presence,
  1863. + NULL, shps_dgpu_presence_irq, irqf_dgpu,
  1864. + "shps_dgpu_presence_irq", pdev);
  1865. + if (status) {
  1866. + free_irq(drvdata->irq_base_presence, pdev);
  1867. + return status;
  1868. + }
  1869. +
  1870. + return 0;
  1871. +}
  1872. +
  1873. +static void shps_gpios_remove_irq(struct platform_device *pdev)
  1874. +{
  1875. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1876. +
  1877. + free_irq(drvdata->irq_base_presence, pdev);
  1878. + free_irq(drvdata->irq_dgpu_presence, pdev);
  1879. +}
  1880. +
  1881. +static int shps_probe(struct platform_device *pdev)
  1882. +{
  1883. + struct acpi_device *shps_dev = ACPI_COMPANION(&pdev->dev);
  1884. + struct shps_driver_data *drvdata;
  1885. + struct device_link *link;
  1886. + int power, status;
  1887. +
  1888. + if (gpiod_count(&pdev->dev, NULL) < 0)
  1889. + return -ENODEV;
  1890. +
  1891. + // link to SSH
  1892. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  1893. + if (status) {
  1894. + return status == -ENXIO ? -EPROBE_DEFER : status;
  1895. + }
  1896. +
  1897. + // link to SAN
  1898. + status = surface_sam_san_consumer_register(&pdev->dev, 0);
  1899. + if (status) {
  1900. + return status == -ENXIO ? -EPROBE_DEFER : status;
  1901. + }
  1902. +
  1903. + status = acpi_dev_add_driver_gpios(shps_dev, shps_acpi_gpios);
  1904. + if (status)
  1905. + return status;
  1906. +
  1907. + drvdata = kzalloc(sizeof(struct shps_driver_data), GFP_KERNEL);
  1908. + if (!drvdata) {
  1909. + status = -ENOMEM;
  1910. + goto err_drvdata;
  1911. + }
  1912. + mutex_init(&drvdata->lock);
  1913. + platform_set_drvdata(pdev, drvdata);
  1914. +
  1915. + drvdata->dgpu_root_port = shps_dgpu_dsm_get_pci_dev(pdev, SHPS_DSM_GPU_ADDRS_RP);
  1916. + if (IS_ERR(drvdata->dgpu_root_port)) {
  1917. + status = PTR_ERR(drvdata->dgpu_root_port);
  1918. + goto err_rp_lookup;
  1919. + }
  1920. +
  1921. + status = shps_gpios_setup(pdev);
  1922. + if (status)
  1923. + goto err_gpio;
  1924. +
  1925. + status = shps_gpios_setup_irq(pdev);
  1926. + if (status)
  1927. + goto err_gpio_irqs;
  1928. +
  1929. + status = device_add_groups(&pdev->dev, shps_power_groups);
  1930. + if (status)
  1931. + goto err_devattr;
  1932. +
  1933. + link = device_link_add(&pdev->dev, &drvdata->dgpu_root_port->dev,
  1934. + DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER);
  1935. + if (!link)
  1936. + goto err_devlink;
  1937. +
  1938. + surface_sam_san_set_rqsg_handler(shps_dgpu_handle_rqsg, pdev);
  1939. +
  1940. + // if dGPU is not present turn-off root-port, else obey module param
  1941. + status = shps_dgpu_is_present(pdev);
  1942. + if (status < 0)
  1943. + goto err_devlink;
  1944. +
  1945. + power = status == 0 ? SHPS_DGPU_POWER_OFF : param_dgpu_power_init;
  1946. + if (power != SHPS_DGPU_MP_POWER_ASIS) {
  1947. + status = shps_dgpu_set_power(pdev, power);
  1948. + if (status)
  1949. + goto err_devlink;
  1950. + }
  1951. +
  1952. + device_init_wakeup(&pdev->dev, true);
  1953. + return 0;
  1954. +
  1955. +err_devlink:
  1956. + device_remove_groups(&pdev->dev, shps_power_groups);
  1957. +err_devattr:
  1958. + shps_gpios_remove_irq(pdev);
  1959. +err_gpio_irqs:
  1960. + shps_gpios_remove(pdev);
  1961. +err_gpio:
  1962. + pci_dev_put(drvdata->dgpu_root_port);
  1963. +err_rp_lookup:
  1964. + platform_set_drvdata(pdev, NULL);
  1965. + kfree(drvdata);
  1966. +err_drvdata:
  1967. + acpi_dev_remove_driver_gpios(shps_dev);
  1968. + return status;
  1969. +}
  1970. +
  1971. +static int shps_remove(struct platform_device *pdev)
  1972. +{
  1973. + struct acpi_device *shps_dev = ACPI_COMPANION(&pdev->dev);
  1974. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1975. + int status;
  1976. +
  1977. + if (param_dgpu_power_exit != SHPS_DGPU_MP_POWER_ASIS) {
  1978. + status = shps_dgpu_set_power(pdev, param_dgpu_power_exit);
  1979. + if (status)
  1980. + dev_err(&pdev->dev, "failed to set dGPU power state: %d\n", status);
  1981. + }
  1982. +
  1983. + device_set_wakeup_capable(&pdev->dev, false);
  1984. + surface_sam_san_set_rqsg_handler(NULL, NULL);
  1985. + device_remove_groups(&pdev->dev, shps_power_groups);
  1986. + shps_gpios_remove_irq(pdev);
  1987. + shps_gpios_remove(pdev);
  1988. + pci_dev_put(drvdata->dgpu_root_port);
  1989. + platform_set_drvdata(pdev, NULL);
  1990. + kfree(drvdata);
  1991. +
  1992. + acpi_dev_remove_driver_gpios(shps_dev);
  1993. + return 0;
  1994. +}
  1995. +
  1996. +
  1997. +static const struct dev_pm_ops shps_pm_ops = {
  1998. + .prepare = shps_pm_prepare,
  1999. + .complete = shps_pm_complete,
  2000. + .suspend = shps_pm_suspend,
  2001. + .resume = shps_pm_resume,
  2002. +};
  2003. +
  2004. +static const struct acpi_device_id shps_acpi_match[] = {
  2005. + { "MSHW0153", 0 },
  2006. + { },
  2007. +};
  2008. +MODULE_DEVICE_TABLE(acpi, shps_acpi_match);
  2009. +
  2010. +struct platform_driver surface_sam_hps = {
  2011. + .probe = shps_probe,
  2012. + .remove = shps_remove,
  2013. + .shutdown = shps_shutdown,
  2014. + .driver = {
  2015. + .name = "surface_dgpu_hps",
  2016. + .acpi_match_table = ACPI_PTR(shps_acpi_match),
  2017. + .pm = &shps_pm_ops,
  2018. + },
  2019. +};
  2020. +module_platform_driver(surface_sam_hps);
  2021. +
  2022. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  2023. +MODULE_DESCRIPTION("Surface Hot-Plug System (HPS) and dGPU power-state Driver for Surface Book 2");
  2024. +MODULE_LICENSE("GPL v2");
  2025. diff --git a/drivers/platform/x86/surface_sam/surface_sam_san.c b/drivers/platform/x86/surface_sam/surface_sam_san.c
  2026. new file mode 100644
  2027. index 000000000000..aa0cfc4262be
  2028. --- /dev/null
  2029. +++ b/drivers/platform/x86/surface_sam/surface_sam_san.c
  2030. @@ -0,0 +1,901 @@
  2031. +/*
  2032. + * Surface ACPI Notify (SAN) and ACPI integration driver for SAM.
  2033. + * Translates communication from ACPI to SSH and back.
  2034. + */
  2035. +
  2036. +#include <linux/acpi.h>
  2037. +#include <linux/delay.h>
  2038. +#include <linux/jiffies.h>
  2039. +#include <linux/kernel.h>
  2040. +#include <linux/platform_device.h>
  2041. +
  2042. +#include "surface_sam_ssh.h"
  2043. +#include "surface_sam_san.h"
  2044. +
  2045. +
  2046. +#define SAN_RQST_RETRY 5
  2047. +
  2048. +#define SAN_DSM_REVISION 0
  2049. +#define SAN_DSM_FN_NOTIFY_SENSOR_TRIP_POINT 0x09
  2050. +
  2051. +static const guid_t SAN_DSM_UUID =
  2052. + GUID_INIT(0x93b666c5, 0x70c6, 0x469f, 0xa2, 0x15, 0x3d,
  2053. + 0x48, 0x7c, 0x91, 0xab, 0x3c);
  2054. +
  2055. +#define SAM_EVENT_DELAY_PWR_ADAPTER msecs_to_jiffies(5000)
  2056. +#define SAM_EVENT_DELAY_PWR_BST msecs_to_jiffies(2500)
  2057. +
  2058. +#define SAM_EVENT_PWR_TC 0x02
  2059. +#define SAM_EVENT_PWR_RQID 0x0002
  2060. +#define SAM_EVENT_PWR_CID_BIX 0x15
  2061. +#define SAM_EVENT_PWR_CID_BST 0x16
  2062. +#define SAM_EVENT_PWR_CID_ADAPTER 0x17
  2063. +#define SAM_EVENT_PWR_CID_DPTF 0x4f
  2064. +
  2065. +#define SAM_EVENT_TEMP_TC 0x03
  2066. +#define SAM_EVENT_TEMP_RQID 0x0003
  2067. +#define SAM_EVENT_TEMP_CID_NOTIFY_SENSOR_TRIP_POINT 0x0b
  2068. +
  2069. +#define SAN_RQST_TAG "surface_sam_san: rqst: "
  2070. +#define SAN_RQSG_TAG "surface_sam_san: rqsg: "
  2071. +
  2072. +#define SAN_QUIRK_BASE_STATE_DELAY 1000
  2073. +
  2074. +
  2075. +struct san_acpi_consumer {
  2076. + char *path;
  2077. + bool required;
  2078. + u32 flags;
  2079. +};
  2080. +
  2081. +struct san_opreg_context {
  2082. + struct acpi_connection_info connection;
  2083. + struct device *dev;
  2084. +};
  2085. +
  2086. +struct san_consumer_link {
  2087. + const struct san_acpi_consumer *properties;
  2088. + struct device_link *link;
  2089. +};
  2090. +
  2091. +struct san_consumers {
  2092. + u32 num;
  2093. + struct san_consumer_link *links;
  2094. +};
  2095. +
  2096. +struct san_drvdata {
  2097. + struct san_opreg_context opreg_ctx;
  2098. + struct san_consumers consumers;
  2099. + bool has_power_events;
  2100. +};
  2101. +
  2102. +struct gsb_data_in {
  2103. + u8 cv;
  2104. +} __packed;
  2105. +
  2106. +struct gsb_data_rqsx {
  2107. + u8 cv; // command value (should be 0x01 or 0x03)
  2108. + u8 tc; // target controller
  2109. + u8 tid; // expected to be 0x01, could be revision
  2110. + u8 iid; // target sub-controller (e.g. primary vs. secondary battery)
  2111. + u8 snc; // expect-response-flag
  2112. + u8 cid; // command ID
  2113. + u8 cdl; // payload length
  2114. + u8 _pad; // padding
  2115. + u8 pld[0]; // payload
  2116. +} __packed;
  2117. +
  2118. +struct gsb_data_etwl {
  2119. + u8 cv; // command value (should be 0x02)
  2120. + u8 etw3; // ?
  2121. + u8 etw4; // ?
  2122. + u8 msg[0]; // error message (ASCIIZ)
  2123. +} __packed;
  2124. +
  2125. +struct gsb_data_out {
  2126. + u8 status; // _SSH communication status
  2127. + u8 len; // _SSH payload length
  2128. + u8 pld[0]; // _SSH payload
  2129. +} __packed;
  2130. +
  2131. +union gsb_buffer_data {
  2132. + struct gsb_data_in in; // common input
  2133. + struct gsb_data_rqsx rqsx; // RQSX input
  2134. + struct gsb_data_etwl etwl; // ETWL input
  2135. + struct gsb_data_out out; // output
  2136. +};
  2137. +
  2138. +struct gsb_buffer {
  2139. + u8 status; // GSB AttribRawProcess status
  2140. + u8 len; // GSB AttribRawProcess length
  2141. + union gsb_buffer_data data;
  2142. +} __packed;
  2143. +
  2144. +
  2145. +enum san_pwr_event {
  2146. + SAN_PWR_EVENT_BAT1_STAT = 0x03,
  2147. + SAN_PWR_EVENT_BAT1_INFO = 0x04,
  2148. + SAN_PWR_EVENT_ADP1_STAT = 0x05,
  2149. + SAN_PWR_EVENT_ADP1_INFO = 0x06,
  2150. + SAN_PWR_EVENT_BAT2_STAT = 0x07,
  2151. + SAN_PWR_EVENT_BAT2_INFO = 0x08,
  2152. +};
  2153. +
  2154. +
  2155. +static int sam_san_default_rqsg_handler(struct surface_sam_san_rqsg *rqsg, void *data);
  2156. +
  2157. +struct sam_san_rqsg_if {
  2158. + struct mutex lock;
  2159. + struct device *san_dev;
  2160. + surface_sam_san_rqsg_handler_fn handler;
  2161. + void *handler_data;
  2162. +};
  2163. +
  2164. +static struct sam_san_rqsg_if rqsg_if = {
  2165. + .lock = __MUTEX_INITIALIZER(rqsg_if.lock),
  2166. + .san_dev = NULL,
  2167. + .handler = sam_san_default_rqsg_handler,
  2168. + .handler_data = NULL,
  2169. +};
  2170. +
  2171. +int surface_sam_san_consumer_register(struct device *consumer, u32 flags)
  2172. +{
  2173. + const u32 valid = DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE;
  2174. + int status;
  2175. +
  2176. + if ((flags | valid) != valid)
  2177. + return -EINVAL;
  2178. +
  2179. + flags |= DL_FLAG_AUTOREMOVE_CONSUMER;
  2180. +
  2181. + mutex_lock(&rqsg_if.lock);
  2182. + if (rqsg_if.san_dev)
  2183. + status = device_link_add(consumer, rqsg_if.san_dev, flags) ? 0 : -EINVAL;
  2184. + else
  2185. + status = -ENXIO;
  2186. + mutex_unlock(&rqsg_if.lock);
  2187. + return status;
  2188. +}
  2189. +EXPORT_SYMBOL_GPL(surface_sam_san_consumer_register);
  2190. +
  2191. +int surface_sam_san_set_rqsg_handler(surface_sam_san_rqsg_handler_fn fn, void *data)
  2192. +{
  2193. + int status = -EBUSY;
  2194. +
  2195. + mutex_lock(&rqsg_if.lock);
  2196. +
  2197. + if (rqsg_if.handler == sam_san_default_rqsg_handler || !fn) {
  2198. + rqsg_if.handler = fn ? fn : sam_san_default_rqsg_handler;
  2199. + rqsg_if.handler_data = data;
  2200. + status = 0;
  2201. + }
  2202. +
  2203. + mutex_unlock(&rqsg_if.lock);
  2204. + return status;
  2205. +}
  2206. +EXPORT_SYMBOL_GPL(surface_sam_san_set_rqsg_handler);
  2207. +
  2208. +int san_call_rqsg_handler(struct surface_sam_san_rqsg *rqsg)
  2209. +{
  2210. + int status;
  2211. +
  2212. + mutex_lock(&rqsg_if.lock);
  2213. + status = rqsg_if.handler(rqsg, rqsg_if.handler_data);
  2214. + mutex_unlock(&rqsg_if.lock);
  2215. +
  2216. + return status;
  2217. +}
  2218. +
  2219. +static int sam_san_default_rqsg_handler(struct surface_sam_san_rqsg *rqsg, void *data)
  2220. +{
  2221. + pr_warn(SAN_RQSG_TAG "unhandled request: RQSG(0x%02x, 0x%02x, 0x%02x)\n",
  2222. + rqsg->tc, rqsg->cid, rqsg->iid);
  2223. +
  2224. + return 0;
  2225. +}
  2226. +
  2227. +
  2228. +static int san_acpi_notify_power_event(struct device *dev, enum san_pwr_event event)
  2229. +{
  2230. + acpi_handle san = ACPI_HANDLE(dev);
  2231. + union acpi_object *obj;
  2232. +
  2233. + dev_dbg(dev, "notify power event 0x%02x\n", event);
  2234. + obj = acpi_evaluate_dsm_typed(san, &SAN_DSM_UUID, SAN_DSM_REVISION,
  2235. + (u8) event, NULL, ACPI_TYPE_BUFFER);
  2236. +
  2237. + if (IS_ERR_OR_NULL(obj)) {
  2238. + return obj ? PTR_ERR(obj) : -ENXIO;
  2239. + }
  2240. +
  2241. + if (obj->buffer.length != 1 || obj->buffer.pointer[0] != 0) {
  2242. + dev_err(dev, "got unexpected result from _DSM\n");
  2243. + return -EFAULT;
  2244. + }
  2245. +
  2246. + ACPI_FREE(obj);
  2247. + return 0;
  2248. +}
  2249. +
  2250. +static int san_acpi_notify_sensor_trip_point(struct device *dev, u8 iid)
  2251. +{
  2252. + acpi_handle san = ACPI_HANDLE(dev);
  2253. + union acpi_object *obj;
  2254. + union acpi_object param;
  2255. +
  2256. + param.type = ACPI_TYPE_INTEGER;
  2257. + param.integer.value = iid;
  2258. +
  2259. + obj = acpi_evaluate_dsm_typed(san, &SAN_DSM_UUID, SAN_DSM_REVISION,
  2260. + SAN_DSM_FN_NOTIFY_SENSOR_TRIP_POINT,
  2261. + &param, ACPI_TYPE_BUFFER);
  2262. +
  2263. + if (IS_ERR_OR_NULL(obj)) {
  2264. + return obj ? PTR_ERR(obj) : -ENXIO;
  2265. + }
  2266. +
  2267. + if (obj->buffer.length != 1 || obj->buffer.pointer[0] != 0) {
  2268. + dev_err(dev, "got unexpected result from _DSM\n");
  2269. + return -EFAULT;
  2270. + }
  2271. +
  2272. + ACPI_FREE(obj);
  2273. + return 0;
  2274. +}
  2275. +
  2276. +
  2277. +inline static int san_evt_power_adapter(struct device *dev, struct surface_sam_ssh_event *event)
  2278. +{
  2279. + int status;
  2280. +
  2281. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_ADP1_STAT);
  2282. + if (status) {
  2283. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2284. + return status;
  2285. + }
  2286. +
  2287. + /*
  2288. + * Enusre that the battery states get updated correctly.
  2289. + * When the battery is fully charged and an adapter is plugged in, it
  2290. + * sometimes is not updated correctly, instead showing it as charging.
  2291. + * Explicitly trigger battery updates to fix this.
  2292. + */
  2293. +
  2294. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_BAT1_STAT);
  2295. + if (status) {
  2296. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2297. + return status;
  2298. + }
  2299. +
  2300. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_BAT2_STAT);
  2301. + if (status) {
  2302. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2303. + return status;
  2304. + }
  2305. +
  2306. + return 0;
  2307. +}
  2308. +
  2309. +inline static int san_evt_power_bix(struct device *dev, struct surface_sam_ssh_event *event)
  2310. +{
  2311. + enum san_pwr_event evcode;
  2312. + int status;
  2313. +
  2314. + if (event->iid == 0x02) {
  2315. + evcode = SAN_PWR_EVENT_BAT2_INFO;
  2316. + } else {
  2317. + evcode = SAN_PWR_EVENT_BAT1_INFO;
  2318. + }
  2319. +
  2320. + status = san_acpi_notify_power_event(dev, evcode);
  2321. + if (status) {
  2322. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2323. + return status;
  2324. + }
  2325. +
  2326. + return 0;
  2327. +}
  2328. +
  2329. +inline static int san_evt_power_bst(struct device *dev, struct surface_sam_ssh_event *event)
  2330. +{
  2331. + enum san_pwr_event evcode;
  2332. + int status;
  2333. +
  2334. + if (event->iid == 0x02) {
  2335. + evcode = SAN_PWR_EVENT_BAT2_STAT;
  2336. + } else {
  2337. + evcode = SAN_PWR_EVENT_BAT1_STAT;
  2338. + }
  2339. +
  2340. + status = san_acpi_notify_power_event(dev, evcode);
  2341. + if (status) {
  2342. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2343. + return status;
  2344. + }
  2345. +
  2346. + return 0;
  2347. +}
  2348. +
  2349. +static unsigned long san_evt_power_delay(struct surface_sam_ssh_event *event, void *data)
  2350. +{
  2351. + switch (event->cid) {
  2352. + case SAM_EVENT_PWR_CID_ADAPTER:
  2353. + /*
  2354. + * Wait for battery state to update before signalling adapter change.
  2355. + */
  2356. + return SAM_EVENT_DELAY_PWR_ADAPTER;
  2357. +
  2358. + case SAM_EVENT_PWR_CID_BST:
  2359. + /*
  2360. + * Ensure we do not miss anything important due to caching.
  2361. + */
  2362. + return SAM_EVENT_DELAY_PWR_BST;
  2363. +
  2364. + case SAM_EVENT_PWR_CID_BIX:
  2365. + case SAM_EVENT_PWR_CID_DPTF:
  2366. + default:
  2367. + return 0;
  2368. + }
  2369. +}
  2370. +
  2371. +static int san_evt_power(struct surface_sam_ssh_event *event, void *data)
  2372. +{
  2373. + struct device *dev = (struct device *)data;
  2374. +
  2375. + switch (event->cid) {
  2376. + case SAM_EVENT_PWR_CID_BIX:
  2377. + return san_evt_power_bix(dev, event);
  2378. +
  2379. + case SAM_EVENT_PWR_CID_BST:
  2380. + return san_evt_power_bst(dev, event);
  2381. +
  2382. + case SAM_EVENT_PWR_CID_ADAPTER:
  2383. + return san_evt_power_adapter(dev, event);
  2384. +
  2385. + case SAM_EVENT_PWR_CID_DPTF:
  2386. + /*
  2387. + * Ignored for now.
  2388. + * This signals a change in Intel DPTF PMAX, and possibly other
  2389. + * fields. Ignore for now as there is no corresponding _DSM call and
  2390. + * DPTF is implemented via a separate INT3407 device.
  2391. + *
  2392. + * The payload of this event is: [u32 PMAX, unknown...].
  2393. + */
  2394. + return 0;
  2395. +
  2396. + default:
  2397. + dev_warn(dev, "unhandled power event (cid = %x)\n", event->cid);
  2398. + }
  2399. +
  2400. + return 0;
  2401. +}
  2402. +
  2403. +
  2404. +inline static int san_evt_thermal_notify(struct device *dev, struct surface_sam_ssh_event *event)
  2405. +{
  2406. + int status;
  2407. +
  2408. + status = san_acpi_notify_sensor_trip_point(dev, event->iid);
  2409. + if (status) {
  2410. + dev_err(dev, "error handling thermal event (cid = %x)\n", event->cid);
  2411. + return status;
  2412. + }
  2413. +
  2414. + return 0;
  2415. +}
  2416. +
  2417. +static int san_evt_thermal(struct surface_sam_ssh_event *event, void *data)
  2418. +{
  2419. + struct device *dev = (struct device *)data;
  2420. +
  2421. + switch (event->cid) {
  2422. + case SAM_EVENT_TEMP_CID_NOTIFY_SENSOR_TRIP_POINT:
  2423. + return san_evt_thermal_notify(dev, event);
  2424. +
  2425. + default:
  2426. + dev_warn(dev, "unhandled thermal event (cid = %x)\n", event->cid);
  2427. + }
  2428. +
  2429. + return 0;
  2430. +}
  2431. +
  2432. +
  2433. +static struct gsb_data_rqsx
  2434. +*san_validate_rqsx(struct device *dev, const char *type, struct gsb_buffer *buffer)
  2435. +{
  2436. + struct gsb_data_rqsx *rqsx = &buffer->data.rqsx;
  2437. +
  2438. + if (buffer->len < 8) {
  2439. + dev_err(dev, "invalid %s package (len = %d)\n",
  2440. + type, buffer->len);
  2441. + return NULL;
  2442. + }
  2443. +
  2444. + if (rqsx->cdl != buffer->len - 8) {
  2445. + dev_err(dev, "bogus %s package (len = %d, cdl = %d)\n",
  2446. + type, buffer->len, rqsx->cdl);
  2447. + return NULL;
  2448. + }
  2449. +
  2450. + if (rqsx->tid != 0x01) {
  2451. + dev_warn(dev, "unsupported %s package (tid = 0x%02x)\n",
  2452. + type, rqsx->tid);
  2453. + return NULL;
  2454. + }
  2455. +
  2456. + return rqsx;
  2457. +}
  2458. +
  2459. +static acpi_status
  2460. +san_etwl(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2461. +{
  2462. + struct gsb_data_etwl *etwl = &buffer->data.etwl;
  2463. +
  2464. + if (buffer->len < 3) {
  2465. + dev_err(ctx->dev, "invalid ETWL package (len = %d)\n", buffer->len);
  2466. + return AE_OK;
  2467. + }
  2468. +
  2469. + dev_err(ctx->dev, "ETWL(0x%02x, 0x%02x): %.*s\n",
  2470. + etwl->etw3, etwl->etw4,
  2471. + buffer->len - 3, (char *)etwl->msg);
  2472. +
  2473. + // indicate success
  2474. + buffer->status = 0x00;
  2475. + buffer->len = 0x00;
  2476. +
  2477. + return AE_OK;
  2478. +}
  2479. +
  2480. +static acpi_status
  2481. +san_rqst(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2482. +{
  2483. + struct gsb_data_rqsx *gsb_rqst = san_validate_rqsx(ctx->dev, "RQST", buffer);
  2484. + struct surface_sam_ssh_rqst rqst = {};
  2485. + struct surface_sam_ssh_buf result = {};
  2486. + int status = 0;
  2487. + int try;
  2488. +
  2489. + if (!gsb_rqst) {
  2490. + return AE_OK;
  2491. + }
  2492. +
  2493. + rqst.tc = gsb_rqst->tc;
  2494. + rqst.cid = gsb_rqst->cid;
  2495. + rqst.iid = gsb_rqst->iid;
  2496. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  2497. + rqst.snc = gsb_rqst->snc;
  2498. + rqst.cdl = gsb_rqst->cdl;
  2499. + rqst.pld = &gsb_rqst->pld[0];
  2500. +
  2501. + result.cap = SURFACE_SAM_SSH_MAX_RQST_RESPONSE;
  2502. + result.len = 0;
  2503. + result.data = kzalloc(result.cap, GFP_KERNEL);
  2504. +
  2505. + if (!result.data) {
  2506. + return AE_NO_MEMORY;
  2507. + }
  2508. +
  2509. + for (try = 0; try < SAN_RQST_RETRY; try++) {
  2510. + if (try) {
  2511. + dev_warn(ctx->dev, SAN_RQST_TAG "IO error occured, trying again\n");
  2512. + }
  2513. +
  2514. + status = surface_sam_ssh_rqst(&rqst, &result);
  2515. + if (status != -EIO) break;
  2516. + }
  2517. +
  2518. + if (rqst.tc == 0x11 && rqst.cid == 0x0D && status == -EPERM) {
  2519. + /* Base state quirk:
  2520. + * The base state may be queried from ACPI when the EC is still
  2521. + * suspended. In this case it will return '-EPERM'. This query
  2522. + * will only be triggered from the ACPI lid GPE interrupt, thus
  2523. + * we are either in laptop or studio mode (base status 0x01 or
  2524. + * 0x02). Furthermore, we will only get here if the device (and
  2525. + * EC) have been suspended.
  2526. + *
  2527. + * We now assume that the device is in laptop mode (0x01). This
  2528. + * has the drawback that it will wake the device when unfolding
  2529. + * it in studio mode, but it also allows us to avoid actively
  2530. + * waiting for the EC to wake up, which may incur a notable
  2531. + * delay.
  2532. + */
  2533. +
  2534. + buffer->status = 0x00;
  2535. + buffer->len = 0x03;
  2536. + buffer->data.out.status = 0x00;
  2537. + buffer->data.out.len = 0x01;
  2538. + buffer->data.out.pld[0] = 0x01;
  2539. +
  2540. + } else if (!status) { // success
  2541. + buffer->status = 0x00;
  2542. + buffer->len = result.len + 2;
  2543. + buffer->data.out.status = 0x00;
  2544. + buffer->data.out.len = result.len;
  2545. + memcpy(&buffer->data.out.pld[0], result.data, result.len);
  2546. +
  2547. + } else { // failure
  2548. + dev_err(ctx->dev, SAN_RQST_TAG "failed with error %d\n", status);
  2549. + buffer->status = 0x00;
  2550. + buffer->len = 0x02;
  2551. + buffer->data.out.status = 0x01; // indicate _SSH error
  2552. + buffer->data.out.len = 0x00;
  2553. + }
  2554. +
  2555. + kfree(result.data);
  2556. +
  2557. + return AE_OK;
  2558. +}
  2559. +
  2560. +static acpi_status
  2561. +san_rqsg(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2562. +{
  2563. + struct gsb_data_rqsx *gsb_rqsg = san_validate_rqsx(ctx->dev, "RQSG", buffer);
  2564. + struct surface_sam_san_rqsg rqsg = {};
  2565. + int status;
  2566. +
  2567. + if (!gsb_rqsg) {
  2568. + return AE_OK;
  2569. + }
  2570. +
  2571. + rqsg.tc = gsb_rqsg->tc;
  2572. + rqsg.cid = gsb_rqsg->cid;
  2573. + rqsg.iid = gsb_rqsg->iid;
  2574. + rqsg.cdl = gsb_rqsg->cdl;
  2575. + rqsg.pld = &gsb_rqsg->pld[0];
  2576. +
  2577. + status = san_call_rqsg_handler(&rqsg);
  2578. + if (!status) {
  2579. + buffer->status = 0x00;
  2580. + buffer->len = 0x02;
  2581. + buffer->data.out.status = 0x00;
  2582. + buffer->data.out.len = 0x00;
  2583. + } else {
  2584. + dev_err(ctx->dev, SAN_RQSG_TAG "failed with error %d\n", status);
  2585. + buffer->status = 0x00;
  2586. + buffer->len = 0x02;
  2587. + buffer->data.out.status = 0x01; // indicate _SSH error
  2588. + buffer->data.out.len = 0x00;
  2589. + }
  2590. +
  2591. + return AE_OK;
  2592. +}
  2593. +
  2594. +
  2595. +static acpi_status
  2596. +san_opreg_handler(u32 function, acpi_physical_address command,
  2597. + u32 bits, u64 *value64,
  2598. + void *opreg_context, void *region_context)
  2599. +{
  2600. + struct san_opreg_context *context = opreg_context;
  2601. + struct gsb_buffer *buffer = (struct gsb_buffer *)value64;
  2602. + int accessor_type = (0xFFFF0000 & function) >> 16;
  2603. +
  2604. + if (command != 0) {
  2605. + dev_warn(context->dev, "unsupported command: 0x%02llx\n", command);
  2606. + return AE_OK;
  2607. + }
  2608. +
  2609. + if (accessor_type != ACPI_GSB_ACCESS_ATTRIB_RAW_PROCESS) {
  2610. + dev_err(context->dev, "invalid access type: 0x%02x\n", accessor_type);
  2611. + return AE_OK;
  2612. + }
  2613. +
  2614. + // buffer must have at least contain the command-value
  2615. + if (buffer->len == 0) {
  2616. + dev_err(context->dev, "request-package too small\n");
  2617. + return AE_OK;
  2618. + }
  2619. +
  2620. + switch (buffer->data.in.cv) {
  2621. + case 0x01: return san_rqst(context, buffer);
  2622. + case 0x02: return san_etwl(context, buffer);
  2623. + case 0x03: return san_rqsg(context, buffer);
  2624. + }
  2625. +
  2626. + dev_warn(context->dev, "unsupported SAN0 request (cv: 0x%02x)\n", buffer->data.in.cv);
  2627. + return AE_OK;
  2628. +}
  2629. +
  2630. +static int san_enable_power_events(struct platform_device *pdev)
  2631. +{
  2632. + int status;
  2633. +
  2634. + status = surface_sam_ssh_set_delayed_event_handler(
  2635. + SAM_EVENT_PWR_RQID, san_evt_power,
  2636. + san_evt_power_delay, &pdev->dev);
  2637. + if (status)
  2638. + return status;
  2639. +
  2640. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_PWR_TC, 0x01, SAM_EVENT_PWR_RQID);
  2641. + if (status) {
  2642. + surface_sam_ssh_remove_event_handler(SAM_EVENT_PWR_RQID);
  2643. + return status;
  2644. + }
  2645. +
  2646. + return 0;
  2647. +}
  2648. +
  2649. +static int san_enable_thermal_events(struct platform_device *pdev)
  2650. +{
  2651. + int status;
  2652. +
  2653. + status = surface_sam_ssh_set_event_handler(
  2654. + SAM_EVENT_TEMP_RQID, san_evt_thermal,
  2655. + &pdev->dev);
  2656. + if (status)
  2657. + return status;
  2658. +
  2659. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_TEMP_TC, 0x01, SAM_EVENT_TEMP_RQID);
  2660. + if (status) {
  2661. + surface_sam_ssh_remove_event_handler(SAM_EVENT_TEMP_RQID);
  2662. + return status;
  2663. + }
  2664. +
  2665. + return 0;
  2666. +}
  2667. +
  2668. +static void san_disable_power_events(void)
  2669. +{
  2670. + surface_sam_ssh_disable_event_source(SAM_EVENT_PWR_TC, 0x01, SAM_EVENT_PWR_RQID);
  2671. + surface_sam_ssh_remove_event_handler(SAM_EVENT_PWR_RQID);
  2672. +}
  2673. +
  2674. +static void san_disable_thermal_events(void)
  2675. +{
  2676. + surface_sam_ssh_disable_event_source(SAM_EVENT_TEMP_TC, 0x01, SAM_EVENT_TEMP_RQID);
  2677. + surface_sam_ssh_remove_event_handler(SAM_EVENT_TEMP_RQID);
  2678. +}
  2679. +
  2680. +
  2681. +static int san_enable_events(struct platform_device *pdev)
  2682. +{
  2683. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2684. + int status;
  2685. +
  2686. + status = san_enable_thermal_events(pdev);
  2687. + if (status)
  2688. + return status;
  2689. +
  2690. + /*
  2691. + * We have to figure out if this device uses SAN or requires a separate
  2692. + * driver for the battery. If it uses the separate driver, that driver
  2693. + * will enable and handle power events.
  2694. + */
  2695. + drvdata->has_power_events = acpi_has_method(NULL, "\\_SB.BAT1._BST");
  2696. + if (drvdata->has_power_events) {
  2697. + status = san_enable_power_events(pdev);
  2698. + if (status)
  2699. + goto err;
  2700. + }
  2701. +
  2702. + return 0;
  2703. +
  2704. +err:
  2705. + san_disable_thermal_events();
  2706. + return status;
  2707. +}
  2708. +
  2709. +static void san_disable_events(struct platform_device *pdev)
  2710. +{
  2711. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2712. +
  2713. + san_disable_thermal_events();
  2714. + if (drvdata->has_power_events)
  2715. + san_disable_power_events();
  2716. +}
  2717. +
  2718. +
  2719. +static int san_consumers_link(struct platform_device *pdev,
  2720. + const struct san_acpi_consumer *cons,
  2721. + struct san_consumers *out)
  2722. +{
  2723. + const struct san_acpi_consumer *con;
  2724. + struct san_consumer_link *links, *link;
  2725. + struct acpi_device *adev;
  2726. + acpi_handle handle;
  2727. + u32 max_links = 0;
  2728. + int status;
  2729. +
  2730. + if (!cons) {
  2731. + return 0;
  2732. + }
  2733. +
  2734. + // count links
  2735. + for (con = cons; con->path; ++con) {
  2736. + max_links += 1;
  2737. + }
  2738. +
  2739. + // allocate
  2740. + links = kzalloc(max_links * sizeof(struct san_consumer_link), GFP_KERNEL);
  2741. + link = &links[0];
  2742. +
  2743. + if (!links) {
  2744. + return -ENOMEM;
  2745. + }
  2746. +
  2747. + // create links
  2748. + for (con = cons; con->path; ++con) {
  2749. + status = acpi_get_handle(NULL, con->path, &handle);
  2750. + if (status) {
  2751. + if (con->required || status != AE_NOT_FOUND) {
  2752. + status = -ENXIO;
  2753. + goto cleanup;
  2754. + } else {
  2755. + continue;
  2756. + }
  2757. + }
  2758. +
  2759. + status = acpi_bus_get_device(handle, &adev);
  2760. + if (status) {
  2761. + goto cleanup;
  2762. + }
  2763. +
  2764. + link->link = device_link_add(&adev->dev, &pdev->dev, con->flags);
  2765. + if (!(link->link)) {
  2766. + status = -EFAULT;
  2767. + goto cleanup;
  2768. + }
  2769. + link->properties = con;
  2770. +
  2771. + link += 1;
  2772. + }
  2773. +
  2774. + out->num = link - links;
  2775. + out->links = links;
  2776. +
  2777. + return 0;
  2778. +
  2779. +cleanup:
  2780. + for (link = link - 1; link >= links; --link) {
  2781. + if (link->properties->flags & DL_FLAG_STATELESS) {
  2782. + device_link_del(link->link);
  2783. + }
  2784. + }
  2785. +
  2786. + return status;
  2787. +}
  2788. +
  2789. +static void san_consumers_unlink(struct san_consumers *consumers) {
  2790. + u32 i;
  2791. +
  2792. + if (!consumers) {
  2793. + return;
  2794. + }
  2795. +
  2796. + for (i = 0; i < consumers->num; ++i) {
  2797. + if (consumers->links[i].properties->flags & DL_FLAG_STATELESS) {
  2798. + device_link_del(consumers->links[i].link);
  2799. + }
  2800. + }
  2801. +
  2802. + kfree(consumers->links);
  2803. +
  2804. + consumers->num = 0;
  2805. + consumers->links = NULL;
  2806. +}
  2807. +
  2808. +static int surface_sam_san_probe(struct platform_device *pdev)
  2809. +{
  2810. + const struct san_acpi_consumer *cons;
  2811. + struct san_drvdata *drvdata;
  2812. + acpi_handle san = ACPI_HANDLE(&pdev->dev); // _SAN device node
  2813. + int status;
  2814. +
  2815. + /*
  2816. + * Defer probe if the _SSH driver has not set up the controller yet. This
  2817. + * makes sure we do not fail any initial requests (e.g. _STA request without
  2818. + * which the battery does not get set up correctly). Otherwise register as
  2819. + * consumer to set up a device_link.
  2820. + */
  2821. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  2822. + if (status) {
  2823. + return status == -ENXIO ? -EPROBE_DEFER : status;
  2824. + }
  2825. +
  2826. + drvdata = kzalloc(sizeof(struct san_drvdata), GFP_KERNEL);
  2827. + if (!drvdata) {
  2828. + return -ENOMEM;
  2829. + }
  2830. +
  2831. + drvdata->opreg_ctx.dev = &pdev->dev;
  2832. +
  2833. + cons = acpi_device_get_match_data(&pdev->dev);
  2834. + status = san_consumers_link(pdev, cons, &drvdata->consumers);
  2835. + if (status) {
  2836. + goto err_consumers;
  2837. + }
  2838. +
  2839. + platform_set_drvdata(pdev, drvdata);
  2840. +
  2841. + status = acpi_install_address_space_handler(san,
  2842. + ACPI_ADR_SPACE_GSBUS,
  2843. + &san_opreg_handler,
  2844. + NULL, &drvdata->opreg_ctx);
  2845. +
  2846. + if (ACPI_FAILURE(status)) {
  2847. + status = -ENODEV;
  2848. + goto err_install_handler;
  2849. + }
  2850. +
  2851. + status = san_enable_events(pdev);
  2852. + if (status) {
  2853. + goto err_enable_events;
  2854. + }
  2855. +
  2856. + mutex_lock(&rqsg_if.lock);
  2857. + if (!rqsg_if.san_dev) {
  2858. + rqsg_if.san_dev = &pdev->dev;
  2859. + } else {
  2860. + status = -EBUSY;
  2861. + }
  2862. + mutex_unlock(&rqsg_if.lock);
  2863. +
  2864. + if (status) {
  2865. + goto err_install_dev;
  2866. + }
  2867. +
  2868. + acpi_walk_dep_device_list(san);
  2869. + return 0;
  2870. +
  2871. +err_install_dev:
  2872. + san_disable_events(pdev);
  2873. +err_enable_events:
  2874. + acpi_remove_address_space_handler(san, ACPI_ADR_SPACE_GSBUS, &san_opreg_handler);
  2875. +err_install_handler:
  2876. + platform_set_drvdata(san, NULL);
  2877. + san_consumers_unlink(&drvdata->consumers);
  2878. +err_consumers:
  2879. + kfree(drvdata);
  2880. + return status;
  2881. +}
  2882. +
  2883. +static int surface_sam_san_remove(struct platform_device *pdev)
  2884. +{
  2885. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2886. + acpi_handle san = ACPI_HANDLE(&pdev->dev); // _SAN device node
  2887. + acpi_status status = AE_OK;
  2888. +
  2889. + mutex_lock(&rqsg_if.lock);
  2890. + rqsg_if.san_dev = NULL;
  2891. + mutex_unlock(&rqsg_if.lock);
  2892. +
  2893. + acpi_remove_address_space_handler(san, ACPI_ADR_SPACE_GSBUS, &san_opreg_handler);
  2894. + san_disable_events(pdev);
  2895. +
  2896. + san_consumers_unlink(&drvdata->consumers);
  2897. + kfree(drvdata);
  2898. +
  2899. + platform_set_drvdata(pdev, NULL);
  2900. + return status;
  2901. +}
  2902. +
  2903. +
  2904. +static const struct san_acpi_consumer san_mshw0091_consumers[] = {
  2905. + { "\\_SB.SRTC", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2906. + { "\\ADP1", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2907. + { "\\_SB.BAT1", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2908. + { "\\_SB.BAT2", false, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2909. + { },
  2910. +};
  2911. +
  2912. +static const struct acpi_device_id surface_sam_san_match[] = {
  2913. + { "MSHW0091", (long unsigned int) san_mshw0091_consumers },
  2914. + { },
  2915. +};
  2916. +MODULE_DEVICE_TABLE(acpi, surface_sam_san_match);
  2917. +
  2918. +static struct platform_driver surface_sam_san = {
  2919. + .probe = surface_sam_san_probe,
  2920. + .remove = surface_sam_san_remove,
  2921. + .driver = {
  2922. + .name = "surface_sam_san",
  2923. + .acpi_match_table = ACPI_PTR(surface_sam_san_match),
  2924. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  2925. + },
  2926. +};
  2927. +module_platform_driver(surface_sam_san);
  2928. +
  2929. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  2930. +MODULE_DESCRIPTION("Surface ACPI Notify Driver for 5th Generation Surface Devices");
  2931. +MODULE_LICENSE("GPL v2");
  2932. diff --git a/drivers/platform/x86/surface_sam/surface_sam_san.h b/drivers/platform/x86/surface_sam/surface_sam_san.h
  2933. new file mode 100644
  2934. index 000000000000..1ea8713db367
  2935. --- /dev/null
  2936. +++ b/drivers/platform/x86/surface_sam/surface_sam_san.h
  2937. @@ -0,0 +1,29 @@
  2938. +/*
  2939. + * Interface for Surface ACPI/Notify (SAN).
  2940. + *
  2941. + * The SAN is the main interface between the Surface Serial Hub (SSH) and the
  2942. + * Surface/System Aggregator Module (SAM). It allows requests to be translated
  2943. + * from ACPI to SSH/SAM. It also interfaces with the discrete GPU hot-plug
  2944. + * driver.
  2945. + */
  2946. +
  2947. +#ifndef _SURFACE_SAM_SAN_H
  2948. +#define _SURFACE_SAM_SAN_H
  2949. +
  2950. +#include <linux/types.h>
  2951. +
  2952. +
  2953. +struct surface_sam_san_rqsg {
  2954. + u8 tc; // target category
  2955. + u8 cid; // command ID
  2956. + u8 iid; // instance ID
  2957. + u8 cdl; // command data length (lenght of payload)
  2958. + u8 *pld; // pointer to payload of length cdl
  2959. +};
  2960. +
  2961. +typedef int (*surface_sam_san_rqsg_handler_fn)(struct surface_sam_san_rqsg *rqsg, void *data);
  2962. +
  2963. +int surface_sam_san_consumer_register(struct device *consumer, u32 flags);
  2964. +int surface_sam_san_set_rqsg_handler(surface_sam_san_rqsg_handler_fn fn, void *data);
  2965. +
  2966. +#endif /* _SURFACE_SAM_SAN_H */
  2967. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid.c b/drivers/platform/x86/surface_sam/surface_sam_sid.c
  2968. new file mode 100644
  2969. index 000000000000..f64dcd590494
  2970. --- /dev/null
  2971. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid.c
  2972. @@ -0,0 +1,117 @@
  2973. +/*
  2974. + * Surface Integration Driver.
  2975. + * MFD driver to provide device/model dependent functionality.
  2976. + */
  2977. +
  2978. +#include <linux/acpi.h>
  2979. +#include <linux/kernel.h>
  2980. +#include <linux/module.h>
  2981. +#include <linux/platform_device.h>
  2982. +#include <linux/mfd/core.h>
  2983. +
  2984. +
  2985. +static const struct mfd_cell sid_devs_sp4[] = {
  2986. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2987. + { },
  2988. +};
  2989. +
  2990. +static const struct mfd_cell sid_devs_sp7[] = {
  2991. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2992. + { .name = "surface_sam_sid_ac", .id = -1 },
  2993. + { .name = "surface_sam_sid_battery", .id = -1 },
  2994. + { },
  2995. +};
  2996. +
  2997. +static const struct mfd_cell sid_devs_sb1[] = {
  2998. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2999. + { },
  3000. +};
  3001. +
  3002. +static const struct mfd_cell sid_devs_sb2[] = {
  3003. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3004. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  3005. + { },
  3006. +};
  3007. +
  3008. +static const struct mfd_cell sid_devs_sl1[] = {
  3009. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3010. + { },
  3011. +};
  3012. +
  3013. +static const struct mfd_cell sid_devs_sl2[] = {
  3014. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3015. + { },
  3016. +};
  3017. +
  3018. +static const struct mfd_cell sid_devs_sl3_13[] = {
  3019. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3020. + { .name = "surface_sam_sid_vhf", .id = -1 },
  3021. + { .name = "surface_sam_sid_ac", .id = -1 },
  3022. + { .name = "surface_sam_sid_battery", .id = -1 },
  3023. + { },
  3024. +};
  3025. +
  3026. +static const struct mfd_cell sid_devs_sl3_15[] = {
  3027. + { .name = "surface_sam_sid_vhf", .id = -1 },
  3028. + { .name = "surface_sam_sid_ac", .id = -1 },
  3029. + { .name = "surface_sam_sid_battery", .id = -1 },
  3030. + { },
  3031. +};
  3032. +
  3033. +static const struct acpi_device_id surface_sam_sid_match[] = {
  3034. + { "MSHW0081", (unsigned long)sid_devs_sp4 }, /* Surface Pro 4, 5, and 6 */
  3035. + { "MSHW0116", (unsigned long)sid_devs_sp7 }, /* Surface Pro 7 */
  3036. + { "MSHW0080", (unsigned long)sid_devs_sb1 }, /* Surface Book 1 */
  3037. + { "MSHW0107", (unsigned long)sid_devs_sb2 }, /* Surface Book 2 */
  3038. + { "MSHW0086", (unsigned long)sid_devs_sl1 }, /* Surface Laptop 1 */
  3039. + { "MSHW0112", (unsigned long)sid_devs_sl2 }, /* Surface Laptop 2 */
  3040. + { "MSHW0114", (unsigned long)sid_devs_sl3_13 }, /* Surface Laptop 3 (13") */
  3041. + { "MSHW0110", (unsigned long)sid_devs_sl3_15 }, /* Surface Laptop 3 (15") */
  3042. + { },
  3043. +};
  3044. +MODULE_DEVICE_TABLE(acpi, surface_sam_sid_match);
  3045. +
  3046. +
  3047. +static int surface_sam_sid_probe(struct platform_device *pdev)
  3048. +{
  3049. + const struct acpi_device_id *match;
  3050. + const struct mfd_cell *cells, *p;
  3051. +
  3052. + match = acpi_match_device(surface_sam_sid_match, &pdev->dev);
  3053. + if (!match)
  3054. + return -ENODEV;
  3055. +
  3056. + cells = (struct mfd_cell *)match->driver_data;
  3057. + if (!cells)
  3058. + return -ENODEV;
  3059. +
  3060. + for (p = cells; p->name; ++p) {
  3061. + /* just count */
  3062. + }
  3063. +
  3064. + if (p == cells)
  3065. + return -ENODEV;
  3066. +
  3067. + return mfd_add_devices(&pdev->dev, 0, cells, p - cells, NULL, 0, NULL);
  3068. +}
  3069. +
  3070. +static int surface_sam_sid_remove(struct platform_device *pdev)
  3071. +{
  3072. + mfd_remove_devices(&pdev->dev);
  3073. + return 0;
  3074. +}
  3075. +
  3076. +static struct platform_driver surface_sam_sid = {
  3077. + .probe = surface_sam_sid_probe,
  3078. + .remove = surface_sam_sid_remove,
  3079. + .driver = {
  3080. + .name = "surface_sam_sid",
  3081. + .acpi_match_table = ACPI_PTR(surface_sam_sid_match),
  3082. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3083. + },
  3084. +};
  3085. +module_platform_driver(surface_sam_sid);
  3086. +
  3087. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3088. +MODULE_DESCRIPTION("Surface Integration Driver for 5th Generation Surface Devices");
  3089. +MODULE_LICENSE("GPL v2");
  3090. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c b/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  3091. new file mode 100644
  3092. index 000000000000..ce32ebf4d94d
  3093. --- /dev/null
  3094. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  3095. @@ -0,0 +1,219 @@
  3096. +/*
  3097. + * Surface Lid driver to enable wakeup from suspend via the lid.
  3098. + */
  3099. +
  3100. +#include <linux/acpi.h>
  3101. +#include <linux/dmi.h>
  3102. +#include <linux/kernel.h>
  3103. +#include <linux/module.h>
  3104. +#include <linux/platform_device.h>
  3105. +
  3106. +
  3107. +struct sid_lid_device {
  3108. + const char *acpi_path;
  3109. + const u32 gpe_number;
  3110. +};
  3111. +
  3112. +
  3113. +static const struct sid_lid_device lid_device_l17 = {
  3114. + .acpi_path = "\\_SB.LID0",
  3115. + .gpe_number = 0x17,
  3116. +};
  3117. +
  3118. +static const struct sid_lid_device lid_device_l4D = {
  3119. + .acpi_path = "\\_SB.LID0",
  3120. + .gpe_number = 0x4D,
  3121. +};
  3122. +
  3123. +static const struct sid_lid_device lid_device_l4F = {
  3124. + .acpi_path = "\\_SB.LID0",
  3125. + .gpe_number = 0x4F,
  3126. +};
  3127. +
  3128. +static const struct sid_lid_device lid_device_l57 = {
  3129. + .acpi_path = "\\_SB.LID0",
  3130. + .gpe_number = 0x57,
  3131. +};
  3132. +
  3133. +
  3134. +static const struct dmi_system_id dmi_lid_device_table[] = {
  3135. + {
  3136. + .ident = "Surface Pro 4",
  3137. + .matches = {
  3138. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3139. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 4"),
  3140. + },
  3141. + .driver_data = (void *)&lid_device_l17,
  3142. + },
  3143. + {
  3144. + .ident = "Surface Pro 5",
  3145. + .matches = {
  3146. + /* match for SKU here due to generic product name "Surface Pro" */
  3147. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3148. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1796"),
  3149. + },
  3150. + .driver_data = (void *)&lid_device_l4F,
  3151. + },
  3152. + {
  3153. + .ident = "Surface Pro 5 (LTE)",
  3154. + .matches = {
  3155. + /* match for SKU here due to generic product name "Surface Pro" */
  3156. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3157. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1807"),
  3158. + },
  3159. + .driver_data = (void *)&lid_device_l4F,
  3160. + },
  3161. + {
  3162. + .ident = "Surface Pro 6",
  3163. + .matches = {
  3164. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3165. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 6"),
  3166. + },
  3167. + .driver_data = (void *)&lid_device_l4F,
  3168. + },
  3169. + {
  3170. + .ident = "Surface Pro 7",
  3171. + .matches = {
  3172. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3173. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 7"),
  3174. + },
  3175. + .driver_data = (void *)&lid_device_l4D,
  3176. + },
  3177. + {
  3178. + .ident = "Surface Book 1",
  3179. + .matches = {
  3180. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3181. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book"),
  3182. + },
  3183. + .driver_data = (void *)&lid_device_l17,
  3184. + },
  3185. + {
  3186. + .ident = "Surface Book 2",
  3187. + .matches = {
  3188. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3189. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book 2"),
  3190. + },
  3191. + .driver_data = (void *)&lid_device_l17,
  3192. + },
  3193. + {
  3194. + .ident = "Surface Laptop 1",
  3195. + .matches = {
  3196. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3197. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop"),
  3198. + },
  3199. + .driver_data = (void *)&lid_device_l57,
  3200. + },
  3201. + {
  3202. + .ident = "Surface Laptop 2",
  3203. + .matches = {
  3204. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3205. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop 2"),
  3206. + },
  3207. + .driver_data = (void *)&lid_device_l57,
  3208. + },
  3209. + {
  3210. + .ident = "Surface Laptop 3 (13\")",
  3211. + .matches = {
  3212. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3213. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Laptop_3_1867:1868"),
  3214. + },
  3215. + .driver_data = (void *)&lid_device_l4D,
  3216. + },
  3217. + { }
  3218. +};
  3219. +
  3220. +
  3221. +static int sid_lid_enable_wakeup(const struct sid_lid_device *dev, bool enable)
  3222. +{
  3223. + int action = enable ? ACPI_GPE_ENABLE : ACPI_GPE_DISABLE;
  3224. + int status;
  3225. +
  3226. + status = acpi_set_gpe_wake_mask(NULL, dev->gpe_number, action);
  3227. + if (status)
  3228. + return -EFAULT;
  3229. +
  3230. + return 0;
  3231. +}
  3232. +
  3233. +
  3234. +static int surface_sam_sid_gpelid_suspend(struct device *dev)
  3235. +{
  3236. + const struct sid_lid_device *ldev = dev_get_drvdata(dev);
  3237. + return sid_lid_enable_wakeup(ldev, true);
  3238. +}
  3239. +
  3240. +static int surface_sam_sid_gpelid_resume(struct device *dev)
  3241. +{
  3242. + const struct sid_lid_device *ldev = dev_get_drvdata(dev);
  3243. + return sid_lid_enable_wakeup(ldev, false);
  3244. +}
  3245. +
  3246. +static SIMPLE_DEV_PM_OPS(surface_sam_sid_gpelid_pm,
  3247. + surface_sam_sid_gpelid_suspend,
  3248. + surface_sam_sid_gpelid_resume);
  3249. +
  3250. +
  3251. +static int surface_sam_sid_gpelid_probe(struct platform_device *pdev)
  3252. +{
  3253. + const struct dmi_system_id *match;
  3254. + struct sid_lid_device *dev;
  3255. + acpi_handle lid_handle;
  3256. + int status;
  3257. +
  3258. + match = dmi_first_match(dmi_lid_device_table);
  3259. + if (!match)
  3260. + return -ENODEV;
  3261. +
  3262. + dev = match->driver_data;
  3263. + if (!dev)
  3264. + return -ENODEV;
  3265. +
  3266. + status = acpi_get_handle(NULL, (acpi_string)dev->acpi_path, &lid_handle);
  3267. + if (status)
  3268. + return -EFAULT;
  3269. +
  3270. + status = acpi_setup_gpe_for_wake(lid_handle, NULL, dev->gpe_number);
  3271. + if (status)
  3272. + return -EFAULT;
  3273. +
  3274. + status = acpi_enable_gpe(NULL, dev->gpe_number);
  3275. + if (status)
  3276. + return -EFAULT;
  3277. +
  3278. + status = sid_lid_enable_wakeup(dev, false);
  3279. + if (status) {
  3280. + acpi_disable_gpe(NULL, dev->gpe_number);
  3281. + return status;
  3282. + }
  3283. +
  3284. + platform_set_drvdata(pdev, dev);
  3285. + return 0;
  3286. +}
  3287. +
  3288. +static int surface_sam_sid_gpelid_remove(struct platform_device *pdev)
  3289. +{
  3290. + struct sid_lid_device *dev = platform_get_drvdata(pdev);
  3291. +
  3292. + /* restore default behavior without this module */
  3293. + sid_lid_enable_wakeup(dev, false);
  3294. + acpi_disable_gpe(NULL, dev->gpe_number);
  3295. +
  3296. + platform_set_drvdata(pdev, NULL);
  3297. + return 0;
  3298. +}
  3299. +
  3300. +static struct platform_driver surface_sam_sid_gpelid = {
  3301. + .probe = surface_sam_sid_gpelid_probe,
  3302. + .remove = surface_sam_sid_gpelid_remove,
  3303. + .driver = {
  3304. + .name = "surface_sam_sid_gpelid",
  3305. + .pm = &surface_sam_sid_gpelid_pm,
  3306. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3307. + },
  3308. +};
  3309. +module_platform_driver(surface_sam_sid_gpelid);
  3310. +
  3311. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3312. +MODULE_DESCRIPTION("Surface Lid Driver for 5th Generation Surface Devices");
  3313. +MODULE_LICENSE("GPL v2");
  3314. +MODULE_ALIAS("platform:surface_sam_sid_gpelid");
  3315. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c b/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  3316. new file mode 100644
  3317. index 000000000000..880a2567cf1b
  3318. --- /dev/null
  3319. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  3320. @@ -0,0 +1,225 @@
  3321. +/*
  3322. + * Surface Performance Mode Driver.
  3323. + * Allows to change cooling capabilities based on user preference.
  3324. + */
  3325. +
  3326. +#include <asm/unaligned.h>
  3327. +#include <linux/kernel.h>
  3328. +#include <linux/module.h>
  3329. +#include <linux/platform_device.h>
  3330. +
  3331. +#include "surface_sam_ssh.h"
  3332. +
  3333. +
  3334. +#define SID_PARAM_PERM (S_IRUGO | S_IWUSR)
  3335. +
  3336. +enum sam_perf_mode {
  3337. + SAM_PERF_MODE_NORMAL = 1,
  3338. + SAM_PERF_MODE_BATTERY = 2,
  3339. + SAM_PERF_MODE_PERF1 = 3,
  3340. + SAM_PERF_MODE_PERF2 = 4,
  3341. +
  3342. + __SAM_PERF_MODE__START = 1,
  3343. + __SAM_PERF_MODE__END = 4,
  3344. +};
  3345. +
  3346. +enum sid_param_perf_mode {
  3347. + SID_PARAM_PERF_MODE_AS_IS = 0,
  3348. + SID_PARAM_PERF_MODE_NORMAL = SAM_PERF_MODE_NORMAL,
  3349. + SID_PARAM_PERF_MODE_BATTERY = SAM_PERF_MODE_BATTERY,
  3350. + SID_PARAM_PERF_MODE_PERF1 = SAM_PERF_MODE_PERF1,
  3351. + SID_PARAM_PERF_MODE_PERF2 = SAM_PERF_MODE_PERF2,
  3352. +
  3353. + __SID_PARAM_PERF_MODE__START = 0,
  3354. + __SID_PARAM_PERF_MODE__END = 4,
  3355. +};
  3356. +
  3357. +
  3358. +static int surface_sam_perf_mode_get(void)
  3359. +{
  3360. + u8 result_buf[8] = { 0 };
  3361. + int status;
  3362. +
  3363. + struct surface_sam_ssh_rqst rqst = {
  3364. + .tc = 0x03,
  3365. + .cid = 0x02,
  3366. + .iid = 0x00,
  3367. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  3368. + .snc = 0x01,
  3369. + .cdl = 0x00,
  3370. + .pld = NULL,
  3371. + };
  3372. +
  3373. + struct surface_sam_ssh_buf result = {
  3374. + .cap = ARRAY_SIZE(result_buf),
  3375. + .len = 0,
  3376. + .data = result_buf,
  3377. + };
  3378. +
  3379. + status = surface_sam_ssh_rqst(&rqst, &result);
  3380. + if (status) {
  3381. + return status;
  3382. + }
  3383. +
  3384. + if (result.len != 8) {
  3385. + return -EFAULT;
  3386. + }
  3387. +
  3388. + return get_unaligned_le32(&result.data[0]);
  3389. +}
  3390. +
  3391. +static int surface_sam_perf_mode_set(int perf_mode)
  3392. +{
  3393. + u8 payload[4] = { 0 };
  3394. +
  3395. + struct surface_sam_ssh_rqst rqst = {
  3396. + .tc = 0x03,
  3397. + .cid = 0x03,
  3398. + .iid = 0x00,
  3399. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  3400. + .snc = 0x00,
  3401. + .cdl = ARRAY_SIZE(payload),
  3402. + .pld = payload,
  3403. + };
  3404. +
  3405. + if (perf_mode < __SAM_PERF_MODE__START || perf_mode > __SAM_PERF_MODE__END) {
  3406. + return -EINVAL;
  3407. + }
  3408. +
  3409. + put_unaligned_le32(perf_mode, &rqst.pld[0]);
  3410. + return surface_sam_ssh_rqst(&rqst, NULL);
  3411. +}
  3412. +
  3413. +
  3414. +static int param_perf_mode_set(const char *val, const struct kernel_param *kp)
  3415. +{
  3416. + int perf_mode;
  3417. + int status;
  3418. +
  3419. + status = kstrtoint(val, 0, &perf_mode);
  3420. + if (status) {
  3421. + return status;
  3422. + }
  3423. +
  3424. + if (perf_mode < __SID_PARAM_PERF_MODE__START || perf_mode > __SID_PARAM_PERF_MODE__END) {
  3425. + return -EINVAL;
  3426. + }
  3427. +
  3428. + return param_set_int(val, kp);
  3429. +}
  3430. +
  3431. +static const struct kernel_param_ops param_perf_mode_ops = {
  3432. + .set = param_perf_mode_set,
  3433. + .get = param_get_int,
  3434. +};
  3435. +
  3436. +static int param_perf_mode_init = SID_PARAM_PERF_MODE_AS_IS;
  3437. +static int param_perf_mode_exit = SID_PARAM_PERF_MODE_AS_IS;
  3438. +
  3439. +module_param_cb(perf_mode_init, &param_perf_mode_ops, &param_perf_mode_init, SID_PARAM_PERM);
  3440. +module_param_cb(perf_mode_exit, &param_perf_mode_ops, &param_perf_mode_exit, SID_PARAM_PERM);
  3441. +
  3442. +MODULE_PARM_DESC(perf_mode_init, "Performance-mode to be set on module initialization");
  3443. +MODULE_PARM_DESC(perf_mode_exit, "Performance-mode to be set on module exit");
  3444. +
  3445. +
  3446. +static ssize_t perf_mode_show(struct device *dev, struct device_attribute *attr, char *data)
  3447. +{
  3448. + int perf_mode;
  3449. +
  3450. + perf_mode = surface_sam_perf_mode_get();
  3451. + if (perf_mode < 0) {
  3452. + dev_err(dev, "failed to get current performance mode: %d", perf_mode);
  3453. + return -EIO;
  3454. + }
  3455. +
  3456. + return sprintf(data, "%d\n", perf_mode);
  3457. +}
  3458. +
  3459. +static ssize_t perf_mode_store(struct device *dev, struct device_attribute *attr,
  3460. + const char *data, size_t count)
  3461. +{
  3462. + int perf_mode;
  3463. + int status;
  3464. +
  3465. + status = kstrtoint(data, 0, &perf_mode);
  3466. + if (status) {
  3467. + return status;
  3468. + }
  3469. +
  3470. + status = surface_sam_perf_mode_set(perf_mode);
  3471. + if (status) {
  3472. + return status;
  3473. + }
  3474. +
  3475. + // TODO: Should we notify ACPI here?
  3476. + //
  3477. + // There is a _DSM call described as
  3478. + // WSID._DSM: Notify DPTF on Slider State change
  3479. + // which calls
  3480. + // ODV3 = ToInteger (Arg3)
  3481. + // Notify(IETM, 0x88)
  3482. + // IETM is an INT3400 Intel Dynamic Power Performance Management
  3483. + // device, part of the DPTF framework. From the corresponding
  3484. + // kernel driver, it looks like event 0x88 is being ignored. Also
  3485. + // it is currently unknown what the consequecnes of setting ODV3
  3486. + // are.
  3487. +
  3488. + return count;
  3489. +}
  3490. +
  3491. +const static DEVICE_ATTR_RW(perf_mode);
  3492. +
  3493. +
  3494. +static int surface_sam_sid_perfmode_probe(struct platform_device *pdev)
  3495. +{
  3496. + int status;
  3497. +
  3498. + // link to ec
  3499. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  3500. + if (status) {
  3501. + return status == -ENXIO ? -EPROBE_DEFER : status;
  3502. + }
  3503. +
  3504. + // set initial perf_mode
  3505. + if (param_perf_mode_init != SID_PARAM_PERF_MODE_AS_IS) {
  3506. + status = surface_sam_perf_mode_set(param_perf_mode_init);
  3507. + if (status) {
  3508. + return status;
  3509. + }
  3510. + }
  3511. +
  3512. + // register perf_mode attribute
  3513. + status = sysfs_create_file(&pdev->dev.kobj, &dev_attr_perf_mode.attr);
  3514. + if (status) {
  3515. + goto err_sysfs;
  3516. + }
  3517. +
  3518. + return 0;
  3519. +
  3520. +err_sysfs:
  3521. + surface_sam_perf_mode_set(param_perf_mode_exit);
  3522. + return status;
  3523. +}
  3524. +
  3525. +static int surface_sam_sid_perfmode_remove(struct platform_device *pdev)
  3526. +{
  3527. + sysfs_remove_file(&pdev->dev.kobj, &dev_attr_perf_mode.attr);
  3528. + surface_sam_perf_mode_set(param_perf_mode_exit);
  3529. + return 0;
  3530. +}
  3531. +
  3532. +static struct platform_driver surface_sam_sid_perfmode = {
  3533. + .probe = surface_sam_sid_perfmode_probe,
  3534. + .remove = surface_sam_sid_perfmode_remove,
  3535. + .driver = {
  3536. + .name = "surface_sam_sid_perfmode",
  3537. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3538. + },
  3539. +};
  3540. +module_platform_driver(surface_sam_sid_perfmode);
  3541. +
  3542. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3543. +MODULE_DESCRIPTION("Surface Performance Mode Driver for 5th Generation Surface Devices");
  3544. +MODULE_LICENSE("GPL v2");
  3545. +MODULE_ALIAS("platform:surface_sam_sid_perfmode");
  3546. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_power.c b/drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  3547. new file mode 100644
  3548. index 000000000000..1f2c88eda394
  3549. --- /dev/null
  3550. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  3551. @@ -0,0 +1,1259 @@
  3552. +/*
  3553. + * Surface SID Battery/AC Driver.
  3554. + * Provides support for the battery and AC on 7th generation Surface devices.
  3555. + */
  3556. +
  3557. +#include <linux/kernel.h>
  3558. +#include <linux/delay.h>
  3559. +#include <linux/jiffies.h>
  3560. +#include <linux/module.h>
  3561. +#include <linux/platform_device.h>
  3562. +#include <linux/power_supply.h>
  3563. +#include <linux/workqueue.h>
  3564. +
  3565. +#include "surface_sam_ssh.h"
  3566. +
  3567. +#define SPWR_WARN KERN_WARNING KBUILD_MODNAME ": "
  3568. +#define SPWR_DEBUG KERN_DEBUG KBUILD_MODNAME ": "
  3569. +
  3570. +
  3571. +// TODO: check BIX/BST for unknown/unsupported 0xffffffff entries
  3572. +// TODO: DPTF (/SAN notifications)?
  3573. +// TODO: other properties?
  3574. +
  3575. +
  3576. +static unsigned int cache_time = 1000;
  3577. +module_param(cache_time, uint, 0644);
  3578. +MODULE_PARM_DESC(cache_time, "battery state chaching time in milliseconds [default: 1000]");
  3579. +
  3580. +#define SPWR_AC_BAT_UPDATE_DELAY msecs_to_jiffies(5000)
  3581. +
  3582. +
  3583. +/*
  3584. + * SAM Interface.
  3585. + */
  3586. +
  3587. +#define SAM_PWR_TC 0x02
  3588. +#define SAM_PWR_RQID 0x0002
  3589. +
  3590. +#define SAM_RQST_PWR_CID_STA 0x01
  3591. +#define SAM_RQST_PWR_CID_BIX 0x02
  3592. +#define SAM_RQST_PWR_CID_BST 0x03
  3593. +#define SAM_RQST_PWR_CID_BTP 0x04
  3594. +
  3595. +#define SAM_RQST_PWR_CID_PMAX 0x0b
  3596. +#define SAM_RQST_PWR_CID_PSOC 0x0c
  3597. +#define SAM_RQST_PWR_CID_PSRC 0x0d
  3598. +#define SAM_RQST_PWR_CID_CHGI 0x0e
  3599. +#define SAM_RQST_PWR_CID_ARTG 0x0f
  3600. +
  3601. +#define SAM_EVENT_PWR_CID_BIX 0x15
  3602. +#define SAM_EVENT_PWR_CID_BST 0x16
  3603. +#define SAM_EVENT_PWR_CID_ADAPTER 0x17
  3604. +#define SAM_EVENT_PWR_CID_DPTF 0x4f
  3605. +
  3606. +#define SAM_BATTERY_STA_OK 0x0f
  3607. +#define SAM_BATTERY_STA_PRESENT 0x10
  3608. +
  3609. +#define SAM_BATTERY_STATE_DISCHARGING 0x01
  3610. +#define SAM_BATTERY_STATE_CHARGING 0x02
  3611. +#define SAM_BATTERY_STATE_CRITICAL 0x04
  3612. +
  3613. +#define SAM_BATTERY_POWER_UNIT_MA 1
  3614. +
  3615. +
  3616. +/* Equivalent to data returned in ACPI _BIX method */
  3617. +struct spwr_bix {
  3618. + u8 revision;
  3619. + u32 power_unit;
  3620. + u32 design_cap;
  3621. + u32 last_full_charge_cap;
  3622. + u32 technology;
  3623. + u32 design_voltage;
  3624. + u32 design_cap_warn;
  3625. + u32 design_cap_low;
  3626. + u32 cycle_count;
  3627. + u32 measurement_accuracy;
  3628. + u32 max_sampling_time;
  3629. + u32 min_sampling_time;
  3630. + u32 max_avg_interval;
  3631. + u32 min_avg_interval;
  3632. + u32 bat_cap_granularity_1;
  3633. + u32 bat_cap_granularity_2;
  3634. + u8 model[21];
  3635. + u8 serial[11];
  3636. + u8 type[5];
  3637. + u8 oem_info[21];
  3638. +} __packed;
  3639. +
  3640. +/* Equivalent to data returned in ACPI _BST method */
  3641. +struct spwr_bst {
  3642. + u32 state;
  3643. + u32 present_rate;
  3644. + u32 remaining_cap;
  3645. + u32 present_voltage;
  3646. +} __packed;
  3647. +
  3648. +/* DPTF event payload */
  3649. +struct spwr_event_dptf {
  3650. + u32 pmax;
  3651. + u32 _1; /* currently unknown */
  3652. + u32 _2; /* currently unknown */
  3653. +} __packed;
  3654. +
  3655. +
  3656. +/* Get battery status (_STA) */
  3657. +static int sam_psy_get_sta(u8 iid, u32 *sta)
  3658. +{
  3659. + struct surface_sam_ssh_rqst rqst;
  3660. + struct surface_sam_ssh_buf result;
  3661. +
  3662. + rqst.tc = SAM_PWR_TC;
  3663. + rqst.cid = SAM_RQST_PWR_CID_STA;
  3664. + rqst.iid = iid;
  3665. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3666. + rqst.snc = 0x01;
  3667. + rqst.cdl = 0x00;
  3668. + rqst.pld = NULL;
  3669. +
  3670. + result.cap = sizeof(u32);
  3671. + result.len = 0;
  3672. + result.data = (u8 *)sta;
  3673. +
  3674. + return surface_sam_ssh_rqst(&rqst, &result);
  3675. +}
  3676. +
  3677. +/* Get battery static information (_BIX) */
  3678. +static int sam_psy_get_bix(u8 iid, struct spwr_bix *bix)
  3679. +{
  3680. + struct surface_sam_ssh_rqst rqst;
  3681. + struct surface_sam_ssh_buf result;
  3682. +
  3683. + rqst.tc = SAM_PWR_TC;
  3684. + rqst.cid = SAM_RQST_PWR_CID_BIX;
  3685. + rqst.iid = iid;
  3686. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3687. + rqst.snc = 0x01;
  3688. + rqst.cdl = 0x00;
  3689. + rqst.pld = NULL;
  3690. +
  3691. + result.cap = sizeof(struct spwr_bix);
  3692. + result.len = 0;
  3693. + result.data = (u8 *)bix;
  3694. +
  3695. + return surface_sam_ssh_rqst(&rqst, &result);
  3696. +}
  3697. +
  3698. +/* Get battery dynamic information (_BST) */
  3699. +static int sam_psy_get_bst(u8 iid, struct spwr_bst *bst)
  3700. +{
  3701. + struct surface_sam_ssh_rqst rqst;
  3702. + struct surface_sam_ssh_buf result;
  3703. +
  3704. + rqst.tc = SAM_PWR_TC;
  3705. + rqst.cid = SAM_RQST_PWR_CID_BST;
  3706. + rqst.iid = iid;
  3707. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3708. + rqst.snc = 0x01;
  3709. + rqst.cdl = 0x00;
  3710. + rqst.pld = NULL;
  3711. +
  3712. + result.cap = sizeof(struct spwr_bst);
  3713. + result.len = 0;
  3714. + result.data = (u8 *)bst;
  3715. +
  3716. + return surface_sam_ssh_rqst(&rqst, &result);
  3717. +}
  3718. +
  3719. +/* Set battery trip point (_BTP) */
  3720. +static int sam_psy_set_btp(u8 iid, u32 btp)
  3721. +{
  3722. + struct surface_sam_ssh_rqst rqst;
  3723. +
  3724. + rqst.tc = SAM_PWR_TC;
  3725. + rqst.cid = SAM_RQST_PWR_CID_BTP;
  3726. + rqst.iid = iid;
  3727. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3728. + rqst.snc = 0x00;
  3729. + rqst.cdl = sizeof(u32);
  3730. + rqst.pld = (u8 *)&btp;
  3731. +
  3732. + return surface_sam_ssh_rqst(&rqst, NULL);
  3733. +}
  3734. +
  3735. +/* Get platform power soruce for battery (DPTF PSRC) */
  3736. +static int sam_psy_get_psrc(u8 iid, u32 *psrc)
  3737. +{
  3738. + struct surface_sam_ssh_rqst rqst;
  3739. + struct surface_sam_ssh_buf result;
  3740. +
  3741. + rqst.tc = SAM_PWR_TC;
  3742. + rqst.cid = SAM_RQST_PWR_CID_PSRC;
  3743. + rqst.iid = iid;
  3744. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3745. + rqst.snc = 0x01;
  3746. + rqst.cdl = 0x00;
  3747. + rqst.pld = NULL;
  3748. +
  3749. + result.cap = sizeof(u32);
  3750. + result.len = 0;
  3751. + result.data = (u8 *)psrc;
  3752. +
  3753. + return surface_sam_ssh_rqst(&rqst, &result);
  3754. +}
  3755. +
  3756. +/* Get maximum platform power for battery (DPTF PMAX) */
  3757. +__always_unused
  3758. +static int sam_psy_get_pmax(u8 iid, u32 *pmax)
  3759. +{
  3760. + struct surface_sam_ssh_rqst rqst;
  3761. + struct surface_sam_ssh_buf result;
  3762. +
  3763. + rqst.tc = SAM_PWR_TC;
  3764. + rqst.cid = SAM_RQST_PWR_CID_PMAX;
  3765. + rqst.iid = iid;
  3766. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3767. + rqst.snc = 0x01;
  3768. + rqst.cdl = 0x00;
  3769. + rqst.pld = NULL;
  3770. +
  3771. + result.cap = sizeof(u32);
  3772. + result.len = 0;
  3773. + result.data = (u8 *)pmax;
  3774. +
  3775. + return surface_sam_ssh_rqst(&rqst, &result);
  3776. +}
  3777. +
  3778. +/* Get adapter rating (DPTF ARTG) */
  3779. +__always_unused
  3780. +static int sam_psy_get_artg(u8 iid, u32 *artg)
  3781. +{
  3782. + struct surface_sam_ssh_rqst rqst;
  3783. + struct surface_sam_ssh_buf result;
  3784. +
  3785. + rqst.tc = SAM_PWR_TC;
  3786. + rqst.cid = SAM_RQST_PWR_CID_ARTG;
  3787. + rqst.iid = iid;
  3788. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3789. + rqst.snc = 0x01;
  3790. + rqst.cdl = 0x00;
  3791. + rqst.pld = NULL;
  3792. +
  3793. + result.cap = sizeof(u32);
  3794. + result.len = 0;
  3795. + result.data = (u8 *)artg;
  3796. +
  3797. + return surface_sam_ssh_rqst(&rqst, &result);
  3798. +}
  3799. +
  3800. +/* Unknown (DPTF PSOC) */
  3801. +__always_unused
  3802. +static int sam_psy_get_psoc(u8 iid, u32 *psoc)
  3803. +{
  3804. + struct surface_sam_ssh_rqst rqst;
  3805. + struct surface_sam_ssh_buf result;
  3806. +
  3807. + rqst.tc = SAM_PWR_TC;
  3808. + rqst.cid = SAM_RQST_PWR_CID_PSOC;
  3809. + rqst.iid = iid;
  3810. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3811. + rqst.snc = 0x01;
  3812. + rqst.cdl = 0x00;
  3813. + rqst.pld = NULL;
  3814. +
  3815. + result.cap = sizeof(u32);
  3816. + result.len = 0;
  3817. + result.data = (u8 *)psoc;
  3818. +
  3819. + return surface_sam_ssh_rqst(&rqst, &result);
  3820. +}
  3821. +
  3822. +/* Unknown (DPTF CHGI/ INT3403 SPPC) */
  3823. +__always_unused
  3824. +static int sam_psy_set_chgi(u8 iid, u32 chgi)
  3825. +{
  3826. + struct surface_sam_ssh_rqst rqst;
  3827. +
  3828. + rqst.tc = SAM_PWR_TC;
  3829. + rqst.cid = SAM_RQST_PWR_CID_CHGI;
  3830. + rqst.iid = iid;
  3831. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3832. + rqst.snc = 0x00;
  3833. + rqst.cdl = sizeof(u32);
  3834. + rqst.pld = (u8 *)&chgi;
  3835. +
  3836. + return surface_sam_ssh_rqst(&rqst, NULL);
  3837. +}
  3838. +
  3839. +
  3840. +/*
  3841. + * Common Power-Subsystem Interface.
  3842. + */
  3843. +
  3844. +enum spwr_battery_id {
  3845. + SPWR_BAT1,
  3846. + SPWR_BAT2,
  3847. + __SPWR_NUM_BAT,
  3848. +};
  3849. +#define SPWR_BAT_SINGLE PLATFORM_DEVID_NONE
  3850. +
  3851. +struct spwr_battery_device {
  3852. + struct platform_device *pdev;
  3853. + enum spwr_battery_id id;
  3854. +
  3855. + char name[32];
  3856. + struct power_supply *psy;
  3857. + struct power_supply_desc psy_desc;
  3858. +
  3859. + struct delayed_work update_work;
  3860. +
  3861. + struct mutex lock;
  3862. + unsigned long timestamp;
  3863. +
  3864. + u32 sta;
  3865. + struct spwr_bix bix;
  3866. + struct spwr_bst bst;
  3867. + u32 alarm;
  3868. +};
  3869. +
  3870. +struct spwr_ac_device {
  3871. + struct platform_device *pdev;
  3872. +
  3873. + char name[32];
  3874. + struct power_supply *psy;
  3875. + struct power_supply_desc psy_desc;
  3876. +
  3877. + struct mutex lock;
  3878. +
  3879. + u32 state;
  3880. +};
  3881. +
  3882. +struct spwr_subsystem {
  3883. + struct mutex lock;
  3884. +
  3885. + unsigned refcount;
  3886. + struct spwr_ac_device *ac;
  3887. + struct spwr_battery_device *battery[__SPWR_NUM_BAT];
  3888. +};
  3889. +
  3890. +static struct spwr_subsystem spwr_subsystem = {
  3891. + .lock = __MUTEX_INITIALIZER(spwr_subsystem.lock),
  3892. +};
  3893. +
  3894. +static enum power_supply_property spwr_ac_props[] = {
  3895. + POWER_SUPPLY_PROP_ONLINE,
  3896. +};
  3897. +
  3898. +static enum power_supply_property spwr_battery_props_chg[] = {
  3899. + POWER_SUPPLY_PROP_STATUS,
  3900. + POWER_SUPPLY_PROP_PRESENT,
  3901. + POWER_SUPPLY_PROP_TECHNOLOGY,
  3902. + POWER_SUPPLY_PROP_CYCLE_COUNT,
  3903. + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  3904. + POWER_SUPPLY_PROP_VOLTAGE_NOW,
  3905. + POWER_SUPPLY_PROP_CURRENT_NOW,
  3906. + POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
  3907. + POWER_SUPPLY_PROP_CHARGE_FULL,
  3908. + POWER_SUPPLY_PROP_CHARGE_NOW,
  3909. + POWER_SUPPLY_PROP_CAPACITY,
  3910. + POWER_SUPPLY_PROP_CAPACITY_LEVEL,
  3911. + POWER_SUPPLY_PROP_MODEL_NAME,
  3912. + POWER_SUPPLY_PROP_MANUFACTURER,
  3913. + POWER_SUPPLY_PROP_SERIAL_NUMBER,
  3914. +};
  3915. +
  3916. +static enum power_supply_property spwr_battery_props_eng[] = {
  3917. + POWER_SUPPLY_PROP_STATUS,
  3918. + POWER_SUPPLY_PROP_PRESENT,
  3919. + POWER_SUPPLY_PROP_TECHNOLOGY,
  3920. + POWER_SUPPLY_PROP_CYCLE_COUNT,
  3921. + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  3922. + POWER_SUPPLY_PROP_VOLTAGE_NOW,
  3923. + POWER_SUPPLY_PROP_POWER_NOW,
  3924. + POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN,
  3925. + POWER_SUPPLY_PROP_ENERGY_FULL,
  3926. + POWER_SUPPLY_PROP_ENERGY_NOW,
  3927. + POWER_SUPPLY_PROP_CAPACITY,
  3928. + POWER_SUPPLY_PROP_CAPACITY_LEVEL,
  3929. + POWER_SUPPLY_PROP_MODEL_NAME,
  3930. + POWER_SUPPLY_PROP_MANUFACTURER,
  3931. + POWER_SUPPLY_PROP_SERIAL_NUMBER,
  3932. +};
  3933. +
  3934. +
  3935. +static int spwr_battery_register(struct spwr_battery_device *bat, struct platform_device *pdev,
  3936. + enum spwr_battery_id id);
  3937. +
  3938. +static int spwr_battery_unregister(struct spwr_battery_device *bat);
  3939. +
  3940. +
  3941. +inline static bool spwr_battery_present(struct spwr_battery_device *bat)
  3942. +{
  3943. + return bat->sta & SAM_BATTERY_STA_PRESENT;
  3944. +}
  3945. +
  3946. +
  3947. +inline static int spwr_battery_load_sta(struct spwr_battery_device *bat)
  3948. +{
  3949. + return sam_psy_get_sta(bat->id + 1, &bat->sta);
  3950. +}
  3951. +
  3952. +inline static int spwr_battery_load_bix(struct spwr_battery_device *bat)
  3953. +{
  3954. + if (!spwr_battery_present(bat))
  3955. + return 0;
  3956. +
  3957. + return sam_psy_get_bix(bat->id + 1, &bat->bix);
  3958. +}
  3959. +
  3960. +inline static int spwr_battery_load_bst(struct spwr_battery_device *bat)
  3961. +{
  3962. + if (!spwr_battery_present(bat))
  3963. + return 0;
  3964. +
  3965. + return sam_psy_get_bst(bat->id + 1, &bat->bst);
  3966. +}
  3967. +
  3968. +
  3969. +inline static int spwr_battery_set_alarm_unlocked(struct spwr_battery_device *bat, u32 value)
  3970. +{
  3971. + bat->alarm = value;
  3972. + return sam_psy_set_btp(bat->id + 1, bat->alarm);
  3973. +}
  3974. +
  3975. +inline static int spwr_battery_set_alarm(struct spwr_battery_device *bat, u32 value)
  3976. +{
  3977. + int status;
  3978. +
  3979. + mutex_lock(&bat->lock);
  3980. + status = spwr_battery_set_alarm_unlocked(bat, value);
  3981. + mutex_unlock(&bat->lock);
  3982. +
  3983. + return status;
  3984. +}
  3985. +
  3986. +inline static int spwr_battery_update_bst_unlocked(struct spwr_battery_device *bat, bool cached)
  3987. +{
  3988. + unsigned long cache_deadline = bat->timestamp + msecs_to_jiffies(cache_time);
  3989. + int status;
  3990. +
  3991. + if (cached && bat->timestamp && time_is_after_jiffies(cache_deadline))
  3992. + return 0;
  3993. +
  3994. + status = spwr_battery_load_sta(bat);
  3995. + if (status)
  3996. + return status;
  3997. +
  3998. + status = spwr_battery_load_bst(bat);
  3999. + if (status)
  4000. + return status;
  4001. +
  4002. + bat->timestamp = jiffies;
  4003. + return 0;
  4004. +}
  4005. +
  4006. +static int spwr_battery_update_bst(struct spwr_battery_device *bat, bool cached)
  4007. +{
  4008. + int status;
  4009. +
  4010. + mutex_lock(&bat->lock);
  4011. + status = spwr_battery_update_bst_unlocked(bat, cached);
  4012. + mutex_unlock(&bat->lock);
  4013. +
  4014. + return status;
  4015. +}
  4016. +
  4017. +inline static int spwr_battery_update_bix_unlocked(struct spwr_battery_device *bat)
  4018. +{
  4019. + int status;
  4020. +
  4021. + status = spwr_battery_load_sta(bat);
  4022. + if (status)
  4023. + return status;
  4024. +
  4025. + status = spwr_battery_load_bix(bat);
  4026. + if (status)
  4027. + return status;
  4028. +
  4029. + status = spwr_battery_load_bst(bat);
  4030. + if (status)
  4031. + return status;
  4032. +
  4033. + bat->timestamp = jiffies;
  4034. + return 0;
  4035. +}
  4036. +
  4037. +static int spwr_battery_update_bix(struct spwr_battery_device *bat)
  4038. +{
  4039. + int status;
  4040. +
  4041. + mutex_lock(&bat->lock);
  4042. + status = spwr_battery_update_bix_unlocked(bat);
  4043. + mutex_unlock(&bat->lock);
  4044. +
  4045. + return status;
  4046. +}
  4047. +
  4048. +inline static int spwr_ac_update_unlocked(struct spwr_ac_device *ac)
  4049. +{
  4050. + return sam_psy_get_psrc(0x00, &ac->state);
  4051. +}
  4052. +
  4053. +static int spwr_ac_update(struct spwr_ac_device *ac)
  4054. +{
  4055. + int status;
  4056. +
  4057. + mutex_lock(&ac->lock);
  4058. + status = spwr_ac_update_unlocked(ac);
  4059. + mutex_unlock(&ac->lock);
  4060. +
  4061. + return status;
  4062. +}
  4063. +
  4064. +
  4065. +static int spwr_battery_recheck(struct spwr_battery_device *bat)
  4066. +{
  4067. + bool present = spwr_battery_present(bat);
  4068. + u32 unit = bat->bix.power_unit;
  4069. + int status;
  4070. +
  4071. + status = spwr_battery_update_bix(bat);
  4072. + if (status)
  4073. + return status;
  4074. +
  4075. + // if battery has been attached, (re-)initialize alarm
  4076. + if (!present && spwr_battery_present(bat)) {
  4077. + status = spwr_battery_set_alarm(bat, bat->bix.design_cap_warn);
  4078. + if (status)
  4079. + return status;
  4080. + }
  4081. +
  4082. + // if the unit has changed, re-add the battery
  4083. + if (unit != bat->bix.power_unit) {
  4084. + mutex_unlock(&spwr_subsystem.lock);
  4085. +
  4086. + status = spwr_battery_unregister(bat);
  4087. + if (status)
  4088. + return status;
  4089. +
  4090. + status = spwr_battery_register(bat, bat->pdev, bat->id);
  4091. + }
  4092. +
  4093. + return status;
  4094. +}
  4095. +
  4096. +
  4097. +static int spwr_handle_event_bix(struct surface_sam_ssh_event *event)
  4098. +{
  4099. + struct spwr_battery_device *bat;
  4100. + enum spwr_battery_id bat_id = event->iid - 1;
  4101. + int status = 0;
  4102. +
  4103. + if (bat_id < 0 || bat_id >= __SPWR_NUM_BAT) {
  4104. + printk(SPWR_WARN "invalid BIX event iid 0x%02x\n", event->iid);
  4105. + bat_id = SPWR_BAT1;
  4106. + }
  4107. +
  4108. + mutex_lock(&spwr_subsystem.lock);
  4109. + bat = spwr_subsystem.battery[bat_id];
  4110. + if (bat) {
  4111. + status = spwr_battery_recheck(bat);
  4112. + if (!status)
  4113. + power_supply_changed(bat->psy);
  4114. + }
  4115. +
  4116. + mutex_unlock(&spwr_subsystem.lock);
  4117. + return status;
  4118. +}
  4119. +
  4120. +static int spwr_handle_event_bst(struct surface_sam_ssh_event *event)
  4121. +{
  4122. + struct spwr_battery_device *bat;
  4123. + enum spwr_battery_id bat_id = event->iid - 1;
  4124. + int status = 0;
  4125. +
  4126. + if (bat_id < 0 || bat_id >= __SPWR_NUM_BAT) {
  4127. + printk(SPWR_WARN "invalid BST event iid 0x%02x\n", event->iid);
  4128. + bat_id = SPWR_BAT1;
  4129. + }
  4130. +
  4131. + mutex_lock(&spwr_subsystem.lock);
  4132. +
  4133. + bat = spwr_subsystem.battery[bat_id];
  4134. + if (bat) {
  4135. + status = spwr_battery_update_bst(bat, false);
  4136. + if (!status)
  4137. + power_supply_changed(bat->psy);
  4138. + }
  4139. +
  4140. + mutex_unlock(&spwr_subsystem.lock);
  4141. + return status;
  4142. +}
  4143. +
  4144. +static int spwr_handle_event_adapter(struct surface_sam_ssh_event *event)
  4145. +{
  4146. + struct spwr_battery_device *bat1 = NULL;
  4147. + struct spwr_battery_device *bat2 = NULL;
  4148. + struct spwr_ac_device *ac;
  4149. + int status = 0;
  4150. +
  4151. + mutex_lock(&spwr_subsystem.lock);
  4152. +
  4153. + ac = spwr_subsystem.ac;
  4154. + if (ac) {
  4155. + status = spwr_ac_update(ac);
  4156. + if (status)
  4157. + goto out;
  4158. +
  4159. + power_supply_changed(ac->psy);
  4160. + }
  4161. +
  4162. + /*
  4163. + * Handle battery update quirk:
  4164. + * When the battery is fully charged and the adapter is plugged in or
  4165. + * removed, the EC does not send a separate event for the state
  4166. + * (charging/discharging) change. Furthermore it may take some time until
  4167. + * the state is updated on the battery. Schedule an update to solve this.
  4168. + */
  4169. +
  4170. + bat1 = spwr_subsystem.battery[SPWR_BAT1];
  4171. + if (bat1 && bat1->bst.remaining_cap >= bat1->bix.last_full_charge_cap)
  4172. + schedule_delayed_work(&bat1->update_work, SPWR_AC_BAT_UPDATE_DELAY);
  4173. +
  4174. + bat2 = spwr_subsystem.battery[SPWR_BAT2];
  4175. + if (bat2 && bat2->bst.remaining_cap >= bat2->bix.last_full_charge_cap)
  4176. + schedule_delayed_work(&bat2->update_work, SPWR_AC_BAT_UPDATE_DELAY);
  4177. +
  4178. +out:
  4179. + mutex_unlock(&spwr_subsystem.lock);
  4180. + return status;
  4181. +}
  4182. +
  4183. +static int spwr_handle_event_dptf(struct surface_sam_ssh_event *event)
  4184. +{
  4185. + return 0; // TODO: spwr_handle_event_dptf
  4186. +}
  4187. +
  4188. +static int spwr_handle_event(struct surface_sam_ssh_event *event, void *data)
  4189. +{
  4190. + printk(SPWR_DEBUG "power event (cid = 0x%02x)\n", event->cid);
  4191. +
  4192. + switch (event->cid) {
  4193. + case SAM_EVENT_PWR_CID_BIX:
  4194. + return spwr_handle_event_bix(event);
  4195. +
  4196. + case SAM_EVENT_PWR_CID_BST:
  4197. + return spwr_handle_event_bst(event);
  4198. +
  4199. + case SAM_EVENT_PWR_CID_ADAPTER:
  4200. + return spwr_handle_event_adapter(event);
  4201. +
  4202. + case SAM_EVENT_PWR_CID_DPTF:
  4203. + return spwr_handle_event_dptf(event);
  4204. +
  4205. + default:
  4206. + printk(SPWR_WARN "unhandled power event (cid = 0x%02x)\n", event->cid);
  4207. + return 0;
  4208. + }
  4209. +}
  4210. +
  4211. +static void spwr_battery_update_bst_workfn(struct work_struct *work)
  4212. +{
  4213. + struct delayed_work *dwork = to_delayed_work(work);
  4214. + struct spwr_battery_device *bat = container_of(dwork, struct spwr_battery_device, update_work);
  4215. + int status;
  4216. +
  4217. + status = spwr_battery_update_bst(bat, false);
  4218. + if (!status)
  4219. + power_supply_changed(bat->psy);
  4220. +
  4221. + if (status)
  4222. + dev_err(&bat->pdev->dev, "failed to update battery state: %d\n", status);
  4223. +}
  4224. +
  4225. +
  4226. +inline static int spwr_battery_prop_status(struct spwr_battery_device *bat)
  4227. +{
  4228. + if (bat->bst.state & SAM_BATTERY_STATE_DISCHARGING)
  4229. + return POWER_SUPPLY_STATUS_DISCHARGING;
  4230. +
  4231. + if (bat->bst.state & SAM_BATTERY_STATE_CHARGING)
  4232. + return POWER_SUPPLY_STATUS_CHARGING;
  4233. +
  4234. + if (bat->bix.last_full_charge_cap == bat->bst.remaining_cap)
  4235. + return POWER_SUPPLY_STATUS_FULL;
  4236. +
  4237. + if (bat->bst.present_rate == 0)
  4238. + return POWER_SUPPLY_STATUS_NOT_CHARGING;
  4239. +
  4240. + return POWER_SUPPLY_STATUS_UNKNOWN;
  4241. +}
  4242. +
  4243. +inline static int spwr_battery_prop_technology(struct spwr_battery_device *bat)
  4244. +{
  4245. + if (!strcasecmp("NiCd", bat->bix.type))
  4246. + return POWER_SUPPLY_TECHNOLOGY_NiCd;
  4247. +
  4248. + if (!strcasecmp("NiMH", bat->bix.type))
  4249. + return POWER_SUPPLY_TECHNOLOGY_NiMH;
  4250. +
  4251. + if (!strcasecmp("LION", bat->bix.type))
  4252. + return POWER_SUPPLY_TECHNOLOGY_LION;
  4253. +
  4254. + if (!strncasecmp("LI-ION", bat->bix.type, 6))
  4255. + return POWER_SUPPLY_TECHNOLOGY_LION;
  4256. +
  4257. + if (!strcasecmp("LiP", bat->bix.type))
  4258. + return POWER_SUPPLY_TECHNOLOGY_LIPO;
  4259. +
  4260. + return POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
  4261. +}
  4262. +
  4263. +inline static int spwr_battery_prop_capacity(struct spwr_battery_device *bat)
  4264. +{
  4265. + if (bat->bst.remaining_cap && bat->bix.last_full_charge_cap)
  4266. + return bat->bst.remaining_cap * 100 / bat->bix.last_full_charge_cap;
  4267. + else
  4268. + return 0;
  4269. +}
  4270. +
  4271. +inline static int spwr_battery_prop_capacity_level(struct spwr_battery_device *bat)
  4272. +{
  4273. + if (bat->bst.state & SAM_BATTERY_STATE_CRITICAL)
  4274. + return POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
  4275. +
  4276. + if (bat->bst.remaining_cap >= bat->bix.last_full_charge_cap)
  4277. + return POWER_SUPPLY_CAPACITY_LEVEL_FULL;
  4278. +
  4279. + if (bat->bst.remaining_cap <= bat->alarm)
  4280. + return POWER_SUPPLY_CAPACITY_LEVEL_LOW;
  4281. +
  4282. + return POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
  4283. +}
  4284. +
  4285. +static int spwr_ac_get_property(struct power_supply *psy,
  4286. + enum power_supply_property psp,
  4287. + union power_supply_propval *val)
  4288. +{
  4289. + struct spwr_ac_device *ac = power_supply_get_drvdata(psy);
  4290. + int status;
  4291. +
  4292. + mutex_lock(&ac->lock);
  4293. +
  4294. + status = spwr_ac_update_unlocked(ac);
  4295. + if (status)
  4296. + goto out;
  4297. +
  4298. + switch (psp) {
  4299. + case POWER_SUPPLY_PROP_ONLINE:
  4300. + val->intval = ac->state == 1;
  4301. + break;
  4302. +
  4303. + default:
  4304. + status = -EINVAL;
  4305. + goto out;
  4306. + }
  4307. +
  4308. +out:
  4309. + mutex_unlock(&ac->lock);
  4310. + return status;
  4311. +}
  4312. +
  4313. +static int spwr_battery_get_property(struct power_supply *psy,
  4314. + enum power_supply_property psp,
  4315. + union power_supply_propval *val)
  4316. +{
  4317. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4318. + int status;
  4319. +
  4320. + mutex_lock(&bat->lock);
  4321. +
  4322. + status = spwr_battery_update_bst_unlocked(bat, true);
  4323. + if (status)
  4324. + goto out;
  4325. +
  4326. + // abort if battery is not present
  4327. + if (!spwr_battery_present(bat) && psp != POWER_SUPPLY_PROP_PRESENT) {
  4328. + status = -ENODEV;
  4329. + goto out;
  4330. + }
  4331. +
  4332. + switch (psp) {
  4333. + case POWER_SUPPLY_PROP_STATUS:
  4334. + val->intval = spwr_battery_prop_status(bat);
  4335. + break;
  4336. +
  4337. + case POWER_SUPPLY_PROP_PRESENT:
  4338. + val->intval = spwr_battery_present(bat);
  4339. + break;
  4340. +
  4341. + case POWER_SUPPLY_PROP_TECHNOLOGY:
  4342. + val->intval = spwr_battery_prop_technology(bat);
  4343. + break;
  4344. +
  4345. + case POWER_SUPPLY_PROP_CYCLE_COUNT:
  4346. + val->intval = bat->bix.cycle_count;
  4347. + break;
  4348. +
  4349. + case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
  4350. + val->intval = bat->bix.design_voltage * 1000;
  4351. + break;
  4352. +
  4353. + case POWER_SUPPLY_PROP_VOLTAGE_NOW:
  4354. + val->intval = bat->bst.present_voltage * 1000;
  4355. + break;
  4356. +
  4357. + case POWER_SUPPLY_PROP_CURRENT_NOW:
  4358. + case POWER_SUPPLY_PROP_POWER_NOW:
  4359. + val->intval = bat->bst.present_rate * 1000;
  4360. + break;
  4361. +
  4362. + case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
  4363. + case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
  4364. + val->intval = bat->bix.design_cap * 1000;
  4365. + break;
  4366. +
  4367. + case POWER_SUPPLY_PROP_CHARGE_FULL:
  4368. + case POWER_SUPPLY_PROP_ENERGY_FULL:
  4369. + val->intval = bat->bix.last_full_charge_cap * 1000;
  4370. + break;
  4371. +
  4372. + case POWER_SUPPLY_PROP_CHARGE_NOW:
  4373. + case POWER_SUPPLY_PROP_ENERGY_NOW:
  4374. + val->intval = bat->bst.remaining_cap * 1000;
  4375. + break;
  4376. +
  4377. + case POWER_SUPPLY_PROP_CAPACITY:
  4378. + val->intval = spwr_battery_prop_capacity(bat);
  4379. + break;
  4380. +
  4381. + case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
  4382. + val->intval = spwr_battery_prop_capacity_level(bat);
  4383. + break;
  4384. +
  4385. + case POWER_SUPPLY_PROP_MODEL_NAME:
  4386. + val->strval = bat->bix.model;
  4387. + break;
  4388. +
  4389. + case POWER_SUPPLY_PROP_MANUFACTURER:
  4390. + val->strval = bat->bix.oem_info;
  4391. + break;
  4392. +
  4393. + case POWER_SUPPLY_PROP_SERIAL_NUMBER:
  4394. + val->strval = bat->bix.serial;
  4395. + break;
  4396. +
  4397. + default:
  4398. + status = -EINVAL;
  4399. + goto out;
  4400. + }
  4401. +
  4402. +out:
  4403. + mutex_unlock(&bat->lock);
  4404. + return status;
  4405. +}
  4406. +
  4407. +
  4408. +static ssize_t spwr_battery_alarm_show(struct device *dev,
  4409. + struct device_attribute *attr,
  4410. + char *buf)
  4411. +{
  4412. + struct power_supply *psy = dev_get_drvdata(dev);
  4413. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4414. +
  4415. + return sprintf(buf, "%d\n", bat->alarm * 1000);
  4416. +}
  4417. +
  4418. +static ssize_t spwr_battery_alarm_store(struct device *dev,
  4419. + struct device_attribute *attr,
  4420. + const char *buf, size_t count)
  4421. +{
  4422. + struct power_supply *psy = dev_get_drvdata(dev);
  4423. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4424. + unsigned long value;
  4425. + int status;
  4426. +
  4427. + status = kstrtoul(buf, 0, &value);
  4428. + if (status)
  4429. + return status;
  4430. +
  4431. + if (!spwr_battery_present(bat))
  4432. + return -ENODEV;
  4433. +
  4434. + status = spwr_battery_set_alarm(bat, value / 1000);
  4435. + if (status)
  4436. + return status;
  4437. +
  4438. + return count;
  4439. +}
  4440. +
  4441. +static const struct device_attribute alarm_attr = {
  4442. + .attr = {.name = "alarm", .mode = 0644},
  4443. + .show = spwr_battery_alarm_show,
  4444. + .store = spwr_battery_alarm_store,
  4445. +};
  4446. +
  4447. +
  4448. +static int spwr_subsys_init_unlocked(void)
  4449. +{
  4450. + int status;
  4451. +
  4452. + status = surface_sam_ssh_set_event_handler(SAM_PWR_RQID, spwr_handle_event, NULL);
  4453. + if (status) {
  4454. + goto err_handler;
  4455. + }
  4456. +
  4457. + status = surface_sam_ssh_enable_event_source(SAM_PWR_TC, 0x01, SAM_PWR_RQID);
  4458. + if (status) {
  4459. + goto err_source;
  4460. + }
  4461. +
  4462. + return 0;
  4463. +
  4464. +err_source:
  4465. + surface_sam_ssh_remove_event_handler(SAM_PWR_RQID);
  4466. +err_handler:
  4467. + return status;
  4468. +}
  4469. +
  4470. +static int spwr_subsys_deinit_unlocked(void)
  4471. +{
  4472. + surface_sam_ssh_disable_event_source(SAM_PWR_TC, 0x01, SAM_PWR_RQID);
  4473. + surface_sam_ssh_remove_event_handler(SAM_PWR_RQID);
  4474. + return 0;
  4475. +}
  4476. +
  4477. +static inline int spwr_subsys_ref_unlocked(void)
  4478. +{
  4479. + int status = 0;
  4480. +
  4481. + if (!spwr_subsystem.refcount)
  4482. + status = spwr_subsys_init_unlocked();
  4483. +
  4484. + spwr_subsystem.refcount += 1;
  4485. + return status;
  4486. +}
  4487. +
  4488. +static inline int spwr_subsys_unref_unlocked(void)
  4489. +{
  4490. + int status = 0;
  4491. +
  4492. + if (spwr_subsystem.refcount)
  4493. + spwr_subsystem.refcount -= 1;
  4494. +
  4495. + if (!spwr_subsystem.refcount)
  4496. + status = spwr_subsys_deinit_unlocked();
  4497. +
  4498. + return status;
  4499. +}
  4500. +
  4501. +
  4502. +static int spwr_ac_register(struct spwr_ac_device *ac, struct platform_device *pdev)
  4503. +{
  4504. + struct power_supply_config psy_cfg = {};
  4505. + u32 sta;
  4506. + int status;
  4507. +
  4508. + // make sure the device is there and functioning properly
  4509. + status = sam_psy_get_sta(0x00, &sta);
  4510. + if (status)
  4511. + return status;
  4512. +
  4513. + if ((sta & SAM_BATTERY_STA_OK) != SAM_BATTERY_STA_OK)
  4514. + return -ENODEV;
  4515. +
  4516. + psy_cfg.drv_data = ac;
  4517. +
  4518. + ac->pdev = pdev;
  4519. + mutex_init(&ac->lock);
  4520. +
  4521. + snprintf(ac->name, ARRAY_SIZE(ac->name), "ADP0");
  4522. +
  4523. + ac->psy_desc.name = ac->name;
  4524. + ac->psy_desc.type = POWER_SUPPLY_TYPE_MAINS;
  4525. + ac->psy_desc.properties = spwr_ac_props;
  4526. + ac->psy_desc.num_properties = ARRAY_SIZE(spwr_ac_props);
  4527. + ac->psy_desc.get_property = spwr_ac_get_property;
  4528. +
  4529. + mutex_lock(&spwr_subsystem.lock);
  4530. + if (spwr_subsystem.ac) {
  4531. + status = -EEXIST;
  4532. + goto err;
  4533. + }
  4534. +
  4535. + status = spwr_subsys_ref_unlocked();
  4536. + if (status)
  4537. + goto err;
  4538. +
  4539. + ac->psy = power_supply_register(&ac->pdev->dev, &ac->psy_desc, &psy_cfg);
  4540. + if (IS_ERR(ac->psy)) {
  4541. + status = PTR_ERR(ac->psy);
  4542. + goto err_unref;
  4543. + }
  4544. +
  4545. + spwr_subsystem.ac = ac;
  4546. + mutex_unlock(&spwr_subsystem.lock);
  4547. + return 0;
  4548. +
  4549. +err_unref:
  4550. + spwr_subsys_unref_unlocked();
  4551. +err:
  4552. + mutex_unlock(&spwr_subsystem.lock);
  4553. + mutex_destroy(&ac->lock);
  4554. + return status;
  4555. +}
  4556. +
  4557. +static int spwr_ac_unregister(struct spwr_ac_device *ac)
  4558. +{
  4559. + int status;
  4560. +
  4561. + mutex_lock(&spwr_subsystem.lock);
  4562. + if (spwr_subsystem.ac != ac) {
  4563. + mutex_unlock(&spwr_subsystem.lock);
  4564. + return -EINVAL;
  4565. + }
  4566. +
  4567. + spwr_subsystem.ac = NULL;
  4568. + power_supply_unregister(ac->psy);
  4569. +
  4570. + status = spwr_subsys_unref_unlocked();
  4571. + mutex_unlock(&spwr_subsystem.lock);
  4572. +
  4573. + mutex_destroy(&ac->lock);
  4574. + return status;
  4575. +}
  4576. +
  4577. +static int spwr_battery_register(struct spwr_battery_device *bat, struct platform_device *pdev,
  4578. + enum spwr_battery_id id)
  4579. +{
  4580. + struct power_supply_config psy_cfg = {};
  4581. + u32 sta;
  4582. + int status;
  4583. +
  4584. + if ((id < 0 || id >= __SPWR_NUM_BAT) && id != SPWR_BAT_SINGLE)
  4585. + return -EINVAL;
  4586. +
  4587. + bat->pdev = pdev;
  4588. + bat->id = id != SPWR_BAT_SINGLE ? id : SPWR_BAT1;
  4589. +
  4590. + // make sure the device is there and functioning properly
  4591. + status = sam_psy_get_sta(bat->id + 1, &sta);
  4592. + if (status)
  4593. + return status;
  4594. +
  4595. + if ((sta & SAM_BATTERY_STA_OK) != SAM_BATTERY_STA_OK)
  4596. + return -ENODEV;
  4597. +
  4598. + status = spwr_battery_update_bix_unlocked(bat);
  4599. + if (status)
  4600. + return status;
  4601. +
  4602. + if (spwr_battery_present(bat)) {
  4603. + status = spwr_battery_set_alarm_unlocked(bat, bat->bix.design_cap_warn);
  4604. + if (status)
  4605. + return status;
  4606. + }
  4607. +
  4608. + snprintf(bat->name, ARRAY_SIZE(bat->name), "BAT%d", bat->id);
  4609. + bat->psy_desc.name = bat->name;
  4610. + bat->psy_desc.type = POWER_SUPPLY_TYPE_BATTERY;
  4611. +
  4612. + if (bat->bix.power_unit == SAM_BATTERY_POWER_UNIT_MA) {
  4613. + bat->psy_desc.properties = spwr_battery_props_chg;
  4614. + bat->psy_desc.num_properties = ARRAY_SIZE(spwr_battery_props_chg);
  4615. + } else {
  4616. + bat->psy_desc.properties = spwr_battery_props_eng;
  4617. + bat->psy_desc.num_properties = ARRAY_SIZE(spwr_battery_props_eng);
  4618. + }
  4619. +
  4620. + bat->psy_desc.get_property = spwr_battery_get_property;
  4621. +
  4622. + mutex_init(&bat->lock);
  4623. + psy_cfg.drv_data = bat;
  4624. +
  4625. + INIT_DELAYED_WORK(&bat->update_work, spwr_battery_update_bst_workfn);
  4626. +
  4627. + mutex_lock(&spwr_subsystem.lock);
  4628. + if (spwr_subsystem.battery[bat->id]) {
  4629. + status = -EEXIST;
  4630. + goto err;
  4631. + }
  4632. +
  4633. + status = spwr_subsys_ref_unlocked();
  4634. + if (status)
  4635. + goto err;
  4636. +
  4637. + bat->psy = power_supply_register(&bat->pdev->dev, &bat->psy_desc, &psy_cfg);
  4638. + if (IS_ERR(bat->psy)) {
  4639. + status = PTR_ERR(bat->psy);
  4640. + goto err_unref;
  4641. + }
  4642. +
  4643. + status = device_create_file(&bat->psy->dev, &alarm_attr);
  4644. + if (status)
  4645. + goto err_dereg;
  4646. +
  4647. + spwr_subsystem.battery[bat->id] = bat;
  4648. + mutex_unlock(&spwr_subsystem.lock);
  4649. + return 0;
  4650. +
  4651. +err_dereg:
  4652. + power_supply_unregister(bat->psy);
  4653. +err_unref:
  4654. + spwr_subsys_unref_unlocked();
  4655. +err:
  4656. + mutex_unlock(&spwr_subsystem.lock);
  4657. + return status;
  4658. +}
  4659. +
  4660. +static int spwr_battery_unregister(struct spwr_battery_device *bat)
  4661. +{
  4662. + int status;
  4663. +
  4664. + if (bat->id < 0 || bat->id >= __SPWR_NUM_BAT)
  4665. + return -EINVAL ;
  4666. +
  4667. + mutex_lock(&spwr_subsystem.lock);
  4668. + if (spwr_subsystem.battery[bat->id] != bat) {
  4669. + mutex_unlock(&spwr_subsystem.lock);
  4670. + return -EINVAL;
  4671. + }
  4672. +
  4673. + spwr_subsystem.battery[bat->id] = NULL;
  4674. +
  4675. + status = spwr_subsys_unref_unlocked();
  4676. + mutex_unlock(&spwr_subsystem.lock);
  4677. +
  4678. + cancel_delayed_work_sync(&bat->update_work);
  4679. + device_remove_file(&bat->psy->dev, &alarm_attr);
  4680. + power_supply_unregister(bat->psy);
  4681. +
  4682. + mutex_destroy(&bat->lock);
  4683. + return status;
  4684. +}
  4685. +
  4686. +
  4687. +/*
  4688. + * Battery Driver.
  4689. + */
  4690. +
  4691. +#ifdef CONFIG_PM_SLEEP
  4692. +static int surface_sam_sid_battery_resume(struct device *dev)
  4693. +{
  4694. + struct spwr_battery_device *bat = dev_get_drvdata(dev);
  4695. + return spwr_battery_recheck(bat);
  4696. +}
  4697. +#else
  4698. +#define surface_sam_sid_battery_resume NULL
  4699. +#endif
  4700. +
  4701. +SIMPLE_DEV_PM_OPS(surface_sam_sid_battery_pm, NULL, surface_sam_sid_battery_resume);
  4702. +
  4703. +static int surface_sam_sid_battery_probe(struct platform_device *pdev)
  4704. +{
  4705. + int status;
  4706. + struct spwr_battery_device *bat;
  4707. +
  4708. + // link to ec
  4709. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  4710. + if (status)
  4711. + return status == -ENXIO ? -EPROBE_DEFER : status;
  4712. +
  4713. + bat = devm_kzalloc(&pdev->dev, sizeof(struct spwr_battery_device), GFP_KERNEL);
  4714. + if (!bat)
  4715. + return -ENOMEM;
  4716. +
  4717. + platform_set_drvdata(pdev, bat);
  4718. + return spwr_battery_register(bat, pdev, pdev->id);
  4719. +}
  4720. +
  4721. +static int surface_sam_sid_battery_remove(struct platform_device *pdev)
  4722. +{
  4723. + struct spwr_battery_device *bat = platform_get_drvdata(pdev);
  4724. + return spwr_battery_unregister(bat);
  4725. +}
  4726. +
  4727. +static struct platform_driver surface_sam_sid_battery = {
  4728. + .probe = surface_sam_sid_battery_probe,
  4729. + .remove = surface_sam_sid_battery_remove,
  4730. + .driver = {
  4731. + .name = "surface_sam_sid_battery",
  4732. + .pm = &surface_sam_sid_battery_pm,
  4733. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4734. + },
  4735. +};
  4736. +
  4737. +
  4738. +/*
  4739. + * AC Driver.
  4740. + */
  4741. +
  4742. +static int surface_sam_sid_ac_probe(struct platform_device *pdev)
  4743. +{
  4744. + int status;
  4745. + struct spwr_ac_device *ac;
  4746. +
  4747. + // link to ec
  4748. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  4749. + if (status)
  4750. + return status == -ENXIO ? -EPROBE_DEFER : status;
  4751. +
  4752. + ac = devm_kzalloc(&pdev->dev, sizeof(struct spwr_ac_device), GFP_KERNEL);
  4753. + if (!ac)
  4754. + return -ENOMEM;
  4755. +
  4756. + status = spwr_ac_register(ac, pdev);
  4757. + if (status)
  4758. + return status;
  4759. +
  4760. + platform_set_drvdata(pdev, ac);
  4761. + return 0;
  4762. +}
  4763. +
  4764. +static int surface_sam_sid_ac_remove(struct platform_device *pdev)
  4765. +{
  4766. + struct spwr_ac_device *ac = platform_get_drvdata(pdev);
  4767. + return spwr_ac_unregister(ac);
  4768. +}
  4769. +
  4770. +static struct platform_driver surface_sam_sid_ac = {
  4771. + .probe = surface_sam_sid_ac_probe,
  4772. + .remove = surface_sam_sid_ac_remove,
  4773. + .driver = {
  4774. + .name = "surface_sam_sid_ac",
  4775. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4776. + },
  4777. +};
  4778. +
  4779. +
  4780. +static int __init surface_sam_sid_power_init(void)
  4781. +{
  4782. + int status;
  4783. +
  4784. + status = platform_driver_register(&surface_sam_sid_battery);
  4785. + if (status)
  4786. + return status;
  4787. +
  4788. + status = platform_driver_register(&surface_sam_sid_ac);
  4789. + if (status) {
  4790. + platform_driver_unregister(&surface_sam_sid_battery);
  4791. + return status;
  4792. + }
  4793. +
  4794. + return 0;
  4795. +}
  4796. +
  4797. +static void __exit surface_sam_sid_power_exit(void)
  4798. +{
  4799. + platform_driver_unregister(&surface_sam_sid_battery);
  4800. + platform_driver_unregister(&surface_sam_sid_ac);
  4801. +}
  4802. +
  4803. +module_init(surface_sam_sid_power_init);
  4804. +module_exit(surface_sam_sid_power_exit);
  4805. +
  4806. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  4807. +MODULE_DESCRIPTION("Surface Battery/AC Driver for 7th Generation Surface Devices");
  4808. +MODULE_LICENSE("GPL v2");
  4809. +MODULE_ALIAS("platform:surface_sam_sid_ac");
  4810. +MODULE_ALIAS("platform:surface_sam_sid_battery");
  4811. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c b/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  4812. new file mode 100644
  4813. index 000000000000..dc5be3a14a8c
  4814. --- /dev/null
  4815. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  4816. @@ -0,0 +1,440 @@
  4817. +/*
  4818. + * Microsofs Surface HID (VHF) driver for HID input events via SAM.
  4819. + * Used for keyboard input events on the 7th generation Surface Laptops.
  4820. + */
  4821. +
  4822. +#include <linux/acpi.h>
  4823. +#include <linux/hid.h>
  4824. +#include <linux/input.h>
  4825. +#include <linux/platform_device.h>
  4826. +#include <linux/types.h>
  4827. +
  4828. +#include "surface_sam_ssh.h"
  4829. +
  4830. +#define SID_VHF_INPUT_NAME "Microsoft Surface HID"
  4831. +
  4832. +/*
  4833. + * Request ID for VHF events. This value is based on the output of the Surface
  4834. + * EC and should not be changed.
  4835. + */
  4836. +#define SAM_EVENT_SID_VHF_RQID 0x0015
  4837. +#define SAM_EVENT_SID_VHF_TC 0x15
  4838. +
  4839. +#define VHF_HID_STARTED 0
  4840. +
  4841. +struct sid_vhf_evtctx {
  4842. + struct device *dev;
  4843. + struct hid_device *hid;
  4844. + unsigned long flags;
  4845. +};
  4846. +
  4847. +struct sid_vhf_drvdata {
  4848. + struct sid_vhf_evtctx event_ctx;
  4849. +};
  4850. +
  4851. +
  4852. +static int sid_vhf_hid_start(struct hid_device *hid)
  4853. +{
  4854. + hid_dbg(hid, "%s\n", __func__);
  4855. + return 0;
  4856. +}
  4857. +
  4858. +static void sid_vhf_hid_stop(struct hid_device *hid)
  4859. +{
  4860. + hid_dbg(hid, "%s\n", __func__);
  4861. +}
  4862. +
  4863. +static int sid_vhf_hid_open(struct hid_device *hid)
  4864. +{
  4865. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(to_platform_device(hid->dev.parent));
  4866. +
  4867. + hid_dbg(hid, "%s\n", __func__);
  4868. +
  4869. + set_bit(VHF_HID_STARTED, &drvdata->event_ctx.flags);
  4870. + return 0;
  4871. +}
  4872. +
  4873. +static void sid_vhf_hid_close(struct hid_device *hid)
  4874. +{
  4875. +
  4876. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(to_platform_device(hid->dev.parent));
  4877. +
  4878. + hid_dbg(hid, "%s\n", __func__);
  4879. +
  4880. + clear_bit(VHF_HID_STARTED, &drvdata->event_ctx.flags);
  4881. +}
  4882. +
  4883. +struct surface_sam_sid_vhf_meta_rqst {
  4884. + u8 id;
  4885. + u32 offset;
  4886. + u32 length; // buffer limit on send, length of data received on receive
  4887. + u8 end; // 0x01 if end was reached
  4888. +} __packed;
  4889. +
  4890. +struct vhf_device_metadata_info {
  4891. + u8 len;
  4892. + u8 _2;
  4893. + u8 _3;
  4894. + u8 _4;
  4895. + u8 _5;
  4896. + u8 _6;
  4897. + u8 _7;
  4898. + u16 hid_len; // hid descriptor length
  4899. +} __packed;
  4900. +
  4901. +struct vhf_device_metadata {
  4902. + u32 len;
  4903. + u16 vendor_id;
  4904. + u16 product_id;
  4905. + u8 _1[24];
  4906. +} __packed;
  4907. +
  4908. +union vhf_buffer_data {
  4909. + struct vhf_device_metadata_info info;
  4910. + u8 pld[0x76];
  4911. + struct vhf_device_metadata meta;
  4912. +};
  4913. +
  4914. +struct surface_sam_sid_vhf_meta_resp {
  4915. + struct surface_sam_sid_vhf_meta_rqst rqst;
  4916. + union vhf_buffer_data data;
  4917. +} __packed;
  4918. +
  4919. +
  4920. +static int vhf_get_metadata(u8 iid, struct vhf_device_metadata *meta)
  4921. +{
  4922. + int status;
  4923. +
  4924. + struct surface_sam_sid_vhf_meta_resp resp = {
  4925. + .rqst = {
  4926. + .id = 2,
  4927. + .offset = 0,
  4928. + .length = 0x76,
  4929. + .end = 0
  4930. + }
  4931. + };
  4932. +
  4933. + struct surface_sam_ssh_rqst rqst = {
  4934. + .tc = 0x15,
  4935. + .cid = 0x04,
  4936. + .iid = iid,
  4937. + .pri = 0x02,
  4938. + .snc = 0x01,
  4939. + .cdl = sizeof(struct surface_sam_sid_vhf_meta_rqst),
  4940. + .pld = (u8*)&resp.rqst,
  4941. + };
  4942. +
  4943. + struct surface_sam_ssh_buf result = {
  4944. + .cap = sizeof(struct surface_sam_sid_vhf_meta_resp),
  4945. + .len = 0,
  4946. + .data = (u8*)&resp,
  4947. + };
  4948. +
  4949. + status = surface_sam_ssh_rqst(&rqst, &result);
  4950. + if (status) {
  4951. + return status;
  4952. + }
  4953. +
  4954. + *meta = resp.data.meta;
  4955. +
  4956. + return 0;
  4957. +}
  4958. +
  4959. +static int vhf_get_hid_descriptor(struct hid_device *hid, u8 iid, u8 **desc, int *size)
  4960. +{
  4961. + int status, len;
  4962. + u8 *buf;
  4963. +
  4964. + struct surface_sam_sid_vhf_meta_resp resp = {
  4965. + .rqst = {
  4966. + .id = 0,
  4967. + .offset = 0,
  4968. + .length = 0x76,
  4969. + .end = 0,
  4970. + }
  4971. + };
  4972. +
  4973. + struct surface_sam_ssh_rqst rqst = {
  4974. + .tc = 0x15,
  4975. + .cid = 0x04,
  4976. + .iid = iid,
  4977. + .pri = 0x02,
  4978. + .snc = 0x01,
  4979. + .cdl = sizeof(struct surface_sam_sid_vhf_meta_rqst),
  4980. + .pld = (u8*)&resp.rqst,
  4981. + };
  4982. +
  4983. + struct surface_sam_ssh_buf result = {
  4984. + .cap = sizeof(struct surface_sam_sid_vhf_meta_resp),
  4985. + .len = 0,
  4986. + .data = (u8*)&resp,
  4987. + };
  4988. +
  4989. + // first fetch 00 to get the total length
  4990. + status = surface_sam_ssh_rqst(&rqst, &result);
  4991. + if (status) {
  4992. + return status;
  4993. + }
  4994. +
  4995. + len = resp.data.info.hid_len;
  4996. +
  4997. + // allocate a buffer for the descriptor
  4998. + buf = kzalloc(len, GFP_KERNEL);
  4999. +
  5000. + // then, iterate and write into buffer, copying out bytes
  5001. + resp.rqst.id = 1;
  5002. + resp.rqst.offset = 0;
  5003. + resp.rqst.length = 0x76;
  5004. + resp.rqst.end = 0;
  5005. +
  5006. + while (!resp.rqst.end && resp.rqst.offset < len) {
  5007. + status = surface_sam_ssh_rqst(&rqst, &result);
  5008. + if (status) {
  5009. + kfree(buf);
  5010. + return status;
  5011. + }
  5012. + memcpy(buf + resp.rqst.offset, resp.data.pld, resp.rqst.length);
  5013. +
  5014. + resp.rqst.offset += resp.rqst.length;
  5015. + }
  5016. +
  5017. + *desc = buf;
  5018. + *size = len;
  5019. +
  5020. + return 0;
  5021. +}
  5022. +
  5023. +static int sid_vhf_hid_parse(struct hid_device *hid)
  5024. +{
  5025. + int ret = 0, size;
  5026. + u8 *buf;
  5027. +
  5028. + ret = vhf_get_hid_descriptor(hid, 0x00, &buf, &size);
  5029. + if (ret != 0) {
  5030. + hid_err(hid, "Failed to read HID descriptor from device: %d\n", ret);
  5031. + return -EIO;
  5032. + }
  5033. + hid_dbg(hid, "HID descriptor of device:");
  5034. + print_hex_dump_debug("descriptor:", DUMP_PREFIX_OFFSET, 16, 1, buf, size, false);
  5035. +
  5036. + ret = hid_parse_report(hid, buf, size);
  5037. + kfree(buf);
  5038. + return ret;
  5039. +
  5040. +}
  5041. +
  5042. +static int sid_vhf_hid_raw_request(struct hid_device *hid, unsigned char
  5043. + reportnum, u8 *buf, size_t len, unsigned char rtype, int
  5044. + reqtype)
  5045. +{
  5046. + int status;
  5047. + u8 cid;
  5048. + struct surface_sam_ssh_rqst rqst = {};
  5049. + struct surface_sam_ssh_buf result = {};
  5050. +
  5051. + hid_dbg(hid, "%s: reportnum=%#04x rtype=%i reqtype=%i\n", __func__, reportnum, rtype, reqtype);
  5052. + print_hex_dump_debug("report:", DUMP_PREFIX_OFFSET, 16, 1, buf, len, false);
  5053. +
  5054. + // Byte 0 is the report number. Report data starts at byte 1.
  5055. + buf[0] = reportnum;
  5056. +
  5057. + switch (rtype) {
  5058. + case HID_OUTPUT_REPORT:
  5059. + cid = 0x01;
  5060. + break;
  5061. + case HID_FEATURE_REPORT:
  5062. + switch (reqtype) {
  5063. + case HID_REQ_GET_REPORT:
  5064. + // The EC doesn't respond to GET FEATURE for these touchpad reports
  5065. + // we immediately discard to avoid waiting for a timeout.
  5066. + if (reportnum == 6 || reportnum == 7 || reportnum == 8 || reportnum == 9 || reportnum == 0x0b) {
  5067. + hid_dbg(hid, "%s: skipping get feature report for 0x%02x\n", __func__, reportnum);
  5068. + return 0;
  5069. + }
  5070. +
  5071. + cid = 0x02;
  5072. + break;
  5073. + case HID_REQ_SET_REPORT:
  5074. + cid = 0x03;
  5075. + break;
  5076. + default:
  5077. + hid_err(hid, "%s: unknown req type 0x%02x\n", __func__, rtype);
  5078. + return -EIO;
  5079. + }
  5080. + break;
  5081. + default:
  5082. + hid_err(hid, "%s: unknown report type 0x%02x\n", __func__, reportnum);
  5083. + return -EIO;
  5084. + }
  5085. +
  5086. + rqst.tc = SAM_EVENT_SID_VHF_TC;
  5087. + rqst.pri = SURFACE_SAM_PRIORITY_HIGH;
  5088. + rqst.iid = 0x00; // windows tends to distinguish iids, but EC will take it
  5089. + rqst.cid = cid;
  5090. + rqst.snc = HID_REQ_GET_REPORT == reqtype ? 0x01 : 0x00;
  5091. + rqst.cdl = HID_REQ_GET_REPORT == reqtype ? 0x01 : len;
  5092. + rqst.pld = buf;
  5093. +
  5094. + result.cap = len;
  5095. + result.len = 0;
  5096. + result.data = buf;
  5097. +
  5098. + hid_dbg(hid, "%s: sending to cid=%#04x snc=%#04x\n", __func__, cid, HID_REQ_GET_REPORT == reqtype);
  5099. +
  5100. + status = surface_sam_ssh_rqst(&rqst, &result);
  5101. + hid_dbg(hid, "%s: status %i\n", __func__, status);
  5102. +
  5103. + if (status) {
  5104. + return status;
  5105. + }
  5106. +
  5107. + if (result.len > 0) {
  5108. + print_hex_dump_debug("response:", DUMP_PREFIX_OFFSET, 16, 1, result.data, result.len, false);
  5109. + }
  5110. +
  5111. + return result.len;
  5112. +}
  5113. +
  5114. +static struct hid_ll_driver sid_vhf_hid_ll_driver = {
  5115. + .start = sid_vhf_hid_start,
  5116. + .stop = sid_vhf_hid_stop,
  5117. + .open = sid_vhf_hid_open,
  5118. + .close = sid_vhf_hid_close,
  5119. + .parse = sid_vhf_hid_parse,
  5120. + .raw_request = sid_vhf_hid_raw_request,
  5121. +};
  5122. +
  5123. +
  5124. +static struct hid_device *sid_vhf_create_hid_device(struct platform_device *pdev, struct vhf_device_metadata *meta)
  5125. +{
  5126. + struct hid_device *hid;
  5127. +
  5128. + hid = hid_allocate_device();
  5129. + if (IS_ERR(hid)) {
  5130. + return hid;
  5131. + }
  5132. +
  5133. + hid->dev.parent = &pdev->dev;
  5134. +
  5135. + hid->bus = BUS_VIRTUAL;
  5136. + hid->vendor = meta->vendor_id;
  5137. + hid->product = meta->product_id;
  5138. +
  5139. + hid->ll_driver = &sid_vhf_hid_ll_driver;
  5140. +
  5141. + sprintf(hid->name, "%s", SID_VHF_INPUT_NAME);
  5142. +
  5143. + return hid;
  5144. +}
  5145. +
  5146. +static int sid_vhf_event_handler(struct surface_sam_ssh_event *event, void *data)
  5147. +{
  5148. + struct sid_vhf_evtctx *ctx = (struct sid_vhf_evtctx *)data;
  5149. +
  5150. + // skip if HID hasn't started yet
  5151. + if (!test_bit(VHF_HID_STARTED, &ctx->flags)) {
  5152. + return 0;
  5153. + }
  5154. +
  5155. + if (event->tc == SAM_EVENT_SID_VHF_TC && (event->cid == 0x00 || event->cid == 0x03 || event->cid == 0x04)) {
  5156. + return hid_input_report(ctx->hid, HID_INPUT_REPORT, event->pld, event->len, 1);
  5157. + }
  5158. +
  5159. + dev_warn(ctx->dev, "unsupported event (tc = %d, cid = %d)\n", event->tc, event->cid);
  5160. + return 0;
  5161. +}
  5162. +
  5163. +static int surface_sam_sid_vhf_probe(struct platform_device *pdev)
  5164. +{
  5165. + struct sid_vhf_drvdata *drvdata;
  5166. + struct vhf_device_metadata meta = {};
  5167. + struct hid_device *hid;
  5168. + int status;
  5169. +
  5170. + // add device link to EC
  5171. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  5172. + if (status) {
  5173. + return status == -ENXIO ? -EPROBE_DEFER : status;
  5174. + }
  5175. +
  5176. + drvdata = kzalloc(sizeof(struct sid_vhf_drvdata), GFP_KERNEL);
  5177. + if (!drvdata) {
  5178. + return -ENOMEM;
  5179. + }
  5180. +
  5181. + status = vhf_get_metadata(0x00, &meta);
  5182. + if (status) {
  5183. + goto err_create_hid;
  5184. + }
  5185. +
  5186. + hid = sid_vhf_create_hid_device(pdev, &meta);
  5187. + if (IS_ERR(hid)) {
  5188. + status = PTR_ERR(hid);
  5189. + goto err_create_hid;
  5190. + }
  5191. +
  5192. + drvdata->event_ctx.dev = &pdev->dev;
  5193. + drvdata->event_ctx.hid = hid;
  5194. +
  5195. + platform_set_drvdata(pdev, drvdata);
  5196. +
  5197. + status = surface_sam_ssh_set_event_handler(
  5198. + SAM_EVENT_SID_VHF_RQID,
  5199. + sid_vhf_event_handler,
  5200. + &drvdata->event_ctx);
  5201. + if (status) {
  5202. + goto err_event_handler;
  5203. + }
  5204. +
  5205. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5206. + if (status) {
  5207. + goto err_event_source;
  5208. + }
  5209. +
  5210. + status = hid_add_device(hid);
  5211. + if (status) {
  5212. + goto err_add_hid;
  5213. + }
  5214. +
  5215. + return 0;
  5216. +
  5217. +err_add_hid:
  5218. + surface_sam_ssh_disable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5219. +err_event_source:
  5220. + surface_sam_ssh_remove_event_handler(SAM_EVENT_SID_VHF_RQID);
  5221. +err_event_handler:
  5222. + hid_destroy_device(hid);
  5223. + platform_set_drvdata(pdev, NULL);
  5224. +err_create_hid:
  5225. + kfree(drvdata);
  5226. + return status;
  5227. +}
  5228. +
  5229. +static int surface_sam_sid_vhf_remove(struct platform_device *pdev)
  5230. +{
  5231. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(pdev);
  5232. +
  5233. + surface_sam_ssh_disable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5234. + surface_sam_ssh_remove_event_handler(SAM_EVENT_SID_VHF_RQID);
  5235. +
  5236. + hid_destroy_device(drvdata->event_ctx.hid);
  5237. + kfree(drvdata);
  5238. +
  5239. + platform_set_drvdata(pdev, NULL);
  5240. + return 0;
  5241. +}
  5242. +
  5243. +static struct platform_driver surface_sam_sid_vhf = {
  5244. + .probe = surface_sam_sid_vhf_probe,
  5245. + .remove = surface_sam_sid_vhf_remove,
  5246. + .driver = {
  5247. + .name = "surface_sam_sid_vhf",
  5248. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  5249. + },
  5250. +};
  5251. +module_platform_driver(surface_sam_sid_vhf);
  5252. +
  5253. +MODULE_AUTHOR("Blaž Hrastnik <blaz@mxxn.io>");
  5254. +MODULE_DESCRIPTION("Driver for HID devices connected via Surface SAM");
  5255. +MODULE_LICENSE("GPL v2");
  5256. +MODULE_ALIAS("platform:surface_sam_sid_vhf");
  5257. diff --git a/drivers/platform/x86/surface_sam/surface_sam_ssh.c b/drivers/platform/x86/surface_sam/surface_sam_ssh.c
  5258. new file mode 100644
  5259. index 000000000000..34905cf29a51
  5260. --- /dev/null
  5261. +++ b/drivers/platform/x86/surface_sam/surface_sam_ssh.c
  5262. @@ -0,0 +1,1773 @@
  5263. +/*
  5264. + * Surface Serial Hub (SSH) driver for communication with the Surface/System
  5265. + * Aggregator Module.
  5266. + */
  5267. +
  5268. +#include <asm/unaligned.h>
  5269. +#include <linux/acpi.h>
  5270. +#include <linux/completion.h>
  5271. +#include <linux/crc-ccitt.h>
  5272. +#include <linux/dmaengine.h>
  5273. +#include <linux/gpio/consumer.h>
  5274. +#include <linux/interrupt.h>
  5275. +#include <linux/jiffies.h>
  5276. +#include <linux/kernel.h>
  5277. +#include <linux/kfifo.h>
  5278. +#include <linux/mutex.h>
  5279. +#include <linux/pm.h>
  5280. +#include <linux/refcount.h>
  5281. +#include <linux/serdev.h>
  5282. +#include <linux/spinlock.h>
  5283. +#include <linux/workqueue.h>
  5284. +
  5285. +#include "surface_sam_ssh.h"
  5286. +
  5287. +
  5288. +#define SSH_RQST_TAG_FULL "surface_sam_ssh_rqst: "
  5289. +#define SSH_RQST_TAG "rqst: "
  5290. +#define SSH_EVENT_TAG "event: "
  5291. +#define SSH_RECV_TAG "recv: "
  5292. +
  5293. +#define SSH_SUPPORTED_FLOW_CONTROL_MASK (~((u8) ACPI_UART_FLOW_CONTROL_HW))
  5294. +
  5295. +#define SSH_BYTELEN_SYNC 2
  5296. +#define SSH_BYTELEN_TERM 2
  5297. +#define SSH_BYTELEN_CRC 2
  5298. +#define SSH_BYTELEN_CTRL 4 // command-header, ACK, or RETRY
  5299. +#define SSH_BYTELEN_CMDFRAME 8 // without payload
  5300. +
  5301. +#define SSH_MAX_WRITE ( \
  5302. + SSH_BYTELEN_SYNC \
  5303. + + SSH_BYTELEN_CTRL \
  5304. + + SSH_BYTELEN_CRC \
  5305. + + SSH_BYTELEN_CMDFRAME \
  5306. + + SURFACE_SAM_SSH_MAX_RQST_PAYLOAD \
  5307. + + SSH_BYTELEN_CRC \
  5308. +)
  5309. +
  5310. +#define SSH_MSG_LEN_CTRL ( \
  5311. + SSH_BYTELEN_SYNC \
  5312. + + SSH_BYTELEN_CTRL \
  5313. + + SSH_BYTELEN_CRC \
  5314. + + SSH_BYTELEN_TERM \
  5315. +)
  5316. +
  5317. +#define SSH_MSG_LEN_CMD_BASE ( \
  5318. + SSH_BYTELEN_SYNC \
  5319. + + SSH_BYTELEN_CTRL \
  5320. + + SSH_BYTELEN_CRC \
  5321. + + SSH_BYTELEN_CRC \
  5322. +) // without payload and command-frame
  5323. +
  5324. +#define SSH_WRITE_TIMEOUT msecs_to_jiffies(1000)
  5325. +#define SSH_READ_TIMEOUT msecs_to_jiffies(1000)
  5326. +#define SSH_NUM_RETRY 3
  5327. +
  5328. +#define SSH_WRITE_BUF_LEN SSH_MAX_WRITE
  5329. +#define SSH_READ_BUF_LEN 512 // must be power of 2
  5330. +#define SSH_EVAL_BUF_LEN SSH_MAX_WRITE // also works for reading
  5331. +
  5332. +#define SSH_FRAME_TYPE_CMD_NOACK 0x00 // request/event that does not to be ACKed
  5333. +#define SSH_FRAME_TYPE_CMD 0x80 // request/event
  5334. +#define SSH_FRAME_TYPE_ACK 0x40 // ACK for request/event
  5335. +#define SSH_FRAME_TYPE_RETRY 0x04 // error or retry indicator
  5336. +
  5337. +#define SSH_FRAME_OFFS_CTRL SSH_BYTELEN_SYNC
  5338. +#define SSH_FRAME_OFFS_CTRL_CRC (SSH_FRAME_OFFS_CTRL + SSH_BYTELEN_CTRL)
  5339. +#define SSH_FRAME_OFFS_TERM (SSH_FRAME_OFFS_CTRL_CRC + SSH_BYTELEN_CRC)
  5340. +#define SSH_FRAME_OFFS_CMD SSH_FRAME_OFFS_TERM // either TERM or CMD
  5341. +#define SSH_FRAME_OFFS_CMD_PLD (SSH_FRAME_OFFS_CMD + SSH_BYTELEN_CMDFRAME)
  5342. +
  5343. +/*
  5344. + * A note on Request IDs (RQIDs):
  5345. + * 0x0000 is not a valid RQID
  5346. + * 0x0001 is valid, but reserved for Surface Laptop keyboard events
  5347. + */
  5348. +#define SAM_NUM_EVENT_TYPES ((1 << SURFACE_SAM_SSH_RQID_EVENT_BITS) - 1)
  5349. +
  5350. +/*
  5351. + * Sync: aa 55
  5352. + * Terminate: ff ff
  5353. + *
  5354. + * Request Message: sync cmd-hdr crc(cmd-hdr) cmd-rqst-frame crc(cmd-rqst-frame)
  5355. + * Ack Message: sync ack crc(ack) terminate
  5356. + * Retry Message: sync retry crc(retry) terminate
  5357. + * Response Message: sync cmd-hdr crc(cmd-hdr) cmd-resp-frame crc(cmd-resp-frame)
  5358. + *
  5359. + * Command Header: 80 LEN 00 SEQ
  5360. + * Ack: 40 00 00 SEQ
  5361. + * Retry: 04 00 00 00
  5362. + * Command Request Frame: 80 RTC 01 00 RIID RQID RCID PLD
  5363. + * Command Response Frame: 80 RTC 00 01 RIID RQID RCID PLD
  5364. + */
  5365. +
  5366. +struct ssh_frame_ctrl {
  5367. + u8 type;
  5368. + u8 len; // without crc
  5369. + u8 pad;
  5370. + u8 seq;
  5371. +} __packed;
  5372. +
  5373. +struct ssh_frame_cmd {
  5374. + u8 type;
  5375. + u8 tc;
  5376. + u8 pri_out;
  5377. + u8 pri_in;
  5378. + u8 iid;
  5379. + u8 rqid_lo; // id for request/response matching (low byte)
  5380. + u8 rqid_hi; // id for request/response matching (high byte)
  5381. + u8 cid;
  5382. +} __packed;
  5383. +
  5384. +
  5385. +enum ssh_ec_state {
  5386. + SSH_EC_UNINITIALIZED,
  5387. + SSH_EC_INITIALIZED,
  5388. + SSH_EC_SUSPENDED,
  5389. +};
  5390. +
  5391. +struct ssh_counters {
  5392. + u8 seq; // control sequence id
  5393. + u16 rqid; // id for request/response matching
  5394. +};
  5395. +
  5396. +struct ssh_writer {
  5397. + u8 *data;
  5398. + u8 *ptr;
  5399. +} __packed;
  5400. +
  5401. +enum ssh_receiver_state {
  5402. + SSH_RCV_DISCARD,
  5403. + SSH_RCV_CONTROL,
  5404. + SSH_RCV_COMMAND,
  5405. +};
  5406. +
  5407. +struct ssh_receiver {
  5408. + spinlock_t lock;
  5409. + enum ssh_receiver_state state;
  5410. + struct completion signal;
  5411. + struct kfifo fifo;
  5412. + struct {
  5413. + bool pld;
  5414. + u8 seq;
  5415. + u16 rqid;
  5416. + } expect;
  5417. + struct {
  5418. + u16 cap;
  5419. + u16 len;
  5420. + u8 *ptr;
  5421. + } eval_buf;
  5422. +};
  5423. +
  5424. +struct ssh_event_handler {
  5425. + surface_sam_ssh_event_handler_fn handler;
  5426. + surface_sam_ssh_event_handler_delay delay;
  5427. + void *data;
  5428. +};
  5429. +
  5430. +struct ssh_events {
  5431. + spinlock_t lock;
  5432. + struct workqueue_struct *queue_ack;
  5433. + struct workqueue_struct *queue_evt;
  5434. + struct ssh_event_handler handler[SAM_NUM_EVENT_TYPES];
  5435. +};
  5436. +
  5437. +struct sam_ssh_ec {
  5438. + struct mutex lock;
  5439. + enum ssh_ec_state state;
  5440. + struct serdev_device *serdev;
  5441. + struct ssh_counters counter;
  5442. + struct ssh_writer writer;
  5443. + struct ssh_receiver receiver;
  5444. + struct ssh_events events;
  5445. + int irq;
  5446. + bool irq_wakeup_enabled;
  5447. +};
  5448. +
  5449. +struct ssh_fifo_packet {
  5450. + u8 type; // packet type (ACK/RETRY/CMD)
  5451. + u8 seq;
  5452. + u8 len;
  5453. +};
  5454. +
  5455. +struct ssh_event_work {
  5456. + refcount_t refcount;
  5457. + struct sam_ssh_ec *ec;
  5458. + struct work_struct work_ack;
  5459. + struct delayed_work work_evt;
  5460. + struct surface_sam_ssh_event event;
  5461. + u8 seq;
  5462. +};
  5463. +
  5464. +
  5465. +static struct sam_ssh_ec ssh_ec = {
  5466. + .lock = __MUTEX_INITIALIZER(ssh_ec.lock),
  5467. + .state = SSH_EC_UNINITIALIZED,
  5468. + .serdev = NULL,
  5469. + .counter = {
  5470. + .seq = 0,
  5471. + .rqid = 0,
  5472. + },
  5473. + .writer = {
  5474. + .data = NULL,
  5475. + .ptr = NULL,
  5476. + },
  5477. + .receiver = {
  5478. + .lock = __SPIN_LOCK_UNLOCKED(),
  5479. + .state = SSH_RCV_DISCARD,
  5480. + .expect = {},
  5481. + },
  5482. + .events = {
  5483. + .lock = __SPIN_LOCK_UNLOCKED(),
  5484. + .handler = {},
  5485. + },
  5486. + .irq = -1,
  5487. +};
  5488. +
  5489. +
  5490. +inline static struct sam_ssh_ec *surface_sam_ssh_acquire(void)
  5491. +{
  5492. + struct sam_ssh_ec *ec = &ssh_ec;
  5493. +
  5494. + mutex_lock(&ec->lock);
  5495. + return ec;
  5496. +}
  5497. +
  5498. +inline static void surface_sam_ssh_release(struct sam_ssh_ec *ec)
  5499. +{
  5500. + mutex_unlock(&ec->lock);
  5501. +}
  5502. +
  5503. +inline static struct sam_ssh_ec *surface_sam_ssh_acquire_init(void)
  5504. +{
  5505. + struct sam_ssh_ec *ec = surface_sam_ssh_acquire();
  5506. +
  5507. + if (ec->state == SSH_EC_UNINITIALIZED) {
  5508. + surface_sam_ssh_release(ec);
  5509. + return NULL;
  5510. + }
  5511. +
  5512. + return ec;
  5513. +}
  5514. +
  5515. +int surface_sam_ssh_consumer_register(struct device *consumer)
  5516. +{
  5517. + u32 flags = DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER;
  5518. + struct sam_ssh_ec *ec;
  5519. + struct device_link *link;
  5520. +
  5521. + ec = surface_sam_ssh_acquire_init();
  5522. + if (!ec) {
  5523. + return -ENXIO;
  5524. + }
  5525. +
  5526. + link = device_link_add(consumer, &ec->serdev->dev, flags);
  5527. + if (!link) {
  5528. + return -EFAULT;
  5529. + }
  5530. +
  5531. + surface_sam_ssh_release(ec);
  5532. + return 0;
  5533. +}
  5534. +EXPORT_SYMBOL_GPL(surface_sam_ssh_consumer_register);
  5535. +
  5536. +
  5537. +inline static u16 sam_rqid_to_rqst(u16 rqid) {
  5538. + return rqid << SURFACE_SAM_SSH_RQID_EVENT_BITS;
  5539. +}
  5540. +
  5541. +inline static bool sam_rqid_is_event(u16 rqid) {
  5542. + const u16 mask = (1 << SURFACE_SAM_SSH_RQID_EVENT_BITS) - 1;
  5543. + return rqid != 0 && (rqid | mask) == mask;
  5544. +}
  5545. +
  5546. +int surface_sam_ssh_enable_event_source(u8 tc, u8 unknown, u16 rqid)
  5547. +{
  5548. + u8 pld[4] = { tc, unknown, rqid & 0xff, rqid >> 8 };
  5549. + u8 buf[1] = { 0x00 };
  5550. +
  5551. + struct surface_sam_ssh_rqst rqst = {
  5552. + .tc = 0x01,
  5553. + .cid = 0x0b,
  5554. + .iid = 0x00,
  5555. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5556. + .snc = 0x01,
  5557. + .cdl = 0x04,
  5558. + .pld = pld,
  5559. + };
  5560. +
  5561. + struct surface_sam_ssh_buf result = {
  5562. + result.cap = ARRAY_SIZE(buf),
  5563. + result.len = 0,
  5564. + result.data = buf,
  5565. + };
  5566. +
  5567. + int status;
  5568. +
  5569. + // only allow RQIDs that lie within event spectrum
  5570. + if (!sam_rqid_is_event(rqid)) {
  5571. + return -EINVAL;
  5572. + }
  5573. +
  5574. + status = surface_sam_ssh_rqst(&rqst, &result);
  5575. +
  5576. + if (buf[0] != 0x00) {
  5577. + printk(KERN_WARNING SSH_RQST_TAG_FULL
  5578. + "unexpected result while enabling event source: 0x%02x\n",
  5579. + buf[0]);
  5580. + }
  5581. +
  5582. + return status;
  5583. +
  5584. +}
  5585. +EXPORT_SYMBOL_GPL(surface_sam_ssh_enable_event_source);
  5586. +
  5587. +int surface_sam_ssh_disable_event_source(u8 tc, u8 unknown, u16 rqid)
  5588. +{
  5589. + u8 pld[4] = { tc, unknown, rqid & 0xff, rqid >> 8 };
  5590. + u8 buf[1] = { 0x00 };
  5591. +
  5592. + struct surface_sam_ssh_rqst rqst = {
  5593. + .tc = 0x01,
  5594. + .cid = 0x0c,
  5595. + .iid = 0x00,
  5596. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5597. + .snc = 0x01,
  5598. + .cdl = 0x04,
  5599. + .pld = pld,
  5600. + };
  5601. +
  5602. + struct surface_sam_ssh_buf result = {
  5603. + result.cap = ARRAY_SIZE(buf),
  5604. + result.len = 0,
  5605. + result.data = buf,
  5606. + };
  5607. +
  5608. + int status;
  5609. +
  5610. + // only allow RQIDs that lie within event spectrum
  5611. + if (!sam_rqid_is_event(rqid)) {
  5612. + return -EINVAL;
  5613. + }
  5614. +
  5615. + status = surface_sam_ssh_rqst(&rqst, &result);
  5616. +
  5617. + if (buf[0] != 0x00) {
  5618. + printk(KERN_WARNING SSH_RQST_TAG_FULL
  5619. + "unexpected result while disabling event source: 0x%02x\n",
  5620. + buf[0]);
  5621. + }
  5622. +
  5623. + return status;
  5624. +}
  5625. +EXPORT_SYMBOL_GPL(surface_sam_ssh_disable_event_source);
  5626. +
  5627. +static unsigned long sam_event_default_delay(struct surface_sam_ssh_event *event, void *data)
  5628. +{
  5629. + return event->pri == SURFACE_SAM_PRIORITY_HIGH ? SURFACE_SAM_SSH_EVENT_IMMEDIATE : 0;
  5630. +}
  5631. +
  5632. +int surface_sam_ssh_set_delayed_event_handler(
  5633. + u16 rqid, surface_sam_ssh_event_handler_fn fn,
  5634. + surface_sam_ssh_event_handler_delay delay,
  5635. + void *data)
  5636. +{
  5637. + struct sam_ssh_ec *ec;
  5638. + unsigned long flags;
  5639. +
  5640. + if (!sam_rqid_is_event(rqid)) {
  5641. + return -EINVAL;
  5642. + }
  5643. +
  5644. + ec = surface_sam_ssh_acquire_init();
  5645. + if (!ec) {
  5646. + return -ENXIO;
  5647. + }
  5648. +
  5649. + if (!delay) {
  5650. + delay = sam_event_default_delay;
  5651. + }
  5652. +
  5653. + spin_lock_irqsave(&ec->events.lock, flags);
  5654. + // check if we already have a handler
  5655. + if (ec->events.handler[rqid - 1].handler) {
  5656. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5657. + return -EINVAL;
  5658. + }
  5659. +
  5660. + // 0 is not a valid event RQID
  5661. + ec->events.handler[rqid - 1].handler = fn;
  5662. + ec->events.handler[rqid - 1].delay = delay;
  5663. + ec->events.handler[rqid - 1].data = data;
  5664. +
  5665. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5666. + surface_sam_ssh_release(ec);
  5667. +
  5668. + return 0;
  5669. +}
  5670. +EXPORT_SYMBOL_GPL(surface_sam_ssh_set_delayed_event_handler);
  5671. +
  5672. +int surface_sam_ssh_remove_event_handler(u16 rqid)
  5673. +{
  5674. + struct sam_ssh_ec *ec;
  5675. + unsigned long flags;
  5676. +
  5677. + if (!sam_rqid_is_event(rqid)) {
  5678. + return -EINVAL;
  5679. + }
  5680. +
  5681. + ec = surface_sam_ssh_acquire_init();
  5682. + if (!ec) {
  5683. + return -ENXIO;
  5684. + }
  5685. +
  5686. + spin_lock_irqsave(&ec->events.lock, flags);
  5687. +
  5688. + // 0 is not a valid event RQID
  5689. + ec->events.handler[rqid - 1].handler = NULL;
  5690. + ec->events.handler[rqid - 1].delay = NULL;
  5691. + ec->events.handler[rqid - 1].data = NULL;
  5692. +
  5693. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5694. + surface_sam_ssh_release(ec);
  5695. +
  5696. + /*
  5697. + * Make sure that the handler is not in use any more after we've
  5698. + * removed it.
  5699. + */
  5700. + flush_workqueue(ec->events.queue_evt);
  5701. +
  5702. + return 0;
  5703. +}
  5704. +EXPORT_SYMBOL_GPL(surface_sam_ssh_remove_event_handler);
  5705. +
  5706. +
  5707. +inline static u16 ssh_crc(const u8 *buf, size_t size)
  5708. +{
  5709. + return crc_ccitt_false(0xffff, buf, size);
  5710. +}
  5711. +
  5712. +inline static void ssh_write_u16(struct ssh_writer *writer, u16 in)
  5713. +{
  5714. + put_unaligned_le16(in, writer->ptr);
  5715. + writer->ptr += 2;
  5716. +}
  5717. +
  5718. +inline static void ssh_write_crc(struct ssh_writer *writer,
  5719. + const u8 *buf, size_t size)
  5720. +{
  5721. + ssh_write_u16(writer, ssh_crc(buf, size));
  5722. +}
  5723. +
  5724. +inline static void ssh_write_syn(struct ssh_writer *writer)
  5725. +{
  5726. + u8 *w = writer->ptr;
  5727. +
  5728. + *w++ = 0xaa;
  5729. + *w++ = 0x55;
  5730. +
  5731. + writer->ptr = w;
  5732. +}
  5733. +
  5734. +inline static void ssh_write_ter(struct ssh_writer *writer)
  5735. +{
  5736. + u8 *w = writer->ptr;
  5737. +
  5738. + *w++ = 0xff;
  5739. + *w++ = 0xff;
  5740. +
  5741. + writer->ptr = w;
  5742. +}
  5743. +
  5744. +inline static void ssh_write_buf(struct ssh_writer *writer,
  5745. + u8 *in, size_t len)
  5746. +{
  5747. + writer->ptr = memcpy(writer->ptr, in, len) + len;
  5748. +}
  5749. +
  5750. +inline static void ssh_write_hdr(struct ssh_writer *writer,
  5751. + const struct surface_sam_ssh_rqst *rqst,
  5752. + struct sam_ssh_ec *ec)
  5753. +{
  5754. + struct ssh_frame_ctrl *hdr = (struct ssh_frame_ctrl *)writer->ptr;
  5755. + u8 *begin = writer->ptr;
  5756. +
  5757. + hdr->type = SSH_FRAME_TYPE_CMD;
  5758. + hdr->len = SSH_BYTELEN_CMDFRAME + rqst->cdl; // without CRC
  5759. + hdr->pad = 0x00;
  5760. + hdr->seq = ec->counter.seq;
  5761. +
  5762. + writer->ptr += sizeof(*hdr);
  5763. +
  5764. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5765. +}
  5766. +
  5767. +inline static void ssh_write_cmd(struct ssh_writer *writer,
  5768. + const struct surface_sam_ssh_rqst *rqst,
  5769. + struct sam_ssh_ec *ec)
  5770. +{
  5771. + struct ssh_frame_cmd *cmd = (struct ssh_frame_cmd *)writer->ptr;
  5772. + u8 *begin = writer->ptr;
  5773. +
  5774. + u16 rqid = sam_rqid_to_rqst(ec->counter.rqid);
  5775. + u8 rqid_lo = rqid & 0xFF;
  5776. + u8 rqid_hi = rqid >> 8;
  5777. +
  5778. + cmd->type = SSH_FRAME_TYPE_CMD;
  5779. + cmd->tc = rqst->tc;
  5780. + cmd->pri_out = rqst->pri;
  5781. + cmd->pri_in = 0x00;
  5782. + cmd->iid = rqst->iid;
  5783. + cmd->rqid_lo = rqid_lo;
  5784. + cmd->rqid_hi = rqid_hi;
  5785. + cmd->cid = rqst->cid;
  5786. +
  5787. + writer->ptr += sizeof(*cmd);
  5788. +
  5789. + ssh_write_buf(writer, rqst->pld, rqst->cdl);
  5790. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5791. +}
  5792. +
  5793. +inline static void ssh_write_ack(struct ssh_writer *writer, u8 seq)
  5794. +{
  5795. + struct ssh_frame_ctrl *ack = (struct ssh_frame_ctrl *)writer->ptr;
  5796. + u8 *begin = writer->ptr;
  5797. +
  5798. + ack->type = SSH_FRAME_TYPE_ACK;
  5799. + ack->len = 0x00;
  5800. + ack->pad = 0x00;
  5801. + ack->seq = seq;
  5802. +
  5803. + writer->ptr += sizeof(*ack);
  5804. +
  5805. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5806. +}
  5807. +
  5808. +inline static void ssh_writer_reset(struct ssh_writer *writer)
  5809. +{
  5810. + writer->ptr = writer->data;
  5811. +}
  5812. +
  5813. +inline static int ssh_writer_flush(struct sam_ssh_ec *ec)
  5814. +{
  5815. + struct ssh_writer *writer = &ec->writer;
  5816. + struct serdev_device *serdev = ec->serdev;
  5817. + int status;
  5818. +
  5819. + size_t len = writer->ptr - writer->data;
  5820. +
  5821. + dev_dbg(&ec->serdev->dev, "sending message\n");
  5822. + print_hex_dump_debug("send: ", DUMP_PREFIX_OFFSET, 16, 1,
  5823. + writer->data, writer->ptr - writer->data, false);
  5824. +
  5825. + status = serdev_device_write(serdev, writer->data, len, SSH_WRITE_TIMEOUT);
  5826. + return status >= 0 ? 0 : status;
  5827. +}
  5828. +
  5829. +inline static void ssh_write_msg_cmd(struct sam_ssh_ec *ec,
  5830. + const struct surface_sam_ssh_rqst *rqst)
  5831. +{
  5832. + ssh_writer_reset(&ec->writer);
  5833. + ssh_write_syn(&ec->writer);
  5834. + ssh_write_hdr(&ec->writer, rqst, ec);
  5835. + ssh_write_cmd(&ec->writer, rqst, ec);
  5836. +}
  5837. +
  5838. +inline static void ssh_write_msg_ack(struct sam_ssh_ec *ec, u8 seq)
  5839. +{
  5840. + ssh_writer_reset(&ec->writer);
  5841. + ssh_write_syn(&ec->writer);
  5842. + ssh_write_ack(&ec->writer, seq);
  5843. + ssh_write_ter(&ec->writer);
  5844. +}
  5845. +
  5846. +inline static void ssh_receiver_restart(struct sam_ssh_ec *ec,
  5847. + const struct surface_sam_ssh_rqst *rqst)
  5848. +{
  5849. + unsigned long flags;
  5850. +
  5851. + spin_lock_irqsave(&ec->receiver.lock, flags);
  5852. + reinit_completion(&ec->receiver.signal);
  5853. + ec->receiver.state = SSH_RCV_CONTROL;
  5854. + ec->receiver.expect.pld = rqst->snc;
  5855. + ec->receiver.expect.seq = ec->counter.seq;
  5856. + ec->receiver.expect.rqid = sam_rqid_to_rqst(ec->counter.rqid);
  5857. + ec->receiver.eval_buf.len = 0;
  5858. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  5859. +}
  5860. +
  5861. +inline static void ssh_receiver_discard(struct sam_ssh_ec *ec)
  5862. +{
  5863. + unsigned long flags;
  5864. +
  5865. + spin_lock_irqsave(&ec->receiver.lock, flags);
  5866. + ec->receiver.state = SSH_RCV_DISCARD;
  5867. + ec->receiver.eval_buf.len = 0;
  5868. + kfifo_reset(&ec->receiver.fifo);
  5869. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  5870. +}
  5871. +
  5872. +static int surface_sam_ssh_rqst_unlocked(struct sam_ssh_ec *ec,
  5873. + const struct surface_sam_ssh_rqst *rqst,
  5874. + struct surface_sam_ssh_buf *result)
  5875. +{
  5876. + struct device *dev = &ec->serdev->dev;
  5877. + struct ssh_fifo_packet packet = {};
  5878. + int status;
  5879. + int try;
  5880. + unsigned int rem;
  5881. +
  5882. + if (rqst->cdl > SURFACE_SAM_SSH_MAX_RQST_PAYLOAD) {
  5883. + dev_err(dev, SSH_RQST_TAG "request payload too large\n");
  5884. + return -EINVAL;
  5885. + }
  5886. +
  5887. + // write command in buffer, we may need it multiple times
  5888. + ssh_write_msg_cmd(ec, rqst);
  5889. + ssh_receiver_restart(ec, rqst);
  5890. +
  5891. + // send command, try to get an ack response
  5892. + for (try = 0; try < SSH_NUM_RETRY; try++) {
  5893. + status = ssh_writer_flush(ec);
  5894. + if (status) {
  5895. + goto out;
  5896. + }
  5897. +
  5898. + rem = wait_for_completion_timeout(&ec->receiver.signal, SSH_READ_TIMEOUT);
  5899. + if (rem) {
  5900. + // completion assures valid packet, thus ignore returned length
  5901. + (void) !kfifo_out(&ec->receiver.fifo, &packet, sizeof(packet));
  5902. +
  5903. + if (packet.type == SSH_FRAME_TYPE_ACK) {
  5904. + break;
  5905. + }
  5906. + }
  5907. + }
  5908. +
  5909. + // check if we ran out of tries?
  5910. + if (try >= SSH_NUM_RETRY) {
  5911. + dev_err(dev, SSH_RQST_TAG "communication failed %d times, giving up\n", try);
  5912. + status = -EIO;
  5913. + goto out;
  5914. + }
  5915. +
  5916. + ec->counter.seq += 1;
  5917. + ec->counter.rqid += 1;
  5918. +
  5919. + // get command response/payload
  5920. + if (rqst->snc && result) {
  5921. + rem = wait_for_completion_timeout(&ec->receiver.signal, SSH_READ_TIMEOUT);
  5922. + if (rem) {
  5923. + // completion assures valid packet, thus ignore returned length
  5924. + (void) !kfifo_out(&ec->receiver.fifo, &packet, sizeof(packet));
  5925. +
  5926. + if (result->cap < packet.len) {
  5927. + status = -EINVAL;
  5928. + goto out;
  5929. + }
  5930. +
  5931. + // completion assures valid packet, thus ignore returned length
  5932. + (void) !kfifo_out(&ec->receiver.fifo, result->data, packet.len);
  5933. + result->len = packet.len;
  5934. + } else {
  5935. + dev_err(dev, SSH_RQST_TAG "communication timed out\n");
  5936. + status = -EIO;
  5937. + goto out;
  5938. + }
  5939. +
  5940. + // send ACK
  5941. + if (packet.type == SSH_FRAME_TYPE_CMD) {
  5942. + ssh_write_msg_ack(ec, packet.seq);
  5943. + status = ssh_writer_flush(ec);
  5944. + if (status) {
  5945. + goto out;
  5946. + }
  5947. + }
  5948. + }
  5949. +
  5950. +out:
  5951. + ssh_receiver_discard(ec);
  5952. + return status;
  5953. +}
  5954. +
  5955. +int surface_sam_ssh_rqst(const struct surface_sam_ssh_rqst *rqst, struct surface_sam_ssh_buf *result)
  5956. +{
  5957. + struct sam_ssh_ec *ec;
  5958. + int status;
  5959. +
  5960. + ec = surface_sam_ssh_acquire_init();
  5961. + if (!ec) {
  5962. + printk(KERN_WARNING SSH_RQST_TAG_FULL "embedded controller is uninitialized\n");
  5963. + return -ENXIO;
  5964. + }
  5965. +
  5966. + if (ec->state == SSH_EC_SUSPENDED) {
  5967. + dev_warn(&ec->serdev->dev, SSH_RQST_TAG "embedded controller is suspended\n");
  5968. +
  5969. + surface_sam_ssh_release(ec);
  5970. + return -EPERM;
  5971. + }
  5972. +
  5973. + status = surface_sam_ssh_rqst_unlocked(ec, rqst, result);
  5974. +
  5975. + surface_sam_ssh_release(ec);
  5976. + return status;
  5977. +}
  5978. +EXPORT_SYMBOL_GPL(surface_sam_ssh_rqst);
  5979. +
  5980. +
  5981. +static int surface_sam_ssh_ec_resume(struct sam_ssh_ec *ec)
  5982. +{
  5983. + u8 buf[1] = { 0x00 };
  5984. +
  5985. + struct surface_sam_ssh_rqst rqst = {
  5986. + .tc = 0x01,
  5987. + .cid = 0x16,
  5988. + .iid = 0x00,
  5989. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5990. + .snc = 0x01,
  5991. + .cdl = 0x00,
  5992. + .pld = NULL,
  5993. + };
  5994. +
  5995. + struct surface_sam_ssh_buf result = {
  5996. + result.cap = ARRAY_SIZE(buf),
  5997. + result.len = 0,
  5998. + result.data = buf,
  5999. + };
  6000. +
  6001. + int status = surface_sam_ssh_rqst_unlocked(ec, &rqst, &result);
  6002. + if (status) {
  6003. + return status;
  6004. + }
  6005. +
  6006. + if (buf[0] != 0x00) {
  6007. + dev_warn(&ec->serdev->dev,
  6008. + "unexpected result while trying to resume EC: 0x%02x\n",
  6009. + buf[0]);
  6010. + }
  6011. +
  6012. + return 0;
  6013. +}
  6014. +
  6015. +static int surface_sam_ssh_ec_suspend(struct sam_ssh_ec *ec)
  6016. +{
  6017. + u8 buf[1] = { 0x00 };
  6018. +
  6019. + struct surface_sam_ssh_rqst rqst = {
  6020. + .tc = 0x01,
  6021. + .cid = 0x15,
  6022. + .iid = 0x00,
  6023. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  6024. + .snc = 0x01,
  6025. + .cdl = 0x00,
  6026. + .pld = NULL,
  6027. + };
  6028. +
  6029. + struct surface_sam_ssh_buf result = {
  6030. + result.cap = ARRAY_SIZE(buf),
  6031. + result.len = 0,
  6032. + result.data = buf,
  6033. + };
  6034. +
  6035. + int status = surface_sam_ssh_rqst_unlocked(ec, &rqst, &result);
  6036. + if (status) {
  6037. + return status;
  6038. + }
  6039. +
  6040. + if (buf[0] != 0x00) {
  6041. + dev_warn(&ec->serdev->dev,
  6042. + "unexpected result while trying to suspend EC: 0x%02x\n",
  6043. + buf[0]);
  6044. + }
  6045. +
  6046. + return 0;
  6047. +}
  6048. +
  6049. +
  6050. +inline static bool ssh_is_valid_syn(const u8 *ptr)
  6051. +{
  6052. + return ptr[0] == 0xaa && ptr[1] == 0x55;
  6053. +}
  6054. +
  6055. +inline static bool ssh_is_valid_ter(const u8 *ptr)
  6056. +{
  6057. + return ptr[0] == 0xff && ptr[1] == 0xff;
  6058. +}
  6059. +
  6060. +inline static bool ssh_is_valid_crc(const u8 *begin, const u8 *end)
  6061. +{
  6062. + u16 crc = ssh_crc(begin, end - begin);
  6063. + return (end[0] == (crc & 0xff)) && (end[1] == (crc >> 8));
  6064. +}
  6065. +
  6066. +
  6067. +static int surface_sam_ssh_send_ack(struct sam_ssh_ec *ec, u8 seq)
  6068. +{
  6069. + int status;
  6070. + u8 buf[SSH_MSG_LEN_CTRL];
  6071. + u16 crc;
  6072. +
  6073. + buf[0] = 0xaa;
  6074. + buf[1] = 0x55;
  6075. + buf[2] = 0x40;
  6076. + buf[3] = 0x00;
  6077. + buf[4] = 0x00;
  6078. + buf[5] = seq;
  6079. +
  6080. + crc = ssh_crc(buf + SSH_FRAME_OFFS_CTRL, SSH_BYTELEN_CTRL);
  6081. + buf[6] = crc & 0xff;
  6082. + buf[7] = crc >> 8;
  6083. +
  6084. + buf[8] = 0xff;
  6085. + buf[9] = 0xff;
  6086. +
  6087. + dev_dbg(&ec->serdev->dev, "sending message\n");
  6088. + print_hex_dump_debug("send: ", DUMP_PREFIX_OFFSET, 16, 1,
  6089. + buf, SSH_MSG_LEN_CTRL, false);
  6090. +
  6091. + status = serdev_device_write(ec->serdev, buf, SSH_MSG_LEN_CTRL, SSH_WRITE_TIMEOUT);
  6092. + return status >= 0 ? 0 : status;
  6093. +}
  6094. +
  6095. +static void surface_sam_ssh_event_work_ack_handler(struct work_struct *_work)
  6096. +{
  6097. + struct surface_sam_ssh_event *event;
  6098. + struct ssh_event_work *work;
  6099. + struct sam_ssh_ec *ec;
  6100. + struct device *dev;
  6101. + int status;
  6102. +
  6103. + work = container_of(_work, struct ssh_event_work, work_ack);
  6104. + event = &work->event;
  6105. + ec = work->ec;
  6106. + dev = &ec->serdev->dev;
  6107. +
  6108. + // make sure we load a fresh ec state
  6109. + smp_mb();
  6110. +
  6111. + if (ec->state == SSH_EC_INITIALIZED) {
  6112. + status = surface_sam_ssh_send_ack(ec, work->seq);
  6113. + if (status) {
  6114. + dev_err(dev, SSH_EVENT_TAG "failed to send ACK: %d\n", status);
  6115. + }
  6116. + }
  6117. +
  6118. + if (refcount_dec_and_test(&work->refcount)) {
  6119. + kfree(work);
  6120. + }
  6121. +}
  6122. +
  6123. +static void surface_sam_ssh_event_work_evt_handler(struct work_struct *_work)
  6124. +{
  6125. + struct delayed_work *dwork = (struct delayed_work *)_work;
  6126. + struct ssh_event_work *work;
  6127. + struct surface_sam_ssh_event *event;
  6128. + struct sam_ssh_ec *ec;
  6129. + struct device *dev;
  6130. + unsigned long flags;
  6131. +
  6132. + surface_sam_ssh_event_handler_fn handler;
  6133. + void *handler_data;
  6134. +
  6135. + int status = 0;
  6136. +
  6137. + work = container_of(dwork, struct ssh_event_work, work_evt);
  6138. + event = &work->event;
  6139. + ec = work->ec;
  6140. + dev = &ec->serdev->dev;
  6141. +
  6142. + spin_lock_irqsave(&ec->events.lock, flags);
  6143. + handler = ec->events.handler[event->rqid - 1].handler;
  6144. + handler_data = ec->events.handler[event->rqid - 1].data;
  6145. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6146. +
  6147. + /*
  6148. + * During handler removal or driver release, we ensure every event gets
  6149. + * handled before return of that function. Thus a handler obtained here is
  6150. + * guaranteed to be valid at least until this function returns.
  6151. + */
  6152. +
  6153. + if (handler) {
  6154. + status = handler(event, handler_data);
  6155. + } else {
  6156. + dev_warn(dev, SSH_EVENT_TAG "unhandled event (rqid: %04x)\n", event->rqid);
  6157. + }
  6158. +
  6159. + if (status) {
  6160. + dev_err(dev, SSH_EVENT_TAG "error handling event: %d\n", status);
  6161. + }
  6162. +
  6163. + if (refcount_dec_and_test(&work->refcount)) {
  6164. + kfree(work);
  6165. + }
  6166. +}
  6167. +
  6168. +static void ssh_handle_event(struct sam_ssh_ec *ec, const u8 *buf)
  6169. +{
  6170. + struct device *dev = &ec->serdev->dev;
  6171. + const struct ssh_frame_ctrl *ctrl;
  6172. + const struct ssh_frame_cmd *cmd;
  6173. + struct ssh_event_work *work;
  6174. + unsigned long flags;
  6175. + u16 pld_len;
  6176. +
  6177. + surface_sam_ssh_event_handler_delay delay_fn;
  6178. + void *handler_data;
  6179. + unsigned long delay;
  6180. +
  6181. + ctrl = (const struct ssh_frame_ctrl *)(buf + SSH_FRAME_OFFS_CTRL);
  6182. + cmd = (const struct ssh_frame_cmd *)(buf + SSH_FRAME_OFFS_CMD);
  6183. +
  6184. + pld_len = ctrl->len - SSH_BYTELEN_CMDFRAME;
  6185. +
  6186. + work = kzalloc(sizeof(struct ssh_event_work) + pld_len, GFP_ATOMIC);
  6187. + if (!work) {
  6188. + dev_warn(dev, SSH_EVENT_TAG "failed to allocate memory, dropping event\n");
  6189. + return;
  6190. + }
  6191. +
  6192. + refcount_set(&work->refcount, 1);
  6193. + work->ec = ec;
  6194. + work->seq = ctrl->seq;
  6195. + work->event.rqid = (cmd->rqid_hi << 8) | cmd->rqid_lo;
  6196. + work->event.tc = cmd->tc;
  6197. + work->event.cid = cmd->cid;
  6198. + work->event.iid = cmd->iid;
  6199. + work->event.pri = cmd->pri_in;
  6200. + work->event.len = pld_len;
  6201. + work->event.pld = ((u8*) work) + sizeof(struct ssh_event_work);
  6202. +
  6203. + memcpy(work->event.pld, buf + SSH_FRAME_OFFS_CMD_PLD, pld_len);
  6204. +
  6205. + // queue ACK for if required
  6206. + if (ctrl->type == SSH_FRAME_TYPE_CMD) {
  6207. + refcount_set(&work->refcount, 2);
  6208. + INIT_WORK(&work->work_ack, surface_sam_ssh_event_work_ack_handler);
  6209. + queue_work(ec->events.queue_ack, &work->work_ack);
  6210. + }
  6211. +
  6212. + spin_lock_irqsave(&ec->events.lock, flags);
  6213. + handler_data = ec->events.handler[work->event.rqid - 1].data;
  6214. + delay_fn = ec->events.handler[work->event.rqid - 1].delay;
  6215. +
  6216. + /* Note:
  6217. + * We need to check delay_fn here: This may have never been set as we
  6218. + * can't guarantee that events only occur when they have been enabled.
  6219. + */
  6220. + delay = delay_fn ? delay_fn(&work->event, handler_data) : 0;
  6221. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6222. +
  6223. + // immediate execution for high priority events (e.g. keyboard)
  6224. + if (delay == SURFACE_SAM_SSH_EVENT_IMMEDIATE) {
  6225. + surface_sam_ssh_event_work_evt_handler(&work->work_evt.work);
  6226. + } else {
  6227. + INIT_DELAYED_WORK(&work->work_evt, surface_sam_ssh_event_work_evt_handler);
  6228. + queue_delayed_work(ec->events.queue_evt, &work->work_evt, delay);
  6229. + }
  6230. +}
  6231. +
  6232. +static int ssh_receive_msg_ctrl(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6233. +{
  6234. + struct device *dev = &ec->serdev->dev;
  6235. + struct ssh_receiver *rcv = &ec->receiver;
  6236. + const struct ssh_frame_ctrl *ctrl;
  6237. + struct ssh_fifo_packet packet;
  6238. +
  6239. + const u8 *ctrl_begin = buf + SSH_FRAME_OFFS_CTRL;
  6240. + const u8 *ctrl_end = buf + SSH_FRAME_OFFS_CTRL_CRC;
  6241. +
  6242. + ctrl = (const struct ssh_frame_ctrl *)(ctrl_begin);
  6243. +
  6244. + // actual length check
  6245. + if (size < SSH_MSG_LEN_CTRL) {
  6246. + return 0; // need more bytes
  6247. + }
  6248. +
  6249. + // validate TERM
  6250. + if (!ssh_is_valid_ter(buf + SSH_FRAME_OFFS_TERM)) {
  6251. + dev_err(dev, SSH_RECV_TAG "invalid end of message\n");
  6252. + return size; // discard everything
  6253. + }
  6254. +
  6255. + // validate CRC
  6256. + if (!ssh_is_valid_crc(ctrl_begin, ctrl_end)) {
  6257. + dev_err(dev, SSH_RECV_TAG "invalid checksum (ctrl)\n");
  6258. + return SSH_MSG_LEN_CTRL; // only discard message
  6259. + }
  6260. +
  6261. + // check if we expect the message
  6262. + if (rcv->state != SSH_RCV_CONTROL) {
  6263. + dev_err(dev, SSH_RECV_TAG "discarding message: ctrl not expected\n");
  6264. + return SSH_MSG_LEN_CTRL; // discard message
  6265. + }
  6266. +
  6267. + // check if it is for our request
  6268. + if (ctrl->type == SSH_FRAME_TYPE_ACK && ctrl->seq != rcv->expect.seq) {
  6269. + dev_err(dev, SSH_RECV_TAG "discarding message: ack does not match\n");
  6270. + return SSH_MSG_LEN_CTRL; // discard message
  6271. + }
  6272. +
  6273. + // we now have a valid & expected ACK/RETRY message
  6274. + dev_dbg(dev, SSH_RECV_TAG "valid control message received (type: 0x%02x)\n", ctrl->type);
  6275. +
  6276. + packet.type = ctrl->type;
  6277. + packet.seq = ctrl->seq;
  6278. + packet.len = 0;
  6279. +
  6280. + if (kfifo_avail(&rcv->fifo) >= sizeof(packet)) {
  6281. + kfifo_in(&rcv->fifo, (u8 *) &packet, sizeof(packet));
  6282. +
  6283. + } else {
  6284. + dev_warn(dev, SSH_RECV_TAG
  6285. + "dropping frame: not enough space in fifo (type = %d)\n",
  6286. + ctrl->type);
  6287. +
  6288. + return SSH_MSG_LEN_CTRL; // discard message
  6289. + }
  6290. +
  6291. + // update decoder state
  6292. + if (ctrl->type == SSH_FRAME_TYPE_ACK) {
  6293. + rcv->state = rcv->expect.pld
  6294. + ? SSH_RCV_COMMAND
  6295. + : SSH_RCV_DISCARD;
  6296. + }
  6297. +
  6298. + complete(&rcv->signal);
  6299. + return SSH_MSG_LEN_CTRL; // handled message
  6300. +}
  6301. +
  6302. +static int ssh_receive_msg_cmd(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6303. +{
  6304. + struct device *dev = &ec->serdev->dev;
  6305. + struct ssh_receiver *rcv = &ec->receiver;
  6306. + const struct ssh_frame_ctrl *ctrl;
  6307. + const struct ssh_frame_cmd *cmd;
  6308. + struct ssh_fifo_packet packet;
  6309. +
  6310. + const u8 *ctrl_begin = buf + SSH_FRAME_OFFS_CTRL;
  6311. + const u8 *ctrl_end = buf + SSH_FRAME_OFFS_CTRL_CRC;
  6312. + const u8 *cmd_begin = buf + SSH_FRAME_OFFS_CMD;
  6313. + const u8 *cmd_begin_pld = buf + SSH_FRAME_OFFS_CMD_PLD;
  6314. + const u8 *cmd_end;
  6315. +
  6316. + size_t msg_len;
  6317. +
  6318. + ctrl = (const struct ssh_frame_ctrl *)(ctrl_begin);
  6319. + cmd = (const struct ssh_frame_cmd *)(cmd_begin);
  6320. +
  6321. + // we need at least a full control frame
  6322. + if (size < (SSH_BYTELEN_SYNC + SSH_BYTELEN_CTRL + SSH_BYTELEN_CRC)) {
  6323. + return 0; // need more bytes
  6324. + }
  6325. +
  6326. + // validate control-frame CRC
  6327. + if (!ssh_is_valid_crc(ctrl_begin, ctrl_end)) {
  6328. + dev_err(dev, SSH_RECV_TAG "invalid checksum (cmd-ctrl)\n");
  6329. + /*
  6330. + * We can't be sure here if length is valid, thus
  6331. + * discard everything.
  6332. + */
  6333. + return size;
  6334. + }
  6335. +
  6336. + // actual length check (ctrl->len contains command-frame but not crc)
  6337. + msg_len = SSH_MSG_LEN_CMD_BASE + ctrl->len;
  6338. + if (size < msg_len) {
  6339. + return 0; // need more bytes
  6340. + }
  6341. +
  6342. + cmd_end = cmd_begin + ctrl->len;
  6343. +
  6344. + // validate command-frame type
  6345. + if (cmd->type != SSH_FRAME_TYPE_CMD) {
  6346. + dev_err(dev, SSH_RECV_TAG "expected command frame type but got 0x%02x\n", cmd->type);
  6347. + return size; // discard everything
  6348. + }
  6349. +
  6350. + // validate command-frame CRC
  6351. + if (!ssh_is_valid_crc(cmd_begin, cmd_end)) {
  6352. + dev_err(dev, SSH_RECV_TAG "invalid checksum (cmd-pld)\n");
  6353. +
  6354. + /*
  6355. + * The message length is provided in the control frame. As we
  6356. + * already validated that, we can be sure here that it's
  6357. + * correct, so we only need to discard the message.
  6358. + */
  6359. + return msg_len;
  6360. + }
  6361. +
  6362. + // check if we received an event notification
  6363. + if (sam_rqid_is_event((cmd->rqid_hi << 8) | cmd->rqid_lo)) {
  6364. + ssh_handle_event(ec, buf);
  6365. + return msg_len; // handled message
  6366. + }
  6367. +
  6368. + // check if we expect the message
  6369. + if (rcv->state != SSH_RCV_COMMAND) {
  6370. + dev_dbg(dev, SSH_RECV_TAG "discarding message: command not expected\n");
  6371. + return msg_len; // discard message
  6372. + }
  6373. +
  6374. + // check if response is for our request
  6375. + if (rcv->expect.rqid != (cmd->rqid_lo | (cmd->rqid_hi << 8))) {
  6376. + dev_dbg(dev, SSH_RECV_TAG "discarding message: command not a match\n");
  6377. + return msg_len; // discard message
  6378. + }
  6379. +
  6380. + // we now have a valid & expected command message
  6381. + dev_dbg(dev, SSH_RECV_TAG "valid command message received\n");
  6382. +
  6383. + packet.type = ctrl->type;
  6384. + packet.seq = ctrl->seq;
  6385. + packet.len = cmd_end - cmd_begin_pld;
  6386. +
  6387. + if (kfifo_avail(&rcv->fifo) >= sizeof(packet) + packet.len) {
  6388. + kfifo_in(&rcv->fifo, &packet, sizeof(packet));
  6389. + kfifo_in(&rcv->fifo, cmd_begin_pld, packet.len);
  6390. +
  6391. + } else {
  6392. + dev_warn(dev, SSH_RECV_TAG
  6393. + "dropping frame: not enough space in fifo (type = %d)\n",
  6394. + ctrl->type);
  6395. +
  6396. + return SSH_MSG_LEN_CTRL; // discard message
  6397. + }
  6398. +
  6399. + rcv->state = SSH_RCV_DISCARD;
  6400. +
  6401. + complete(&rcv->signal);
  6402. + return msg_len; // handled message
  6403. +}
  6404. +
  6405. +static int ssh_eval_buf(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6406. +{
  6407. + struct device *dev = &ec->serdev->dev;
  6408. + struct ssh_frame_ctrl *ctrl;
  6409. +
  6410. + // we need at least a control frame to check what to do
  6411. + if (size < (SSH_BYTELEN_SYNC + SSH_BYTELEN_CTRL)) {
  6412. + return 0; // need more bytes
  6413. + }
  6414. +
  6415. + // make sure we're actually at the start of a new message
  6416. + if (!ssh_is_valid_syn(buf)) {
  6417. + dev_err(dev, SSH_RECV_TAG "invalid start of message\n");
  6418. + return size; // discard everything
  6419. + }
  6420. +
  6421. + // handle individual message types seperately
  6422. + ctrl = (struct ssh_frame_ctrl *)(buf + SSH_FRAME_OFFS_CTRL);
  6423. +
  6424. + switch (ctrl->type) {
  6425. + case SSH_FRAME_TYPE_ACK:
  6426. + case SSH_FRAME_TYPE_RETRY:
  6427. + return ssh_receive_msg_ctrl(ec, buf, size);
  6428. +
  6429. + case SSH_FRAME_TYPE_CMD:
  6430. + case SSH_FRAME_TYPE_CMD_NOACK:
  6431. + return ssh_receive_msg_cmd(ec, buf, size);
  6432. +
  6433. + default:
  6434. + dev_err(dev, SSH_RECV_TAG "unknown frame type 0x%02x\n", ctrl->type);
  6435. + return size; // discard everything
  6436. + }
  6437. +}
  6438. +
  6439. +static int ssh_receive_buf(struct serdev_device *serdev,
  6440. + const unsigned char *buf, size_t size)
  6441. +{
  6442. + struct sam_ssh_ec *ec = serdev_device_get_drvdata(serdev);
  6443. + struct ssh_receiver *rcv = &ec->receiver;
  6444. + unsigned long flags;
  6445. + int offs = 0;
  6446. + int used, n;
  6447. +
  6448. + dev_dbg(&serdev->dev, SSH_RECV_TAG "received buffer (size: %zu)\n", size);
  6449. + print_hex_dump_debug(SSH_RECV_TAG, DUMP_PREFIX_OFFSET, 16, 1, buf, size, false);
  6450. +
  6451. + /*
  6452. + * The battery _BIX message gets a bit long, thus we have to add some
  6453. + * additional buffering here.
  6454. + */
  6455. +
  6456. + spin_lock_irqsave(&rcv->lock, flags);
  6457. +
  6458. + // copy to eval-buffer
  6459. + used = min(size, (size_t)(rcv->eval_buf.cap - rcv->eval_buf.len));
  6460. + memcpy(rcv->eval_buf.ptr + rcv->eval_buf.len, buf, used);
  6461. + rcv->eval_buf.len += used;
  6462. +
  6463. + // evaluate buffer until we need more bytes or eval-buf is empty
  6464. + while (offs < rcv->eval_buf.len) {
  6465. + n = rcv->eval_buf.len - offs;
  6466. + n = ssh_eval_buf(ec, rcv->eval_buf.ptr + offs, n);
  6467. + if (n <= 0) break; // need more bytes
  6468. +
  6469. + offs += n;
  6470. + }
  6471. +
  6472. + // throw away the evaluated parts
  6473. + rcv->eval_buf.len -= offs;
  6474. + memmove(rcv->eval_buf.ptr, rcv->eval_buf.ptr + offs, rcv->eval_buf.len);
  6475. +
  6476. + spin_unlock_irqrestore(&rcv->lock, flags);
  6477. +
  6478. + return used;
  6479. +}
  6480. +
  6481. +
  6482. +#ifdef CONFIG_SURFACE_SAM_SSH_DEBUG_DEVICE
  6483. +
  6484. +#include <linux/sysfs.h>
  6485. +
  6486. +static char sam_ssh_debug_rqst_buf_sysfs[SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1] = { 0 };
  6487. +static char sam_ssh_debug_rqst_buf_pld[SURFACE_SAM_SSH_MAX_RQST_PAYLOAD] = { 0 };
  6488. +static char sam_ssh_debug_rqst_buf_res[SURFACE_SAM_SSH_MAX_RQST_RESPONSE] = { 0 };
  6489. +
  6490. +struct sysfs_rqst {
  6491. + u8 tc;
  6492. + u8 cid;
  6493. + u8 iid;
  6494. + u8 pri;
  6495. + u8 snc;
  6496. + u8 cdl;
  6497. + u8 pld[0];
  6498. +} __packed;
  6499. +
  6500. +static ssize_t rqst_read(struct file *f, struct kobject *kobj, struct bin_attribute *attr,
  6501. + char *buf, loff_t offs, size_t count)
  6502. +{
  6503. + if (offs < 0 || count + offs > SURFACE_SAM_SSH_MAX_RQST_RESPONSE) {
  6504. + return -EINVAL;
  6505. + }
  6506. +
  6507. + memcpy(buf, sam_ssh_debug_rqst_buf_sysfs + offs, count);
  6508. + return count;
  6509. +}
  6510. +
  6511. +static ssize_t rqst_write(struct file *f, struct kobject *kobj, struct bin_attribute *attr,
  6512. + char *buf, loff_t offs, size_t count)
  6513. +{
  6514. + struct sysfs_rqst *input;
  6515. + struct surface_sam_ssh_rqst rqst = {};
  6516. + struct surface_sam_ssh_buf result = {};
  6517. + int status;
  6518. +
  6519. + // check basic write constriants
  6520. + if (offs != 0 || count > SURFACE_SAM_SSH_MAX_RQST_PAYLOAD + sizeof(struct sysfs_rqst)) {
  6521. + return -EINVAL;
  6522. + }
  6523. +
  6524. + if (count < sizeof(struct sysfs_rqst)) {
  6525. + return -EINVAL;
  6526. + }
  6527. +
  6528. + input = (struct sysfs_rqst *)buf;
  6529. +
  6530. + // payload length should be consistent with data provided
  6531. + if (input->cdl + sizeof(struct sysfs_rqst) != count) {
  6532. + return -EINVAL;
  6533. + }
  6534. +
  6535. + rqst.tc = input->tc;
  6536. + rqst.cid = input->cid;
  6537. + rqst.iid = input->iid;
  6538. + rqst.pri = input->pri;
  6539. + rqst.snc = input->snc;
  6540. + rqst.cdl = input->cdl;
  6541. + rqst.pld = sam_ssh_debug_rqst_buf_pld;
  6542. + memcpy(sam_ssh_debug_rqst_buf_pld, &input->pld[0], input->cdl);
  6543. +
  6544. + result.cap = SURFACE_SAM_SSH_MAX_RQST_RESPONSE;
  6545. + result.len = 0;
  6546. + result.data = sam_ssh_debug_rqst_buf_res;
  6547. +
  6548. + status = surface_sam_ssh_rqst(&rqst, &result);
  6549. + if (status) {
  6550. + return status;
  6551. + }
  6552. +
  6553. + sam_ssh_debug_rqst_buf_sysfs[0] = result.len;
  6554. + memcpy(sam_ssh_debug_rqst_buf_sysfs + 1, result.data, result.len);
  6555. + memset(sam_ssh_debug_rqst_buf_sysfs + result.len + 1, 0,
  6556. + SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1 - result.len);
  6557. +
  6558. + return count;
  6559. +}
  6560. +
  6561. +static const BIN_ATTR_RW(rqst, SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1);
  6562. +
  6563. +
  6564. +int surface_sam_ssh_sysfs_register(struct device *dev)
  6565. +{
  6566. + return sysfs_create_bin_file(&dev->kobj, &bin_attr_rqst);
  6567. +}
  6568. +
  6569. +void surface_sam_ssh_sysfs_unregister(struct device *dev)
  6570. +{
  6571. + sysfs_remove_bin_file(&dev->kobj, &bin_attr_rqst);
  6572. +}
  6573. +
  6574. +#else /* CONFIG_SURFACE_ACPI_SSH_DEBUG_DEVICE */
  6575. +
  6576. +int surface_sam_ssh_sysfs_register(struct device *dev)
  6577. +{
  6578. + return 0;
  6579. +}
  6580. +
  6581. +void surface_sam_ssh_sysfs_unregister(struct device *dev)
  6582. +{
  6583. +}
  6584. +
  6585. +#endif /* CONFIG_SURFACE_SAM_SSH_DEBUG_DEVICE */
  6586. +
  6587. +
  6588. +static const struct acpi_gpio_params gpio_sam_wakeup_int = { 0, 0, false };
  6589. +static const struct acpi_gpio_params gpio_sam_wakeup = { 1, 0, false };
  6590. +
  6591. +static const struct acpi_gpio_mapping surface_sam_acpi_gpios[] = {
  6592. + { "sam_wakeup-int-gpio", &gpio_sam_wakeup_int, 1 },
  6593. + { "sam_wakeup-gpio", &gpio_sam_wakeup, 1 },
  6594. + { },
  6595. +};
  6596. +
  6597. +static irqreturn_t surface_sam_irq_handler(int irq, void *dev_id)
  6598. +{
  6599. + struct serdev_device *serdev = dev_id;
  6600. +
  6601. + dev_info(&serdev->dev, "wake irq triggered\n");
  6602. + return IRQ_HANDLED;
  6603. +}
  6604. +
  6605. +static int surface_sam_setup_irq(struct serdev_device *serdev)
  6606. +{
  6607. + const int irqf = IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_RISING;
  6608. + struct gpio_desc *gpiod;
  6609. + int irq;
  6610. + int status;
  6611. +
  6612. + gpiod = gpiod_get(&serdev->dev, "sam_wakeup-int", GPIOD_ASIS);
  6613. + if (IS_ERR(gpiod))
  6614. + return PTR_ERR(gpiod);
  6615. +
  6616. + irq = gpiod_to_irq(gpiod);
  6617. + gpiod_put(gpiod);
  6618. +
  6619. + if (irq < 0)
  6620. + return irq;
  6621. +
  6622. + status = request_threaded_irq(irq, NULL, surface_sam_irq_handler,
  6623. + irqf, "surface_sam_wakeup", serdev);
  6624. + if (status)
  6625. + return status;
  6626. +
  6627. + return irq;
  6628. +}
  6629. +
  6630. +
  6631. +static acpi_status
  6632. +ssh_setup_from_resource(struct acpi_resource *resource, void *context)
  6633. +{
  6634. + struct serdev_device *serdev = context;
  6635. + struct acpi_resource_common_serialbus *serial;
  6636. + struct acpi_resource_uart_serialbus *uart;
  6637. + int status = 0;
  6638. +
  6639. + if (resource->type != ACPI_RESOURCE_TYPE_SERIAL_BUS) {
  6640. + return AE_OK;
  6641. + }
  6642. +
  6643. + serial = &resource->data.common_serial_bus;
  6644. + if (serial->type != ACPI_RESOURCE_SERIAL_TYPE_UART) {
  6645. + return AE_OK;
  6646. + }
  6647. +
  6648. + uart = &resource->data.uart_serial_bus;
  6649. +
  6650. + // set up serdev device
  6651. + serdev_device_set_baudrate(serdev, uart->default_baud_rate);
  6652. +
  6653. + // serdev currently only supports RTSCTS flow control
  6654. + if (uart->flow_control & SSH_SUPPORTED_FLOW_CONTROL_MASK) {
  6655. + dev_warn(&serdev->dev, "unsupported flow control (value: 0x%02x)\n", uart->flow_control);
  6656. + }
  6657. +
  6658. + // set RTSCTS flow control
  6659. + serdev_device_set_flow_control(serdev, uart->flow_control & ACPI_UART_FLOW_CONTROL_HW);
  6660. +
  6661. + // serdev currently only supports EVEN/ODD parity
  6662. + switch (uart->parity) {
  6663. + case ACPI_UART_PARITY_NONE:
  6664. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE);
  6665. + break;
  6666. + case ACPI_UART_PARITY_EVEN:
  6667. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_EVEN);
  6668. + break;
  6669. + case ACPI_UART_PARITY_ODD:
  6670. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_ODD);
  6671. + break;
  6672. + default:
  6673. + dev_warn(&serdev->dev, "unsupported parity (value: 0x%02x)\n", uart->parity);
  6674. + break;
  6675. + }
  6676. +
  6677. + if (status) {
  6678. + dev_err(&serdev->dev, "failed to set parity (value: 0x%02x)\n", uart->parity);
  6679. + return status;
  6680. + }
  6681. +
  6682. + return AE_CTRL_TERMINATE; // we've found the resource and are done
  6683. +}
  6684. +
  6685. +
  6686. +static int surface_sam_ssh_suspend(struct device *dev)
  6687. +{
  6688. + struct sam_ssh_ec *ec;
  6689. + int status;
  6690. +
  6691. + dev_dbg(dev, "suspending\n");
  6692. +
  6693. + ec = surface_sam_ssh_acquire_init();
  6694. + if (ec) {
  6695. + status = surface_sam_ssh_ec_suspend(ec);
  6696. + if (status) {
  6697. + surface_sam_ssh_release(ec);
  6698. + return status;
  6699. + }
  6700. +
  6701. + if (device_may_wakeup(dev)) {
  6702. + status = enable_irq_wake(ec->irq);
  6703. + if (status) {
  6704. + surface_sam_ssh_release(ec);
  6705. + return status;
  6706. + }
  6707. +
  6708. + ec->irq_wakeup_enabled = true;
  6709. + } else {
  6710. + ec->irq_wakeup_enabled = false;
  6711. + }
  6712. +
  6713. + ec->state = SSH_EC_SUSPENDED;
  6714. + surface_sam_ssh_release(ec);
  6715. + }
  6716. +
  6717. + return 0;
  6718. +}
  6719. +
  6720. +static int surface_sam_ssh_resume(struct device *dev)
  6721. +{
  6722. + struct sam_ssh_ec *ec;
  6723. + int status;
  6724. +
  6725. + dev_dbg(dev, "resuming\n");
  6726. +
  6727. + ec = surface_sam_ssh_acquire_init();
  6728. + if (ec) {
  6729. + ec->state = SSH_EC_INITIALIZED;
  6730. +
  6731. + if (ec->irq_wakeup_enabled) {
  6732. + status = disable_irq_wake(ec->irq);
  6733. + if (status) {
  6734. + surface_sam_ssh_release(ec);
  6735. + return status;
  6736. + }
  6737. +
  6738. + ec->irq_wakeup_enabled = false;
  6739. + }
  6740. +
  6741. + status = surface_sam_ssh_ec_resume(ec);
  6742. + if (status) {
  6743. + surface_sam_ssh_release(ec);
  6744. + return status;
  6745. + }
  6746. +
  6747. + surface_sam_ssh_release(ec);
  6748. + }
  6749. +
  6750. + return 0;
  6751. +}
  6752. +
  6753. +static SIMPLE_DEV_PM_OPS(surface_sam_ssh_pm_ops, surface_sam_ssh_suspend, surface_sam_ssh_resume);
  6754. +
  6755. +
  6756. +static const struct serdev_device_ops ssh_device_ops = {
  6757. + .receive_buf = ssh_receive_buf,
  6758. + .write_wakeup = serdev_device_write_wakeup,
  6759. +};
  6760. +
  6761. +
  6762. +int surface_sam_ssh_sysfs_register(struct device *dev);
  6763. +void surface_sam_ssh_sysfs_unregister(struct device *dev);
  6764. +
  6765. +static int surface_sam_ssh_probe(struct serdev_device *serdev)
  6766. +{
  6767. + struct sam_ssh_ec *ec;
  6768. + struct workqueue_struct *event_queue_ack;
  6769. + struct workqueue_struct *event_queue_evt;
  6770. + u8 *write_buf;
  6771. + u8 *read_buf;
  6772. + u8 *eval_buf;
  6773. + acpi_handle *ssh = ACPI_HANDLE(&serdev->dev);
  6774. + acpi_status status;
  6775. + int irq;
  6776. +
  6777. + dev_dbg(&serdev->dev, "probing\n");
  6778. +
  6779. + if (gpiod_count(&serdev->dev, NULL) < 0)
  6780. + return -ENODEV;
  6781. +
  6782. + status = devm_acpi_dev_add_driver_gpios(&serdev->dev, surface_sam_acpi_gpios);
  6783. + if (status)
  6784. + return status;
  6785. +
  6786. + // allocate buffers
  6787. + write_buf = kzalloc(SSH_WRITE_BUF_LEN, GFP_KERNEL);
  6788. + if (!write_buf) {
  6789. + status = -ENOMEM;
  6790. + goto err_write_buf;
  6791. + }
  6792. +
  6793. + read_buf = kzalloc(SSH_READ_BUF_LEN, GFP_KERNEL);
  6794. + if (!read_buf) {
  6795. + status = -ENOMEM;
  6796. + goto err_read_buf;
  6797. + }
  6798. +
  6799. + eval_buf = kzalloc(SSH_EVAL_BUF_LEN, GFP_KERNEL);
  6800. + if (!eval_buf) {
  6801. + status = -ENOMEM;
  6802. + goto err_eval_buf;
  6803. + }
  6804. +
  6805. + event_queue_ack = create_singlethread_workqueue("surface_sh_ackq");
  6806. + if (!event_queue_ack) {
  6807. + status = -ENOMEM;
  6808. + goto err_ackq;
  6809. + }
  6810. +
  6811. + event_queue_evt = create_workqueue("surface_sh_evtq");
  6812. + if (!event_queue_evt) {
  6813. + status = -ENOMEM;
  6814. + goto err_evtq;
  6815. + }
  6816. +
  6817. + irq = surface_sam_setup_irq(serdev);
  6818. + if (irq < 0) {
  6819. + status = irq;
  6820. + goto err_irq;
  6821. + }
  6822. +
  6823. + // set up EC
  6824. + ec = surface_sam_ssh_acquire();
  6825. + if (ec->state != SSH_EC_UNINITIALIZED) {
  6826. + dev_err(&serdev->dev, "embedded controller already initialized\n");
  6827. + surface_sam_ssh_release(ec);
  6828. +
  6829. + status = -EBUSY;
  6830. + goto err_busy;
  6831. + }
  6832. +
  6833. + ec->serdev = serdev;
  6834. + ec->irq = irq;
  6835. + ec->writer.data = write_buf;
  6836. + ec->writer.ptr = write_buf;
  6837. +
  6838. + // initialize receiver
  6839. + init_completion(&ec->receiver.signal);
  6840. + kfifo_init(&ec->receiver.fifo, read_buf, SSH_READ_BUF_LEN);
  6841. + ec->receiver.eval_buf.ptr = eval_buf;
  6842. + ec->receiver.eval_buf.cap = SSH_EVAL_BUF_LEN;
  6843. + ec->receiver.eval_buf.len = 0;
  6844. +
  6845. + // initialize event handling
  6846. + ec->events.queue_ack = event_queue_ack;
  6847. + ec->events.queue_evt = event_queue_evt;
  6848. +
  6849. + ec->state = SSH_EC_INITIALIZED;
  6850. +
  6851. + serdev_device_set_drvdata(serdev, ec);
  6852. +
  6853. + // ensure everything is properly set-up before we open the device
  6854. + smp_mb();
  6855. +
  6856. + serdev_device_set_client_ops(serdev, &ssh_device_ops);
  6857. + status = serdev_device_open(serdev);
  6858. + if (status) {
  6859. + goto err_open;
  6860. + }
  6861. +
  6862. + status = acpi_walk_resources(ssh, METHOD_NAME__CRS,
  6863. + ssh_setup_from_resource, serdev);
  6864. + if (ACPI_FAILURE(status)) {
  6865. + goto err_devinit;
  6866. + }
  6867. +
  6868. + status = surface_sam_ssh_ec_resume(ec);
  6869. + if (status) {
  6870. + goto err_devinit;
  6871. + }
  6872. +
  6873. + status = surface_sam_ssh_sysfs_register(&serdev->dev);
  6874. + if (status) {
  6875. + goto err_devinit;
  6876. + }
  6877. +
  6878. + surface_sam_ssh_release(ec);
  6879. +
  6880. + // TODO: The EC can wake up the system via the associated GPIO interrupt in
  6881. + // multiple situations. One of which is the remaining battery capacity
  6882. + // falling below a certain threshold. Normally, we should use the
  6883. + // device_init_wakeup function, however, the EC also seems to have other
  6884. + // reasons for waking up the system and it seems that Windows has
  6885. + // additional checks whether the system should be resumed. In short, this
  6886. + // causes some spourious unwanted wake-ups. For now let's thus default
  6887. + // power/wakeup to false.
  6888. + device_set_wakeup_capable(&serdev->dev, true);
  6889. + acpi_walk_dep_device_list(ssh);
  6890. +
  6891. + return 0;
  6892. +
  6893. +err_devinit:
  6894. + serdev_device_close(serdev);
  6895. +err_open:
  6896. + ec->state = SSH_EC_UNINITIALIZED;
  6897. + serdev_device_set_drvdata(serdev, NULL);
  6898. + surface_sam_ssh_release(ec);
  6899. +err_busy:
  6900. + free_irq(irq, serdev);
  6901. +err_irq:
  6902. + destroy_workqueue(event_queue_evt);
  6903. +err_evtq:
  6904. + destroy_workqueue(event_queue_ack);
  6905. +err_ackq:
  6906. + kfree(eval_buf);
  6907. +err_eval_buf:
  6908. + kfree(read_buf);
  6909. +err_read_buf:
  6910. + kfree(write_buf);
  6911. +err_write_buf:
  6912. + return status;
  6913. +}
  6914. +
  6915. +static void surface_sam_ssh_remove(struct serdev_device *serdev)
  6916. +{
  6917. + struct sam_ssh_ec *ec;
  6918. + unsigned long flags;
  6919. + int status;
  6920. +
  6921. + ec = surface_sam_ssh_acquire_init();
  6922. + if (!ec) {
  6923. + return;
  6924. + }
  6925. +
  6926. + free_irq(ec->irq, serdev);
  6927. + surface_sam_ssh_sysfs_unregister(&serdev->dev);
  6928. +
  6929. + // suspend EC and disable events
  6930. + status = surface_sam_ssh_ec_suspend(ec);
  6931. + if (status) {
  6932. + dev_err(&serdev->dev, "failed to suspend EC: %d\n", status);
  6933. + }
  6934. +
  6935. + // make sure all events (received up to now) have been properly handled
  6936. + flush_workqueue(ec->events.queue_ack);
  6937. + flush_workqueue(ec->events.queue_evt);
  6938. +
  6939. + // remove event handlers
  6940. + spin_lock_irqsave(&ec->events.lock, flags);
  6941. + memset(ec->events.handler, 0,
  6942. + sizeof(struct ssh_event_handler)
  6943. + * SAM_NUM_EVENT_TYPES);
  6944. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6945. +
  6946. + // set device to deinitialized state
  6947. + ec->state = SSH_EC_UNINITIALIZED;
  6948. + ec->serdev = NULL;
  6949. +
  6950. + // ensure state and serdev get set before continuing
  6951. + smp_mb();
  6952. +
  6953. + /*
  6954. + * Flush any event that has not been processed yet to ensure we're not going to
  6955. + * use the serial device any more (e.g. for ACKing).
  6956. + */
  6957. + flush_workqueue(ec->events.queue_ack);
  6958. + flush_workqueue(ec->events.queue_evt);
  6959. +
  6960. + serdev_device_close(serdev);
  6961. +
  6962. + /*
  6963. + * Only at this point, no new events can be received. Destroying the
  6964. + * workqueue here flushes all remaining events. Those events will be
  6965. + * silently ignored and neither ACKed nor any handler gets called.
  6966. + */
  6967. + destroy_workqueue(ec->events.queue_ack);
  6968. + destroy_workqueue(ec->events.queue_evt);
  6969. +
  6970. + // free writer
  6971. + kfree(ec->writer.data);
  6972. + ec->writer.data = NULL;
  6973. + ec->writer.ptr = NULL;
  6974. +
  6975. + // free receiver
  6976. + spin_lock_irqsave(&ec->receiver.lock, flags);
  6977. + ec->receiver.state = SSH_RCV_DISCARD;
  6978. + kfifo_free(&ec->receiver.fifo);
  6979. +
  6980. + kfree(ec->receiver.eval_buf.ptr);
  6981. + ec->receiver.eval_buf.ptr = NULL;
  6982. + ec->receiver.eval_buf.cap = 0;
  6983. + ec->receiver.eval_buf.len = 0;
  6984. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  6985. +
  6986. + device_set_wakeup_capable(&serdev->dev, false);
  6987. + serdev_device_set_drvdata(serdev, NULL);
  6988. + surface_sam_ssh_release(ec);
  6989. +}
  6990. +
  6991. +
  6992. +static const struct acpi_device_id surface_sam_ssh_match[] = {
  6993. + { "MSHW0084", 0 },
  6994. + { },
  6995. +};
  6996. +MODULE_DEVICE_TABLE(acpi, surface_sam_ssh_match);
  6997. +
  6998. +static struct serdev_device_driver surface_sam_ssh = {
  6999. + .probe = surface_sam_ssh_probe,
  7000. + .remove = surface_sam_ssh_remove,
  7001. + .driver = {
  7002. + .name = "surface_sam_ssh",
  7003. + .acpi_match_table = ACPI_PTR(surface_sam_ssh_match),
  7004. + .pm = &surface_sam_ssh_pm_ops,
  7005. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  7006. + },
  7007. +};
  7008. +
  7009. +
  7010. +static int __init surface_sam_ssh_init(void)
  7011. +{
  7012. + return serdev_device_driver_register(&surface_sam_ssh);
  7013. +}
  7014. +
  7015. +static void __exit surface_sam_ssh_exit(void)
  7016. +{
  7017. + serdev_device_driver_unregister(&surface_sam_ssh);
  7018. +}
  7019. +
  7020. +/*
  7021. + * Ensure that the driver is loaded late due to some issues with the UART
  7022. + * communication. Specifically, we want to ensure that DMA is ready and being
  7023. + * used. Not using DMA can result in spurious communication failures,
  7024. + * especially during boot, which among other things will result in wrong
  7025. + * battery information (via ACPI _BIX) being displayed. Using a late init_call
  7026. + * instead of the normal module_init gives the DMA subsystem time to
  7027. + * initialize and via that results in a more stable communication, avoiding
  7028. + * such failures.
  7029. + */
  7030. +late_initcall(surface_sam_ssh_init);
  7031. +module_exit(surface_sam_ssh_exit);
  7032. +
  7033. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  7034. +MODULE_DESCRIPTION("Surface Serial Hub Driver for 5th Generation Surface Devices");
  7035. +MODULE_LICENSE("GPL v2");
  7036. diff --git a/drivers/platform/x86/surface_sam/surface_sam_ssh.h b/drivers/platform/x86/surface_sam/surface_sam_ssh.h
  7037. new file mode 100644
  7038. index 000000000000..714bba6a9457
  7039. --- /dev/null
  7040. +++ b/drivers/platform/x86/surface_sam/surface_sam_ssh.h
  7041. @@ -0,0 +1,97 @@
  7042. +/*
  7043. + * Interface for Surface Serial Hub (SSH).
  7044. + *
  7045. + * The SSH is the main communication hub for communication between host and
  7046. + * the Surface/System Aggregator Module (SAM) on newer Microsoft Surface
  7047. + * devices (Book 2, Pro 5, Laptops, ...). Also referred to as SAM-over-SSH.
  7048. + * Older devices (Book 1, Pro 4) use SAM-over-I2C.
  7049. + */
  7050. +
  7051. +#ifndef _SURFACE_SAM_SSH_H
  7052. +#define _SURFACE_SAM_SSH_H
  7053. +
  7054. +#include <linux/types.h>
  7055. +#include <linux/device.h>
  7056. +
  7057. +
  7058. +/*
  7059. + * Maximum request payload size in bytes.
  7060. + * Value based on ACPI (255 bytes minus header/status bytes).
  7061. + */
  7062. +#define SURFACE_SAM_SSH_MAX_RQST_PAYLOAD (255 - 10)
  7063. +
  7064. +/*
  7065. + * Maximum response payload size in bytes.
  7066. + * Value based on ACPI (255 bytes minus header/status bytes).
  7067. + */
  7068. +#define SURFACE_SAM_SSH_MAX_RQST_RESPONSE (255 - 4)
  7069. +
  7070. +/*
  7071. + * The number of (lower) bits of the request ID (RQID) reserved for events.
  7072. + * These bits may only be used exclusively for events sent from the EC to the
  7073. + * host.
  7074. + */
  7075. +#define SURFACE_SAM_SSH_RQID_EVENT_BITS 5
  7076. +
  7077. +/*
  7078. + * Special event-handler delay value indicating that the corresponding event
  7079. + * should be handled immediately in the interrupt and not be relayed through
  7080. + * the workqueue. Intended for low-latency events, such as keyboard events.
  7081. + */
  7082. +#define SURFACE_SAM_SSH_EVENT_IMMEDIATE ((unsigned long) -1)
  7083. +
  7084. +
  7085. +#define SURFACE_SAM_PRIORITY_NORMAL 1
  7086. +#define SURFACE_SAM_PRIORITY_HIGH 2
  7087. +
  7088. +
  7089. +struct surface_sam_ssh_buf {
  7090. + u8 cap;
  7091. + u8 len;
  7092. + u8 *data;
  7093. +};
  7094. +
  7095. +struct surface_sam_ssh_rqst {
  7096. + u8 tc; // target category
  7097. + u8 cid; // command ID
  7098. + u8 iid; // instance ID
  7099. + u8 pri; // priority
  7100. + u8 snc; // expect response flag
  7101. + u8 cdl; // command data length (lenght of payload)
  7102. + u8 *pld; // pointer to payload of length cdl
  7103. +};
  7104. +
  7105. +struct surface_sam_ssh_event {
  7106. + u16 rqid; // event type/source ID
  7107. + u8 tc; // target category
  7108. + u8 cid; // command ID
  7109. + u8 iid; // instance ID
  7110. + u8 pri; // priority
  7111. + u8 len; // length of payload
  7112. + u8 *pld; // payload of length len
  7113. +};
  7114. +
  7115. +
  7116. +typedef int (*surface_sam_ssh_event_handler_fn)(struct surface_sam_ssh_event *event, void *data);
  7117. +typedef unsigned long (*surface_sam_ssh_event_handler_delay)(struct surface_sam_ssh_event *event, void *data);
  7118. +
  7119. +int surface_sam_ssh_consumer_register(struct device *consumer);
  7120. +
  7121. +int surface_sam_ssh_rqst(const struct surface_sam_ssh_rqst *rqst, struct surface_sam_ssh_buf *result);
  7122. +
  7123. +int surface_sam_ssh_enable_event_source(u8 tc, u8 unknown, u16 rqid);
  7124. +int surface_sam_ssh_disable_event_source(u8 tc, u8 unknown, u16 rqid);
  7125. +int surface_sam_ssh_remove_event_handler(u16 rqid);
  7126. +
  7127. +int surface_sam_ssh_set_delayed_event_handler(u16 rqid,
  7128. + surface_sam_ssh_event_handler_fn fn,
  7129. + surface_sam_ssh_event_handler_delay delay,
  7130. + void *data);
  7131. +
  7132. +static inline int surface_sam_ssh_set_event_handler(u16 rqid, surface_sam_ssh_event_handler_fn fn, void *data)
  7133. +{
  7134. + return surface_sam_ssh_set_delayed_event_handler(rqid, fn, NULL, data);
  7135. +}
  7136. +
  7137. +
  7138. +#endif /* _SURFACE_SAM_SSH_H */
  7139. diff --git a/drivers/platform/x86/surface_sam/surface_sam_vhf.c b/drivers/platform/x86/surface_sam/surface_sam_vhf.c
  7140. new file mode 100644
  7141. index 000000000000..0ed0ebbdb3cb
  7142. --- /dev/null
  7143. +++ b/drivers/platform/x86/surface_sam/surface_sam_vhf.c
  7144. @@ -0,0 +1,276 @@
  7145. +/*
  7146. + * Virtual HID Framwork (VHF) driver for input events via SAM.
  7147. + * Used for keyboard input events on the Surface Laptops.
  7148. + */
  7149. +
  7150. +#include <linux/acpi.h>
  7151. +#include <linux/hid.h>
  7152. +#include <linux/input.h>
  7153. +#include <linux/platform_device.h>
  7154. +#include <linux/types.h>
  7155. +
  7156. +#include "surface_sam_ssh.h"
  7157. +
  7158. +
  7159. +#define USB_VENDOR_ID_MICROSOFT 0x045e
  7160. +#define USB_DEVICE_ID_MS_VHF 0xf001
  7161. +
  7162. +#define VHF_INPUT_NAME "Microsoft Virtual HID Framework Device"
  7163. +
  7164. +/*
  7165. + * Request ID for VHF events. This value is based on the output of the Surface
  7166. + * EC and should not be changed.
  7167. + */
  7168. +#define SAM_EVENT_VHF_RQID 0x0001
  7169. +#define SAM_EVENT_VHF_TC 0x08
  7170. +
  7171. +
  7172. +struct vhf_evtctx {
  7173. + struct device *dev;
  7174. + struct hid_device *hid;
  7175. +};
  7176. +
  7177. +struct vhf_drvdata {
  7178. + struct vhf_evtctx event_ctx;
  7179. +};
  7180. +
  7181. +
  7182. +/*
  7183. + * These report descriptors have been extracted from a Surface Book 2.
  7184. + * They seems to be similar enough to be usable on the Surface Laptop.
  7185. + */
  7186. +static const u8 vhf_hid_desc[] = {
  7187. + // keyboard descriptor (event command ID 0x03)
  7188. + 0x05, 0x01, /* Usage Page (Desktop), */
  7189. + 0x09, 0x06, /* Usage (Keyboard), */
  7190. + 0xA1, 0x01, /* Collection (Application), */
  7191. + 0x85, 0x01, /* Report ID (1), */
  7192. + 0x15, 0x00, /* Logical Minimum (0), */
  7193. + 0x25, 0x01, /* Logical Maximum (1), */
  7194. + 0x75, 0x01, /* Report Size (1), */
  7195. + 0x95, 0x08, /* Report Count (8), */
  7196. + 0x05, 0x07, /* Usage Page (Keyboard), */
  7197. + 0x19, 0xE0, /* Usage Minimum (KB Leftcontrol), */
  7198. + 0x29, 0xE7, /* Usage Maximum (KB Right GUI), */
  7199. + 0x81, 0x02, /* Input (Variable), */
  7200. + 0x75, 0x08, /* Report Size (8), */
  7201. + 0x95, 0x0A, /* Report Count (10), */
  7202. + 0x19, 0x00, /* Usage Minimum (None), */
  7203. + 0x29, 0x91, /* Usage Maximum (KB LANG2), */
  7204. + 0x26, 0xFF, 0x00, /* Logical Maximum (255), */
  7205. + 0x81, 0x00, /* Input, */
  7206. + 0x05, 0x0C, /* Usage Page (Consumer), */
  7207. + 0x0A, 0xC0, 0x02, /* Usage (02C0h), */
  7208. + 0xA1, 0x02, /* Collection (Logical), */
  7209. + 0x1A, 0xC1, 0x02, /* Usage Minimum (02C1h), */
  7210. + 0x2A, 0xC6, 0x02, /* Usage Maximum (02C6h), */
  7211. + 0x95, 0x06, /* Report Count (6), */
  7212. + 0xB1, 0x03, /* Feature (Constant, Variable), */
  7213. + 0xC0, /* End Collection, */
  7214. + 0x05, 0x08, /* Usage Page (LED), */
  7215. + 0x19, 0x01, /* Usage Minimum (01h), */
  7216. + 0x29, 0x03, /* Usage Maximum (03h), */
  7217. + 0x75, 0x01, /* Report Size (1), */
  7218. + 0x95, 0x03, /* Report Count (3), */
  7219. + 0x25, 0x01, /* Logical Maximum (1), */
  7220. + 0x91, 0x02, /* Output (Variable), */
  7221. + 0x95, 0x05, /* Report Count (5), */
  7222. + 0x91, 0x01, /* Output (Constant), */
  7223. + 0xC0, /* End Collection, */
  7224. +
  7225. + // media key descriptor (event command ID 0x04)
  7226. + 0x05, 0x0C, /* Usage Page (Consumer), */
  7227. + 0x09, 0x01, /* Usage (Consumer Control), */
  7228. + 0xA1, 0x01, /* Collection (Application), */
  7229. + 0x85, 0x03, /* Report ID (3), */
  7230. + 0x75, 0x10, /* Report Size (16), */
  7231. + 0x15, 0x00, /* Logical Minimum (0), */
  7232. + 0x26, 0xFF, 0x03, /* Logical Maximum (1023), */
  7233. + 0x19, 0x00, /* Usage Minimum (00h), */
  7234. + 0x2A, 0xFF, 0x03, /* Usage Maximum (03FFh), */
  7235. + 0x81, 0x00, /* Input, */
  7236. + 0xC0, /* End Collection, */
  7237. +};
  7238. +
  7239. +
  7240. +static int vhf_hid_start(struct hid_device *hid)
  7241. +{
  7242. + hid_dbg(hid, "%s\n", __func__);
  7243. + return 0;
  7244. +}
  7245. +
  7246. +static void vhf_hid_stop(struct hid_device *hid)
  7247. +{
  7248. + hid_dbg(hid, "%s\n", __func__);
  7249. +}
  7250. +
  7251. +static int vhf_hid_open(struct hid_device *hid)
  7252. +{
  7253. + hid_dbg(hid, "%s\n", __func__);
  7254. + return 0;
  7255. +}
  7256. +
  7257. +static void vhf_hid_close(struct hid_device *hid)
  7258. +{
  7259. + hid_dbg(hid, "%s\n", __func__);
  7260. +}
  7261. +
  7262. +static int vhf_hid_parse(struct hid_device *hid)
  7263. +{
  7264. + return hid_parse_report(hid, (u8 *)vhf_hid_desc, ARRAY_SIZE(vhf_hid_desc));
  7265. +}
  7266. +
  7267. +static int vhf_hid_raw_request(struct hid_device *hid, unsigned char reportnum,
  7268. + u8 *buf, size_t len, unsigned char rtype,
  7269. + int reqtype)
  7270. +{
  7271. + hid_dbg(hid, "%s\n", __func__);
  7272. + return 0;
  7273. +}
  7274. +
  7275. +static int vhf_hid_output_report(struct hid_device *hid, u8 *buf, size_t len)
  7276. +{
  7277. + hid_dbg(hid, "%s\n", __func__);
  7278. + print_hex_dump_debug("report:", DUMP_PREFIX_OFFSET, 16, 1, buf, len, false);
  7279. +
  7280. + return len;
  7281. +}
  7282. +
  7283. +static struct hid_ll_driver vhf_hid_ll_driver = {
  7284. + .start = vhf_hid_start,
  7285. + .stop = vhf_hid_stop,
  7286. + .open = vhf_hid_open,
  7287. + .close = vhf_hid_close,
  7288. + .parse = vhf_hid_parse,
  7289. + .raw_request = vhf_hid_raw_request,
  7290. + .output_report = vhf_hid_output_report,
  7291. +};
  7292. +
  7293. +
  7294. +static struct hid_device *vhf_create_hid_device(struct platform_device *pdev)
  7295. +{
  7296. + struct hid_device *hid;
  7297. +
  7298. + hid = hid_allocate_device();
  7299. + if (IS_ERR(hid)) {
  7300. + return hid;
  7301. + }
  7302. +
  7303. + hid->dev.parent = &pdev->dev;
  7304. +
  7305. + hid->bus = BUS_VIRTUAL;
  7306. + hid->vendor = USB_VENDOR_ID_MICROSOFT;
  7307. + hid->product = USB_DEVICE_ID_MS_VHF;
  7308. +
  7309. + hid->ll_driver = &vhf_hid_ll_driver;
  7310. +
  7311. + sprintf(hid->name, "%s", VHF_INPUT_NAME);
  7312. +
  7313. + return hid;
  7314. +}
  7315. +
  7316. +static int vhf_event_handler(struct surface_sam_ssh_event *event, void *data)
  7317. +{
  7318. + struct vhf_evtctx *ctx = (struct vhf_evtctx *)data;
  7319. +
  7320. + if (event->tc == 0x08 && (event->cid == 0x03 || event->cid == 0x04)) {
  7321. + return hid_input_report(ctx->hid, HID_INPUT_REPORT, event->pld, event->len, 1);
  7322. + }
  7323. +
  7324. + dev_warn(ctx->dev, "unsupported event (tc = %d, cid = %d)\n", event->tc, event->cid);
  7325. + return 0;
  7326. +}
  7327. +
  7328. +static int surface_sam_vhf_probe(struct platform_device *pdev)
  7329. +{
  7330. + struct vhf_drvdata *drvdata;
  7331. + struct hid_device *hid;
  7332. + int status;
  7333. +
  7334. + // add device link to EC
  7335. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  7336. + if (status) {
  7337. + return status == -ENXIO ? -EPROBE_DEFER : status;
  7338. + }
  7339. +
  7340. + drvdata = kzalloc(sizeof(struct vhf_drvdata), GFP_KERNEL);
  7341. + if (!drvdata) {
  7342. + return -ENOMEM;
  7343. + }
  7344. +
  7345. + hid = vhf_create_hid_device(pdev);
  7346. + if (IS_ERR(hid)) {
  7347. + status = PTR_ERR(hid);
  7348. + goto err_probe_hid;
  7349. + }
  7350. +
  7351. + status = hid_add_device(hid);
  7352. + if (status) {
  7353. + goto err_add_hid;
  7354. + }
  7355. +
  7356. + drvdata->event_ctx.dev = &pdev->dev;
  7357. + drvdata->event_ctx.hid = hid;
  7358. +
  7359. + platform_set_drvdata(pdev, drvdata);
  7360. +
  7361. + status = surface_sam_ssh_set_event_handler(
  7362. + SAM_EVENT_VHF_RQID,
  7363. + vhf_event_handler,
  7364. + &drvdata->event_ctx);
  7365. + if (status) {
  7366. + goto err_add_hid;
  7367. + }
  7368. +
  7369. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_VHF_TC, 0x01, SAM_EVENT_VHF_RQID);
  7370. + if (status) {
  7371. + goto err_event_source;
  7372. + }
  7373. +
  7374. + return 0;
  7375. +
  7376. +err_event_source:
  7377. + surface_sam_ssh_remove_event_handler(SAM_EVENT_VHF_RQID);
  7378. +err_add_hid:
  7379. + hid_destroy_device(hid);
  7380. + platform_set_drvdata(pdev, NULL);
  7381. +err_probe_hid:
  7382. + kfree(drvdata);
  7383. + return status;
  7384. +}
  7385. +
  7386. +static int surface_sam_vhf_remove(struct platform_device *pdev)
  7387. +{
  7388. + struct vhf_drvdata *drvdata = platform_get_drvdata(pdev);
  7389. +
  7390. + surface_sam_ssh_disable_event_source(SAM_EVENT_VHF_TC, 0x01, SAM_EVENT_VHF_RQID);
  7391. + surface_sam_ssh_remove_event_handler(SAM_EVENT_VHF_RQID);
  7392. +
  7393. + hid_destroy_device(drvdata->event_ctx.hid);
  7394. + kfree(drvdata);
  7395. +
  7396. + platform_set_drvdata(pdev, NULL);
  7397. + return 0;
  7398. +}
  7399. +
  7400. +
  7401. +static const struct acpi_device_id surface_sam_vhf_match[] = {
  7402. + { "MSHW0096" },
  7403. + { },
  7404. +};
  7405. +MODULE_DEVICE_TABLE(acpi, surface_sam_vhf_match);
  7406. +
  7407. +static struct platform_driver surface_sam_vhf = {
  7408. + .probe = surface_sam_vhf_probe,
  7409. + .remove = surface_sam_vhf_remove,
  7410. + .driver = {
  7411. + .name = "surface_sam_vhf",
  7412. + .acpi_match_table = ACPI_PTR(surface_sam_vhf_match),
  7413. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  7414. + },
  7415. +};
  7416. +module_platform_driver(surface_sam_vhf);
  7417. +
  7418. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  7419. +MODULE_DESCRIPTION("Virtual HID Framework Driver for 5th Generation Surface Devices");
  7420. +MODULE_LICENSE("GPL v2");
  7421. diff --git a/drivers/tty/serdev/core.c b/drivers/tty/serdev/core.c
  7422. index a9719858c950..ce5309d00280 100644
  7423. --- a/drivers/tty/serdev/core.c
  7424. +++ b/drivers/tty/serdev/core.c
  7425. @@ -552,16 +552,97 @@ static int of_serdev_register_devices(struct serdev_controller *ctrl)
  7426. }
  7427. #ifdef CONFIG_ACPI
  7428. +
  7429. +#define SERDEV_ACPI_MAX_SCAN_DEPTH 32
  7430. +
  7431. +struct acpi_serdev_lookup {
  7432. + acpi_handle device_handle;
  7433. + acpi_handle controller_handle;
  7434. + int n;
  7435. + int index;
  7436. +};
  7437. +
  7438. +static int acpi_serdev_parse_resource(struct acpi_resource *ares, void *data)
  7439. +{
  7440. + struct acpi_serdev_lookup *lookup = data;
  7441. + struct acpi_resource_uart_serialbus *sb;
  7442. + acpi_status status;
  7443. +
  7444. + if (ares->type != ACPI_RESOURCE_TYPE_SERIAL_BUS)
  7445. + return 1;
  7446. +
  7447. + if (ares->data.common_serial_bus.type != ACPI_RESOURCE_SERIAL_TYPE_UART)
  7448. + return 1;
  7449. +
  7450. + if (lookup->index != -1 && lookup->n++ != lookup->index)
  7451. + return 1;
  7452. +
  7453. + sb = &ares->data.uart_serial_bus;
  7454. +
  7455. + status = acpi_get_handle(lookup->device_handle,
  7456. + sb->resource_source.string_ptr,
  7457. + &lookup->controller_handle);
  7458. + if (ACPI_FAILURE(status))
  7459. + return 1;
  7460. +
  7461. + /*
  7462. + * NOTE: Ideally, we would also want to retreive other properties here,
  7463. + * once setting them before opening the device is supported by serdev.
  7464. + */
  7465. +
  7466. + return 1;
  7467. +}
  7468. +
  7469. +static int acpi_serdev_do_lookup(struct acpi_device *adev,
  7470. + struct acpi_serdev_lookup *lookup)
  7471. +{
  7472. + struct list_head resource_list;
  7473. + int ret;
  7474. +
  7475. + lookup->device_handle = acpi_device_handle(adev);
  7476. + lookup->controller_handle = NULL;
  7477. + lookup->n = 0;
  7478. +
  7479. + INIT_LIST_HEAD(&resource_list);
  7480. + ret = acpi_dev_get_resources(adev, &resource_list,
  7481. + acpi_serdev_parse_resource, lookup);
  7482. + acpi_dev_free_resource_list(&resource_list);
  7483. +
  7484. + if (ret < 0)
  7485. + return -EINVAL;
  7486. +
  7487. + return 0;
  7488. +}
  7489. +
  7490. +static int acpi_serdev_check_resources(struct serdev_controller *ctrl,
  7491. + struct acpi_device *adev)
  7492. +{
  7493. + struct acpi_serdev_lookup lookup;
  7494. + int ret;
  7495. +
  7496. + if (acpi_bus_get_status(adev) || !adev->status.present)
  7497. + return -EINVAL;
  7498. +
  7499. + /* Look for UARTSerialBusV2 resource */
  7500. + lookup.index = -1; // we only care for the last device
  7501. +
  7502. + ret = acpi_serdev_do_lookup(adev, &lookup);
  7503. + if (ret)
  7504. + return ret;
  7505. +
  7506. + /* Make sure controller and ResourceSource handle match */
  7507. + if (ACPI_HANDLE(ctrl->dev.parent) != lookup.controller_handle)
  7508. + return -ENODEV;
  7509. +
  7510. + return 0;
  7511. +}
  7512. +
  7513. static acpi_status acpi_serdev_register_device(struct serdev_controller *ctrl,
  7514. - struct acpi_device *adev)
  7515. + struct acpi_device *adev)
  7516. {
  7517. - struct serdev_device *serdev = NULL;
  7518. + struct serdev_device *serdev;
  7519. int err;
  7520. - if (acpi_bus_get_status(adev) || !adev->status.present ||
  7521. - acpi_device_enumerated(adev))
  7522. - return AE_OK;
  7523. -
  7524. serdev = serdev_device_alloc(ctrl);
  7525. if (!serdev) {
  7526. dev_err(&ctrl->dev, "failed to allocate serdev device for %s\n",
  7527. @@ -589,7 +670,7 @@ static const struct acpi_device_id serdev_acpi_devices_blacklist[] = {
  7528. };
  7529. static acpi_status acpi_serdev_add_device(acpi_handle handle, u32 level,
  7530. - void *data, void **return_value)
  7531. + void *data, void **return_value)
  7532. {
  7533. struct serdev_controller *ctrl = data;
  7534. struct acpi_device *adev;
  7535. @@ -597,26 +678,32 @@ static acpi_status acpi_serdev_add_device(acpi_handle handle, u32 level,
  7536. if (acpi_bus_get_device(handle, &adev))
  7537. return AE_OK;
  7538. + if (acpi_device_enumerated(adev))
  7539. + return AE_OK;
  7540. +
  7541. /* Skip if black listed */
  7542. if (!acpi_match_device_ids(adev, serdev_acpi_devices_blacklist))
  7543. return AE_OK;
  7544. + if (acpi_serdev_check_resources(ctrl, adev))
  7545. + return AE_OK;
  7546. +
  7547. return acpi_serdev_register_device(ctrl, adev);
  7548. }
  7549. +
  7550. static int acpi_serdev_register_devices(struct serdev_controller *ctrl)
  7551. {
  7552. acpi_status status;
  7553. - acpi_handle handle;
  7554. - handle = ACPI_HANDLE(ctrl->dev.parent);
  7555. - if (!handle)
  7556. + if (!has_acpi_companion(ctrl->dev.parent))
  7557. return -ENODEV;
  7558. - status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1,
  7559. + status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
  7560. + SERDEV_ACPI_MAX_SCAN_DEPTH,
  7561. acpi_serdev_add_device, NULL, ctrl, NULL);
  7562. if (ACPI_FAILURE(status))
  7563. - dev_dbg(&ctrl->dev, "failed to enumerate serdev slaves\n");
  7564. + dev_warn(&ctrl->dev, "failed to enumerate serdev slaves\n");
  7565. if (!ctrl->serdev)
  7566. return -ENODEV;
  7567. --
  7568. 2.25.0