0004-surface-sam.patch 192 KB

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  1. From 45c68e8472cab23d0c613c253dbdb910d8ad6960 Mon Sep 17 00:00:00 2001
  2. From: Maximilian Luz <luzmaximilian@gmail.com>
  3. Date: Fri, 6 Dec 2019 11:56:12 +0100
  4. Subject: [PATCH 4/7] surface-sam
  5. ---
  6. drivers/platform/x86/Kconfig | 1 +
  7. drivers/platform/x86/Makefile | 1 +
  8. drivers/platform/x86/surface_sam/Kconfig | 164 ++
  9. drivers/platform/x86/surface_sam/Makefile | 10 +
  10. .../x86/surface_sam/surface_sam_dtx.c | 604 ++++++
  11. .../x86/surface_sam/surface_sam_hps.c | 1110 +++++++++++
  12. .../x86/surface_sam/surface_sam_san.c | 883 +++++++++
  13. .../x86/surface_sam/surface_sam_san.h | 30 +
  14. .../x86/surface_sam/surface_sam_sid.c | 137 ++
  15. .../x86/surface_sam/surface_sam_sid_gpelid.c | 224 +++
  16. .../surface_sam/surface_sam_sid_perfmode.c | 216 ++
  17. .../x86/surface_sam/surface_sam_sid_power.c | 1264 ++++++++++++
  18. .../x86/surface_sam/surface_sam_sid_vhf.c | 428 ++++
  19. .../x86/surface_sam/surface_sam_ssh.c | 1744 +++++++++++++++++
  20. .../x86/surface_sam/surface_sam_ssh.h | 98 +
  21. .../x86/surface_sam/surface_sam_vhf.c | 270 +++
  22. 16 files changed, 7184 insertions(+)
  23. create mode 100644 drivers/platform/x86/surface_sam/Kconfig
  24. create mode 100644 drivers/platform/x86/surface_sam/Makefile
  25. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_dtx.c
  26. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_hps.c
  27. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_san.c
  28. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_san.h
  29. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid.c
  30. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  31. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  32. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  33. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  34. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_ssh.c
  35. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_ssh.h
  36. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_vhf.c
  37. diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
  38. index f90d3d4a86a0..5956ee7895d3 100644
  39. --- a/drivers/platform/x86/Kconfig
  40. +++ b/drivers/platform/x86/Kconfig
  41. @@ -1355,6 +1355,7 @@ config INTEL_UNCORE_FREQ_CONTROL
  42. will be called intel-uncore-frequency.
  43. source "drivers/platform/x86/intel_speed_select_if/Kconfig"
  44. +source "drivers/platform/x86/surface_sam/Kconfig"
  45. config SYSTEM76_ACPI
  46. tristate "System76 ACPI Driver"
  47. diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
  48. index 636833e357f0..7329298fd584 100644
  49. --- a/drivers/platform/x86/Makefile
  50. +++ b/drivers/platform/x86/Makefile
  51. @@ -107,3 +107,4 @@ obj-$(CONFIG_PCENGINES_APU2) += pcengines-apuv2.o
  52. obj-$(CONFIG_INTEL_SPEED_SELECT_INTERFACE) += intel_speed_select_if/
  53. obj-$(CONFIG_SYSTEM76_ACPI) += system76_acpi.o
  54. obj-$(CONFIG_INTEL_UNCORE_FREQ_CONTROL) += intel-uncore-frequency.o
  55. +obj-$(CONFIG_SURFACE_SAM) += surface_sam/
  56. diff --git a/drivers/platform/x86/surface_sam/Kconfig b/drivers/platform/x86/surface_sam/Kconfig
  57. new file mode 100644
  58. index 000000000000..c4556e58b9a5
  59. --- /dev/null
  60. +++ b/drivers/platform/x86/surface_sam/Kconfig
  61. @@ -0,0 +1,164 @@
  62. +menuconfig SURFACE_SAM
  63. + depends on ACPI
  64. + tristate "Microsoft Surface/System Aggregator Module and Platform Drivers"
  65. + help
  66. + Drivers for the Surface/System Aggregator Module (SAM) of Microsoft
  67. + Surface devices.
  68. +
  69. + SAM is an embedded controller that provides access to various
  70. + functionalities on these devices, including battery status, keyboard
  71. + events (on the Laptops) and many more.
  72. +
  73. + Say M/Y here if you have a Microsoft Surface device with a SAM device
  74. + (i.e. 5th generation or later).
  75. +
  76. +config SURFACE_SAM_SSH
  77. + tristate "Surface Serial Hub Driver"
  78. + depends on SURFACE_SAM
  79. + depends on SERIAL_DEV_CTRL_TTYPORT
  80. + select CRC_CCITT
  81. + default m
  82. + help
  83. + Surface Serial Hub driver for 5th generation (or later) Microsoft
  84. + Surface devices.
  85. +
  86. + This is the base driver for the embedded serial controller found on
  87. + 5th generation (and later) Microsoft Surface devices (e.g. Book 2,
  88. + Laptop, Laptop 2, Pro 2017, Pro 6, ...). This driver itself only
  89. + provides access to the embedded controller (SAM) and subsequent
  90. + drivers are required for the respective functionalities.
  91. +
  92. + If you have a 5th generation (or later) Microsoft Surface device, say
  93. + Y or M here.
  94. +
  95. +config SURFACE_SAM_SSH_DEBUG_DEVICE
  96. + bool "Surface Serial Hub Debug Device"
  97. + depends on SURFACE_SAM_SSH
  98. + depends on SYSFS
  99. + default n
  100. + help
  101. + Debug device for direct communication with the embedded controller
  102. + found on 5th generation (and later) Microsoft Surface devices (e.g.
  103. + Book 2, Laptop, Laptop 2, Pro 2017, Pro 6, ...) via sysfs.
  104. +
  105. + If you are not sure, say N here.
  106. +
  107. +config SURFACE_SAM_SAN
  108. + tristate "Surface ACPI Notify Driver"
  109. + depends on SURFACE_SAM_SSH
  110. + default m
  111. + help
  112. + Surface ACPI Notify driver for 5th generation (or later) Microsoft
  113. + Surface devices.
  114. +
  115. + This driver enables basic ACPI events and requests, such as battery
  116. + status requests/events, thermal events, lid status, and possibly more,
  117. + which would otherwise not work on these devices.
  118. +
  119. + If you are not sure, say M here.
  120. +
  121. +config SURFACE_SAM_VHF
  122. + tristate "Surface Virtual HID Framework Driver"
  123. + depends on SURFACE_SAM_SSH
  124. + depends on HID
  125. + default m
  126. + help
  127. + Surface Virtual HID Framework driver for 5th generation (or later)
  128. + Microsoft Surface devices.
  129. +
  130. + This driver provides support for the Microsoft Virtual HID framework,
  131. + which is required for keyboard support on the Surface Laptop 1 and 2.
  132. +
  133. + If you are not sure, say M here.
  134. +
  135. +config SURFACE_SAM_DTX
  136. + tristate "Surface Detachment System (DTX) Driver"
  137. + depends on SURFACE_SAM_SSH
  138. + depends on INPUT
  139. + default m
  140. + help
  141. + Surface Detachment System (DTX) driver for the Microsoft Surface Book
  142. + 2. This driver provides support for proper detachment handling in
  143. + user-space, status-events relating to the base and support for
  144. + the safe-guard keeping the base attached when the discrete GPU
  145. + contained in it is running via the special /dev/surface-dtx device.
  146. +
  147. + Also provides a standard input device to provide SW_TABLET_MODE events
  148. + upon device mode change.
  149. +
  150. + If you are not sure, say M here.
  151. +
  152. +config SURFACE_SAM_HPS
  153. + tristate "Surface dGPU Hot-Plug System (dGPU-HPS) Driver"
  154. + depends on SURFACE_SAM_SSH
  155. + depends on SURFACE_SAM_SAN
  156. + depends on GPIO_SYSFS
  157. + default m
  158. + help
  159. + Driver to properly handle hot-plugging and explicit power-on/power-off
  160. + of the discrete GPU (dGPU) on the Surface Book 2.
  161. +
  162. + If you are not sure, say M here.
  163. +
  164. +config SURFACE_SAM_SID
  165. + tristate "Surface Platform Integration Driver"
  166. + depends on SURFACE_SAM_SSH
  167. + default m
  168. + help
  169. + Surface Platform Integration Driver for the Microsoft Surface Devices.
  170. + This driver loads various model-specific sub-drivers, including
  171. + battery and keyboard support on 7th generation Surface devices, proper
  172. + lid setup to enable device wakeup when the lid is opened on multiple
  173. + models, as well as performance mode setting support on the Surface
  174. + Book 2.
  175. +
  176. + If you are not sure, say M here.
  177. +
  178. +config SURFACE_SAM_SID_GPELID
  179. + tristate "Surface Lid Wakeup Driver"
  180. + depends on SURFACE_SAM_SID
  181. + default m
  182. + help
  183. + Driver to set up device wake-up via lid on Intel-based Microsoft
  184. + Surface devices. These devices do not wake up from sleep as their GPE
  185. + interrupt is not configured automatically. This driver solves that
  186. + problem.
  187. +
  188. + If you are not sure, say M here.
  189. +
  190. +config SURFACE_SAM_SID_PERFMODE
  191. + tristate "Surface Performance Mode Driver"
  192. + depends on SURFACE_SAM_SID
  193. + depends on SYSFS
  194. + default m
  195. + help
  196. + This driver provides support for setting performance-modes on Surface
  197. + devices via the perf_mode sysfs attribute. Currently only supports the
  198. + Surface Book 2. Performance-modes directly influence the fan-profile
  199. + of the device, allowing to choose between higher performance or
  200. + quieter operation.
  201. +
  202. + If you are not sure, say M here.
  203. +
  204. +config SURFACE_SAM_SID_VHF
  205. + tristate "Surface SAM HID Driver"
  206. + depends on SURFACE_SAM_SID
  207. + depends on HID
  208. + default m
  209. + help
  210. + This driver provides support for HID devices connected via the Surface
  211. + SAM embedded controller. It provides support for keyboard and touchpad
  212. + on the Surface Laptop 3 models.
  213. +
  214. + If you are not sure, say M here.
  215. +
  216. +config SURFACE_SAM_SID_POWER
  217. + tristate "Surface SAM Battery/AC Driver"
  218. + depends on SURFACE_SAM_SID
  219. + select POWER_SUPPLY
  220. + default m
  221. + help
  222. + This driver provides support for the battery and AC on 7th generation
  223. + Surface devices.
  224. +
  225. + If you are not sure, say M here.
  226. diff --git a/drivers/platform/x86/surface_sam/Makefile b/drivers/platform/x86/surface_sam/Makefile
  227. new file mode 100644
  228. index 000000000000..188975ccde5c
  229. --- /dev/null
  230. +++ b/drivers/platform/x86/surface_sam/Makefile
  231. @@ -0,0 +1,10 @@
  232. +obj-$(CONFIG_SURFACE_SAM_SSH) += surface_sam_ssh.o
  233. +obj-$(CONFIG_SURFACE_SAM_SAN) += surface_sam_san.o
  234. +obj-$(CONFIG_SURFACE_SAM_DTX) += surface_sam_dtx.o
  235. +obj-$(CONFIG_SURFACE_SAM_HPS) += surface_sam_hps.o
  236. +obj-$(CONFIG_SURFACE_SAM_VHF) += surface_sam_vhf.o
  237. +obj-$(CONFIG_SURFACE_SAM_SID) += surface_sam_sid.o
  238. +obj-$(CONFIG_SURFACE_SAM_SID_GPELID) += surface_sam_sid_gpelid.o
  239. +obj-$(CONFIG_SURFACE_SAM_SID_PERFMODE) += surface_sam_sid_perfmode.o
  240. +obj-$(CONFIG_SURFACE_SAM_SID_POWER) += surface_sam_sid_power.o
  241. +obj-$(CONFIG_SURFACE_SAM_SID_VHF) += surface_sam_sid_vhf.o
  242. diff --git a/drivers/platform/x86/surface_sam/surface_sam_dtx.c b/drivers/platform/x86/surface_sam/surface_sam_dtx.c
  243. new file mode 100644
  244. index 000000000000..1e772fd5b0be
  245. --- /dev/null
  246. +++ b/drivers/platform/x86/surface_sam/surface_sam_dtx.c
  247. @@ -0,0 +1,604 @@
  248. +// SPDX-License-Identifier: GPL-2.0
  249. +/*
  250. + * Detachment system (DTX) driver for Microsoft Surface Book 2.
  251. + */
  252. +
  253. +#include <linux/acpi.h>
  254. +#include <linux/delay.h>
  255. +#include <linux/fs.h>
  256. +#include <linux/input.h>
  257. +#include <linux/ioctl.h>
  258. +#include <linux/kernel.h>
  259. +#include <linux/miscdevice.h>
  260. +#include <linux/module.h>
  261. +#include <linux/poll.h>
  262. +#include <linux/rculist.h>
  263. +#include <linux/slab.h>
  264. +#include <linux/spinlock.h>
  265. +#include <linux/platform_device.h>
  266. +
  267. +#include "surface_sam_ssh.h"
  268. +
  269. +
  270. +#define USB_VENDOR_ID_MICROSOFT 0x045e
  271. +#define USB_DEVICE_ID_MS_SURFACE_BASE_2_INTEGRATION 0x0922
  272. +
  273. +// name copied from MS device manager
  274. +#define DTX_INPUT_NAME "Microsoft Surface Base 2 Integration Device"
  275. +
  276. +
  277. +#define DTX_CMD_LATCH_LOCK _IO(0x11, 0x01)
  278. +#define DTX_CMD_LATCH_UNLOCK _IO(0x11, 0x02)
  279. +#define DTX_CMD_LATCH_REQUEST _IO(0x11, 0x03)
  280. +#define DTX_CMD_LATCH_OPEN _IO(0x11, 0x04)
  281. +#define DTX_CMD_GET_OPMODE _IOR(0x11, 0x05, int)
  282. +
  283. +#define SAM_RQST_DTX_TC 0x11
  284. +#define SAM_RQST_DTX_CID_LATCH_LOCK 0x06
  285. +#define SAM_RQST_DTX_CID_LATCH_UNLOCK 0x07
  286. +#define SAM_RQST_DTX_CID_LATCH_REQUEST 0x08
  287. +#define SAM_RQST_DTX_CID_LATCH_OPEN 0x09
  288. +#define SAM_RQST_DTX_CID_GET_OPMODE 0x0D
  289. +
  290. +#define SAM_EVENT_DTX_TC 0x11
  291. +#define SAM_EVENT_DTX_RQID 0x0011
  292. +#define SAM_EVENT_DTX_CID_CONNECTION 0x0c
  293. +#define SAM_EVENT_DTX_CID_BUTTON 0x0e
  294. +#define SAM_EVENT_DTX_CID_ERROR 0x0f
  295. +#define SAM_EVENT_DTX_CID_LATCH_STATUS 0x11
  296. +
  297. +#define DTX_OPMODE_TABLET 0x00
  298. +#define DTX_OPMODE_LAPTOP 0x01
  299. +#define DTX_OPMODE_STUDIO 0x02
  300. +
  301. +#define DTX_LATCH_CLOSED 0x00
  302. +#define DTX_LATCH_OPENED 0x01
  303. +
  304. +
  305. +// Warning: This must always be a power of 2!
  306. +#define DTX_CLIENT_BUF_SIZE 16
  307. +
  308. +#define DTX_CONNECT_OPMODE_DELAY 1000
  309. +
  310. +#define DTX_ERR KERN_ERR "surface_sam_dtx: "
  311. +#define DTX_WARN KERN_WARNING "surface_sam_dtx: "
  312. +
  313. +
  314. +struct surface_dtx_event {
  315. + u8 type;
  316. + u8 code;
  317. + u8 arg0;
  318. + u8 arg1;
  319. +} __packed;
  320. +
  321. +struct surface_dtx_dev {
  322. + wait_queue_head_t waitq;
  323. + struct miscdevice mdev;
  324. + spinlock_t client_lock;
  325. + struct list_head client_list;
  326. + struct mutex mutex;
  327. + bool active;
  328. + spinlock_t input_lock;
  329. + struct input_dev *input_dev;
  330. +};
  331. +
  332. +struct surface_dtx_client {
  333. + struct list_head node;
  334. + struct surface_dtx_dev *ddev;
  335. + struct fasync_struct *fasync;
  336. + spinlock_t buffer_lock;
  337. + unsigned int buffer_head;
  338. + unsigned int buffer_tail;
  339. + struct surface_dtx_event buffer[DTX_CLIENT_BUF_SIZE];
  340. +};
  341. +
  342. +
  343. +static struct surface_dtx_dev surface_dtx_dev;
  344. +
  345. +
  346. +static int surface_sam_query_opmpde(void)
  347. +{
  348. + u8 result_buf[1];
  349. + int status;
  350. +
  351. + struct surface_sam_ssh_rqst rqst = {
  352. + .tc = SAM_RQST_DTX_TC,
  353. + .cid = SAM_RQST_DTX_CID_GET_OPMODE,
  354. + .iid = 0,
  355. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  356. + .snc = 1,
  357. + .cdl = 0,
  358. + .pld = NULL,
  359. + };
  360. +
  361. + struct surface_sam_ssh_buf result = {
  362. + .cap = 1,
  363. + .len = 0,
  364. + .data = result_buf,
  365. + };
  366. +
  367. + status = surface_sam_ssh_rqst(&rqst, &result);
  368. + if (status)
  369. + return status;
  370. +
  371. + if (result.len != 1)
  372. + return -EFAULT;
  373. +
  374. + return result.data[0];
  375. +}
  376. +
  377. +
  378. +static int dtx_cmd_simple(u8 cid)
  379. +{
  380. + struct surface_sam_ssh_rqst rqst = {
  381. + .tc = SAM_RQST_DTX_TC,
  382. + .cid = cid,
  383. + .iid = 0,
  384. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  385. + .snc = 0,
  386. + .cdl = 0,
  387. + .pld = NULL,
  388. + };
  389. +
  390. + return surface_sam_ssh_rqst(&rqst, NULL);
  391. +}
  392. +
  393. +static int dtx_cmd_get_opmode(int __user *buf)
  394. +{
  395. + int opmode;
  396. +
  397. + opmode = surface_sam_query_opmpde();
  398. + if (opmode < 0)
  399. + return opmode;
  400. +
  401. + if (put_user(opmode, buf))
  402. + return -EACCES;
  403. +
  404. + return 0;
  405. +}
  406. +
  407. +
  408. +static int surface_dtx_open(struct inode *inode, struct file *file)
  409. +{
  410. + struct surface_dtx_dev *ddev = container_of(file->private_data, struct surface_dtx_dev, mdev);
  411. + struct surface_dtx_client *client;
  412. +
  413. + // initialize client
  414. + client = kzalloc(sizeof(struct surface_dtx_client), GFP_KERNEL);
  415. + if (!client)
  416. + return -ENOMEM;
  417. +
  418. + spin_lock_init(&client->buffer_lock);
  419. + client->buffer_head = 0;
  420. + client->buffer_tail = 0;
  421. + client->ddev = ddev;
  422. +
  423. + // attach client
  424. + spin_lock(&ddev->client_lock);
  425. + list_add_tail_rcu(&client->node, &ddev->client_list);
  426. + spin_unlock(&ddev->client_lock);
  427. +
  428. + file->private_data = client;
  429. + nonseekable_open(inode, file);
  430. +
  431. + return 0;
  432. +}
  433. +
  434. +static int surface_dtx_release(struct inode *inode, struct file *file)
  435. +{
  436. + struct surface_dtx_client *client = file->private_data;
  437. +
  438. + // detach client
  439. + spin_lock(&client->ddev->client_lock);
  440. + list_del_rcu(&client->node);
  441. + spin_unlock(&client->ddev->client_lock);
  442. + synchronize_rcu();
  443. +
  444. + kfree(client);
  445. + file->private_data = NULL;
  446. +
  447. + return 0;
  448. +}
  449. +
  450. +static ssize_t surface_dtx_read(struct file *file, char __user *buf, size_t count, loff_t *offs)
  451. +{
  452. + struct surface_dtx_client *client = file->private_data;
  453. + struct surface_dtx_dev *ddev = client->ddev;
  454. + struct surface_dtx_event event;
  455. + size_t read = 0;
  456. + int status = 0;
  457. +
  458. + if (count != 0 && count < sizeof(struct surface_dtx_event))
  459. + return -EINVAL;
  460. +
  461. + if (!ddev->active)
  462. + return -ENODEV;
  463. +
  464. + // check availability
  465. + if (client->buffer_head == client->buffer_tail) {
  466. + if (file->f_flags & O_NONBLOCK)
  467. + return -EAGAIN;
  468. +
  469. + status = wait_event_interruptible(ddev->waitq,
  470. + client->buffer_head != client->buffer_tail ||
  471. + !ddev->active);
  472. + if (status)
  473. + return status;
  474. +
  475. + if (!ddev->active)
  476. + return -ENODEV;
  477. + }
  478. +
  479. + // copy events one by one
  480. + while (read + sizeof(struct surface_dtx_event) <= count) {
  481. + spin_lock_irq(&client->buffer_lock);
  482. +
  483. + if (client->buffer_head == client->buffer_tail) {
  484. + spin_unlock_irq(&client->buffer_lock);
  485. + break;
  486. + }
  487. +
  488. + // get one event
  489. + event = client->buffer[client->buffer_tail];
  490. + client->buffer_tail = (client->buffer_tail + 1) & (DTX_CLIENT_BUF_SIZE - 1);
  491. + spin_unlock_irq(&client->buffer_lock);
  492. +
  493. + // copy to userspace
  494. + if (copy_to_user(buf, &event, sizeof(struct surface_dtx_event)))
  495. + return -EFAULT;
  496. +
  497. + read += sizeof(struct surface_dtx_event);
  498. + }
  499. +
  500. + return read;
  501. +}
  502. +
  503. +static __poll_t surface_dtx_poll(struct file *file, struct poll_table_struct *pt)
  504. +{
  505. + struct surface_dtx_client *client = file->private_data;
  506. + int mask;
  507. +
  508. + poll_wait(file, &client->ddev->waitq, pt);
  509. +
  510. + if (client->ddev->active)
  511. + mask = EPOLLOUT | EPOLLWRNORM;
  512. + else
  513. + mask = EPOLLHUP | EPOLLERR;
  514. +
  515. + if (client->buffer_head != client->buffer_tail)
  516. + mask |= EPOLLIN | EPOLLRDNORM;
  517. +
  518. + return mask;
  519. +}
  520. +
  521. +static int surface_dtx_fasync(int fd, struct file *file, int on)
  522. +{
  523. + struct surface_dtx_client *client = file->private_data;
  524. +
  525. + return fasync_helper(fd, file, on, &client->fasync);
  526. +}
  527. +
  528. +static long surface_dtx_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  529. +{
  530. + struct surface_dtx_client *client = file->private_data;
  531. + struct surface_dtx_dev *ddev = client->ddev;
  532. + int status;
  533. +
  534. + status = mutex_lock_interruptible(&ddev->mutex);
  535. + if (status)
  536. + return status;
  537. +
  538. + if (!ddev->active) {
  539. + mutex_unlock(&ddev->mutex);
  540. + return -ENODEV;
  541. + }
  542. +
  543. + switch (cmd) {
  544. + case DTX_CMD_LATCH_LOCK:
  545. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_LOCK);
  546. + break;
  547. +
  548. + case DTX_CMD_LATCH_UNLOCK:
  549. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_UNLOCK);
  550. + break;
  551. +
  552. + case DTX_CMD_LATCH_REQUEST:
  553. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_REQUEST);
  554. + break;
  555. +
  556. + case DTX_CMD_LATCH_OPEN:
  557. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_OPEN);
  558. + break;
  559. +
  560. + case DTX_CMD_GET_OPMODE:
  561. + status = dtx_cmd_get_opmode((int __user *)arg);
  562. + break;
  563. +
  564. + default:
  565. + status = -EINVAL;
  566. + break;
  567. + }
  568. +
  569. + mutex_unlock(&ddev->mutex);
  570. + return status;
  571. +}
  572. +
  573. +static const struct file_operations surface_dtx_fops = {
  574. + .owner = THIS_MODULE,
  575. + .open = surface_dtx_open,
  576. + .release = surface_dtx_release,
  577. + .read = surface_dtx_read,
  578. + .poll = surface_dtx_poll,
  579. + .fasync = surface_dtx_fasync,
  580. + .unlocked_ioctl = surface_dtx_ioctl,
  581. + .llseek = no_llseek,
  582. +};
  583. +
  584. +static struct surface_dtx_dev surface_dtx_dev = {
  585. + .mdev = {
  586. + .minor = MISC_DYNAMIC_MINOR,
  587. + .name = "surface_dtx",
  588. + .fops = &surface_dtx_fops,
  589. + },
  590. + .client_lock = __SPIN_LOCK_UNLOCKED(),
  591. + .input_lock = __SPIN_LOCK_UNLOCKED(),
  592. + .mutex = __MUTEX_INITIALIZER(surface_dtx_dev.mutex),
  593. + .active = false,
  594. +};
  595. +
  596. +
  597. +static void surface_dtx_push_event(struct surface_dtx_dev *ddev, struct surface_dtx_event *event)
  598. +{
  599. + struct surface_dtx_client *client;
  600. +
  601. + rcu_read_lock();
  602. + list_for_each_entry_rcu(client, &ddev->client_list, node) {
  603. + spin_lock(&client->buffer_lock);
  604. +
  605. + client->buffer[client->buffer_head++] = *event;
  606. + client->buffer_head &= DTX_CLIENT_BUF_SIZE - 1;
  607. +
  608. + if (unlikely(client->buffer_head == client->buffer_tail)) {
  609. + printk(DTX_WARN "event buffer overrun\n");
  610. + client->buffer_tail = (client->buffer_tail + 1) & (DTX_CLIENT_BUF_SIZE - 1);
  611. + }
  612. +
  613. + spin_unlock(&client->buffer_lock);
  614. +
  615. + kill_fasync(&client->fasync, SIGIO, POLL_IN);
  616. + }
  617. + rcu_read_unlock();
  618. +
  619. + wake_up_interruptible(&ddev->waitq);
  620. +}
  621. +
  622. +
  623. +static void surface_dtx_update_opmpde(struct surface_dtx_dev *ddev)
  624. +{
  625. + struct surface_dtx_event event;
  626. + int opmode;
  627. +
  628. + // get operation mode
  629. + opmode = surface_sam_query_opmpde();
  630. + if (opmode < 0)
  631. + printk(DTX_ERR "EC request failed with error %d\n", opmode);
  632. +
  633. + // send DTX event
  634. + event.type = 0x11;
  635. + event.code = 0x0D;
  636. + event.arg0 = opmode;
  637. + event.arg1 = 0x00;
  638. +
  639. + surface_dtx_push_event(ddev, &event);
  640. +
  641. + // send SW_TABLET_MODE event
  642. + spin_lock(&ddev->input_lock);
  643. + input_report_switch(ddev->input_dev, SW_TABLET_MODE, opmode != DTX_OPMODE_LAPTOP);
  644. + input_sync(ddev->input_dev);
  645. + spin_unlock(&ddev->input_lock);
  646. +}
  647. +
  648. +static int surface_dtx_evt_dtx(struct surface_sam_ssh_event *in_event, void *data)
  649. +{
  650. + struct surface_dtx_dev *ddev = data;
  651. + struct surface_dtx_event event;
  652. +
  653. + switch (in_event->cid) {
  654. + case SAM_EVENT_DTX_CID_CONNECTION:
  655. + case SAM_EVENT_DTX_CID_BUTTON:
  656. + case SAM_EVENT_DTX_CID_ERROR:
  657. + case SAM_EVENT_DTX_CID_LATCH_STATUS:
  658. + if (in_event->len > 2) {
  659. + printk(DTX_ERR "unexpected payload size (cid: %x, len: %u)\n",
  660. + in_event->cid, in_event->len);
  661. + return 0;
  662. + }
  663. +
  664. + event.type = in_event->tc;
  665. + event.code = in_event->cid;
  666. + event.arg0 = in_event->len >= 1 ? in_event->pld[0] : 0x00;
  667. + event.arg1 = in_event->len >= 2 ? in_event->pld[1] : 0x00;
  668. + surface_dtx_push_event(ddev, &event);
  669. + break;
  670. +
  671. + default:
  672. + printk(DTX_WARN "unhandled dtx event (cid: %x)\n", in_event->cid);
  673. + }
  674. +
  675. + // update device mode
  676. + if (in_event->cid == SAM_EVENT_DTX_CID_CONNECTION) {
  677. + if (in_event->pld[0]) {
  678. + // Note: we're already in a workqueue task
  679. + msleep(DTX_CONNECT_OPMODE_DELAY);
  680. + }
  681. +
  682. + surface_dtx_update_opmpde(ddev);
  683. + }
  684. +
  685. + return 0;
  686. +}
  687. +
  688. +static int surface_dtx_events_setup(struct surface_dtx_dev *ddev)
  689. +{
  690. + int status;
  691. +
  692. + status = surface_sam_ssh_set_event_handler(SAM_EVENT_DTX_RQID, surface_dtx_evt_dtx, ddev);
  693. + if (status)
  694. + goto err_handler;
  695. +
  696. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_DTX_TC, 0x01, SAM_EVENT_DTX_RQID);
  697. + if (status)
  698. + goto err_source;
  699. +
  700. + return 0;
  701. +
  702. +err_source:
  703. + surface_sam_ssh_remove_event_handler(SAM_EVENT_DTX_RQID);
  704. +err_handler:
  705. + return status;
  706. +}
  707. +
  708. +static void surface_dtx_events_disable(void)
  709. +{
  710. + surface_sam_ssh_disable_event_source(SAM_EVENT_DTX_TC, 0x01, SAM_EVENT_DTX_RQID);
  711. + surface_sam_ssh_remove_event_handler(SAM_EVENT_DTX_RQID);
  712. +}
  713. +
  714. +
  715. +static struct input_dev *surface_dtx_register_inputdev(struct platform_device *pdev)
  716. +{
  717. + struct input_dev *input_dev;
  718. + int status;
  719. +
  720. + input_dev = input_allocate_device();
  721. + if (!input_dev)
  722. + return ERR_PTR(-ENOMEM);
  723. +
  724. + input_dev->name = DTX_INPUT_NAME;
  725. + input_dev->dev.parent = &pdev->dev;
  726. + input_dev->id.bustype = BUS_VIRTUAL;
  727. + input_dev->id.vendor = USB_VENDOR_ID_MICROSOFT;
  728. + input_dev->id.product = USB_DEVICE_ID_MS_SURFACE_BASE_2_INTEGRATION;
  729. +
  730. + input_set_capability(input_dev, EV_SW, SW_TABLET_MODE);
  731. +
  732. + status = surface_sam_query_opmpde();
  733. + if (status < 0) {
  734. + input_free_device(input_dev);
  735. + return ERR_PTR(status);
  736. + }
  737. +
  738. + input_report_switch(input_dev, SW_TABLET_MODE, status != DTX_OPMODE_LAPTOP);
  739. +
  740. + status = input_register_device(input_dev);
  741. + if (status) {
  742. + input_unregister_device(input_dev);
  743. + return ERR_PTR(status);
  744. + }
  745. +
  746. + return input_dev;
  747. +}
  748. +
  749. +
  750. +static int surface_sam_dtx_probe(struct platform_device *pdev)
  751. +{
  752. + struct surface_dtx_dev *ddev = &surface_dtx_dev;
  753. + struct input_dev *input_dev;
  754. + int status;
  755. +
  756. + // link to ec
  757. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  758. + if (status)
  759. + return status == -ENXIO ? -EPROBE_DEFER : status;
  760. +
  761. + input_dev = surface_dtx_register_inputdev(pdev);
  762. + if (IS_ERR(input_dev))
  763. + return PTR_ERR(input_dev);
  764. +
  765. + // initialize device
  766. + mutex_lock(&ddev->mutex);
  767. + if (ddev->active) {
  768. + mutex_unlock(&ddev->mutex);
  769. + status = -ENODEV;
  770. + goto err_register;
  771. + }
  772. +
  773. + INIT_LIST_HEAD(&ddev->client_list);
  774. + init_waitqueue_head(&ddev->waitq);
  775. + ddev->active = true;
  776. + ddev->input_dev = input_dev;
  777. + mutex_unlock(&ddev->mutex);
  778. +
  779. + status = misc_register(&ddev->mdev);
  780. + if (status)
  781. + goto err_register;
  782. +
  783. + // enable events
  784. + status = surface_dtx_events_setup(ddev);
  785. + if (status)
  786. + goto err_events_setup;
  787. +
  788. + return 0;
  789. +
  790. +err_events_setup:
  791. + misc_deregister(&ddev->mdev);
  792. +err_register:
  793. + input_unregister_device(ddev->input_dev);
  794. + return status;
  795. +}
  796. +
  797. +static int surface_sam_dtx_remove(struct platform_device *pdev)
  798. +{
  799. + struct surface_dtx_dev *ddev = &surface_dtx_dev;
  800. + struct surface_dtx_client *client;
  801. +
  802. + mutex_lock(&ddev->mutex);
  803. + if (!ddev->active) {
  804. + mutex_unlock(&ddev->mutex);
  805. + return 0;
  806. + }
  807. +
  808. + // mark as inactive
  809. + ddev->active = false;
  810. + mutex_unlock(&ddev->mutex);
  811. +
  812. + // After this call we're guaranteed that no more input events will arive
  813. + surface_dtx_events_disable();
  814. +
  815. + // wake up clients
  816. + spin_lock(&ddev->client_lock);
  817. + list_for_each_entry(client, &ddev->client_list, node) {
  818. + kill_fasync(&client->fasync, SIGIO, POLL_HUP);
  819. + }
  820. + spin_unlock(&ddev->client_lock);
  821. +
  822. + wake_up_interruptible(&ddev->waitq);
  823. +
  824. + // unregister user-space devices
  825. + input_unregister_device(ddev->input_dev);
  826. + misc_deregister(&ddev->mdev);
  827. +
  828. + return 0;
  829. +}
  830. +
  831. +
  832. +static const struct acpi_device_id surface_sam_dtx_match[] = {
  833. + { "MSHW0133", 0 },
  834. + { },
  835. +};
  836. +MODULE_DEVICE_TABLE(acpi, surface_sam_dtx_match);
  837. +
  838. +static struct platform_driver surface_sam_dtx = {
  839. + .probe = surface_sam_dtx_probe,
  840. + .remove = surface_sam_dtx_remove,
  841. + .driver = {
  842. + .name = "surface_sam_dtx",
  843. + .acpi_match_table = ACPI_PTR(surface_sam_dtx_match),
  844. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  845. + },
  846. +};
  847. +module_platform_driver(surface_sam_dtx);
  848. +
  849. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  850. +MODULE_DESCRIPTION("Surface Detachment System (DTX) Driver for 5th Generation Surface Devices");
  851. +MODULE_LICENSE("GPL v2");
  852. diff --git a/drivers/platform/x86/surface_sam/surface_sam_hps.c b/drivers/platform/x86/surface_sam/surface_sam_hps.c
  853. new file mode 100644
  854. index 000000000000..4fba5ee75a66
  855. --- /dev/null
  856. +++ b/drivers/platform/x86/surface_sam/surface_sam_hps.c
  857. @@ -0,0 +1,1110 @@
  858. +// SPDX-License-Identifier: GPL-2.0
  859. +/*
  860. + * Surface dGPU hot-plug system driver.
  861. + * Supports explicit setting of the dGPU power-state on the Surface Book 2 and
  862. + * properly handles hot-plugging by detaching the base.
  863. + */
  864. +
  865. +#include <linux/acpi.h>
  866. +#include <linux/delay.h>
  867. +#include <linux/gpio.h>
  868. +#include <linux/kernel.h>
  869. +#include <linux/module.h>
  870. +#include <linux/mutex.h>
  871. +#include <linux/pci.h>
  872. +#include <linux/platform_device.h>
  873. +#include <linux/sysfs.h>
  874. +
  875. +#include "surface_sam_ssh.h"
  876. +#include "surface_sam_san.h"
  877. +
  878. +
  879. +// TODO: vgaswitcheroo integration
  880. +
  881. +
  882. +static void dbg_dump_drvsta(struct platform_device *pdev, const char *prefix);
  883. +
  884. +
  885. +#define SHPS_DSM_REVISION 1
  886. +#define SHPS_DSM_GPU_ADDRS 0x02
  887. +#define SHPS_DSM_GPU_POWER 0x05
  888. +static const guid_t SHPS_DSM_UUID =
  889. + GUID_INIT(0x5515a847, 0xed55, 0x4b27, 0x83, 0x52, 0xcd,
  890. + 0x32, 0x0e, 0x10, 0x36, 0x0a);
  891. +
  892. +
  893. +#define SAM_DGPU_TC 0x13
  894. +#define SAM_DGPU_CID_POWERON 0x02
  895. +
  896. +#define SAM_DTX_TC 0x11
  897. +#define SAM_DTX_CID_LATCH_LOCK 0x06
  898. +#define SAM_DTX_CID_LATCH_UNLOCK 0x07
  899. +
  900. +#define SHPS_DSM_GPU_ADDRS_RP "RP5_PCIE"
  901. +#define SHPS_DSM_GPU_ADDRS_DGPU "DGPU_PCIE"
  902. +
  903. +
  904. +static const struct acpi_gpio_params gpio_base_presence_int = { 0, 0, false };
  905. +static const struct acpi_gpio_params gpio_base_presence = { 1, 0, false };
  906. +static const struct acpi_gpio_params gpio_dgpu_power_int = { 2, 0, false };
  907. +static const struct acpi_gpio_params gpio_dgpu_power = { 3, 0, false };
  908. +static const struct acpi_gpio_params gpio_dgpu_presence_int = { 4, 0, false };
  909. +static const struct acpi_gpio_params gpio_dgpu_presence = { 5, 0, false };
  910. +
  911. +static const struct acpi_gpio_mapping shps_acpi_gpios[] = {
  912. + { "base_presence-int-gpio", &gpio_base_presence_int, 1 },
  913. + { "base_presence-gpio", &gpio_base_presence, 1 },
  914. + { "dgpu_power-int-gpio", &gpio_dgpu_power_int, 1 },
  915. + { "dgpu_power-gpio", &gpio_dgpu_power, 1 },
  916. + { "dgpu_presence-int-gpio", &gpio_dgpu_presence_int, 1 },
  917. + { "dgpu_presence-gpio", &gpio_dgpu_presence, 1 },
  918. + { },
  919. +};
  920. +
  921. +
  922. +enum shps_dgpu_power {
  923. + SHPS_DGPU_POWER_OFF = 0,
  924. + SHPS_DGPU_POWER_ON = 1,
  925. + SHPS_DGPU_POWER_UNKNOWN = 2,
  926. +};
  927. +
  928. +static const char *shps_dgpu_power_str(enum shps_dgpu_power power)
  929. +{
  930. + if (power == SHPS_DGPU_POWER_OFF)
  931. + return "off";
  932. + else if (power == SHPS_DGPU_POWER_ON)
  933. + return "on";
  934. + else if (power == SHPS_DGPU_POWER_UNKNOWN)
  935. + return "unknown";
  936. + else
  937. + return "<invalid>";
  938. +}
  939. +
  940. +
  941. +struct shps_driver_data {
  942. + struct mutex lock;
  943. + struct pci_dev *dgpu_root_port;
  944. + struct pci_saved_state *dgpu_root_port_state;
  945. + struct gpio_desc *gpio_dgpu_power;
  946. + struct gpio_desc *gpio_dgpu_presence;
  947. + struct gpio_desc *gpio_base_presence;
  948. + unsigned int irq_dgpu_presence;
  949. + unsigned int irq_base_presence;
  950. + unsigned long state;
  951. +};
  952. +
  953. +#define SHPS_STATE_BIT_PWRTGT 0 /* desired power state: 1 for on, 0 for off */
  954. +#define SHPS_STATE_BIT_RPPWRON_SYNC 1 /* synchronous/requested power-up in progress */
  955. +#define SHPS_STATE_BIT_WAKE_ENABLED 2 /* wakeup via base-presence GPIO enabled */
  956. +
  957. +
  958. +#define SHPS_DGPU_PARAM_PERM 0644
  959. +
  960. +enum shps_dgpu_power_mp {
  961. + SHPS_DGPU_MP_POWER_OFF = SHPS_DGPU_POWER_OFF,
  962. + SHPS_DGPU_MP_POWER_ON = SHPS_DGPU_POWER_ON,
  963. + SHPS_DGPU_MP_POWER_ASIS = -1,
  964. +
  965. + __SHPS_DGPU_MP_POWER_START = -1,
  966. + __SHPS_DGPU_MP_POWER_END = 1,
  967. +};
  968. +
  969. +static int param_dgpu_power_set(const char *val, const struct kernel_param *kp)
  970. +{
  971. + int power = SHPS_DGPU_MP_POWER_OFF;
  972. + int status;
  973. +
  974. + status = kstrtoint(val, 0, &power);
  975. + if (status)
  976. + return status;
  977. +
  978. + if (power < __SHPS_DGPU_MP_POWER_START || power > __SHPS_DGPU_MP_POWER_END)
  979. + return -EINVAL;
  980. +
  981. + return param_set_int(val, kp);
  982. +}
  983. +
  984. +static const struct kernel_param_ops param_dgpu_power_ops = {
  985. + .set = param_dgpu_power_set,
  986. + .get = param_get_int,
  987. +};
  988. +
  989. +static int param_dgpu_power_init = SHPS_DGPU_MP_POWER_OFF;
  990. +static int param_dgpu_power_exit = SHPS_DGPU_MP_POWER_ON;
  991. +static int param_dgpu_power_susp = SHPS_DGPU_MP_POWER_ASIS;
  992. +static bool param_dtx_latch = true;
  993. +
  994. +module_param_cb(dgpu_power_init, &param_dgpu_power_ops, &param_dgpu_power_init, SHPS_DGPU_PARAM_PERM);
  995. +module_param_cb(dgpu_power_exit, &param_dgpu_power_ops, &param_dgpu_power_exit, SHPS_DGPU_PARAM_PERM);
  996. +module_param_cb(dgpu_power_susp, &param_dgpu_power_ops, &param_dgpu_power_susp, SHPS_DGPU_PARAM_PERM);
  997. +module_param_named(dtx_latch, param_dtx_latch, bool, SHPS_DGPU_PARAM_PERM);
  998. +
  999. +MODULE_PARM_DESC(dgpu_power_init, "dGPU power state to be set on init (0: off / 1: on / 2: as-is, default: off)");
  1000. +MODULE_PARM_DESC(dgpu_power_exit, "dGPU power state to be set on exit (0: off / 1: on / 2: as-is, default: on)");
  1001. +MODULE_PARM_DESC(dgpu_power_susp, "dGPU power state to be set on exit (0: off / 1: on / 2: as-is, default: as-is)");
  1002. +MODULE_PARM_DESC(dtx_latch, "lock/unlock DTX base latch in accordance to power-state (Y/n)");
  1003. +
  1004. +
  1005. +static int dtx_cmd_simple(u8 cid)
  1006. +{
  1007. + struct surface_sam_ssh_rqst rqst = {
  1008. + .tc = SAM_DTX_TC,
  1009. + .cid = cid,
  1010. + .iid = 0,
  1011. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  1012. + .snc = 0,
  1013. + .cdl = 0,
  1014. + .pld = NULL,
  1015. + };
  1016. +
  1017. + return surface_sam_ssh_rqst(&rqst, NULL);
  1018. +}
  1019. +
  1020. +static inline int shps_dtx_latch_lock(void)
  1021. +{
  1022. + return dtx_cmd_simple(SAM_DTX_CID_LATCH_LOCK);
  1023. +}
  1024. +
  1025. +static inline int shps_dtx_latch_unlock(void)
  1026. +{
  1027. + return dtx_cmd_simple(SAM_DTX_CID_LATCH_UNLOCK);
  1028. +}
  1029. +
  1030. +
  1031. +static int shps_dgpu_dsm_get_pci_addr(struct platform_device *pdev, const char *entry)
  1032. +{
  1033. + acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  1034. + union acpi_object *result;
  1035. + union acpi_object *e0;
  1036. + union acpi_object *e1;
  1037. + union acpi_object *e2;
  1038. + u64 device_addr = 0;
  1039. + u8 bus, dev, fun;
  1040. + int i;
  1041. +
  1042. + result = acpi_evaluate_dsm_typed(handle, &SHPS_DSM_UUID, SHPS_DSM_REVISION,
  1043. + SHPS_DSM_GPU_ADDRS, NULL, ACPI_TYPE_PACKAGE);
  1044. +
  1045. + if (IS_ERR_OR_NULL(result))
  1046. + return result ? PTR_ERR(result) : -EIO;
  1047. +
  1048. + // three entries per device: name, address, <integer>
  1049. + for (i = 0; i + 2 < result->package.count; i += 3) {
  1050. + e0 = &result->package.elements[i];
  1051. + e1 = &result->package.elements[i + 1];
  1052. + e2 = &result->package.elements[i + 2];
  1053. +
  1054. + if (e0->type != ACPI_TYPE_STRING) {
  1055. + ACPI_FREE(result);
  1056. + return -EIO;
  1057. + }
  1058. +
  1059. + if (e1->type != ACPI_TYPE_INTEGER) {
  1060. + ACPI_FREE(result);
  1061. + return -EIO;
  1062. + }
  1063. +
  1064. + if (e2->type != ACPI_TYPE_INTEGER) {
  1065. + ACPI_FREE(result);
  1066. + return -EIO;
  1067. + }
  1068. +
  1069. + if (strncmp(e0->string.pointer, entry, 64) == 0)
  1070. + device_addr = e1->integer.value;
  1071. + }
  1072. +
  1073. + ACPI_FREE(result);
  1074. + if (device_addr == 0)
  1075. + return -ENODEV;
  1076. +
  1077. + // convert address
  1078. + bus = (device_addr & 0x0FF00000) >> 20;
  1079. + dev = (device_addr & 0x000F8000) >> 15;
  1080. + fun = (device_addr & 0x00007000) >> 12;
  1081. +
  1082. + return bus << 8 | PCI_DEVFN(dev, fun);
  1083. +}
  1084. +
  1085. +static struct pci_dev *shps_dgpu_dsm_get_pci_dev(struct platform_device *pdev, const char *entry)
  1086. +{
  1087. + struct pci_dev *dev;
  1088. + int addr;
  1089. +
  1090. + addr = shps_dgpu_dsm_get_pci_addr(pdev, entry);
  1091. + if (addr < 0)
  1092. + return ERR_PTR(addr);
  1093. +
  1094. + dev = pci_get_domain_bus_and_slot(0, (addr & 0xFF00) >> 8, addr & 0xFF);
  1095. + return dev ? dev : ERR_PTR(-ENODEV);
  1096. +}
  1097. +
  1098. +
  1099. +static int shps_dgpu_dsm_get_power_unlocked(struct platform_device *pdev)
  1100. +{
  1101. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1102. + struct gpio_desc *gpio = drvdata->gpio_dgpu_power;
  1103. + int status;
  1104. +
  1105. + status = gpiod_get_value_cansleep(gpio);
  1106. + if (status < 0)
  1107. + return status;
  1108. +
  1109. + return status == 0 ? SHPS_DGPU_POWER_OFF : SHPS_DGPU_POWER_ON;
  1110. +}
  1111. +
  1112. +static int shps_dgpu_dsm_get_power(struct platform_device *pdev)
  1113. +{
  1114. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1115. + int status;
  1116. +
  1117. + mutex_lock(&drvdata->lock);
  1118. + status = shps_dgpu_dsm_get_power_unlocked(pdev);
  1119. + mutex_unlock(&drvdata->lock);
  1120. +
  1121. + return status;
  1122. +}
  1123. +
  1124. +static int __shps_dgpu_dsm_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1125. +{
  1126. + acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  1127. + union acpi_object *result;
  1128. + union acpi_object param;
  1129. +
  1130. + dev_info(&pdev->dev, "setting dGPU direct power to \'%s\'\n", shps_dgpu_power_str(power));
  1131. +
  1132. + param.type = ACPI_TYPE_INTEGER;
  1133. + param.integer.value = power == SHPS_DGPU_POWER_ON;
  1134. +
  1135. + result = acpi_evaluate_dsm_typed(handle, &SHPS_DSM_UUID, SHPS_DSM_REVISION,
  1136. + SHPS_DSM_GPU_POWER, &param, ACPI_TYPE_BUFFER);
  1137. +
  1138. + if (IS_ERR_OR_NULL(result))
  1139. + return result ? PTR_ERR(result) : -EIO;
  1140. +
  1141. + // check for the expected result
  1142. + if (result->buffer.length != 1 || result->buffer.pointer[0] != 0) {
  1143. + ACPI_FREE(result);
  1144. + return -EIO;
  1145. + }
  1146. +
  1147. + ACPI_FREE(result);
  1148. + return 0;
  1149. +}
  1150. +
  1151. +static int shps_dgpu_dsm_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1152. +{
  1153. + int status;
  1154. +
  1155. + if (power != SHPS_DGPU_POWER_ON && power != SHPS_DGPU_POWER_OFF)
  1156. + return -EINVAL;
  1157. +
  1158. + status = shps_dgpu_dsm_get_power_unlocked(pdev);
  1159. + if (status < 0)
  1160. + return status;
  1161. + if (status == power)
  1162. + return 0;
  1163. +
  1164. + return __shps_dgpu_dsm_set_power_unlocked(pdev, power);
  1165. +}
  1166. +
  1167. +static int shps_dgpu_dsm_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1168. +{
  1169. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1170. + int status;
  1171. +
  1172. + mutex_lock(&drvdata->lock);
  1173. + status = shps_dgpu_dsm_set_power_unlocked(pdev, power);
  1174. + mutex_unlock(&drvdata->lock);
  1175. +
  1176. + return status;
  1177. +}
  1178. +
  1179. +
  1180. +static bool shps_rp_link_up(struct pci_dev *rp)
  1181. +{
  1182. + u16 lnksta = 0, sltsta = 0;
  1183. +
  1184. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA, &lnksta);
  1185. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA, &sltsta);
  1186. +
  1187. + return (lnksta & PCI_EXP_LNKSTA_DLLLA) || (sltsta & PCI_EXP_SLTSTA_PDS);
  1188. +}
  1189. +
  1190. +
  1191. +static int shps_dgpu_rp_get_power_unlocked(struct platform_device *pdev)
  1192. +{
  1193. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1194. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1195. +
  1196. + if (rp->current_state == PCI_D3hot || rp->current_state == PCI_D3cold)
  1197. + return SHPS_DGPU_POWER_OFF;
  1198. + else if (rp->current_state == PCI_UNKNOWN || rp->current_state == PCI_POWER_ERROR)
  1199. + return SHPS_DGPU_POWER_UNKNOWN;
  1200. + else
  1201. + return SHPS_DGPU_POWER_ON;
  1202. +}
  1203. +
  1204. +static int shps_dgpu_rp_get_power(struct platform_device *pdev)
  1205. +{
  1206. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1207. + int status;
  1208. +
  1209. + mutex_lock(&drvdata->lock);
  1210. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1211. + mutex_unlock(&drvdata->lock);
  1212. +
  1213. + return status;
  1214. +}
  1215. +
  1216. +static int __shps_dgpu_rp_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1217. +{
  1218. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1219. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1220. + int status, i;
  1221. +
  1222. + dev_info(&pdev->dev, "setting dGPU power state to \'%s\'\n", shps_dgpu_power_str(power));
  1223. +
  1224. + dbg_dump_drvsta(pdev, "__shps_dgpu_rp_set_power_unlocked.1");
  1225. + if (power == SHPS_DGPU_POWER_ON) {
  1226. + set_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state);
  1227. + pci_set_power_state(rp, PCI_D0);
  1228. +
  1229. + if (drvdata->dgpu_root_port_state)
  1230. + pci_load_and_free_saved_state(rp, &drvdata->dgpu_root_port_state);
  1231. +
  1232. + pci_restore_state(rp);
  1233. +
  1234. + if (!pci_is_enabled(rp))
  1235. + pci_enable_device(rp);
  1236. +
  1237. + pci_set_master(rp);
  1238. + clear_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state);
  1239. +
  1240. + set_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1241. + } else {
  1242. + if (!drvdata->dgpu_root_port_state) {
  1243. + pci_save_state(rp);
  1244. + drvdata->dgpu_root_port_state = pci_store_saved_state(rp);
  1245. + }
  1246. +
  1247. + /*
  1248. + * To properly update the hot-plug system we need to "remove" the dGPU
  1249. + * before disabling it and sending it to D3cold. Following this, we
  1250. + * need to wait for the link and slot status to actually change.
  1251. + */
  1252. + status = shps_dgpu_dsm_set_power_unlocked(pdev, SHPS_DGPU_POWER_OFF);
  1253. + if (status)
  1254. + return status;
  1255. +
  1256. + for (i = 0; i < 20 && shps_rp_link_up(rp); i++)
  1257. + msleep(50);
  1258. +
  1259. + if (shps_rp_link_up(rp))
  1260. + dev_err(&pdev->dev, "dGPU removal via DSM timed out\n");
  1261. +
  1262. + pci_clear_master(rp);
  1263. +
  1264. + if (pci_is_enabled(rp))
  1265. + pci_disable_device(rp);
  1266. +
  1267. + pci_set_power_state(rp, PCI_D3cold);
  1268. +
  1269. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1270. + }
  1271. + dbg_dump_drvsta(pdev, "__shps_dgpu_rp_set_power_unlocked.2");
  1272. +
  1273. + return 0;
  1274. +}
  1275. +
  1276. +static int shps_dgpu_rp_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1277. +{
  1278. + int status;
  1279. +
  1280. + if (power != SHPS_DGPU_POWER_ON && power != SHPS_DGPU_POWER_OFF)
  1281. + return -EINVAL;
  1282. +
  1283. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1284. + if (status < 0)
  1285. + return status;
  1286. + if (status == power)
  1287. + return 0;
  1288. +
  1289. + return __shps_dgpu_rp_set_power_unlocked(pdev, power);
  1290. +}
  1291. +
  1292. +static int shps_dgpu_rp_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1293. +{
  1294. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1295. + int status;
  1296. +
  1297. + mutex_lock(&drvdata->lock);
  1298. + status = shps_dgpu_rp_set_power_unlocked(pdev, power);
  1299. + mutex_unlock(&drvdata->lock);
  1300. +
  1301. + return status;
  1302. +}
  1303. +
  1304. +
  1305. +static int shps_dgpu_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1306. +{
  1307. + int status;
  1308. +
  1309. + if (!param_dtx_latch)
  1310. + return shps_dgpu_rp_set_power(pdev, power);
  1311. +
  1312. + if (power == SHPS_DGPU_POWER_ON) {
  1313. + status = shps_dtx_latch_lock();
  1314. + if (status)
  1315. + return status;
  1316. +
  1317. + status = shps_dgpu_rp_set_power(pdev, power);
  1318. + if (status)
  1319. + shps_dtx_latch_unlock();
  1320. +
  1321. + } else {
  1322. + status = shps_dgpu_rp_set_power(pdev, power);
  1323. + if (status)
  1324. + return status;
  1325. +
  1326. + status = shps_dtx_latch_unlock();
  1327. + }
  1328. +
  1329. + return status;
  1330. +}
  1331. +
  1332. +
  1333. +static int shps_dgpu_is_present(struct platform_device *pdev)
  1334. +{
  1335. + struct shps_driver_data *drvdata;
  1336. +
  1337. + drvdata = platform_get_drvdata(pdev);
  1338. + return gpiod_get_value_cansleep(drvdata->gpio_dgpu_presence);
  1339. +}
  1340. +
  1341. +
  1342. +static ssize_t dgpu_power_show(struct device *dev, struct device_attribute *attr, char *data)
  1343. +{
  1344. + struct platform_device *pdev = to_platform_device(dev);
  1345. + int power = shps_dgpu_rp_get_power(pdev);
  1346. +
  1347. + if (power < 0)
  1348. + return power;
  1349. +
  1350. + return sprintf(data, "%s\n", shps_dgpu_power_str(power));
  1351. +}
  1352. +
  1353. +static ssize_t dgpu_power_store(struct device *dev, struct device_attribute *attr,
  1354. + const char *data, size_t count)
  1355. +{
  1356. + struct platform_device *pdev = to_platform_device(dev);
  1357. + enum shps_dgpu_power power;
  1358. + bool b = false;
  1359. + int status;
  1360. +
  1361. + status = kstrtobool(data, &b);
  1362. + if (status)
  1363. + return status;
  1364. +
  1365. + status = shps_dgpu_is_present(pdev);
  1366. + if (status <= 0)
  1367. + return status < 0 ? status : -EPERM;
  1368. +
  1369. + power = b ? SHPS_DGPU_POWER_ON : SHPS_DGPU_POWER_OFF;
  1370. + status = shps_dgpu_set_power(pdev, power);
  1371. +
  1372. + return status < 0 ? status : count;
  1373. +}
  1374. +
  1375. +static ssize_t dgpu_power_dsm_show(struct device *dev, struct device_attribute *attr, char *data)
  1376. +{
  1377. + struct platform_device *pdev = to_platform_device(dev);
  1378. + int power = shps_dgpu_dsm_get_power(pdev);
  1379. +
  1380. + if (power < 0)
  1381. + return power;
  1382. +
  1383. + return sprintf(data, "%s\n", shps_dgpu_power_str(power));
  1384. +}
  1385. +
  1386. +static ssize_t dgpu_power_dsm_store(struct device *dev, struct device_attribute *attr,
  1387. + const char *data, size_t count)
  1388. +{
  1389. + struct platform_device *pdev = to_platform_device(dev);
  1390. + enum shps_dgpu_power power;
  1391. + bool b = false;
  1392. + int status;
  1393. +
  1394. + status = kstrtobool(data, &b);
  1395. + if (status)
  1396. + return status;
  1397. +
  1398. + status = shps_dgpu_is_present(pdev);
  1399. + if (status <= 0)
  1400. + return status < 0 ? status : -EPERM;
  1401. +
  1402. + power = b ? SHPS_DGPU_POWER_ON : SHPS_DGPU_POWER_OFF;
  1403. + status = shps_dgpu_dsm_set_power(pdev, power);
  1404. +
  1405. + return status < 0 ? status : count;
  1406. +}
  1407. +
  1408. +static DEVICE_ATTR_RW(dgpu_power);
  1409. +static DEVICE_ATTR_RW(dgpu_power_dsm);
  1410. +
  1411. +static struct attribute *shps_power_attrs[] = {
  1412. + &dev_attr_dgpu_power.attr,
  1413. + &dev_attr_dgpu_power_dsm.attr,
  1414. + NULL,
  1415. +};
  1416. +ATTRIBUTE_GROUPS(shps_power);
  1417. +
  1418. +
  1419. +static void dbg_dump_power_states(struct platform_device *pdev, const char *prefix)
  1420. +{
  1421. + enum shps_dgpu_power power_dsm;
  1422. + enum shps_dgpu_power power_rp;
  1423. + int status;
  1424. +
  1425. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1426. + if (status < 0)
  1427. + dev_err(&pdev->dev, "%s: failed to get root-port power state: %d\n", prefix, status);
  1428. + power_rp = status;
  1429. +
  1430. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1431. + if (status < 0)
  1432. + dev_err(&pdev->dev, "%s: failed to get direct power state: %d\n", prefix, status);
  1433. + power_dsm = status;
  1434. +
  1435. + dev_dbg(&pdev->dev, "%s: root-port power state: %d\n", prefix, power_rp);
  1436. + dev_dbg(&pdev->dev, "%s: direct power state: %d\n", prefix, power_dsm);
  1437. +}
  1438. +
  1439. +static void dbg_dump_pciesta(struct platform_device *pdev, const char *prefix)
  1440. +{
  1441. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1442. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1443. + u16 lnksta, lnksta2, sltsta, sltsta2;
  1444. +
  1445. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA, &lnksta);
  1446. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA2, &lnksta2);
  1447. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA, &sltsta);
  1448. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA2, &sltsta2);
  1449. +
  1450. + dev_dbg(&pdev->dev, "%s: LNKSTA: 0x%04x", prefix, lnksta);
  1451. + dev_dbg(&pdev->dev, "%s: LNKSTA2: 0x%04x", prefix, lnksta2);
  1452. + dev_dbg(&pdev->dev, "%s: SLTSTA: 0x%04x", prefix, sltsta);
  1453. + dev_dbg(&pdev->dev, "%s: SLTSTA2: 0x%04x", prefix, sltsta2);
  1454. +}
  1455. +
  1456. +static void dbg_dump_drvsta(struct platform_device *pdev, const char *prefix)
  1457. +{
  1458. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1459. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1460. +
  1461. + dev_dbg(&pdev->dev, "%s: RP power: %d", prefix, rp->current_state);
  1462. + dev_dbg(&pdev->dev, "%s: RP state saved: %d", prefix, rp->state_saved);
  1463. + dev_dbg(&pdev->dev, "%s: RP state stored: %d", prefix, !!drvdata->dgpu_root_port_state);
  1464. + dev_dbg(&pdev->dev, "%s: RP enabled: %d", prefix, atomic_read(&rp->enable_cnt));
  1465. + dev_dbg(&pdev->dev, "%s: RP mastered: %d", prefix, rp->is_busmaster);
  1466. +}
  1467. +
  1468. +
  1469. +static int shps_pm_prepare(struct device *dev)
  1470. +{
  1471. + struct platform_device *pdev = to_platform_device(dev);
  1472. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1473. + bool pwrtgt;
  1474. + int status = 0;
  1475. +
  1476. + dbg_dump_power_states(pdev, "shps_pm_prepare");
  1477. +
  1478. + if (param_dgpu_power_susp != SHPS_DGPU_MP_POWER_ASIS) {
  1479. + pwrtgt = test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1480. +
  1481. + status = shps_dgpu_set_power(pdev, param_dgpu_power_susp);
  1482. + if (status) {
  1483. + dev_err(&pdev->dev, "failed to power %s dGPU: %d\n",
  1484. + param_dgpu_power_susp == SHPS_DGPU_MP_POWER_OFF ? "off" : "on",
  1485. + status);
  1486. + return status;
  1487. + }
  1488. +
  1489. + if (pwrtgt)
  1490. + set_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1491. + else
  1492. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1493. + }
  1494. +
  1495. + return 0;
  1496. +}
  1497. +
  1498. +static void shps_pm_complete(struct device *dev)
  1499. +{
  1500. + struct platform_device *pdev = to_platform_device(dev);
  1501. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1502. + int status;
  1503. +
  1504. + dbg_dump_power_states(pdev, "shps_pm_complete");
  1505. + dbg_dump_pciesta(pdev, "shps_pm_complete");
  1506. + dbg_dump_drvsta(pdev, "shps_pm_complete.1");
  1507. +
  1508. + // update power target, dGPU may have been detached while suspended
  1509. + status = shps_dgpu_is_present(pdev);
  1510. + if (status < 0) {
  1511. + dev_err(&pdev->dev, "failed to get dGPU presence: %d\n", status);
  1512. + return;
  1513. + } else if (status == 0) {
  1514. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1515. + }
  1516. +
  1517. + /*
  1518. + * During resume, the PCIe core will power on the root-port, which in turn
  1519. + * will power on the dGPU. Most of the state synchronization is already
  1520. + * handled via the SAN RQSG handler, so it is in a fully consistent
  1521. + * on-state here. If requested, turn it off here.
  1522. + *
  1523. + * As there seem to be some synchronization issues turning off the dGPU
  1524. + * directly after the power-on SAN RQSG notification during the resume
  1525. + * process, let's do this here.
  1526. + *
  1527. + * TODO/FIXME:
  1528. + * This does not combat unhandled power-ons when the device is not fully
  1529. + * resumed, i.e. re-suspended before shps_pm_complete is called. Those
  1530. + * should normally not be an issue, but the dGPU does get hot even though
  1531. + * it is suspended, so ideally we want to keep it off.
  1532. + */
  1533. + if (!test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state)) {
  1534. + status = shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_OFF);
  1535. + if (status)
  1536. + dev_err(&pdev->dev, "failed to power-off dGPU: %d\n", status);
  1537. + }
  1538. +
  1539. + dbg_dump_drvsta(pdev, "shps_pm_complete.2");
  1540. +}
  1541. +
  1542. +static int shps_pm_suspend(struct device *dev)
  1543. +{
  1544. + struct platform_device *pdev = to_platform_device(dev);
  1545. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1546. + int status;
  1547. +
  1548. + if (device_may_wakeup(dev)) {
  1549. + status = enable_irq_wake(drvdata->irq_base_presence);
  1550. + if (status)
  1551. + return status;
  1552. +
  1553. + set_bit(SHPS_STATE_BIT_WAKE_ENABLED, &drvdata->state);
  1554. + }
  1555. +
  1556. + return 0;
  1557. +}
  1558. +
  1559. +static int shps_pm_resume(struct device *dev)
  1560. +{
  1561. + struct platform_device *pdev = to_platform_device(dev);
  1562. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1563. + int status = 0;
  1564. +
  1565. + if (test_and_clear_bit(SHPS_STATE_BIT_WAKE_ENABLED, &drvdata->state))
  1566. + status = disable_irq_wake(drvdata->irq_base_presence);
  1567. +
  1568. + return status;
  1569. +}
  1570. +
  1571. +static void shps_shutdown(struct platform_device *pdev)
  1572. +{
  1573. + int status;
  1574. +
  1575. + /*
  1576. + * Turn on dGPU before shutting down. This allows the core drivers to
  1577. + * properly shut down the device. If we don't do this, the pcieport driver
  1578. + * will complain that the device has already been disabled.
  1579. + */
  1580. + status = shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_ON);
  1581. + if (status)
  1582. + dev_err(&pdev->dev, "failed to turn on dGPU: %d\n", status);
  1583. +}
  1584. +
  1585. +static int shps_dgpu_detached(struct platform_device *pdev)
  1586. +{
  1587. + dbg_dump_power_states(pdev, "shps_dgpu_detached");
  1588. + return shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_OFF);
  1589. +}
  1590. +
  1591. +static int shps_dgpu_attached(struct platform_device *pdev)
  1592. +{
  1593. + dbg_dump_power_states(pdev, "shps_dgpu_attached");
  1594. + return 0;
  1595. +}
  1596. +
  1597. +static int shps_dgpu_powered_on(struct platform_device *pdev)
  1598. +{
  1599. + /*
  1600. + * This function gets called directly after a power-state transition of
  1601. + * the dGPU root port out of D3cold state, indicating a power-on of the
  1602. + * dGPU. Specifically, this function is called from the RQSG handler of
  1603. + * SAN, invoked by the ACPI _ON method of the dGPU root port. This means
  1604. + * that this function is run inside `pci_set_power_state(rp, ...)`
  1605. + * syncrhonously and thus returns before the `pci_set_power_state` call
  1606. + * does.
  1607. + *
  1608. + * `pci_set_power_state` may either be called by us or when the PCI
  1609. + * subsystem decides to power up the root port (e.g. during resume). Thus
  1610. + * we should use this function to ensure that the dGPU and root port
  1611. + * states are consistent when an unexpected power-up is encountered.
  1612. + */
  1613. +
  1614. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1615. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1616. + int status;
  1617. +
  1618. + dbg_dump_drvsta(pdev, "shps_dgpu_powered_on.1");
  1619. +
  1620. + // if we caused the root port to power-on, return
  1621. + if (test_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state))
  1622. + return 0;
  1623. +
  1624. + // if dGPU is not present, force power-target to off and return
  1625. + status = shps_dgpu_is_present(pdev);
  1626. + if (status == 0)
  1627. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1628. + if (status <= 0)
  1629. + return status;
  1630. +
  1631. + mutex_lock(&drvdata->lock);
  1632. +
  1633. + dbg_dump_power_states(pdev, "shps_dgpu_powered_on.1");
  1634. + dbg_dump_pciesta(pdev, "shps_dgpu_powered_on.1");
  1635. + if (drvdata->dgpu_root_port_state)
  1636. + pci_load_and_free_saved_state(rp, &drvdata->dgpu_root_port_state);
  1637. + pci_restore_state(rp);
  1638. + if (!pci_is_enabled(rp))
  1639. + pci_enable_device(rp);
  1640. + pci_set_master(rp);
  1641. + dbg_dump_drvsta(pdev, "shps_dgpu_powered_on.2");
  1642. + dbg_dump_power_states(pdev, "shps_dgpu_powered_on.2");
  1643. + dbg_dump_pciesta(pdev, "shps_dgpu_powered_on.2");
  1644. +
  1645. + mutex_unlock(&drvdata->lock);
  1646. +
  1647. + if (!test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state)) {
  1648. + dev_warn(&pdev->dev, "unexpected dGPU power-on detected");
  1649. + // TODO: schedule state re-check and update
  1650. + }
  1651. +
  1652. + return 0;
  1653. +}
  1654. +
  1655. +
  1656. +static int shps_dgpu_handle_rqsg(struct surface_sam_san_rqsg *rqsg, void *data)
  1657. +{
  1658. + struct platform_device *pdev = data;
  1659. +
  1660. + if (rqsg->tc == SAM_DGPU_TC && rqsg->cid == SAM_DGPU_CID_POWERON)
  1661. + return shps_dgpu_powered_on(pdev);
  1662. +
  1663. + dev_warn(&pdev->dev, "unimplemented dGPU request: RQSG(0x%02x, 0x%02x, 0x%02x)",
  1664. + rqsg->tc, rqsg->cid, rqsg->iid);
  1665. + return 0;
  1666. +}
  1667. +
  1668. +static irqreturn_t shps_dgpu_presence_irq(int irq, void *data)
  1669. +{
  1670. + struct platform_device *pdev = data;
  1671. + bool dgpu_present;
  1672. + int status;
  1673. +
  1674. + status = shps_dgpu_is_present(pdev);
  1675. + if (status < 0) {
  1676. + dev_err(&pdev->dev, "failed to check physical dGPU presence: %d\n", status);
  1677. + return IRQ_HANDLED;
  1678. + }
  1679. +
  1680. + dgpu_present = status != 0;
  1681. + dev_info(&pdev->dev, "dGPU physically %s\n", dgpu_present ? "attached" : "detached");
  1682. +
  1683. + if (dgpu_present)
  1684. + status = shps_dgpu_attached(pdev);
  1685. + else
  1686. + status = shps_dgpu_detached(pdev);
  1687. +
  1688. + if (status)
  1689. + dev_err(&pdev->dev, "error handling dGPU interrupt: %d\n", status);
  1690. +
  1691. + return IRQ_HANDLED;
  1692. +}
  1693. +
  1694. +static irqreturn_t shps_base_presence_irq(int irq, void *data)
  1695. +{
  1696. + return IRQ_HANDLED; // nothing to do, just wake
  1697. +}
  1698. +
  1699. +
  1700. +static int shps_gpios_setup(struct platform_device *pdev)
  1701. +{
  1702. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1703. + struct gpio_desc *gpio_dgpu_power;
  1704. + struct gpio_desc *gpio_dgpu_presence;
  1705. + struct gpio_desc *gpio_base_presence;
  1706. + int status;
  1707. +
  1708. + // get GPIOs
  1709. + gpio_dgpu_power = devm_gpiod_get(&pdev->dev, "dgpu_power", GPIOD_IN);
  1710. + if (IS_ERR(gpio_dgpu_power)) {
  1711. + status = PTR_ERR(gpio_dgpu_power);
  1712. + goto err_out;
  1713. + }
  1714. +
  1715. + gpio_dgpu_presence = devm_gpiod_get(&pdev->dev, "dgpu_presence", GPIOD_IN);
  1716. + if (IS_ERR(gpio_dgpu_presence)) {
  1717. + status = PTR_ERR(gpio_dgpu_presence);
  1718. + goto err_out;
  1719. + }
  1720. +
  1721. + gpio_base_presence = devm_gpiod_get(&pdev->dev, "base_presence", GPIOD_IN);
  1722. + if (IS_ERR(gpio_base_presence)) {
  1723. + status = PTR_ERR(gpio_base_presence);
  1724. + goto err_out;
  1725. + }
  1726. +
  1727. + // export GPIOs
  1728. + status = gpiod_export(gpio_dgpu_power, false);
  1729. + if (status)
  1730. + goto err_out;
  1731. +
  1732. + status = gpiod_export(gpio_dgpu_presence, false);
  1733. + if (status)
  1734. + goto err_export_dgpu_presence;
  1735. +
  1736. + status = gpiod_export(gpio_base_presence, false);
  1737. + if (status)
  1738. + goto err_export_base_presence;
  1739. +
  1740. + // create sysfs links
  1741. + status = gpiod_export_link(&pdev->dev, "gpio-dgpu_power", gpio_dgpu_power);
  1742. + if (status)
  1743. + goto err_link_dgpu_power;
  1744. +
  1745. + status = gpiod_export_link(&pdev->dev, "gpio-dgpu_presence", gpio_dgpu_presence);
  1746. + if (status)
  1747. + goto err_link_dgpu_presence;
  1748. +
  1749. + status = gpiod_export_link(&pdev->dev, "gpio-base_presence", gpio_base_presence);
  1750. + if (status)
  1751. + goto err_link_base_presence;
  1752. +
  1753. + drvdata->gpio_dgpu_power = gpio_dgpu_power;
  1754. + drvdata->gpio_dgpu_presence = gpio_dgpu_presence;
  1755. + drvdata->gpio_base_presence = gpio_base_presence;
  1756. + return 0;
  1757. +
  1758. +err_link_base_presence:
  1759. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_presence");
  1760. +err_link_dgpu_presence:
  1761. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_power");
  1762. +err_link_dgpu_power:
  1763. + gpiod_unexport(gpio_base_presence);
  1764. +err_export_base_presence:
  1765. + gpiod_unexport(gpio_dgpu_presence);
  1766. +err_export_dgpu_presence:
  1767. + gpiod_unexport(gpio_dgpu_power);
  1768. +err_out:
  1769. + return status;
  1770. +}
  1771. +
  1772. +static void shps_gpios_remove(struct platform_device *pdev)
  1773. +{
  1774. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1775. +
  1776. + sysfs_remove_link(&pdev->dev.kobj, "gpio-base_presence");
  1777. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_presence");
  1778. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_power");
  1779. + gpiod_unexport(drvdata->gpio_base_presence);
  1780. + gpiod_unexport(drvdata->gpio_dgpu_presence);
  1781. + gpiod_unexport(drvdata->gpio_dgpu_power);
  1782. +}
  1783. +
  1784. +static int shps_gpios_setup_irq(struct platform_device *pdev)
  1785. +{
  1786. + const int irqf_dgpu = IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
  1787. + const int irqf_base = IRQF_SHARED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
  1788. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1789. + int status;
  1790. +
  1791. + status = gpiod_to_irq(drvdata->gpio_base_presence);
  1792. + if (status < 0)
  1793. + return status;
  1794. + drvdata->irq_base_presence = status;
  1795. +
  1796. + status = gpiod_to_irq(drvdata->gpio_dgpu_presence);
  1797. + if (status < 0)
  1798. + return status;
  1799. + drvdata->irq_dgpu_presence = status;
  1800. +
  1801. + status = request_irq(drvdata->irq_base_presence,
  1802. + shps_base_presence_irq, irqf_base,
  1803. + "shps_base_presence_irq", pdev);
  1804. + if (status)
  1805. + return status;
  1806. +
  1807. + status = request_threaded_irq(drvdata->irq_dgpu_presence,
  1808. + NULL, shps_dgpu_presence_irq, irqf_dgpu,
  1809. + "shps_dgpu_presence_irq", pdev);
  1810. + if (status) {
  1811. + free_irq(drvdata->irq_base_presence, pdev);
  1812. + return status;
  1813. + }
  1814. +
  1815. + return 0;
  1816. +}
  1817. +
  1818. +static void shps_gpios_remove_irq(struct platform_device *pdev)
  1819. +{
  1820. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1821. +
  1822. + free_irq(drvdata->irq_base_presence, pdev);
  1823. + free_irq(drvdata->irq_dgpu_presence, pdev);
  1824. +}
  1825. +
  1826. +static int shps_probe(struct platform_device *pdev)
  1827. +{
  1828. + struct acpi_device *shps_dev = ACPI_COMPANION(&pdev->dev);
  1829. + struct shps_driver_data *drvdata;
  1830. + struct device_link *link;
  1831. + int power, status;
  1832. +
  1833. + if (gpiod_count(&pdev->dev, NULL) < 0)
  1834. + return -ENODEV;
  1835. +
  1836. + // link to SSH
  1837. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  1838. + if (status)
  1839. + return status == -ENXIO ? -EPROBE_DEFER : status;
  1840. +
  1841. + // link to SAN
  1842. + status = surface_sam_san_consumer_register(&pdev->dev, 0);
  1843. + if (status)
  1844. + return status == -ENXIO ? -EPROBE_DEFER : status;
  1845. +
  1846. + status = acpi_dev_add_driver_gpios(shps_dev, shps_acpi_gpios);
  1847. + if (status)
  1848. + return status;
  1849. +
  1850. + drvdata = kzalloc(sizeof(struct shps_driver_data), GFP_KERNEL);
  1851. + if (!drvdata) {
  1852. + status = -ENOMEM;
  1853. + goto err_drvdata;
  1854. + }
  1855. + mutex_init(&drvdata->lock);
  1856. + platform_set_drvdata(pdev, drvdata);
  1857. +
  1858. + drvdata->dgpu_root_port = shps_dgpu_dsm_get_pci_dev(pdev, SHPS_DSM_GPU_ADDRS_RP);
  1859. + if (IS_ERR(drvdata->dgpu_root_port)) {
  1860. + status = PTR_ERR(drvdata->dgpu_root_port);
  1861. + goto err_rp_lookup;
  1862. + }
  1863. +
  1864. + status = shps_gpios_setup(pdev);
  1865. + if (status)
  1866. + goto err_gpio;
  1867. +
  1868. + status = shps_gpios_setup_irq(pdev);
  1869. + if (status)
  1870. + goto err_gpio_irqs;
  1871. +
  1872. + status = device_add_groups(&pdev->dev, shps_power_groups);
  1873. + if (status)
  1874. + goto err_devattr;
  1875. +
  1876. + link = device_link_add(&pdev->dev, &drvdata->dgpu_root_port->dev,
  1877. + DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER);
  1878. + if (!link)
  1879. + goto err_devlink;
  1880. +
  1881. + surface_sam_san_set_rqsg_handler(shps_dgpu_handle_rqsg, pdev);
  1882. +
  1883. + // if dGPU is not present turn-off root-port, else obey module param
  1884. + status = shps_dgpu_is_present(pdev);
  1885. + if (status < 0)
  1886. + goto err_devlink;
  1887. +
  1888. + power = status == 0 ? SHPS_DGPU_POWER_OFF : param_dgpu_power_init;
  1889. + if (power != SHPS_DGPU_MP_POWER_ASIS) {
  1890. + status = shps_dgpu_set_power(pdev, power);
  1891. + if (status)
  1892. + goto err_devlink;
  1893. + }
  1894. +
  1895. + device_init_wakeup(&pdev->dev, true);
  1896. + return 0;
  1897. +
  1898. +err_devlink:
  1899. + device_remove_groups(&pdev->dev, shps_power_groups);
  1900. +err_devattr:
  1901. + shps_gpios_remove_irq(pdev);
  1902. +err_gpio_irqs:
  1903. + shps_gpios_remove(pdev);
  1904. +err_gpio:
  1905. + pci_dev_put(drvdata->dgpu_root_port);
  1906. +err_rp_lookup:
  1907. + platform_set_drvdata(pdev, NULL);
  1908. + kfree(drvdata);
  1909. +err_drvdata:
  1910. + acpi_dev_remove_driver_gpios(shps_dev);
  1911. + return status;
  1912. +}
  1913. +
  1914. +static int shps_remove(struct platform_device *pdev)
  1915. +{
  1916. + struct acpi_device *shps_dev = ACPI_COMPANION(&pdev->dev);
  1917. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1918. + int status;
  1919. +
  1920. + if (param_dgpu_power_exit != SHPS_DGPU_MP_POWER_ASIS) {
  1921. + status = shps_dgpu_set_power(pdev, param_dgpu_power_exit);
  1922. + if (status)
  1923. + dev_err(&pdev->dev, "failed to set dGPU power state: %d\n", status);
  1924. + }
  1925. +
  1926. + device_set_wakeup_capable(&pdev->dev, false);
  1927. + surface_sam_san_set_rqsg_handler(NULL, NULL);
  1928. + device_remove_groups(&pdev->dev, shps_power_groups);
  1929. + shps_gpios_remove_irq(pdev);
  1930. + shps_gpios_remove(pdev);
  1931. + pci_dev_put(drvdata->dgpu_root_port);
  1932. + platform_set_drvdata(pdev, NULL);
  1933. + kfree(drvdata);
  1934. +
  1935. + acpi_dev_remove_driver_gpios(shps_dev);
  1936. + return 0;
  1937. +}
  1938. +
  1939. +
  1940. +static const struct dev_pm_ops shps_pm_ops = {
  1941. + .prepare = shps_pm_prepare,
  1942. + .complete = shps_pm_complete,
  1943. + .suspend = shps_pm_suspend,
  1944. + .resume = shps_pm_resume,
  1945. +};
  1946. +
  1947. +static const struct acpi_device_id shps_acpi_match[] = {
  1948. + { "MSHW0153", 0 },
  1949. + { },
  1950. +};
  1951. +MODULE_DEVICE_TABLE(acpi, shps_acpi_match);
  1952. +
  1953. +static struct platform_driver surface_sam_hps = {
  1954. + .probe = shps_probe,
  1955. + .remove = shps_remove,
  1956. + .shutdown = shps_shutdown,
  1957. + .driver = {
  1958. + .name = "surface_dgpu_hps",
  1959. + .acpi_match_table = ACPI_PTR(shps_acpi_match),
  1960. + .pm = &shps_pm_ops,
  1961. + },
  1962. +};
  1963. +module_platform_driver(surface_sam_hps);
  1964. +
  1965. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  1966. +MODULE_DESCRIPTION("Surface Hot-Plug System (HPS) and dGPU power-state Driver for Surface Book 2");
  1967. +MODULE_LICENSE("GPL v2");
  1968. diff --git a/drivers/platform/x86/surface_sam/surface_sam_san.c b/drivers/platform/x86/surface_sam/surface_sam_san.c
  1969. new file mode 100644
  1970. index 000000000000..63478945e6b2
  1971. --- /dev/null
  1972. +++ b/drivers/platform/x86/surface_sam/surface_sam_san.c
  1973. @@ -0,0 +1,883 @@
  1974. +// SPDX-License-Identifier: GPL-2.0
  1975. +/*
  1976. + * Surface ACPI Notify (SAN) and ACPI integration driver for SAM.
  1977. + * Translates communication from ACPI to SSH and back.
  1978. + */
  1979. +
  1980. +#include <linux/acpi.h>
  1981. +#include <linux/delay.h>
  1982. +#include <linux/jiffies.h>
  1983. +#include <linux/kernel.h>
  1984. +#include <linux/platform_device.h>
  1985. +
  1986. +#include "surface_sam_ssh.h"
  1987. +#include "surface_sam_san.h"
  1988. +
  1989. +
  1990. +#define SAN_RQST_RETRY 5
  1991. +
  1992. +#define SAN_DSM_REVISION 0
  1993. +#define SAN_DSM_FN_NOTIFY_SENSOR_TRIP_POINT 0x09
  1994. +
  1995. +static const guid_t SAN_DSM_UUID =
  1996. + GUID_INIT(0x93b666c5, 0x70c6, 0x469f, 0xa2, 0x15, 0x3d,
  1997. + 0x48, 0x7c, 0x91, 0xab, 0x3c);
  1998. +
  1999. +#define SAM_EVENT_DELAY_PWR_ADAPTER msecs_to_jiffies(5000)
  2000. +#define SAM_EVENT_DELAY_PWR_BST msecs_to_jiffies(2500)
  2001. +
  2002. +#define SAM_EVENT_PWR_TC 0x02
  2003. +#define SAM_EVENT_PWR_RQID 0x0002
  2004. +#define SAM_EVENT_PWR_CID_BIX 0x15
  2005. +#define SAM_EVENT_PWR_CID_BST 0x16
  2006. +#define SAM_EVENT_PWR_CID_ADAPTER 0x17
  2007. +#define SAM_EVENT_PWR_CID_DPTF 0x4f
  2008. +
  2009. +#define SAM_EVENT_TEMP_TC 0x03
  2010. +#define SAM_EVENT_TEMP_RQID 0x0003
  2011. +#define SAM_EVENT_TEMP_CID_NOTIFY_SENSOR_TRIP_POINT 0x0b
  2012. +
  2013. +#define SAN_RQST_TAG "surface_sam_san: rqst: "
  2014. +#define SAN_RQSG_TAG "surface_sam_san: rqsg: "
  2015. +
  2016. +#define SAN_QUIRK_BASE_STATE_DELAY 1000
  2017. +
  2018. +
  2019. +struct san_acpi_consumer {
  2020. + char *path;
  2021. + bool required;
  2022. + u32 flags;
  2023. +};
  2024. +
  2025. +struct san_opreg_context {
  2026. + struct acpi_connection_info connection;
  2027. + struct device *dev;
  2028. +};
  2029. +
  2030. +struct san_consumer_link {
  2031. + const struct san_acpi_consumer *properties;
  2032. + struct device_link *link;
  2033. +};
  2034. +
  2035. +struct san_consumers {
  2036. + u32 num;
  2037. + struct san_consumer_link *links;
  2038. +};
  2039. +
  2040. +struct san_drvdata {
  2041. + struct san_opreg_context opreg_ctx;
  2042. + struct san_consumers consumers;
  2043. + bool has_power_events;
  2044. +};
  2045. +
  2046. +struct gsb_data_in {
  2047. + u8 cv;
  2048. +} __packed;
  2049. +
  2050. +struct gsb_data_rqsx {
  2051. + u8 cv; // command value (should be 0x01 or 0x03)
  2052. + u8 tc; // target controller
  2053. + u8 tid; // expected to be 0x01, could be revision
  2054. + u8 iid; // target sub-controller (e.g. primary vs. secondary battery)
  2055. + u8 snc; // expect-response-flag
  2056. + u8 cid; // command ID
  2057. + u8 cdl; // payload length
  2058. + u8 _pad; // padding
  2059. + u8 pld[0]; // payload
  2060. +} __packed;
  2061. +
  2062. +struct gsb_data_etwl {
  2063. + u8 cv; // command value (should be 0x02)
  2064. + u8 etw3; // ?
  2065. + u8 etw4; // ?
  2066. + u8 msg[0]; // error message (ASCIIZ)
  2067. +} __packed;
  2068. +
  2069. +struct gsb_data_out {
  2070. + u8 status; // _SSH communication status
  2071. + u8 len; // _SSH payload length
  2072. + u8 pld[0]; // _SSH payload
  2073. +} __packed;
  2074. +
  2075. +union gsb_buffer_data {
  2076. + struct gsb_data_in in; // common input
  2077. + struct gsb_data_rqsx rqsx; // RQSX input
  2078. + struct gsb_data_etwl etwl; // ETWL input
  2079. + struct gsb_data_out out; // output
  2080. +};
  2081. +
  2082. +struct gsb_buffer {
  2083. + u8 status; // GSB AttribRawProcess status
  2084. + u8 len; // GSB AttribRawProcess length
  2085. + union gsb_buffer_data data;
  2086. +} __packed;
  2087. +
  2088. +
  2089. +enum san_pwr_event {
  2090. + SAN_PWR_EVENT_BAT1_STAT = 0x03,
  2091. + SAN_PWR_EVENT_BAT1_INFO = 0x04,
  2092. + SAN_PWR_EVENT_ADP1_STAT = 0x05,
  2093. + SAN_PWR_EVENT_ADP1_INFO = 0x06,
  2094. + SAN_PWR_EVENT_BAT2_STAT = 0x07,
  2095. + SAN_PWR_EVENT_BAT2_INFO = 0x08,
  2096. +};
  2097. +
  2098. +
  2099. +static int sam_san_default_rqsg_handler(struct surface_sam_san_rqsg *rqsg, void *data);
  2100. +
  2101. +struct sam_san_rqsg_if {
  2102. + struct mutex lock;
  2103. + struct device *san_dev;
  2104. + surface_sam_san_rqsg_handler_fn handler;
  2105. + void *handler_data;
  2106. +};
  2107. +
  2108. +static struct sam_san_rqsg_if rqsg_if = {
  2109. + .lock = __MUTEX_INITIALIZER(rqsg_if.lock),
  2110. + .san_dev = NULL,
  2111. + .handler = sam_san_default_rqsg_handler,
  2112. + .handler_data = NULL,
  2113. +};
  2114. +
  2115. +int surface_sam_san_consumer_register(struct device *consumer, u32 flags)
  2116. +{
  2117. + const u32 valid = DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE;
  2118. + int status;
  2119. +
  2120. + if ((flags | valid) != valid)
  2121. + return -EINVAL;
  2122. +
  2123. + flags |= DL_FLAG_AUTOREMOVE_CONSUMER;
  2124. +
  2125. + mutex_lock(&rqsg_if.lock);
  2126. + if (rqsg_if.san_dev)
  2127. + status = device_link_add(consumer, rqsg_if.san_dev, flags) ? 0 : -EINVAL;
  2128. + else
  2129. + status = -ENXIO;
  2130. + mutex_unlock(&rqsg_if.lock);
  2131. + return status;
  2132. +}
  2133. +EXPORT_SYMBOL_GPL(surface_sam_san_consumer_register);
  2134. +
  2135. +int surface_sam_san_set_rqsg_handler(surface_sam_san_rqsg_handler_fn fn, void *data)
  2136. +{
  2137. + int status = -EBUSY;
  2138. +
  2139. + mutex_lock(&rqsg_if.lock);
  2140. +
  2141. + if (rqsg_if.handler == sam_san_default_rqsg_handler || !fn) {
  2142. + rqsg_if.handler = fn ? fn : sam_san_default_rqsg_handler;
  2143. + rqsg_if.handler_data = data;
  2144. + status = 0;
  2145. + }
  2146. +
  2147. + mutex_unlock(&rqsg_if.lock);
  2148. + return status;
  2149. +}
  2150. +EXPORT_SYMBOL_GPL(surface_sam_san_set_rqsg_handler);
  2151. +
  2152. +int san_call_rqsg_handler(struct surface_sam_san_rqsg *rqsg)
  2153. +{
  2154. + int status;
  2155. +
  2156. + mutex_lock(&rqsg_if.lock);
  2157. + status = rqsg_if.handler(rqsg, rqsg_if.handler_data);
  2158. + mutex_unlock(&rqsg_if.lock);
  2159. +
  2160. + return status;
  2161. +}
  2162. +
  2163. +static int sam_san_default_rqsg_handler(struct surface_sam_san_rqsg *rqsg, void *data)
  2164. +{
  2165. + pr_warn(SAN_RQSG_TAG "unhandled request: RQSG(0x%02x, 0x%02x, 0x%02x)\n",
  2166. + rqsg->tc, rqsg->cid, rqsg->iid);
  2167. +
  2168. + return 0;
  2169. +}
  2170. +
  2171. +
  2172. +static int san_acpi_notify_power_event(struct device *dev, enum san_pwr_event event)
  2173. +{
  2174. + acpi_handle san = ACPI_HANDLE(dev);
  2175. + union acpi_object *obj;
  2176. +
  2177. + dev_dbg(dev, "notify power event 0x%02x\n", event);
  2178. + obj = acpi_evaluate_dsm_typed(san, &SAN_DSM_UUID, SAN_DSM_REVISION,
  2179. + (u8) event, NULL, ACPI_TYPE_BUFFER);
  2180. +
  2181. + if (IS_ERR_OR_NULL(obj))
  2182. + return obj ? PTR_ERR(obj) : -ENXIO;
  2183. +
  2184. + if (obj->buffer.length != 1 || obj->buffer.pointer[0] != 0) {
  2185. + dev_err(dev, "got unexpected result from _DSM\n");
  2186. + return -EFAULT;
  2187. + }
  2188. +
  2189. + ACPI_FREE(obj);
  2190. + return 0;
  2191. +}
  2192. +
  2193. +static int san_acpi_notify_sensor_trip_point(struct device *dev, u8 iid)
  2194. +{
  2195. + acpi_handle san = ACPI_HANDLE(dev);
  2196. + union acpi_object *obj;
  2197. + union acpi_object param;
  2198. +
  2199. + param.type = ACPI_TYPE_INTEGER;
  2200. + param.integer.value = iid;
  2201. +
  2202. + obj = acpi_evaluate_dsm_typed(san, &SAN_DSM_UUID, SAN_DSM_REVISION,
  2203. + SAN_DSM_FN_NOTIFY_SENSOR_TRIP_POINT,
  2204. + &param, ACPI_TYPE_BUFFER);
  2205. +
  2206. + if (IS_ERR_OR_NULL(obj))
  2207. + return obj ? PTR_ERR(obj) : -ENXIO;
  2208. +
  2209. + if (obj->buffer.length != 1 || obj->buffer.pointer[0] != 0) {
  2210. + dev_err(dev, "got unexpected result from _DSM\n");
  2211. + return -EFAULT;
  2212. + }
  2213. +
  2214. + ACPI_FREE(obj);
  2215. + return 0;
  2216. +}
  2217. +
  2218. +
  2219. +static inline int san_evt_power_adapter(struct device *dev, struct surface_sam_ssh_event *event)
  2220. +{
  2221. + int status;
  2222. +
  2223. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_ADP1_STAT);
  2224. + if (status) {
  2225. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2226. + return status;
  2227. + }
  2228. +
  2229. + /*
  2230. + * Enusre that the battery states get updated correctly.
  2231. + * When the battery is fully charged and an adapter is plugged in, it
  2232. + * sometimes is not updated correctly, instead showing it as charging.
  2233. + * Explicitly trigger battery updates to fix this.
  2234. + */
  2235. +
  2236. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_BAT1_STAT);
  2237. + if (status) {
  2238. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2239. + return status;
  2240. + }
  2241. +
  2242. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_BAT2_STAT);
  2243. + if (status) {
  2244. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2245. + return status;
  2246. + }
  2247. +
  2248. + return 0;
  2249. +}
  2250. +
  2251. +static inline int san_evt_power_bix(struct device *dev, struct surface_sam_ssh_event *event)
  2252. +{
  2253. + enum san_pwr_event evcode;
  2254. + int status;
  2255. +
  2256. + if (event->iid == 0x02)
  2257. + evcode = SAN_PWR_EVENT_BAT2_INFO;
  2258. + else
  2259. + evcode = SAN_PWR_EVENT_BAT1_INFO;
  2260. +
  2261. + status = san_acpi_notify_power_event(dev, evcode);
  2262. + if (status) {
  2263. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2264. + return status;
  2265. + }
  2266. +
  2267. + return 0;
  2268. +}
  2269. +
  2270. +static inline int san_evt_power_bst(struct device *dev, struct surface_sam_ssh_event *event)
  2271. +{
  2272. + enum san_pwr_event evcode;
  2273. + int status;
  2274. +
  2275. + if (event->iid == 0x02)
  2276. + evcode = SAN_PWR_EVENT_BAT2_STAT;
  2277. + else
  2278. + evcode = SAN_PWR_EVENT_BAT1_STAT;
  2279. +
  2280. + status = san_acpi_notify_power_event(dev, evcode);
  2281. + if (status) {
  2282. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2283. + return status;
  2284. + }
  2285. +
  2286. + return 0;
  2287. +}
  2288. +
  2289. +static unsigned long san_evt_power_delay(struct surface_sam_ssh_event *event, void *data)
  2290. +{
  2291. + switch (event->cid) {
  2292. + case SAM_EVENT_PWR_CID_ADAPTER:
  2293. + /*
  2294. + * Wait for battery state to update before signalling adapter change.
  2295. + */
  2296. + return SAM_EVENT_DELAY_PWR_ADAPTER;
  2297. +
  2298. + case SAM_EVENT_PWR_CID_BST:
  2299. + /*
  2300. + * Ensure we do not miss anything important due to caching.
  2301. + */
  2302. + return SAM_EVENT_DELAY_PWR_BST;
  2303. +
  2304. + case SAM_EVENT_PWR_CID_BIX:
  2305. + case SAM_EVENT_PWR_CID_DPTF:
  2306. + default:
  2307. + return 0;
  2308. + }
  2309. +}
  2310. +
  2311. +static int san_evt_power(struct surface_sam_ssh_event *event, void *data)
  2312. +{
  2313. + struct device *dev = (struct device *)data;
  2314. +
  2315. + switch (event->cid) {
  2316. + case SAM_EVENT_PWR_CID_BIX:
  2317. + return san_evt_power_bix(dev, event);
  2318. +
  2319. + case SAM_EVENT_PWR_CID_BST:
  2320. + return san_evt_power_bst(dev, event);
  2321. +
  2322. + case SAM_EVENT_PWR_CID_ADAPTER:
  2323. + return san_evt_power_adapter(dev, event);
  2324. +
  2325. + case SAM_EVENT_PWR_CID_DPTF:
  2326. + /*
  2327. + * Ignored for now.
  2328. + * This signals a change in Intel DPTF PMAX, and possibly other
  2329. + * fields. Ignore for now as there is no corresponding _DSM call and
  2330. + * DPTF is implemented via a separate INT3407 device.
  2331. + *
  2332. + * The payload of this event is: [u32 PMAX, unknown...].
  2333. + */
  2334. + return 0;
  2335. +
  2336. + default:
  2337. + dev_warn(dev, "unhandled power event (cid = %x)\n", event->cid);
  2338. + }
  2339. +
  2340. + return 0;
  2341. +}
  2342. +
  2343. +
  2344. +static inline int san_evt_thermal_notify(struct device *dev, struct surface_sam_ssh_event *event)
  2345. +{
  2346. + int status;
  2347. +
  2348. + status = san_acpi_notify_sensor_trip_point(dev, event->iid);
  2349. + if (status) {
  2350. + dev_err(dev, "error handling thermal event (cid = %x)\n", event->cid);
  2351. + return status;
  2352. + }
  2353. +
  2354. + return 0;
  2355. +}
  2356. +
  2357. +static int san_evt_thermal(struct surface_sam_ssh_event *event, void *data)
  2358. +{
  2359. + struct device *dev = (struct device *)data;
  2360. +
  2361. + switch (event->cid) {
  2362. + case SAM_EVENT_TEMP_CID_NOTIFY_SENSOR_TRIP_POINT:
  2363. + return san_evt_thermal_notify(dev, event);
  2364. +
  2365. + default:
  2366. + dev_warn(dev, "unhandled thermal event (cid = %x)\n", event->cid);
  2367. + }
  2368. +
  2369. + return 0;
  2370. +}
  2371. +
  2372. +
  2373. +static struct gsb_data_rqsx
  2374. +*san_validate_rqsx(struct device *dev, const char *type, struct gsb_buffer *buffer)
  2375. +{
  2376. + struct gsb_data_rqsx *rqsx = &buffer->data.rqsx;
  2377. +
  2378. + if (buffer->len < 8) {
  2379. + dev_err(dev, "invalid %s package (len = %d)\n",
  2380. + type, buffer->len);
  2381. + return NULL;
  2382. + }
  2383. +
  2384. + if (rqsx->cdl != buffer->len - 8) {
  2385. + dev_err(dev, "bogus %s package (len = %d, cdl = %d)\n",
  2386. + type, buffer->len, rqsx->cdl);
  2387. + return NULL;
  2388. + }
  2389. +
  2390. + if (rqsx->tid != 0x01) {
  2391. + dev_warn(dev, "unsupported %s package (tid = 0x%02x)\n",
  2392. + type, rqsx->tid);
  2393. + return NULL;
  2394. + }
  2395. +
  2396. + return rqsx;
  2397. +}
  2398. +
  2399. +static acpi_status
  2400. +san_etwl(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2401. +{
  2402. + struct gsb_data_etwl *etwl = &buffer->data.etwl;
  2403. +
  2404. + if (buffer->len < 3) {
  2405. + dev_err(ctx->dev, "invalid ETWL package (len = %d)\n", buffer->len);
  2406. + return AE_OK;
  2407. + }
  2408. +
  2409. + dev_err(ctx->dev, "ETWL(0x%02x, 0x%02x): %.*s\n",
  2410. + etwl->etw3, etwl->etw4,
  2411. + buffer->len - 3, (char *)etwl->msg);
  2412. +
  2413. + // indicate success
  2414. + buffer->status = 0x00;
  2415. + buffer->len = 0x00;
  2416. +
  2417. + return AE_OK;
  2418. +}
  2419. +
  2420. +static acpi_status
  2421. +san_rqst(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2422. +{
  2423. + struct gsb_data_rqsx *gsb_rqst = san_validate_rqsx(ctx->dev, "RQST", buffer);
  2424. + struct surface_sam_ssh_rqst rqst = {};
  2425. + struct surface_sam_ssh_buf result = {};
  2426. + int status = 0;
  2427. + int try;
  2428. +
  2429. + if (!gsb_rqst)
  2430. + return AE_OK;
  2431. +
  2432. + rqst.tc = gsb_rqst->tc;
  2433. + rqst.cid = gsb_rqst->cid;
  2434. + rqst.iid = gsb_rqst->iid;
  2435. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  2436. + rqst.snc = gsb_rqst->snc;
  2437. + rqst.cdl = gsb_rqst->cdl;
  2438. + rqst.pld = &gsb_rqst->pld[0];
  2439. +
  2440. + result.cap = SURFACE_SAM_SSH_MAX_RQST_RESPONSE;
  2441. + result.len = 0;
  2442. + result.data = kzalloc(result.cap, GFP_KERNEL);
  2443. +
  2444. + if (!result.data)
  2445. + return AE_NO_MEMORY;
  2446. +
  2447. + for (try = 0; try < SAN_RQST_RETRY; try++) {
  2448. + if (try)
  2449. + dev_warn(ctx->dev, SAN_RQST_TAG "IO error occurred, trying again\n");
  2450. +
  2451. + status = surface_sam_ssh_rqst(&rqst, &result);
  2452. + if (status != -EIO)
  2453. + break;
  2454. + }
  2455. +
  2456. + if (rqst.tc == 0x11 && rqst.cid == 0x0D && status == -EPERM) {
  2457. + /* Base state quirk:
  2458. + * The base state may be queried from ACPI when the EC is still
  2459. + * suspended. In this case it will return '-EPERM'. This query
  2460. + * will only be triggered from the ACPI lid GPE interrupt, thus
  2461. + * we are either in laptop or studio mode (base status 0x01 or
  2462. + * 0x02). Furthermore, we will only get here if the device (and
  2463. + * EC) have been suspended.
  2464. + *
  2465. + * We now assume that the device is in laptop mode (0x01). This
  2466. + * has the drawback that it will wake the device when unfolding
  2467. + * it in studio mode, but it also allows us to avoid actively
  2468. + * waiting for the EC to wake up, which may incur a notable
  2469. + * delay.
  2470. + */
  2471. +
  2472. + buffer->status = 0x00;
  2473. + buffer->len = 0x03;
  2474. + buffer->data.out.status = 0x00;
  2475. + buffer->data.out.len = 0x01;
  2476. + buffer->data.out.pld[0] = 0x01;
  2477. +
  2478. + } else if (!status) { // success
  2479. + buffer->status = 0x00;
  2480. + buffer->len = result.len + 2;
  2481. + buffer->data.out.status = 0x00;
  2482. + buffer->data.out.len = result.len;
  2483. + memcpy(&buffer->data.out.pld[0], result.data, result.len);
  2484. +
  2485. + } else { // failure
  2486. + dev_err(ctx->dev, SAN_RQST_TAG "failed with error %d\n", status);
  2487. + buffer->status = 0x00;
  2488. + buffer->len = 0x02;
  2489. + buffer->data.out.status = 0x01; // indicate _SSH error
  2490. + buffer->data.out.len = 0x00;
  2491. + }
  2492. +
  2493. + kfree(result.data);
  2494. +
  2495. + return AE_OK;
  2496. +}
  2497. +
  2498. +static acpi_status
  2499. +san_rqsg(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2500. +{
  2501. + struct gsb_data_rqsx *gsb_rqsg = san_validate_rqsx(ctx->dev, "RQSG", buffer);
  2502. + struct surface_sam_san_rqsg rqsg = {};
  2503. + int status;
  2504. +
  2505. + if (!gsb_rqsg)
  2506. + return AE_OK;
  2507. +
  2508. + rqsg.tc = gsb_rqsg->tc;
  2509. + rqsg.cid = gsb_rqsg->cid;
  2510. + rqsg.iid = gsb_rqsg->iid;
  2511. + rqsg.cdl = gsb_rqsg->cdl;
  2512. + rqsg.pld = &gsb_rqsg->pld[0];
  2513. +
  2514. + status = san_call_rqsg_handler(&rqsg);
  2515. + if (!status) {
  2516. + buffer->status = 0x00;
  2517. + buffer->len = 0x02;
  2518. + buffer->data.out.status = 0x00;
  2519. + buffer->data.out.len = 0x00;
  2520. + } else {
  2521. + dev_err(ctx->dev, SAN_RQSG_TAG "failed with error %d\n", status);
  2522. + buffer->status = 0x00;
  2523. + buffer->len = 0x02;
  2524. + buffer->data.out.status = 0x01; // indicate _SSH error
  2525. + buffer->data.out.len = 0x00;
  2526. + }
  2527. +
  2528. + return AE_OK;
  2529. +}
  2530. +
  2531. +
  2532. +static acpi_status
  2533. +san_opreg_handler(u32 function, acpi_physical_address command,
  2534. + u32 bits, u64 *value64,
  2535. + void *opreg_context, void *region_context)
  2536. +{
  2537. + struct san_opreg_context *context = opreg_context;
  2538. + struct gsb_buffer *buffer = (struct gsb_buffer *)value64;
  2539. + int accessor_type = (0xFFFF0000 & function) >> 16;
  2540. +
  2541. + if (command != 0) {
  2542. + dev_warn(context->dev, "unsupported command: 0x%02llx\n", command);
  2543. + return AE_OK;
  2544. + }
  2545. +
  2546. + if (accessor_type != ACPI_GSB_ACCESS_ATTRIB_RAW_PROCESS) {
  2547. + dev_err(context->dev, "invalid access type: 0x%02x\n", accessor_type);
  2548. + return AE_OK;
  2549. + }
  2550. +
  2551. + // buffer must have at least contain the command-value
  2552. + if (buffer->len == 0) {
  2553. + dev_err(context->dev, "request-package too small\n");
  2554. + return AE_OK;
  2555. + }
  2556. +
  2557. + switch (buffer->data.in.cv) {
  2558. + case 0x01: return san_rqst(context, buffer);
  2559. + case 0x02: return san_etwl(context, buffer);
  2560. + case 0x03: return san_rqsg(context, buffer);
  2561. + }
  2562. +
  2563. + dev_warn(context->dev, "unsupported SAN0 request (cv: 0x%02x)\n", buffer->data.in.cv);
  2564. + return AE_OK;
  2565. +}
  2566. +
  2567. +static int san_enable_power_events(struct platform_device *pdev)
  2568. +{
  2569. + int status;
  2570. +
  2571. + status = surface_sam_ssh_set_delayed_event_handler(
  2572. + SAM_EVENT_PWR_RQID, san_evt_power,
  2573. + san_evt_power_delay, &pdev->dev);
  2574. + if (status)
  2575. + return status;
  2576. +
  2577. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_PWR_TC, 0x01, SAM_EVENT_PWR_RQID);
  2578. + if (status) {
  2579. + surface_sam_ssh_remove_event_handler(SAM_EVENT_PWR_RQID);
  2580. + return status;
  2581. + }
  2582. +
  2583. + return 0;
  2584. +}
  2585. +
  2586. +static int san_enable_thermal_events(struct platform_device *pdev)
  2587. +{
  2588. + int status;
  2589. +
  2590. + status = surface_sam_ssh_set_event_handler(
  2591. + SAM_EVENT_TEMP_RQID, san_evt_thermal,
  2592. + &pdev->dev);
  2593. + if (status)
  2594. + return status;
  2595. +
  2596. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_TEMP_TC, 0x01, SAM_EVENT_TEMP_RQID);
  2597. + if (status) {
  2598. + surface_sam_ssh_remove_event_handler(SAM_EVENT_TEMP_RQID);
  2599. + return status;
  2600. + }
  2601. +
  2602. + return 0;
  2603. +}
  2604. +
  2605. +static void san_disable_power_events(void)
  2606. +{
  2607. + surface_sam_ssh_disable_event_source(SAM_EVENT_PWR_TC, 0x01, SAM_EVENT_PWR_RQID);
  2608. + surface_sam_ssh_remove_event_handler(SAM_EVENT_PWR_RQID);
  2609. +}
  2610. +
  2611. +static void san_disable_thermal_events(void)
  2612. +{
  2613. + surface_sam_ssh_disable_event_source(SAM_EVENT_TEMP_TC, 0x01, SAM_EVENT_TEMP_RQID);
  2614. + surface_sam_ssh_remove_event_handler(SAM_EVENT_TEMP_RQID);
  2615. +}
  2616. +
  2617. +
  2618. +static int san_enable_events(struct platform_device *pdev)
  2619. +{
  2620. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2621. + int status;
  2622. +
  2623. + status = san_enable_thermal_events(pdev);
  2624. + if (status)
  2625. + return status;
  2626. +
  2627. + /*
  2628. + * We have to figure out if this device uses SAN or requires a separate
  2629. + * driver for the battery. If it uses the separate driver, that driver
  2630. + * will enable and handle power events.
  2631. + */
  2632. + drvdata->has_power_events = acpi_has_method(NULL, "\\_SB.BAT1._BST");
  2633. + if (drvdata->has_power_events) {
  2634. + status = san_enable_power_events(pdev);
  2635. + if (status)
  2636. + goto err;
  2637. + }
  2638. +
  2639. + return 0;
  2640. +
  2641. +err:
  2642. + san_disable_thermal_events();
  2643. + return status;
  2644. +}
  2645. +
  2646. +static void san_disable_events(struct platform_device *pdev)
  2647. +{
  2648. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2649. +
  2650. + san_disable_thermal_events();
  2651. + if (drvdata->has_power_events)
  2652. + san_disable_power_events();
  2653. +}
  2654. +
  2655. +
  2656. +static int san_consumers_link(struct platform_device *pdev,
  2657. + const struct san_acpi_consumer *cons,
  2658. + struct san_consumers *out)
  2659. +{
  2660. + const struct san_acpi_consumer *con;
  2661. + struct san_consumer_link *links, *link;
  2662. + struct acpi_device *adev;
  2663. + acpi_handle handle;
  2664. + u32 max_links = 0;
  2665. + int status;
  2666. +
  2667. + if (!cons)
  2668. + return 0;
  2669. +
  2670. + // count links
  2671. + for (con = cons; con->path; ++con)
  2672. + max_links += 1;
  2673. +
  2674. + // allocate
  2675. + links = kcalloc(max_links, sizeof(struct san_consumer_link), GFP_KERNEL);
  2676. + link = &links[0];
  2677. +
  2678. + if (!links)
  2679. + return -ENOMEM;
  2680. +
  2681. + // create links
  2682. + for (con = cons; con->path; ++con) {
  2683. + status = acpi_get_handle(NULL, con->path, &handle);
  2684. + if (status) {
  2685. + if (con->required || status != AE_NOT_FOUND) {
  2686. + status = -ENXIO;
  2687. + goto cleanup;
  2688. + } else {
  2689. + continue;
  2690. + }
  2691. + }
  2692. +
  2693. + status = acpi_bus_get_device(handle, &adev);
  2694. + if (status)
  2695. + goto cleanup;
  2696. +
  2697. + link->link = device_link_add(&adev->dev, &pdev->dev, con->flags);
  2698. + if (!(link->link)) {
  2699. + status = -EFAULT;
  2700. + goto cleanup;
  2701. + }
  2702. + link->properties = con;
  2703. +
  2704. + link += 1;
  2705. + }
  2706. +
  2707. + out->num = link - links;
  2708. + out->links = links;
  2709. +
  2710. + return 0;
  2711. +
  2712. +cleanup:
  2713. + for (link = link - 1; link >= links; --link) {
  2714. + if (link->properties->flags & DL_FLAG_STATELESS)
  2715. + device_link_del(link->link);
  2716. + }
  2717. +
  2718. + return status;
  2719. +}
  2720. +
  2721. +static void san_consumers_unlink(struct san_consumers *consumers)
  2722. +{
  2723. + u32 i;
  2724. +
  2725. + if (!consumers)
  2726. + return;
  2727. +
  2728. + for (i = 0; i < consumers->num; ++i) {
  2729. + if (consumers->links[i].properties->flags & DL_FLAG_STATELESS)
  2730. + device_link_del(consumers->links[i].link);
  2731. + }
  2732. +
  2733. + kfree(consumers->links);
  2734. +
  2735. + consumers->num = 0;
  2736. + consumers->links = NULL;
  2737. +}
  2738. +
  2739. +static int surface_sam_san_probe(struct platform_device *pdev)
  2740. +{
  2741. + const struct san_acpi_consumer *cons;
  2742. + struct san_drvdata *drvdata;
  2743. + acpi_handle san = ACPI_HANDLE(&pdev->dev); // _SAN device node
  2744. + int status;
  2745. +
  2746. + /*
  2747. + * Defer probe if the _SSH driver has not set up the controller yet. This
  2748. + * makes sure we do not fail any initial requests (e.g. _STA request without
  2749. + * which the battery does not get set up correctly). Otherwise register as
  2750. + * consumer to set up a device_link.
  2751. + */
  2752. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  2753. + if (status)
  2754. + return status == -ENXIO ? -EPROBE_DEFER : status;
  2755. +
  2756. + drvdata = kzalloc(sizeof(struct san_drvdata), GFP_KERNEL);
  2757. + if (!drvdata)
  2758. + return -ENOMEM;
  2759. +
  2760. + drvdata->opreg_ctx.dev = &pdev->dev;
  2761. +
  2762. + cons = acpi_device_get_match_data(&pdev->dev);
  2763. + status = san_consumers_link(pdev, cons, &drvdata->consumers);
  2764. + if (status)
  2765. + goto err_consumers;
  2766. +
  2767. + platform_set_drvdata(pdev, drvdata);
  2768. +
  2769. + status = acpi_install_address_space_handler(san,
  2770. + ACPI_ADR_SPACE_GSBUS,
  2771. + &san_opreg_handler,
  2772. + NULL, &drvdata->opreg_ctx);
  2773. +
  2774. + if (ACPI_FAILURE(status)) {
  2775. + status = -ENODEV;
  2776. + goto err_install_handler;
  2777. + }
  2778. +
  2779. + status = san_enable_events(pdev);
  2780. + if (status)
  2781. + goto err_enable_events;
  2782. +
  2783. + mutex_lock(&rqsg_if.lock);
  2784. + if (!rqsg_if.san_dev)
  2785. + rqsg_if.san_dev = &pdev->dev;
  2786. + else
  2787. + status = -EBUSY;
  2788. + mutex_unlock(&rqsg_if.lock);
  2789. +
  2790. + if (status)
  2791. + goto err_install_dev;
  2792. +
  2793. + acpi_walk_dep_device_list(san);
  2794. + return 0;
  2795. +
  2796. +err_install_dev:
  2797. + san_disable_events(pdev);
  2798. +err_enable_events:
  2799. + acpi_remove_address_space_handler(san, ACPI_ADR_SPACE_GSBUS, &san_opreg_handler);
  2800. +err_install_handler:
  2801. + platform_set_drvdata(san, NULL);
  2802. + san_consumers_unlink(&drvdata->consumers);
  2803. +err_consumers:
  2804. + kfree(drvdata);
  2805. + return status;
  2806. +}
  2807. +
  2808. +static int surface_sam_san_remove(struct platform_device *pdev)
  2809. +{
  2810. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2811. + acpi_handle san = ACPI_HANDLE(&pdev->dev); // _SAN device node
  2812. + acpi_status status = AE_OK;
  2813. +
  2814. + mutex_lock(&rqsg_if.lock);
  2815. + rqsg_if.san_dev = NULL;
  2816. + mutex_unlock(&rqsg_if.lock);
  2817. +
  2818. + acpi_remove_address_space_handler(san, ACPI_ADR_SPACE_GSBUS, &san_opreg_handler);
  2819. + san_disable_events(pdev);
  2820. +
  2821. + san_consumers_unlink(&drvdata->consumers);
  2822. + kfree(drvdata);
  2823. +
  2824. + platform_set_drvdata(pdev, NULL);
  2825. + return status;
  2826. +}
  2827. +
  2828. +
  2829. +static const struct san_acpi_consumer san_mshw0091_consumers[] = {
  2830. + { "\\_SB.SRTC", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2831. + { "\\ADP1", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2832. + { "\\_SB.BAT1", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2833. + { "\\_SB.BAT2", false, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2834. + { },
  2835. +};
  2836. +
  2837. +static const struct acpi_device_id surface_sam_san_match[] = {
  2838. + { "MSHW0091", (unsigned long) san_mshw0091_consumers },
  2839. + { },
  2840. +};
  2841. +MODULE_DEVICE_TABLE(acpi, surface_sam_san_match);
  2842. +
  2843. +static struct platform_driver surface_sam_san = {
  2844. + .probe = surface_sam_san_probe,
  2845. + .remove = surface_sam_san_remove,
  2846. + .driver = {
  2847. + .name = "surface_sam_san",
  2848. + .acpi_match_table = ACPI_PTR(surface_sam_san_match),
  2849. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  2850. + },
  2851. +};
  2852. +module_platform_driver(surface_sam_san);
  2853. +
  2854. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  2855. +MODULE_DESCRIPTION("Surface ACPI Notify Driver for 5th Generation Surface Devices");
  2856. +MODULE_LICENSE("GPL v2");
  2857. diff --git a/drivers/platform/x86/surface_sam/surface_sam_san.h b/drivers/platform/x86/surface_sam/surface_sam_san.h
  2858. new file mode 100644
  2859. index 000000000000..85b6d6569947
  2860. --- /dev/null
  2861. +++ b/drivers/platform/x86/surface_sam/surface_sam_san.h
  2862. @@ -0,0 +1,30 @@
  2863. +/* SPDX-License-Identifier: GPL-2.0 */
  2864. +/*
  2865. + * Interface for Surface ACPI/Notify (SAN).
  2866. + *
  2867. + * The SAN is the main interface between the Surface Serial Hub (SSH) and the
  2868. + * Surface/System Aggregator Module (SAM). It allows requests to be translated
  2869. + * from ACPI to SSH/SAM. It also interfaces with the discrete GPU hot-plug
  2870. + * driver.
  2871. + */
  2872. +
  2873. +#ifndef _SURFACE_SAM_SAN_H
  2874. +#define _SURFACE_SAM_SAN_H
  2875. +
  2876. +#include <linux/types.h>
  2877. +
  2878. +
  2879. +struct surface_sam_san_rqsg {
  2880. + u8 tc; // target category
  2881. + u8 cid; // command ID
  2882. + u8 iid; // instance ID
  2883. + u8 cdl; // command data length (length of payload)
  2884. + u8 *pld; // pointer to payload of length cdl
  2885. +};
  2886. +
  2887. +typedef int (*surface_sam_san_rqsg_handler_fn)(struct surface_sam_san_rqsg *rqsg, void *data);
  2888. +
  2889. +int surface_sam_san_consumer_register(struct device *consumer, u32 flags);
  2890. +int surface_sam_san_set_rqsg_handler(surface_sam_san_rqsg_handler_fn fn, void *data);
  2891. +
  2892. +#endif /* _SURFACE_SAM_SAN_H */
  2893. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid.c b/drivers/platform/x86/surface_sam/surface_sam_sid.c
  2894. new file mode 100644
  2895. index 000000000000..fb49d0e00808
  2896. --- /dev/null
  2897. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid.c
  2898. @@ -0,0 +1,137 @@
  2899. +// SPDX-License-Identifier: GPL-2.0
  2900. +/*
  2901. + * Surface Integration Driver.
  2902. + * MFD driver to provide device/model dependent functionality.
  2903. + */
  2904. +
  2905. +#include <linux/acpi.h>
  2906. +#include <linux/kernel.h>
  2907. +#include <linux/module.h>
  2908. +#include <linux/platform_device.h>
  2909. +#include <linux/mfd/core.h>
  2910. +
  2911. +
  2912. +static const struct mfd_cell sid_devs_sp4[] = {
  2913. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2914. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  2915. + { },
  2916. +};
  2917. +
  2918. +static const struct mfd_cell sid_devs_sp7[] = {
  2919. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2920. + { .name = "surface_sam_sid_ac", .id = -1 },
  2921. + { .name = "surface_sam_sid_battery", .id = -1 },
  2922. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  2923. + { },
  2924. +};
  2925. +
  2926. +static const struct mfd_cell sid_devs_sb1[] = {
  2927. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2928. + { },
  2929. +};
  2930. +
  2931. +static const struct mfd_cell sid_devs_sb2[] = {
  2932. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2933. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  2934. + { },
  2935. +};
  2936. +
  2937. +static const struct mfd_cell sid_devs_sl1[] = {
  2938. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2939. + { },
  2940. +};
  2941. +
  2942. +static const struct mfd_cell sid_devs_sl2[] = {
  2943. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2944. + { },
  2945. +};
  2946. +
  2947. +static const struct mfd_cell sid_devs_sl3_13[] = {
  2948. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2949. + { .name = "surface_sam_sid_vhf", .id = -1 },
  2950. + { .name = "surface_sam_sid_ac", .id = -1 },
  2951. + { .name = "surface_sam_sid_battery", .id = -1 },
  2952. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  2953. + { },
  2954. +};
  2955. +
  2956. +static const struct mfd_cell sid_devs_sl3_15[] = {
  2957. + { .name = "surface_sam_sid_vhf", .id = -1 },
  2958. + { .name = "surface_sam_sid_ac", .id = -1 },
  2959. + { .name = "surface_sam_sid_battery", .id = -1 },
  2960. + { },
  2961. +};
  2962. +
  2963. +static const struct acpi_device_id surface_sam_sid_match[] = {
  2964. + /* Surface Pro 4, 5, and 6 */
  2965. + { "MSHW0081", (unsigned long)sid_devs_sp4 },
  2966. +
  2967. + /* Surface Pro 7 */
  2968. + { "MSHW0116", (unsigned long)sid_devs_sp7 },
  2969. +
  2970. + /* Surface Book 1 */
  2971. + { "MSHW0080", (unsigned long)sid_devs_sb1 },
  2972. +
  2973. + /* Surface Book 2 */
  2974. + { "MSHW0107", (unsigned long)sid_devs_sb2 },
  2975. +
  2976. + /* Surface Laptop 1 */
  2977. + { "MSHW0086", (unsigned long)sid_devs_sl1 },
  2978. +
  2979. + /* Surface Laptop 2 */
  2980. + { "MSHW0112", (unsigned long)sid_devs_sl2 },
  2981. +
  2982. + /* Surface Laptop 3 (13") */
  2983. + { "MSHW0114", (unsigned long)sid_devs_sl3_13 },
  2984. +
  2985. + /* Surface Laptop 3 (15") */
  2986. + { "MSHW0110", (unsigned long)sid_devs_sl3_15 },
  2987. +
  2988. + { },
  2989. +};
  2990. +MODULE_DEVICE_TABLE(acpi, surface_sam_sid_match);
  2991. +
  2992. +
  2993. +static int surface_sam_sid_probe(struct platform_device *pdev)
  2994. +{
  2995. + const struct acpi_device_id *match;
  2996. + const struct mfd_cell *cells, *p;
  2997. +
  2998. + match = acpi_match_device(surface_sam_sid_match, &pdev->dev);
  2999. + if (!match)
  3000. + return -ENODEV;
  3001. +
  3002. + cells = (struct mfd_cell *)match->driver_data;
  3003. + if (!cells)
  3004. + return -ENODEV;
  3005. +
  3006. + for (p = cells; p->name; ++p) {
  3007. + /* just count */
  3008. + }
  3009. +
  3010. + if (p == cells)
  3011. + return -ENODEV;
  3012. +
  3013. + return mfd_add_devices(&pdev->dev, 0, cells, p - cells, NULL, 0, NULL);
  3014. +}
  3015. +
  3016. +static int surface_sam_sid_remove(struct platform_device *pdev)
  3017. +{
  3018. + mfd_remove_devices(&pdev->dev);
  3019. + return 0;
  3020. +}
  3021. +
  3022. +static struct platform_driver surface_sam_sid = {
  3023. + .probe = surface_sam_sid_probe,
  3024. + .remove = surface_sam_sid_remove,
  3025. + .driver = {
  3026. + .name = "surface_sam_sid",
  3027. + .acpi_match_table = ACPI_PTR(surface_sam_sid_match),
  3028. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3029. + },
  3030. +};
  3031. +module_platform_driver(surface_sam_sid);
  3032. +
  3033. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3034. +MODULE_DESCRIPTION("Surface Integration Driver for 5th Generation Surface Devices");
  3035. +MODULE_LICENSE("GPL v2");
  3036. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c b/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  3037. new file mode 100644
  3038. index 000000000000..286411701d36
  3039. --- /dev/null
  3040. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  3041. @@ -0,0 +1,224 @@
  3042. +// SPDX-License-Identifier: GPL-2.0
  3043. +/*
  3044. + * Surface Lid driver to enable wakeup from suspend via the lid.
  3045. + */
  3046. +
  3047. +#include <linux/acpi.h>
  3048. +#include <linux/dmi.h>
  3049. +#include <linux/kernel.h>
  3050. +#include <linux/module.h>
  3051. +#include <linux/platform_device.h>
  3052. +
  3053. +
  3054. +struct sid_lid_device {
  3055. + const char *acpi_path;
  3056. + const u32 gpe_number;
  3057. +};
  3058. +
  3059. +
  3060. +static const struct sid_lid_device lid_device_l17 = {
  3061. + .acpi_path = "\\_SB.LID0",
  3062. + .gpe_number = 0x17,
  3063. +};
  3064. +
  3065. +static const struct sid_lid_device lid_device_l4D = {
  3066. + .acpi_path = "\\_SB.LID0",
  3067. + .gpe_number = 0x4D,
  3068. +};
  3069. +
  3070. +static const struct sid_lid_device lid_device_l4F = {
  3071. + .acpi_path = "\\_SB.LID0",
  3072. + .gpe_number = 0x4F,
  3073. +};
  3074. +
  3075. +static const struct sid_lid_device lid_device_l57 = {
  3076. + .acpi_path = "\\_SB.LID0",
  3077. + .gpe_number = 0x57,
  3078. +};
  3079. +
  3080. +
  3081. +static const struct dmi_system_id dmi_lid_device_table[] = {
  3082. + {
  3083. + .ident = "Surface Pro 4",
  3084. + .matches = {
  3085. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3086. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 4"),
  3087. + },
  3088. + .driver_data = (void *)&lid_device_l17,
  3089. + },
  3090. + {
  3091. + .ident = "Surface Pro 5",
  3092. + .matches = {
  3093. + /* match for SKU here due to generic product name "Surface Pro" */
  3094. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3095. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1796"),
  3096. + },
  3097. + .driver_data = (void *)&lid_device_l4F,
  3098. + },
  3099. + {
  3100. + .ident = "Surface Pro 5 (LTE)",
  3101. + .matches = {
  3102. + /* match for SKU here due to generic product name "Surface Pro" */
  3103. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3104. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1807"),
  3105. + },
  3106. + .driver_data = (void *)&lid_device_l4F,
  3107. + },
  3108. + {
  3109. + .ident = "Surface Pro 6",
  3110. + .matches = {
  3111. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3112. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 6"),
  3113. + },
  3114. + .driver_data = (void *)&lid_device_l4F,
  3115. + },
  3116. + {
  3117. + .ident = "Surface Pro 7",
  3118. + .matches = {
  3119. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3120. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 7"),
  3121. + },
  3122. + .driver_data = (void *)&lid_device_l4D,
  3123. + },
  3124. + {
  3125. + .ident = "Surface Book 1",
  3126. + .matches = {
  3127. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3128. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book"),
  3129. + },
  3130. + .driver_data = (void *)&lid_device_l17,
  3131. + },
  3132. + {
  3133. + .ident = "Surface Book 2",
  3134. + .matches = {
  3135. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3136. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book 2"),
  3137. + },
  3138. + .driver_data = (void *)&lid_device_l17,
  3139. + },
  3140. + {
  3141. + .ident = "Surface Laptop 1",
  3142. + .matches = {
  3143. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3144. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop"),
  3145. + },
  3146. + .driver_data = (void *)&lid_device_l57,
  3147. + },
  3148. + {
  3149. + .ident = "Surface Laptop 2",
  3150. + .matches = {
  3151. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3152. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop 2"),
  3153. + },
  3154. + .driver_data = (void *)&lid_device_l57,
  3155. + },
  3156. + {
  3157. + .ident = "Surface Laptop 3 (13\")",
  3158. + .matches = {
  3159. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3160. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Laptop_3_1867:1868"),
  3161. + },
  3162. + .driver_data = (void *)&lid_device_l4D,
  3163. + },
  3164. + { }
  3165. +};
  3166. +
  3167. +
  3168. +static int sid_lid_enable_wakeup(const struct sid_lid_device *dev, bool enable)
  3169. +{
  3170. + int action = enable ? ACPI_GPE_ENABLE : ACPI_GPE_DISABLE;
  3171. + int status;
  3172. +
  3173. + status = acpi_set_gpe_wake_mask(NULL, dev->gpe_number, action);
  3174. + if (status)
  3175. + return -EFAULT;
  3176. +
  3177. + return 0;
  3178. +}
  3179. +
  3180. +
  3181. +static int surface_sam_sid_gpelid_suspend(struct device *dev)
  3182. +{
  3183. + const struct sid_lid_device *ldev;
  3184. +
  3185. + ldev = dev_get_drvdata(dev);
  3186. + return sid_lid_enable_wakeup(ldev, true);
  3187. +}
  3188. +
  3189. +static int surface_sam_sid_gpelid_resume(struct device *dev)
  3190. +{
  3191. + const struct sid_lid_device *ldev;
  3192. +
  3193. + ldev = dev_get_drvdata(dev);
  3194. + return sid_lid_enable_wakeup(ldev, false);
  3195. +}
  3196. +
  3197. +static SIMPLE_DEV_PM_OPS(surface_sam_sid_gpelid_pm,
  3198. + surface_sam_sid_gpelid_suspend,
  3199. + surface_sam_sid_gpelid_resume);
  3200. +
  3201. +
  3202. +static int surface_sam_sid_gpelid_probe(struct platform_device *pdev)
  3203. +{
  3204. + const struct dmi_system_id *match;
  3205. + struct sid_lid_device *dev;
  3206. + acpi_handle lid_handle;
  3207. + int status;
  3208. +
  3209. + match = dmi_first_match(dmi_lid_device_table);
  3210. + if (!match)
  3211. + return -ENODEV;
  3212. +
  3213. + dev = match->driver_data;
  3214. + if (!dev)
  3215. + return -ENODEV;
  3216. +
  3217. + status = acpi_get_handle(NULL, (acpi_string)dev->acpi_path, &lid_handle);
  3218. + if (status)
  3219. + return -EFAULT;
  3220. +
  3221. + status = acpi_setup_gpe_for_wake(lid_handle, NULL, dev->gpe_number);
  3222. + if (status)
  3223. + return -EFAULT;
  3224. +
  3225. + status = acpi_enable_gpe(NULL, dev->gpe_number);
  3226. + if (status)
  3227. + return -EFAULT;
  3228. +
  3229. + status = sid_lid_enable_wakeup(dev, false);
  3230. + if (status) {
  3231. + acpi_disable_gpe(NULL, dev->gpe_number);
  3232. + return status;
  3233. + }
  3234. +
  3235. + platform_set_drvdata(pdev, dev);
  3236. + return 0;
  3237. +}
  3238. +
  3239. +static int surface_sam_sid_gpelid_remove(struct platform_device *pdev)
  3240. +{
  3241. + struct sid_lid_device *dev = platform_get_drvdata(pdev);
  3242. +
  3243. + /* restore default behavior without this module */
  3244. + sid_lid_enable_wakeup(dev, false);
  3245. + acpi_disable_gpe(NULL, dev->gpe_number);
  3246. +
  3247. + platform_set_drvdata(pdev, NULL);
  3248. + return 0;
  3249. +}
  3250. +
  3251. +static struct platform_driver surface_sam_sid_gpelid = {
  3252. + .probe = surface_sam_sid_gpelid_probe,
  3253. + .remove = surface_sam_sid_gpelid_remove,
  3254. + .driver = {
  3255. + .name = "surface_sam_sid_gpelid",
  3256. + .pm = &surface_sam_sid_gpelid_pm,
  3257. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3258. + },
  3259. +};
  3260. +module_platform_driver(surface_sam_sid_gpelid);
  3261. +
  3262. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3263. +MODULE_DESCRIPTION("Surface Lid Driver for 5th Generation Surface Devices");
  3264. +MODULE_LICENSE("GPL v2");
  3265. +MODULE_ALIAS("platform:surface_sam_sid_gpelid");
  3266. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c b/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  3267. new file mode 100644
  3268. index 000000000000..f74e2b51604d
  3269. --- /dev/null
  3270. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  3271. @@ -0,0 +1,216 @@
  3272. +// SPDX-License-Identifier: GPL-2.0
  3273. +/*
  3274. + * Surface Performance Mode Driver.
  3275. + * Allows to change cooling capabilities based on user preference.
  3276. + */
  3277. +
  3278. +#include <asm/unaligned.h>
  3279. +#include <linux/kernel.h>
  3280. +#include <linux/module.h>
  3281. +#include <linux/platform_device.h>
  3282. +
  3283. +#include "surface_sam_ssh.h"
  3284. +
  3285. +
  3286. +#define SID_PARAM_PERM 0644
  3287. +
  3288. +enum sam_perf_mode {
  3289. + SAM_PERF_MODE_NORMAL = 1,
  3290. + SAM_PERF_MODE_BATTERY = 2,
  3291. + SAM_PERF_MODE_PERF1 = 3,
  3292. + SAM_PERF_MODE_PERF2 = 4,
  3293. +
  3294. + __SAM_PERF_MODE__START = 1,
  3295. + __SAM_PERF_MODE__END = 4,
  3296. +};
  3297. +
  3298. +enum sid_param_perf_mode {
  3299. + SID_PARAM_PERF_MODE_AS_IS = 0,
  3300. + SID_PARAM_PERF_MODE_NORMAL = SAM_PERF_MODE_NORMAL,
  3301. + SID_PARAM_PERF_MODE_BATTERY = SAM_PERF_MODE_BATTERY,
  3302. + SID_PARAM_PERF_MODE_PERF1 = SAM_PERF_MODE_PERF1,
  3303. + SID_PARAM_PERF_MODE_PERF2 = SAM_PERF_MODE_PERF2,
  3304. +
  3305. + __SID_PARAM_PERF_MODE__START = 0,
  3306. + __SID_PARAM_PERF_MODE__END = 4,
  3307. +};
  3308. +
  3309. +
  3310. +static int surface_sam_perf_mode_get(void)
  3311. +{
  3312. + u8 result_buf[8] = { 0 };
  3313. + int status;
  3314. +
  3315. + struct surface_sam_ssh_rqst rqst = {
  3316. + .tc = 0x03,
  3317. + .cid = 0x02,
  3318. + .iid = 0x00,
  3319. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  3320. + .snc = 0x01,
  3321. + .cdl = 0x00,
  3322. + .pld = NULL,
  3323. + };
  3324. +
  3325. + struct surface_sam_ssh_buf result = {
  3326. + .cap = ARRAY_SIZE(result_buf),
  3327. + .len = 0,
  3328. + .data = result_buf,
  3329. + };
  3330. +
  3331. + status = surface_sam_ssh_rqst(&rqst, &result);
  3332. + if (status)
  3333. + return status;
  3334. +
  3335. + if (result.len != 8)
  3336. + return -EFAULT;
  3337. +
  3338. + return get_unaligned_le32(&result.data[0]);
  3339. +}
  3340. +
  3341. +static int surface_sam_perf_mode_set(int perf_mode)
  3342. +{
  3343. + u8 payload[4] = { 0 };
  3344. +
  3345. + struct surface_sam_ssh_rqst rqst = {
  3346. + .tc = 0x03,
  3347. + .cid = 0x03,
  3348. + .iid = 0x00,
  3349. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  3350. + .snc = 0x00,
  3351. + .cdl = ARRAY_SIZE(payload),
  3352. + .pld = payload,
  3353. + };
  3354. +
  3355. + if (perf_mode < __SAM_PERF_MODE__START || perf_mode > __SAM_PERF_MODE__END)
  3356. + return -EINVAL;
  3357. +
  3358. + put_unaligned_le32(perf_mode, &rqst.pld[0]);
  3359. + return surface_sam_ssh_rqst(&rqst, NULL);
  3360. +}
  3361. +
  3362. +
  3363. +static int param_perf_mode_set(const char *val, const struct kernel_param *kp)
  3364. +{
  3365. + int perf_mode;
  3366. + int status;
  3367. +
  3368. + status = kstrtoint(val, 0, &perf_mode);
  3369. + if (status)
  3370. + return status;
  3371. +
  3372. + if (perf_mode < __SID_PARAM_PERF_MODE__START || perf_mode > __SID_PARAM_PERF_MODE__END)
  3373. + return -EINVAL;
  3374. +
  3375. + return param_set_int(val, kp);
  3376. +}
  3377. +
  3378. +static const struct kernel_param_ops param_perf_mode_ops = {
  3379. + .set = param_perf_mode_set,
  3380. + .get = param_get_int,
  3381. +};
  3382. +
  3383. +static int param_perf_mode_init = SID_PARAM_PERF_MODE_AS_IS;
  3384. +static int param_perf_mode_exit = SID_PARAM_PERF_MODE_AS_IS;
  3385. +
  3386. +module_param_cb(perf_mode_init, &param_perf_mode_ops, &param_perf_mode_init, SID_PARAM_PERM);
  3387. +module_param_cb(perf_mode_exit, &param_perf_mode_ops, &param_perf_mode_exit, SID_PARAM_PERM);
  3388. +
  3389. +MODULE_PARM_DESC(perf_mode_init, "Performance-mode to be set on module initialization");
  3390. +MODULE_PARM_DESC(perf_mode_exit, "Performance-mode to be set on module exit");
  3391. +
  3392. +
  3393. +static ssize_t perf_mode_show(struct device *dev, struct device_attribute *attr, char *data)
  3394. +{
  3395. + int perf_mode;
  3396. +
  3397. + perf_mode = surface_sam_perf_mode_get();
  3398. + if (perf_mode < 0) {
  3399. + dev_err(dev, "failed to get current performance mode: %d", perf_mode);
  3400. + return -EIO;
  3401. + }
  3402. +
  3403. + return sprintf(data, "%d\n", perf_mode);
  3404. +}
  3405. +
  3406. +static ssize_t perf_mode_store(struct device *dev, struct device_attribute *attr,
  3407. + const char *data, size_t count)
  3408. +{
  3409. + int perf_mode;
  3410. + int status;
  3411. +
  3412. + status = kstrtoint(data, 0, &perf_mode);
  3413. + if (status)
  3414. + return status;
  3415. +
  3416. + status = surface_sam_perf_mode_set(perf_mode);
  3417. + if (status)
  3418. + return status;
  3419. +
  3420. + // TODO: Should we notify ACPI here?
  3421. + //
  3422. + // There is a _DSM call described as
  3423. + // WSID._DSM: Notify DPTF on Slider State change
  3424. + // which calls
  3425. + // ODV3 = ToInteger (Arg3)
  3426. + // Notify(IETM, 0x88)
  3427. + // IETM is an INT3400 Intel Dynamic Power Performance Management
  3428. + // device, part of the DPTF framework. From the corresponding
  3429. + // kernel driver, it looks like event 0x88 is being ignored. Also
  3430. + // it is currently unknown what the consequecnes of setting ODV3
  3431. + // are.
  3432. +
  3433. + return count;
  3434. +}
  3435. +
  3436. +const static DEVICE_ATTR_RW(perf_mode);
  3437. +
  3438. +
  3439. +static int surface_sam_sid_perfmode_probe(struct platform_device *pdev)
  3440. +{
  3441. + int status;
  3442. +
  3443. + // link to ec
  3444. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  3445. + if (status)
  3446. + return status == -ENXIO ? -EPROBE_DEFER : status;
  3447. +
  3448. + // set initial perf_mode
  3449. + if (param_perf_mode_init != SID_PARAM_PERF_MODE_AS_IS) {
  3450. + status = surface_sam_perf_mode_set(param_perf_mode_init);
  3451. + if (status)
  3452. + return status;
  3453. + }
  3454. +
  3455. + // register perf_mode attribute
  3456. + status = sysfs_create_file(&pdev->dev.kobj, &dev_attr_perf_mode.attr);
  3457. + if (status)
  3458. + goto err_sysfs;
  3459. +
  3460. + return 0;
  3461. +
  3462. +err_sysfs:
  3463. + surface_sam_perf_mode_set(param_perf_mode_exit);
  3464. + return status;
  3465. +}
  3466. +
  3467. +static int surface_sam_sid_perfmode_remove(struct platform_device *pdev)
  3468. +{
  3469. + sysfs_remove_file(&pdev->dev.kobj, &dev_attr_perf_mode.attr);
  3470. + surface_sam_perf_mode_set(param_perf_mode_exit);
  3471. + return 0;
  3472. +}
  3473. +
  3474. +static struct platform_driver surface_sam_sid_perfmode = {
  3475. + .probe = surface_sam_sid_perfmode_probe,
  3476. + .remove = surface_sam_sid_perfmode_remove,
  3477. + .driver = {
  3478. + .name = "surface_sam_sid_perfmode",
  3479. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3480. + },
  3481. +};
  3482. +module_platform_driver(surface_sam_sid_perfmode);
  3483. +
  3484. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3485. +MODULE_DESCRIPTION("Surface Performance Mode Driver for 5th Generation Surface Devices");
  3486. +MODULE_LICENSE("GPL v2");
  3487. +MODULE_ALIAS("platform:surface_sam_sid_perfmode");
  3488. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_power.c b/drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  3489. new file mode 100644
  3490. index 000000000000..eb925bdda883
  3491. --- /dev/null
  3492. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  3493. @@ -0,0 +1,1264 @@
  3494. +// SPDX-License-Identifier: GPL-2.0
  3495. +/*
  3496. + * Surface SID Battery/AC Driver.
  3497. + * Provides support for the battery and AC on 7th generation Surface devices.
  3498. + */
  3499. +
  3500. +#include <linux/kernel.h>
  3501. +#include <linux/delay.h>
  3502. +#include <linux/jiffies.h>
  3503. +#include <linux/module.h>
  3504. +#include <linux/platform_device.h>
  3505. +#include <linux/power_supply.h>
  3506. +#include <linux/workqueue.h>
  3507. +
  3508. +#include "surface_sam_ssh.h"
  3509. +
  3510. +#define SPWR_WARN KERN_WARNING KBUILD_MODNAME ": "
  3511. +#define SPWR_DEBUG KERN_DEBUG KBUILD_MODNAME ": "
  3512. +
  3513. +
  3514. +// TODO: check BIX/BST for unknown/unsupported 0xffffffff entries
  3515. +// TODO: DPTF (/SAN notifications)?
  3516. +// TODO: other properties?
  3517. +
  3518. +
  3519. +static unsigned int cache_time = 1000;
  3520. +module_param(cache_time, uint, 0644);
  3521. +MODULE_PARM_DESC(cache_time, "battery state chaching time in milliseconds [default: 1000]");
  3522. +
  3523. +#define SPWR_AC_BAT_UPDATE_DELAY msecs_to_jiffies(5000)
  3524. +
  3525. +
  3526. +/*
  3527. + * SAM Interface.
  3528. + */
  3529. +
  3530. +#define SAM_PWR_TC 0x02
  3531. +#define SAM_PWR_RQID 0x0002
  3532. +
  3533. +#define SAM_RQST_PWR_CID_STA 0x01
  3534. +#define SAM_RQST_PWR_CID_BIX 0x02
  3535. +#define SAM_RQST_PWR_CID_BST 0x03
  3536. +#define SAM_RQST_PWR_CID_BTP 0x04
  3537. +
  3538. +#define SAM_RQST_PWR_CID_PMAX 0x0b
  3539. +#define SAM_RQST_PWR_CID_PSOC 0x0c
  3540. +#define SAM_RQST_PWR_CID_PSRC 0x0d
  3541. +#define SAM_RQST_PWR_CID_CHGI 0x0e
  3542. +#define SAM_RQST_PWR_CID_ARTG 0x0f
  3543. +
  3544. +#define SAM_EVENT_PWR_CID_BIX 0x15
  3545. +#define SAM_EVENT_PWR_CID_BST 0x16
  3546. +#define SAM_EVENT_PWR_CID_ADAPTER 0x17
  3547. +#define SAM_EVENT_PWR_CID_DPTF 0x4f
  3548. +
  3549. +#define SAM_BATTERY_STA_OK 0x0f
  3550. +#define SAM_BATTERY_STA_PRESENT 0x10
  3551. +
  3552. +#define SAM_BATTERY_STATE_DISCHARGING 0x01
  3553. +#define SAM_BATTERY_STATE_CHARGING 0x02
  3554. +#define SAM_BATTERY_STATE_CRITICAL 0x04
  3555. +
  3556. +#define SAM_BATTERY_POWER_UNIT_MA 1
  3557. +
  3558. +
  3559. +/* Equivalent to data returned in ACPI _BIX method */
  3560. +struct spwr_bix {
  3561. + u8 revision;
  3562. + u32 power_unit;
  3563. + u32 design_cap;
  3564. + u32 last_full_charge_cap;
  3565. + u32 technology;
  3566. + u32 design_voltage;
  3567. + u32 design_cap_warn;
  3568. + u32 design_cap_low;
  3569. + u32 cycle_count;
  3570. + u32 measurement_accuracy;
  3571. + u32 max_sampling_time;
  3572. + u32 min_sampling_time;
  3573. + u32 max_avg_interval;
  3574. + u32 min_avg_interval;
  3575. + u32 bat_cap_granularity_1;
  3576. + u32 bat_cap_granularity_2;
  3577. + u8 model[21];
  3578. + u8 serial[11];
  3579. + u8 type[5];
  3580. + u8 oem_info[21];
  3581. +} __packed;
  3582. +
  3583. +/* Equivalent to data returned in ACPI _BST method */
  3584. +struct spwr_bst {
  3585. + u32 state;
  3586. + u32 present_rate;
  3587. + u32 remaining_cap;
  3588. + u32 present_voltage;
  3589. +} __packed;
  3590. +
  3591. +/* DPTF event payload */
  3592. +struct spwr_event_dptf {
  3593. + u32 pmax;
  3594. + u32 _1; /* currently unknown */
  3595. + u32 _2; /* currently unknown */
  3596. +} __packed;
  3597. +
  3598. +
  3599. +/* Get battery status (_STA) */
  3600. +static int sam_psy_get_sta(u8 iid, u32 *sta)
  3601. +{
  3602. + struct surface_sam_ssh_rqst rqst;
  3603. + struct surface_sam_ssh_buf result;
  3604. +
  3605. + rqst.tc = SAM_PWR_TC;
  3606. + rqst.cid = SAM_RQST_PWR_CID_STA;
  3607. + rqst.iid = iid;
  3608. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3609. + rqst.snc = 0x01;
  3610. + rqst.cdl = 0x00;
  3611. + rqst.pld = NULL;
  3612. +
  3613. + result.cap = sizeof(u32);
  3614. + result.len = 0;
  3615. + result.data = (u8 *)sta;
  3616. +
  3617. + return surface_sam_ssh_rqst(&rqst, &result);
  3618. +}
  3619. +
  3620. +/* Get battery static information (_BIX) */
  3621. +static int sam_psy_get_bix(u8 iid, struct spwr_bix *bix)
  3622. +{
  3623. + struct surface_sam_ssh_rqst rqst;
  3624. + struct surface_sam_ssh_buf result;
  3625. +
  3626. + rqst.tc = SAM_PWR_TC;
  3627. + rqst.cid = SAM_RQST_PWR_CID_BIX;
  3628. + rqst.iid = iid;
  3629. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3630. + rqst.snc = 0x01;
  3631. + rqst.cdl = 0x00;
  3632. + rqst.pld = NULL;
  3633. +
  3634. + result.cap = sizeof(struct spwr_bix);
  3635. + result.len = 0;
  3636. + result.data = (u8 *)bix;
  3637. +
  3638. + return surface_sam_ssh_rqst(&rqst, &result);
  3639. +}
  3640. +
  3641. +/* Get battery dynamic information (_BST) */
  3642. +static int sam_psy_get_bst(u8 iid, struct spwr_bst *bst)
  3643. +{
  3644. + struct surface_sam_ssh_rqst rqst;
  3645. + struct surface_sam_ssh_buf result;
  3646. +
  3647. + rqst.tc = SAM_PWR_TC;
  3648. + rqst.cid = SAM_RQST_PWR_CID_BST;
  3649. + rqst.iid = iid;
  3650. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3651. + rqst.snc = 0x01;
  3652. + rqst.cdl = 0x00;
  3653. + rqst.pld = NULL;
  3654. +
  3655. + result.cap = sizeof(struct spwr_bst);
  3656. + result.len = 0;
  3657. + result.data = (u8 *)bst;
  3658. +
  3659. + return surface_sam_ssh_rqst(&rqst, &result);
  3660. +}
  3661. +
  3662. +/* Set battery trip point (_BTP) */
  3663. +static int sam_psy_set_btp(u8 iid, u32 btp)
  3664. +{
  3665. + struct surface_sam_ssh_rqst rqst;
  3666. +
  3667. + rqst.tc = SAM_PWR_TC;
  3668. + rqst.cid = SAM_RQST_PWR_CID_BTP;
  3669. + rqst.iid = iid;
  3670. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3671. + rqst.snc = 0x00;
  3672. + rqst.cdl = sizeof(u32);
  3673. + rqst.pld = (u8 *)&btp;
  3674. +
  3675. + return surface_sam_ssh_rqst(&rqst, NULL);
  3676. +}
  3677. +
  3678. +/* Get platform power soruce for battery (DPTF PSRC) */
  3679. +static int sam_psy_get_psrc(u8 iid, u32 *psrc)
  3680. +{
  3681. + struct surface_sam_ssh_rqst rqst;
  3682. + struct surface_sam_ssh_buf result;
  3683. +
  3684. + rqst.tc = SAM_PWR_TC;
  3685. + rqst.cid = SAM_RQST_PWR_CID_PSRC;
  3686. + rqst.iid = iid;
  3687. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3688. + rqst.snc = 0x01;
  3689. + rqst.cdl = 0x00;
  3690. + rqst.pld = NULL;
  3691. +
  3692. + result.cap = sizeof(u32);
  3693. + result.len = 0;
  3694. + result.data = (u8 *)psrc;
  3695. +
  3696. + return surface_sam_ssh_rqst(&rqst, &result);
  3697. +}
  3698. +
  3699. +/* Get maximum platform power for battery (DPTF PMAX) */
  3700. +__always_unused
  3701. +static int sam_psy_get_pmax(u8 iid, u32 *pmax)
  3702. +{
  3703. + struct surface_sam_ssh_rqst rqst;
  3704. + struct surface_sam_ssh_buf result;
  3705. +
  3706. + rqst.tc = SAM_PWR_TC;
  3707. + rqst.cid = SAM_RQST_PWR_CID_PMAX;
  3708. + rqst.iid = iid;
  3709. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3710. + rqst.snc = 0x01;
  3711. + rqst.cdl = 0x00;
  3712. + rqst.pld = NULL;
  3713. +
  3714. + result.cap = sizeof(u32);
  3715. + result.len = 0;
  3716. + result.data = (u8 *)pmax;
  3717. +
  3718. + return surface_sam_ssh_rqst(&rqst, &result);
  3719. +}
  3720. +
  3721. +/* Get adapter rating (DPTF ARTG) */
  3722. +__always_unused
  3723. +static int sam_psy_get_artg(u8 iid, u32 *artg)
  3724. +{
  3725. + struct surface_sam_ssh_rqst rqst;
  3726. + struct surface_sam_ssh_buf result;
  3727. +
  3728. + rqst.tc = SAM_PWR_TC;
  3729. + rqst.cid = SAM_RQST_PWR_CID_ARTG;
  3730. + rqst.iid = iid;
  3731. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3732. + rqst.snc = 0x01;
  3733. + rqst.cdl = 0x00;
  3734. + rqst.pld = NULL;
  3735. +
  3736. + result.cap = sizeof(u32);
  3737. + result.len = 0;
  3738. + result.data = (u8 *)artg;
  3739. +
  3740. + return surface_sam_ssh_rqst(&rqst, &result);
  3741. +}
  3742. +
  3743. +/* Unknown (DPTF PSOC) */
  3744. +__always_unused
  3745. +static int sam_psy_get_psoc(u8 iid, u32 *psoc)
  3746. +{
  3747. + struct surface_sam_ssh_rqst rqst;
  3748. + struct surface_sam_ssh_buf result;
  3749. +
  3750. + rqst.tc = SAM_PWR_TC;
  3751. + rqst.cid = SAM_RQST_PWR_CID_PSOC;
  3752. + rqst.iid = iid;
  3753. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3754. + rqst.snc = 0x01;
  3755. + rqst.cdl = 0x00;
  3756. + rqst.pld = NULL;
  3757. +
  3758. + result.cap = sizeof(u32);
  3759. + result.len = 0;
  3760. + result.data = (u8 *)psoc;
  3761. +
  3762. + return surface_sam_ssh_rqst(&rqst, &result);
  3763. +}
  3764. +
  3765. +/* Unknown (DPTF CHGI/ INT3403 SPPC) */
  3766. +__always_unused
  3767. +static int sam_psy_set_chgi(u8 iid, u32 chgi)
  3768. +{
  3769. + struct surface_sam_ssh_rqst rqst;
  3770. +
  3771. + rqst.tc = SAM_PWR_TC;
  3772. + rqst.cid = SAM_RQST_PWR_CID_CHGI;
  3773. + rqst.iid = iid;
  3774. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3775. + rqst.snc = 0x00;
  3776. + rqst.cdl = sizeof(u32);
  3777. + rqst.pld = (u8 *)&chgi;
  3778. +
  3779. + return surface_sam_ssh_rqst(&rqst, NULL);
  3780. +}
  3781. +
  3782. +
  3783. +/*
  3784. + * Common Power-Subsystem Interface.
  3785. + */
  3786. +
  3787. +enum spwr_battery_id {
  3788. + SPWR_BAT1,
  3789. + SPWR_BAT2,
  3790. + __SPWR_NUM_BAT,
  3791. +};
  3792. +#define SPWR_BAT_SINGLE PLATFORM_DEVID_NONE
  3793. +
  3794. +struct spwr_battery_device {
  3795. + struct platform_device *pdev;
  3796. + enum spwr_battery_id id;
  3797. +
  3798. + char name[32];
  3799. + struct power_supply *psy;
  3800. + struct power_supply_desc psy_desc;
  3801. +
  3802. + struct delayed_work update_work;
  3803. +
  3804. + struct mutex lock;
  3805. + unsigned long timestamp;
  3806. +
  3807. + u32 sta;
  3808. + struct spwr_bix bix;
  3809. + struct spwr_bst bst;
  3810. + u32 alarm;
  3811. +};
  3812. +
  3813. +struct spwr_ac_device {
  3814. + struct platform_device *pdev;
  3815. +
  3816. + char name[32];
  3817. + struct power_supply *psy;
  3818. + struct power_supply_desc psy_desc;
  3819. +
  3820. + struct mutex lock;
  3821. +
  3822. + u32 state;
  3823. +};
  3824. +
  3825. +struct spwr_subsystem {
  3826. + struct mutex lock;
  3827. +
  3828. + unsigned int refcount;
  3829. + struct spwr_ac_device *ac;
  3830. + struct spwr_battery_device *battery[__SPWR_NUM_BAT];
  3831. +};
  3832. +
  3833. +static struct spwr_subsystem spwr_subsystem = {
  3834. + .lock = __MUTEX_INITIALIZER(spwr_subsystem.lock),
  3835. +};
  3836. +
  3837. +static enum power_supply_property spwr_ac_props[] = {
  3838. + POWER_SUPPLY_PROP_ONLINE,
  3839. +};
  3840. +
  3841. +static enum power_supply_property spwr_battery_props_chg[] = {
  3842. + POWER_SUPPLY_PROP_STATUS,
  3843. + POWER_SUPPLY_PROP_PRESENT,
  3844. + POWER_SUPPLY_PROP_TECHNOLOGY,
  3845. + POWER_SUPPLY_PROP_CYCLE_COUNT,
  3846. + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  3847. + POWER_SUPPLY_PROP_VOLTAGE_NOW,
  3848. + POWER_SUPPLY_PROP_CURRENT_NOW,
  3849. + POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
  3850. + POWER_SUPPLY_PROP_CHARGE_FULL,
  3851. + POWER_SUPPLY_PROP_CHARGE_NOW,
  3852. + POWER_SUPPLY_PROP_CAPACITY,
  3853. + POWER_SUPPLY_PROP_CAPACITY_LEVEL,
  3854. + POWER_SUPPLY_PROP_MODEL_NAME,
  3855. + POWER_SUPPLY_PROP_MANUFACTURER,
  3856. + POWER_SUPPLY_PROP_SERIAL_NUMBER,
  3857. +};
  3858. +
  3859. +static enum power_supply_property spwr_battery_props_eng[] = {
  3860. + POWER_SUPPLY_PROP_STATUS,
  3861. + POWER_SUPPLY_PROP_PRESENT,
  3862. + POWER_SUPPLY_PROP_TECHNOLOGY,
  3863. + POWER_SUPPLY_PROP_CYCLE_COUNT,
  3864. + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  3865. + POWER_SUPPLY_PROP_VOLTAGE_NOW,
  3866. + POWER_SUPPLY_PROP_POWER_NOW,
  3867. + POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN,
  3868. + POWER_SUPPLY_PROP_ENERGY_FULL,
  3869. + POWER_SUPPLY_PROP_ENERGY_NOW,
  3870. + POWER_SUPPLY_PROP_CAPACITY,
  3871. + POWER_SUPPLY_PROP_CAPACITY_LEVEL,
  3872. + POWER_SUPPLY_PROP_MODEL_NAME,
  3873. + POWER_SUPPLY_PROP_MANUFACTURER,
  3874. + POWER_SUPPLY_PROP_SERIAL_NUMBER,
  3875. +};
  3876. +
  3877. +
  3878. +static int spwr_battery_register(struct spwr_battery_device *bat, struct platform_device *pdev,
  3879. + enum spwr_battery_id id);
  3880. +
  3881. +static int spwr_battery_unregister(struct spwr_battery_device *bat);
  3882. +
  3883. +
  3884. +static inline bool spwr_battery_present(struct spwr_battery_device *bat)
  3885. +{
  3886. + return bat->sta & SAM_BATTERY_STA_PRESENT;
  3887. +}
  3888. +
  3889. +
  3890. +static inline int spwr_battery_load_sta(struct spwr_battery_device *bat)
  3891. +{
  3892. + return sam_psy_get_sta(bat->id + 1, &bat->sta);
  3893. +}
  3894. +
  3895. +static inline int spwr_battery_load_bix(struct spwr_battery_device *bat)
  3896. +{
  3897. + if (!spwr_battery_present(bat))
  3898. + return 0;
  3899. +
  3900. + return sam_psy_get_bix(bat->id + 1, &bat->bix);
  3901. +}
  3902. +
  3903. +static inline int spwr_battery_load_bst(struct spwr_battery_device *bat)
  3904. +{
  3905. + if (!spwr_battery_present(bat))
  3906. + return 0;
  3907. +
  3908. + return sam_psy_get_bst(bat->id + 1, &bat->bst);
  3909. +}
  3910. +
  3911. +
  3912. +static inline int spwr_battery_set_alarm_unlocked(struct spwr_battery_device *bat, u32 value)
  3913. +{
  3914. + bat->alarm = value;
  3915. + return sam_psy_set_btp(bat->id + 1, bat->alarm);
  3916. +}
  3917. +
  3918. +static inline int spwr_battery_set_alarm(struct spwr_battery_device *bat, u32 value)
  3919. +{
  3920. + int status;
  3921. +
  3922. + mutex_lock(&bat->lock);
  3923. + status = spwr_battery_set_alarm_unlocked(bat, value);
  3924. + mutex_unlock(&bat->lock);
  3925. +
  3926. + return status;
  3927. +}
  3928. +
  3929. +static inline int spwr_battery_update_bst_unlocked(struct spwr_battery_device *bat, bool cached)
  3930. +{
  3931. + unsigned long cache_deadline = bat->timestamp + msecs_to_jiffies(cache_time);
  3932. + int status;
  3933. +
  3934. + if (cached && bat->timestamp && time_is_after_jiffies(cache_deadline))
  3935. + return 0;
  3936. +
  3937. + status = spwr_battery_load_sta(bat);
  3938. + if (status)
  3939. + return status;
  3940. +
  3941. + status = spwr_battery_load_bst(bat);
  3942. + if (status)
  3943. + return status;
  3944. +
  3945. + bat->timestamp = jiffies;
  3946. + return 0;
  3947. +}
  3948. +
  3949. +static int spwr_battery_update_bst(struct spwr_battery_device *bat, bool cached)
  3950. +{
  3951. + int status;
  3952. +
  3953. + mutex_lock(&bat->lock);
  3954. + status = spwr_battery_update_bst_unlocked(bat, cached);
  3955. + mutex_unlock(&bat->lock);
  3956. +
  3957. + return status;
  3958. +}
  3959. +
  3960. +static inline int spwr_battery_update_bix_unlocked(struct spwr_battery_device *bat)
  3961. +{
  3962. + int status;
  3963. +
  3964. + status = spwr_battery_load_sta(bat);
  3965. + if (status)
  3966. + return status;
  3967. +
  3968. + status = spwr_battery_load_bix(bat);
  3969. + if (status)
  3970. + return status;
  3971. +
  3972. + status = spwr_battery_load_bst(bat);
  3973. + if (status)
  3974. + return status;
  3975. +
  3976. + bat->timestamp = jiffies;
  3977. + return 0;
  3978. +}
  3979. +
  3980. +static int spwr_battery_update_bix(struct spwr_battery_device *bat)
  3981. +{
  3982. + int status;
  3983. +
  3984. + mutex_lock(&bat->lock);
  3985. + status = spwr_battery_update_bix_unlocked(bat);
  3986. + mutex_unlock(&bat->lock);
  3987. +
  3988. + return status;
  3989. +}
  3990. +
  3991. +static inline int spwr_ac_update_unlocked(struct spwr_ac_device *ac)
  3992. +{
  3993. + return sam_psy_get_psrc(0x00, &ac->state);
  3994. +}
  3995. +
  3996. +static int spwr_ac_update(struct spwr_ac_device *ac)
  3997. +{
  3998. + int status;
  3999. +
  4000. + mutex_lock(&ac->lock);
  4001. + status = spwr_ac_update_unlocked(ac);
  4002. + mutex_unlock(&ac->lock);
  4003. +
  4004. + return status;
  4005. +}
  4006. +
  4007. +
  4008. +static int spwr_battery_recheck(struct spwr_battery_device *bat)
  4009. +{
  4010. + bool present = spwr_battery_present(bat);
  4011. + u32 unit = bat->bix.power_unit;
  4012. + int status;
  4013. +
  4014. + status = spwr_battery_update_bix(bat);
  4015. + if (status)
  4016. + return status;
  4017. +
  4018. + // if battery has been attached, (re-)initialize alarm
  4019. + if (!present && spwr_battery_present(bat)) {
  4020. + status = spwr_battery_set_alarm(bat, bat->bix.design_cap_warn);
  4021. + if (status)
  4022. + return status;
  4023. + }
  4024. +
  4025. + // if the unit has changed, re-add the battery
  4026. + if (unit != bat->bix.power_unit) {
  4027. + mutex_unlock(&spwr_subsystem.lock);
  4028. +
  4029. + status = spwr_battery_unregister(bat);
  4030. + if (status)
  4031. + return status;
  4032. +
  4033. + status = spwr_battery_register(bat, bat->pdev, bat->id);
  4034. + }
  4035. +
  4036. + return status;
  4037. +}
  4038. +
  4039. +
  4040. +static int spwr_handle_event_bix(struct surface_sam_ssh_event *event)
  4041. +{
  4042. + struct spwr_battery_device *bat;
  4043. + enum spwr_battery_id bat_id = event->iid - 1;
  4044. + int status = 0;
  4045. +
  4046. + if (bat_id < 0 || bat_id >= __SPWR_NUM_BAT) {
  4047. + printk(SPWR_WARN "invalid BIX event iid 0x%02x\n", event->iid);
  4048. + bat_id = SPWR_BAT1;
  4049. + }
  4050. +
  4051. + mutex_lock(&spwr_subsystem.lock);
  4052. + bat = spwr_subsystem.battery[bat_id];
  4053. + if (bat) {
  4054. + status = spwr_battery_recheck(bat);
  4055. + if (!status)
  4056. + power_supply_changed(bat->psy);
  4057. + }
  4058. +
  4059. + mutex_unlock(&spwr_subsystem.lock);
  4060. + return status;
  4061. +}
  4062. +
  4063. +static int spwr_handle_event_bst(struct surface_sam_ssh_event *event)
  4064. +{
  4065. + struct spwr_battery_device *bat;
  4066. + enum spwr_battery_id bat_id = event->iid - 1;
  4067. + int status = 0;
  4068. +
  4069. + if (bat_id < 0 || bat_id >= __SPWR_NUM_BAT) {
  4070. + printk(SPWR_WARN "invalid BST event iid 0x%02x\n", event->iid);
  4071. + bat_id = SPWR_BAT1;
  4072. + }
  4073. +
  4074. + mutex_lock(&spwr_subsystem.lock);
  4075. +
  4076. + bat = spwr_subsystem.battery[bat_id];
  4077. + if (bat) {
  4078. + status = spwr_battery_update_bst(bat, false);
  4079. + if (!status)
  4080. + power_supply_changed(bat->psy);
  4081. + }
  4082. +
  4083. + mutex_unlock(&spwr_subsystem.lock);
  4084. + return status;
  4085. +}
  4086. +
  4087. +static int spwr_handle_event_adapter(struct surface_sam_ssh_event *event)
  4088. +{
  4089. + struct spwr_battery_device *bat1 = NULL;
  4090. + struct spwr_battery_device *bat2 = NULL;
  4091. + struct spwr_ac_device *ac;
  4092. + int status = 0;
  4093. +
  4094. + mutex_lock(&spwr_subsystem.lock);
  4095. +
  4096. + ac = spwr_subsystem.ac;
  4097. + if (ac) {
  4098. + status = spwr_ac_update(ac);
  4099. + if (status)
  4100. + goto out;
  4101. +
  4102. + power_supply_changed(ac->psy);
  4103. + }
  4104. +
  4105. + /*
  4106. + * Handle battery update quirk:
  4107. + * When the battery is fully charged and the adapter is plugged in or
  4108. + * removed, the EC does not send a separate event for the state
  4109. + * (charging/discharging) change. Furthermore it may take some time until
  4110. + * the state is updated on the battery. Schedule an update to solve this.
  4111. + */
  4112. +
  4113. + bat1 = spwr_subsystem.battery[SPWR_BAT1];
  4114. + if (bat1 && bat1->bst.remaining_cap >= bat1->bix.last_full_charge_cap)
  4115. + schedule_delayed_work(&bat1->update_work, SPWR_AC_BAT_UPDATE_DELAY);
  4116. +
  4117. + bat2 = spwr_subsystem.battery[SPWR_BAT2];
  4118. + if (bat2 && bat2->bst.remaining_cap >= bat2->bix.last_full_charge_cap)
  4119. + schedule_delayed_work(&bat2->update_work, SPWR_AC_BAT_UPDATE_DELAY);
  4120. +
  4121. +out:
  4122. + mutex_unlock(&spwr_subsystem.lock);
  4123. + return status;
  4124. +}
  4125. +
  4126. +static int spwr_handle_event_dptf(struct surface_sam_ssh_event *event)
  4127. +{
  4128. + return 0; // TODO: spwr_handle_event_dptf
  4129. +}
  4130. +
  4131. +static int spwr_handle_event(struct surface_sam_ssh_event *event, void *data)
  4132. +{
  4133. + printk(SPWR_DEBUG "power event (cid = 0x%02x)\n", event->cid);
  4134. +
  4135. + switch (event->cid) {
  4136. + case SAM_EVENT_PWR_CID_BIX:
  4137. + return spwr_handle_event_bix(event);
  4138. +
  4139. + case SAM_EVENT_PWR_CID_BST:
  4140. + return spwr_handle_event_bst(event);
  4141. +
  4142. + case SAM_EVENT_PWR_CID_ADAPTER:
  4143. + return spwr_handle_event_adapter(event);
  4144. +
  4145. + case SAM_EVENT_PWR_CID_DPTF:
  4146. + return spwr_handle_event_dptf(event);
  4147. +
  4148. + default:
  4149. + printk(SPWR_WARN "unhandled power event (cid = 0x%02x)\n", event->cid);
  4150. + return 0;
  4151. + }
  4152. +}
  4153. +
  4154. +static void spwr_battery_update_bst_workfn(struct work_struct *work)
  4155. +{
  4156. + struct delayed_work *dwork = to_delayed_work(work);
  4157. + struct spwr_battery_device *bat = container_of(dwork, struct spwr_battery_device, update_work);
  4158. + int status;
  4159. +
  4160. + status = spwr_battery_update_bst(bat, false);
  4161. + if (!status)
  4162. + power_supply_changed(bat->psy);
  4163. +
  4164. + if (status)
  4165. + dev_err(&bat->pdev->dev, "failed to update battery state: %d\n", status);
  4166. +}
  4167. +
  4168. +
  4169. +static inline int spwr_battery_prop_status(struct spwr_battery_device *bat)
  4170. +{
  4171. + if (bat->bst.state & SAM_BATTERY_STATE_DISCHARGING)
  4172. + return POWER_SUPPLY_STATUS_DISCHARGING;
  4173. +
  4174. + if (bat->bst.state & SAM_BATTERY_STATE_CHARGING)
  4175. + return POWER_SUPPLY_STATUS_CHARGING;
  4176. +
  4177. + if (bat->bix.last_full_charge_cap == bat->bst.remaining_cap)
  4178. + return POWER_SUPPLY_STATUS_FULL;
  4179. +
  4180. + if (bat->bst.present_rate == 0)
  4181. + return POWER_SUPPLY_STATUS_NOT_CHARGING;
  4182. +
  4183. + return POWER_SUPPLY_STATUS_UNKNOWN;
  4184. +}
  4185. +
  4186. +static inline int spwr_battery_prop_technology(struct spwr_battery_device *bat)
  4187. +{
  4188. + if (!strcasecmp("NiCd", bat->bix.type))
  4189. + return POWER_SUPPLY_TECHNOLOGY_NiCd;
  4190. +
  4191. + if (!strcasecmp("NiMH", bat->bix.type))
  4192. + return POWER_SUPPLY_TECHNOLOGY_NiMH;
  4193. +
  4194. + if (!strcasecmp("LION", bat->bix.type))
  4195. + return POWER_SUPPLY_TECHNOLOGY_LION;
  4196. +
  4197. + if (!strncasecmp("LI-ION", bat->bix.type, 6))
  4198. + return POWER_SUPPLY_TECHNOLOGY_LION;
  4199. +
  4200. + if (!strcasecmp("LiP", bat->bix.type))
  4201. + return POWER_SUPPLY_TECHNOLOGY_LIPO;
  4202. +
  4203. + return POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
  4204. +}
  4205. +
  4206. +static inline int spwr_battery_prop_capacity(struct spwr_battery_device *bat)
  4207. +{
  4208. + if (bat->bst.remaining_cap && bat->bix.last_full_charge_cap)
  4209. + return bat->bst.remaining_cap * 100 / bat->bix.last_full_charge_cap;
  4210. + else
  4211. + return 0;
  4212. +}
  4213. +
  4214. +static inline int spwr_battery_prop_capacity_level(struct spwr_battery_device *bat)
  4215. +{
  4216. + if (bat->bst.state & SAM_BATTERY_STATE_CRITICAL)
  4217. + return POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
  4218. +
  4219. + if (bat->bst.remaining_cap >= bat->bix.last_full_charge_cap)
  4220. + return POWER_SUPPLY_CAPACITY_LEVEL_FULL;
  4221. +
  4222. + if (bat->bst.remaining_cap <= bat->alarm)
  4223. + return POWER_SUPPLY_CAPACITY_LEVEL_LOW;
  4224. +
  4225. + return POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
  4226. +}
  4227. +
  4228. +static int spwr_ac_get_property(struct power_supply *psy,
  4229. + enum power_supply_property psp,
  4230. + union power_supply_propval *val)
  4231. +{
  4232. + struct spwr_ac_device *ac = power_supply_get_drvdata(psy);
  4233. + int status;
  4234. +
  4235. + mutex_lock(&ac->lock);
  4236. +
  4237. + status = spwr_ac_update_unlocked(ac);
  4238. + if (status)
  4239. + goto out;
  4240. +
  4241. + switch (psp) {
  4242. + case POWER_SUPPLY_PROP_ONLINE:
  4243. + val->intval = ac->state == 1;
  4244. + break;
  4245. +
  4246. + default:
  4247. + status = -EINVAL;
  4248. + goto out;
  4249. + }
  4250. +
  4251. +out:
  4252. + mutex_unlock(&ac->lock);
  4253. + return status;
  4254. +}
  4255. +
  4256. +static int spwr_battery_get_property(struct power_supply *psy,
  4257. + enum power_supply_property psp,
  4258. + union power_supply_propval *val)
  4259. +{
  4260. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4261. + int status;
  4262. +
  4263. + mutex_lock(&bat->lock);
  4264. +
  4265. + status = spwr_battery_update_bst_unlocked(bat, true);
  4266. + if (status)
  4267. + goto out;
  4268. +
  4269. + // abort if battery is not present
  4270. + if (!spwr_battery_present(bat) && psp != POWER_SUPPLY_PROP_PRESENT) {
  4271. + status = -ENODEV;
  4272. + goto out;
  4273. + }
  4274. +
  4275. + switch (psp) {
  4276. + case POWER_SUPPLY_PROP_STATUS:
  4277. + val->intval = spwr_battery_prop_status(bat);
  4278. + break;
  4279. +
  4280. + case POWER_SUPPLY_PROP_PRESENT:
  4281. + val->intval = spwr_battery_present(bat);
  4282. + break;
  4283. +
  4284. + case POWER_SUPPLY_PROP_TECHNOLOGY:
  4285. + val->intval = spwr_battery_prop_technology(bat);
  4286. + break;
  4287. +
  4288. + case POWER_SUPPLY_PROP_CYCLE_COUNT:
  4289. + val->intval = bat->bix.cycle_count;
  4290. + break;
  4291. +
  4292. + case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
  4293. + val->intval = bat->bix.design_voltage * 1000;
  4294. + break;
  4295. +
  4296. + case POWER_SUPPLY_PROP_VOLTAGE_NOW:
  4297. + val->intval = bat->bst.present_voltage * 1000;
  4298. + break;
  4299. +
  4300. + case POWER_SUPPLY_PROP_CURRENT_NOW:
  4301. + case POWER_SUPPLY_PROP_POWER_NOW:
  4302. + val->intval = bat->bst.present_rate * 1000;
  4303. + break;
  4304. +
  4305. + case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
  4306. + case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
  4307. + val->intval = bat->bix.design_cap * 1000;
  4308. + break;
  4309. +
  4310. + case POWER_SUPPLY_PROP_CHARGE_FULL:
  4311. + case POWER_SUPPLY_PROP_ENERGY_FULL:
  4312. + val->intval = bat->bix.last_full_charge_cap * 1000;
  4313. + break;
  4314. +
  4315. + case POWER_SUPPLY_PROP_CHARGE_NOW:
  4316. + case POWER_SUPPLY_PROP_ENERGY_NOW:
  4317. + val->intval = bat->bst.remaining_cap * 1000;
  4318. + break;
  4319. +
  4320. + case POWER_SUPPLY_PROP_CAPACITY:
  4321. + val->intval = spwr_battery_prop_capacity(bat);
  4322. + break;
  4323. +
  4324. + case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
  4325. + val->intval = spwr_battery_prop_capacity_level(bat);
  4326. + break;
  4327. +
  4328. + case POWER_SUPPLY_PROP_MODEL_NAME:
  4329. + val->strval = bat->bix.model;
  4330. + break;
  4331. +
  4332. + case POWER_SUPPLY_PROP_MANUFACTURER:
  4333. + val->strval = bat->bix.oem_info;
  4334. + break;
  4335. +
  4336. + case POWER_SUPPLY_PROP_SERIAL_NUMBER:
  4337. + val->strval = bat->bix.serial;
  4338. + break;
  4339. +
  4340. + default:
  4341. + status = -EINVAL;
  4342. + goto out;
  4343. + }
  4344. +
  4345. +out:
  4346. + mutex_unlock(&bat->lock);
  4347. + return status;
  4348. +}
  4349. +
  4350. +
  4351. +static ssize_t spwr_battery_alarm_show(struct device *dev,
  4352. + struct device_attribute *attr,
  4353. + char *buf)
  4354. +{
  4355. + struct power_supply *psy = dev_get_drvdata(dev);
  4356. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4357. +
  4358. + return sprintf(buf, "%d\n", bat->alarm * 1000);
  4359. +}
  4360. +
  4361. +static ssize_t spwr_battery_alarm_store(struct device *dev,
  4362. + struct device_attribute *attr,
  4363. + const char *buf, size_t count)
  4364. +{
  4365. + struct power_supply *psy = dev_get_drvdata(dev);
  4366. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4367. + unsigned long value;
  4368. + int status;
  4369. +
  4370. + status = kstrtoul(buf, 0, &value);
  4371. + if (status)
  4372. + return status;
  4373. +
  4374. + if (!spwr_battery_present(bat))
  4375. + return -ENODEV;
  4376. +
  4377. + status = spwr_battery_set_alarm(bat, value / 1000);
  4378. + if (status)
  4379. + return status;
  4380. +
  4381. + return count;
  4382. +}
  4383. +
  4384. +static const struct device_attribute alarm_attr = {
  4385. + .attr = {.name = "alarm", .mode = 0644},
  4386. + .show = spwr_battery_alarm_show,
  4387. + .store = spwr_battery_alarm_store,
  4388. +};
  4389. +
  4390. +
  4391. +static int spwr_subsys_init_unlocked(void)
  4392. +{
  4393. + int status;
  4394. +
  4395. + status = surface_sam_ssh_set_event_handler(SAM_PWR_RQID, spwr_handle_event, NULL);
  4396. + if (status)
  4397. + goto err_handler;
  4398. +
  4399. + status = surface_sam_ssh_enable_event_source(SAM_PWR_TC, 0x01, SAM_PWR_RQID);
  4400. + if (status)
  4401. + goto err_source;
  4402. +
  4403. + return 0;
  4404. +
  4405. +err_source:
  4406. + surface_sam_ssh_remove_event_handler(SAM_PWR_RQID);
  4407. +err_handler:
  4408. + return status;
  4409. +}
  4410. +
  4411. +static int spwr_subsys_deinit_unlocked(void)
  4412. +{
  4413. + surface_sam_ssh_disable_event_source(SAM_PWR_TC, 0x01, SAM_PWR_RQID);
  4414. + surface_sam_ssh_remove_event_handler(SAM_PWR_RQID);
  4415. + return 0;
  4416. +}
  4417. +
  4418. +static inline int spwr_subsys_ref_unlocked(void)
  4419. +{
  4420. + int status = 0;
  4421. +
  4422. + if (!spwr_subsystem.refcount)
  4423. + status = spwr_subsys_init_unlocked();
  4424. +
  4425. + spwr_subsystem.refcount += 1;
  4426. + return status;
  4427. +}
  4428. +
  4429. +static inline int spwr_subsys_unref_unlocked(void)
  4430. +{
  4431. + int status = 0;
  4432. +
  4433. + if (spwr_subsystem.refcount)
  4434. + spwr_subsystem.refcount -= 1;
  4435. +
  4436. + if (!spwr_subsystem.refcount)
  4437. + status = spwr_subsys_deinit_unlocked();
  4438. +
  4439. + return status;
  4440. +}
  4441. +
  4442. +
  4443. +static int spwr_ac_register(struct spwr_ac_device *ac, struct platform_device *pdev)
  4444. +{
  4445. + struct power_supply_config psy_cfg = {};
  4446. + u32 sta;
  4447. + int status;
  4448. +
  4449. + // make sure the device is there and functioning properly
  4450. + status = sam_psy_get_sta(0x00, &sta);
  4451. + if (status)
  4452. + return status;
  4453. +
  4454. + if ((sta & SAM_BATTERY_STA_OK) != SAM_BATTERY_STA_OK)
  4455. + return -ENODEV;
  4456. +
  4457. + psy_cfg.drv_data = ac;
  4458. +
  4459. + ac->pdev = pdev;
  4460. + mutex_init(&ac->lock);
  4461. +
  4462. + snprintf(ac->name, ARRAY_SIZE(ac->name), "ADP0");
  4463. +
  4464. + ac->psy_desc.name = ac->name;
  4465. + ac->psy_desc.type = POWER_SUPPLY_TYPE_MAINS;
  4466. + ac->psy_desc.properties = spwr_ac_props;
  4467. + ac->psy_desc.num_properties = ARRAY_SIZE(spwr_ac_props);
  4468. + ac->psy_desc.get_property = spwr_ac_get_property;
  4469. +
  4470. + mutex_lock(&spwr_subsystem.lock);
  4471. + if (spwr_subsystem.ac) {
  4472. + status = -EEXIST;
  4473. + goto err;
  4474. + }
  4475. +
  4476. + status = spwr_subsys_ref_unlocked();
  4477. + if (status)
  4478. + goto err;
  4479. +
  4480. + ac->psy = power_supply_register(&ac->pdev->dev, &ac->psy_desc, &psy_cfg);
  4481. + if (IS_ERR(ac->psy)) {
  4482. + status = PTR_ERR(ac->psy);
  4483. + goto err_unref;
  4484. + }
  4485. +
  4486. + spwr_subsystem.ac = ac;
  4487. + mutex_unlock(&spwr_subsystem.lock);
  4488. + return 0;
  4489. +
  4490. +err_unref:
  4491. + spwr_subsys_unref_unlocked();
  4492. +err:
  4493. + mutex_unlock(&spwr_subsystem.lock);
  4494. + mutex_destroy(&ac->lock);
  4495. + return status;
  4496. +}
  4497. +
  4498. +static int spwr_ac_unregister(struct spwr_ac_device *ac)
  4499. +{
  4500. + int status;
  4501. +
  4502. + mutex_lock(&spwr_subsystem.lock);
  4503. + if (spwr_subsystem.ac != ac) {
  4504. + mutex_unlock(&spwr_subsystem.lock);
  4505. + return -EINVAL;
  4506. + }
  4507. +
  4508. + spwr_subsystem.ac = NULL;
  4509. + power_supply_unregister(ac->psy);
  4510. +
  4511. + status = spwr_subsys_unref_unlocked();
  4512. + mutex_unlock(&spwr_subsystem.lock);
  4513. +
  4514. + mutex_destroy(&ac->lock);
  4515. + return status;
  4516. +}
  4517. +
  4518. +static int spwr_battery_register(struct spwr_battery_device *bat, struct platform_device *pdev,
  4519. + enum spwr_battery_id id)
  4520. +{
  4521. + struct power_supply_config psy_cfg = {};
  4522. + u32 sta;
  4523. + int status;
  4524. +
  4525. + if ((id < 0 || id >= __SPWR_NUM_BAT) && id != SPWR_BAT_SINGLE)
  4526. + return -EINVAL;
  4527. +
  4528. + bat->pdev = pdev;
  4529. + bat->id = id != SPWR_BAT_SINGLE ? id : SPWR_BAT1;
  4530. +
  4531. + // make sure the device is there and functioning properly
  4532. + status = sam_psy_get_sta(bat->id + 1, &sta);
  4533. + if (status)
  4534. + return status;
  4535. +
  4536. + if ((sta & SAM_BATTERY_STA_OK) != SAM_BATTERY_STA_OK)
  4537. + return -ENODEV;
  4538. +
  4539. + status = spwr_battery_update_bix_unlocked(bat);
  4540. + if (status)
  4541. + return status;
  4542. +
  4543. + if (spwr_battery_present(bat)) {
  4544. + status = spwr_battery_set_alarm_unlocked(bat, bat->bix.design_cap_warn);
  4545. + if (status)
  4546. + return status;
  4547. + }
  4548. +
  4549. + snprintf(bat->name, ARRAY_SIZE(bat->name), "BAT%d", bat->id);
  4550. + bat->psy_desc.name = bat->name;
  4551. + bat->psy_desc.type = POWER_SUPPLY_TYPE_BATTERY;
  4552. +
  4553. + if (bat->bix.power_unit == SAM_BATTERY_POWER_UNIT_MA) {
  4554. + bat->psy_desc.properties = spwr_battery_props_chg;
  4555. + bat->psy_desc.num_properties = ARRAY_SIZE(spwr_battery_props_chg);
  4556. + } else {
  4557. + bat->psy_desc.properties = spwr_battery_props_eng;
  4558. + bat->psy_desc.num_properties = ARRAY_SIZE(spwr_battery_props_eng);
  4559. + }
  4560. +
  4561. + bat->psy_desc.get_property = spwr_battery_get_property;
  4562. +
  4563. + mutex_init(&bat->lock);
  4564. + psy_cfg.drv_data = bat;
  4565. +
  4566. + INIT_DELAYED_WORK(&bat->update_work, spwr_battery_update_bst_workfn);
  4567. +
  4568. + mutex_lock(&spwr_subsystem.lock);
  4569. + if (spwr_subsystem.battery[bat->id]) {
  4570. + status = -EEXIST;
  4571. + goto err;
  4572. + }
  4573. +
  4574. + status = spwr_subsys_ref_unlocked();
  4575. + if (status)
  4576. + goto err;
  4577. +
  4578. + bat->psy = power_supply_register(&bat->pdev->dev, &bat->psy_desc, &psy_cfg);
  4579. + if (IS_ERR(bat->psy)) {
  4580. + status = PTR_ERR(bat->psy);
  4581. + goto err_unref;
  4582. + }
  4583. +
  4584. + status = device_create_file(&bat->psy->dev, &alarm_attr);
  4585. + if (status)
  4586. + goto err_dereg;
  4587. +
  4588. + spwr_subsystem.battery[bat->id] = bat;
  4589. + mutex_unlock(&spwr_subsystem.lock);
  4590. + return 0;
  4591. +
  4592. +err_dereg:
  4593. + power_supply_unregister(bat->psy);
  4594. +err_unref:
  4595. + spwr_subsys_unref_unlocked();
  4596. +err:
  4597. + mutex_unlock(&spwr_subsystem.lock);
  4598. + return status;
  4599. +}
  4600. +
  4601. +static int spwr_battery_unregister(struct spwr_battery_device *bat)
  4602. +{
  4603. + int status;
  4604. +
  4605. + if (bat->id < 0 || bat->id >= __SPWR_NUM_BAT)
  4606. + return -EINVAL;
  4607. +
  4608. + mutex_lock(&spwr_subsystem.lock);
  4609. + if (spwr_subsystem.battery[bat->id] != bat) {
  4610. + mutex_unlock(&spwr_subsystem.lock);
  4611. + return -EINVAL;
  4612. + }
  4613. +
  4614. + spwr_subsystem.battery[bat->id] = NULL;
  4615. +
  4616. + status = spwr_subsys_unref_unlocked();
  4617. + mutex_unlock(&spwr_subsystem.lock);
  4618. +
  4619. + cancel_delayed_work_sync(&bat->update_work);
  4620. + device_remove_file(&bat->psy->dev, &alarm_attr);
  4621. + power_supply_unregister(bat->psy);
  4622. +
  4623. + mutex_destroy(&bat->lock);
  4624. + return status;
  4625. +}
  4626. +
  4627. +
  4628. +/*
  4629. + * Battery Driver.
  4630. + */
  4631. +
  4632. +#ifdef CONFIG_PM_SLEEP
  4633. +static int surface_sam_sid_battery_resume(struct device *dev)
  4634. +{
  4635. + struct spwr_battery_device *bat;
  4636. +
  4637. + bat = dev_get_drvdata(dev);
  4638. + return spwr_battery_recheck(bat);
  4639. +}
  4640. +#else
  4641. +#define surface_sam_sid_battery_resume NULL
  4642. +#endif
  4643. +
  4644. +SIMPLE_DEV_PM_OPS(surface_sam_sid_battery_pm, NULL, surface_sam_sid_battery_resume);
  4645. +
  4646. +static int surface_sam_sid_battery_probe(struct platform_device *pdev)
  4647. +{
  4648. + int status;
  4649. + struct spwr_battery_device *bat;
  4650. +
  4651. + // link to ec
  4652. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  4653. + if (status)
  4654. + return status == -ENXIO ? -EPROBE_DEFER : status;
  4655. +
  4656. + bat = devm_kzalloc(&pdev->dev, sizeof(struct spwr_battery_device), GFP_KERNEL);
  4657. + if (!bat)
  4658. + return -ENOMEM;
  4659. +
  4660. + platform_set_drvdata(pdev, bat);
  4661. + return spwr_battery_register(bat, pdev, pdev->id);
  4662. +}
  4663. +
  4664. +static int surface_sam_sid_battery_remove(struct platform_device *pdev)
  4665. +{
  4666. + struct spwr_battery_device *bat;
  4667. +
  4668. + bat = platform_get_drvdata(pdev);
  4669. + return spwr_battery_unregister(bat);
  4670. +}
  4671. +
  4672. +static struct platform_driver surface_sam_sid_battery = {
  4673. + .probe = surface_sam_sid_battery_probe,
  4674. + .remove = surface_sam_sid_battery_remove,
  4675. + .driver = {
  4676. + .name = "surface_sam_sid_battery",
  4677. + .pm = &surface_sam_sid_battery_pm,
  4678. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4679. + },
  4680. +};
  4681. +
  4682. +
  4683. +/*
  4684. + * AC Driver.
  4685. + */
  4686. +
  4687. +static int surface_sam_sid_ac_probe(struct platform_device *pdev)
  4688. +{
  4689. + int status;
  4690. + struct spwr_ac_device *ac;
  4691. +
  4692. + // link to ec
  4693. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  4694. + if (status)
  4695. + return status == -ENXIO ? -EPROBE_DEFER : status;
  4696. +
  4697. + ac = devm_kzalloc(&pdev->dev, sizeof(struct spwr_ac_device), GFP_KERNEL);
  4698. + if (!ac)
  4699. + return -ENOMEM;
  4700. +
  4701. + status = spwr_ac_register(ac, pdev);
  4702. + if (status)
  4703. + return status;
  4704. +
  4705. + platform_set_drvdata(pdev, ac);
  4706. + return 0;
  4707. +}
  4708. +
  4709. +static int surface_sam_sid_ac_remove(struct platform_device *pdev)
  4710. +{
  4711. + struct spwr_ac_device *ac;
  4712. +
  4713. + ac = platform_get_drvdata(pdev);
  4714. + return spwr_ac_unregister(ac);
  4715. +}
  4716. +
  4717. +static struct platform_driver surface_sam_sid_ac = {
  4718. + .probe = surface_sam_sid_ac_probe,
  4719. + .remove = surface_sam_sid_ac_remove,
  4720. + .driver = {
  4721. + .name = "surface_sam_sid_ac",
  4722. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4723. + },
  4724. +};
  4725. +
  4726. +
  4727. +static int __init surface_sam_sid_power_init(void)
  4728. +{
  4729. + int status;
  4730. +
  4731. + status = platform_driver_register(&surface_sam_sid_battery);
  4732. + if (status)
  4733. + return status;
  4734. +
  4735. + status = platform_driver_register(&surface_sam_sid_ac);
  4736. + if (status) {
  4737. + platform_driver_unregister(&surface_sam_sid_battery);
  4738. + return status;
  4739. + }
  4740. +
  4741. + return 0;
  4742. +}
  4743. +
  4744. +static void __exit surface_sam_sid_power_exit(void)
  4745. +{
  4746. + platform_driver_unregister(&surface_sam_sid_battery);
  4747. + platform_driver_unregister(&surface_sam_sid_ac);
  4748. +}
  4749. +
  4750. +module_init(surface_sam_sid_power_init);
  4751. +module_exit(surface_sam_sid_power_exit);
  4752. +
  4753. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  4754. +MODULE_DESCRIPTION("Surface Battery/AC Driver for 7th Generation Surface Devices");
  4755. +MODULE_LICENSE("GPL v2");
  4756. +MODULE_ALIAS("platform:surface_sam_sid_ac");
  4757. +MODULE_ALIAS("platform:surface_sam_sid_battery");
  4758. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c b/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  4759. new file mode 100644
  4760. index 000000000000..9cf912a44171
  4761. --- /dev/null
  4762. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  4763. @@ -0,0 +1,428 @@
  4764. +// SPDX-License-Identifier: GPL-2.0
  4765. +/*
  4766. + * Microsofs Surface HID (VHF) driver for HID input events via SAM.
  4767. + * Used for keyboard input events on the 7th generation Surface Laptops.
  4768. + */
  4769. +
  4770. +#include <linux/acpi.h>
  4771. +#include <linux/hid.h>
  4772. +#include <linux/input.h>
  4773. +#include <linux/platform_device.h>
  4774. +#include <linux/types.h>
  4775. +
  4776. +#include "surface_sam_ssh.h"
  4777. +
  4778. +#define SID_VHF_INPUT_NAME "Microsoft Surface HID"
  4779. +
  4780. +/*
  4781. + * Request ID for VHF events. This value is based on the output of the Surface
  4782. + * EC and should not be changed.
  4783. + */
  4784. +#define SAM_EVENT_SID_VHF_RQID 0x0015
  4785. +#define SAM_EVENT_SID_VHF_TC 0x15
  4786. +
  4787. +#define VHF_HID_STARTED 0
  4788. +
  4789. +struct sid_vhf_evtctx {
  4790. + struct device *dev;
  4791. + struct hid_device *hid;
  4792. + unsigned long flags;
  4793. +};
  4794. +
  4795. +struct sid_vhf_drvdata {
  4796. + struct sid_vhf_evtctx event_ctx;
  4797. +};
  4798. +
  4799. +
  4800. +static int sid_vhf_hid_start(struct hid_device *hid)
  4801. +{
  4802. + hid_dbg(hid, "%s\n", __func__);
  4803. + return 0;
  4804. +}
  4805. +
  4806. +static void sid_vhf_hid_stop(struct hid_device *hid)
  4807. +{
  4808. + hid_dbg(hid, "%s\n", __func__);
  4809. +}
  4810. +
  4811. +static int sid_vhf_hid_open(struct hid_device *hid)
  4812. +{
  4813. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(to_platform_device(hid->dev.parent));
  4814. +
  4815. + hid_dbg(hid, "%s\n", __func__);
  4816. +
  4817. + set_bit(VHF_HID_STARTED, &drvdata->event_ctx.flags);
  4818. + return 0;
  4819. +}
  4820. +
  4821. +static void sid_vhf_hid_close(struct hid_device *hid)
  4822. +{
  4823. +
  4824. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(to_platform_device(hid->dev.parent));
  4825. +
  4826. + hid_dbg(hid, "%s\n", __func__);
  4827. +
  4828. + clear_bit(VHF_HID_STARTED, &drvdata->event_ctx.flags);
  4829. +}
  4830. +
  4831. +struct surface_sam_sid_vhf_meta_rqst {
  4832. + u8 id;
  4833. + u32 offset;
  4834. + u32 length; // buffer limit on send, length of data received on receive
  4835. + u8 end; // 0x01 if end was reached
  4836. +} __packed;
  4837. +
  4838. +struct vhf_device_metadata_info {
  4839. + u8 len;
  4840. + u8 _2;
  4841. + u8 _3;
  4842. + u8 _4;
  4843. + u8 _5;
  4844. + u8 _6;
  4845. + u8 _7;
  4846. + u16 hid_len; // hid descriptor length
  4847. +} __packed;
  4848. +
  4849. +struct vhf_device_metadata {
  4850. + u32 len;
  4851. + u16 vendor_id;
  4852. + u16 product_id;
  4853. + u8 _1[24];
  4854. +} __packed;
  4855. +
  4856. +union vhf_buffer_data {
  4857. + struct vhf_device_metadata_info info;
  4858. + u8 pld[0x76];
  4859. + struct vhf_device_metadata meta;
  4860. +};
  4861. +
  4862. +struct surface_sam_sid_vhf_meta_resp {
  4863. + struct surface_sam_sid_vhf_meta_rqst rqst;
  4864. + union vhf_buffer_data data;
  4865. +} __packed;
  4866. +
  4867. +
  4868. +static int vhf_get_metadata(u8 iid, struct vhf_device_metadata *meta)
  4869. +{
  4870. + int status;
  4871. +
  4872. + struct surface_sam_sid_vhf_meta_resp resp = {
  4873. + .rqst = {
  4874. + .id = 2,
  4875. + .offset = 0,
  4876. + .length = 0x76,
  4877. + .end = 0
  4878. + }
  4879. + };
  4880. +
  4881. + struct surface_sam_ssh_rqst rqst = {
  4882. + .tc = 0x15,
  4883. + .cid = 0x04,
  4884. + .iid = iid,
  4885. + .pri = 0x02,
  4886. + .snc = 0x01,
  4887. + .cdl = sizeof(struct surface_sam_sid_vhf_meta_rqst),
  4888. + .pld = (u8 *)&resp.rqst,
  4889. + };
  4890. +
  4891. + struct surface_sam_ssh_buf result = {
  4892. + .cap = sizeof(struct surface_sam_sid_vhf_meta_resp),
  4893. + .len = 0,
  4894. + .data = (u8 *)&resp,
  4895. + };
  4896. +
  4897. + status = surface_sam_ssh_rqst(&rqst, &result);
  4898. + if (status)
  4899. + return status;
  4900. +
  4901. + *meta = resp.data.meta;
  4902. +
  4903. + return 0;
  4904. +}
  4905. +
  4906. +static int vhf_get_hid_descriptor(struct hid_device *hid, u8 iid, u8 **desc, int *size)
  4907. +{
  4908. + int status, len;
  4909. + u8 *buf;
  4910. +
  4911. + struct surface_sam_sid_vhf_meta_resp resp = {
  4912. + .rqst = {
  4913. + .id = 0,
  4914. + .offset = 0,
  4915. + .length = 0x76,
  4916. + .end = 0,
  4917. + }
  4918. + };
  4919. +
  4920. + struct surface_sam_ssh_rqst rqst = {
  4921. + .tc = 0x15,
  4922. + .cid = 0x04,
  4923. + .iid = iid,
  4924. + .pri = 0x02,
  4925. + .snc = 0x01,
  4926. + .cdl = sizeof(struct surface_sam_sid_vhf_meta_rqst),
  4927. + .pld = (u8 *)&resp.rqst,
  4928. + };
  4929. +
  4930. + struct surface_sam_ssh_buf result = {
  4931. + .cap = sizeof(struct surface_sam_sid_vhf_meta_resp),
  4932. + .len = 0,
  4933. + .data = (u8 *)&resp,
  4934. + };
  4935. +
  4936. + // first fetch 00 to get the total length
  4937. + status = surface_sam_ssh_rqst(&rqst, &result);
  4938. + if (status)
  4939. + return status;
  4940. +
  4941. + len = resp.data.info.hid_len;
  4942. +
  4943. + // allocate a buffer for the descriptor
  4944. + buf = kzalloc(len, GFP_KERNEL);
  4945. +
  4946. + // then, iterate and write into buffer, copying out bytes
  4947. + resp.rqst.id = 1;
  4948. + resp.rqst.offset = 0;
  4949. + resp.rqst.length = 0x76;
  4950. + resp.rqst.end = 0;
  4951. +
  4952. + while (!resp.rqst.end && resp.rqst.offset < len) {
  4953. + status = surface_sam_ssh_rqst(&rqst, &result);
  4954. + if (status) {
  4955. + kfree(buf);
  4956. + return status;
  4957. + }
  4958. + memcpy(buf + resp.rqst.offset, resp.data.pld, resp.rqst.length);
  4959. +
  4960. + resp.rqst.offset += resp.rqst.length;
  4961. + }
  4962. +
  4963. + *desc = buf;
  4964. + *size = len;
  4965. +
  4966. + return 0;
  4967. +}
  4968. +
  4969. +static int sid_vhf_hid_parse(struct hid_device *hid)
  4970. +{
  4971. + int ret = 0, size;
  4972. + u8 *buf;
  4973. +
  4974. + ret = vhf_get_hid_descriptor(hid, 0x00, &buf, &size);
  4975. + if (ret != 0) {
  4976. + hid_err(hid, "Failed to read HID descriptor from device: %d\n", ret);
  4977. + return -EIO;
  4978. + }
  4979. + hid_dbg(hid, "HID descriptor of device:");
  4980. + print_hex_dump_debug("descriptor:", DUMP_PREFIX_OFFSET, 16, 1, buf, size, false);
  4981. +
  4982. + ret = hid_parse_report(hid, buf, size);
  4983. + kfree(buf);
  4984. + return ret;
  4985. +
  4986. +}
  4987. +
  4988. +static int sid_vhf_hid_raw_request(struct hid_device *hid, unsigned char
  4989. + reportnum, u8 *buf, size_t len, unsigned char rtype, int
  4990. + reqtype)
  4991. +{
  4992. + int status;
  4993. + u8 cid;
  4994. + struct surface_sam_ssh_rqst rqst = {};
  4995. + struct surface_sam_ssh_buf result = {};
  4996. +
  4997. + hid_dbg(hid, "%s: reportnum=%#04x rtype=%i reqtype=%i\n", __func__, reportnum, rtype, reqtype);
  4998. + print_hex_dump_debug("report:", DUMP_PREFIX_OFFSET, 16, 1, buf, len, false);
  4999. +
  5000. + // Byte 0 is the report number. Report data starts at byte 1.
  5001. + buf[0] = reportnum;
  5002. +
  5003. + switch (rtype) {
  5004. + case HID_OUTPUT_REPORT:
  5005. + cid = 0x01;
  5006. + break;
  5007. + case HID_FEATURE_REPORT:
  5008. + switch (reqtype) {
  5009. + case HID_REQ_GET_REPORT:
  5010. + // The EC doesn't respond to GET FEATURE for these touchpad reports
  5011. + // we immediately discard to avoid waiting for a timeout.
  5012. + if (reportnum == 6 || reportnum == 7 || reportnum == 8 || reportnum == 9 || reportnum == 0x0b) {
  5013. + hid_dbg(hid, "%s: skipping get feature report for 0x%02x\n", __func__, reportnum);
  5014. + return 0;
  5015. + }
  5016. +
  5017. + cid = 0x02;
  5018. + break;
  5019. + case HID_REQ_SET_REPORT:
  5020. + cid = 0x03;
  5021. + break;
  5022. + default:
  5023. + hid_err(hid, "%s: unknown req type 0x%02x\n", __func__, rtype);
  5024. + return -EIO;
  5025. + }
  5026. + break;
  5027. + default:
  5028. + hid_err(hid, "%s: unknown report type 0x%02x\n", __func__, reportnum);
  5029. + return -EIO;
  5030. + }
  5031. +
  5032. + rqst.tc = SAM_EVENT_SID_VHF_TC;
  5033. + rqst.pri = SURFACE_SAM_PRIORITY_HIGH;
  5034. + rqst.iid = 0x00; // windows tends to distinguish iids, but EC will take it
  5035. + rqst.cid = cid;
  5036. + rqst.snc = reqtype == HID_REQ_GET_REPORT ? 0x01 : 0x00;
  5037. + rqst.cdl = reqtype == HID_REQ_GET_REPORT ? 0x01 : len;
  5038. + rqst.pld = buf;
  5039. +
  5040. + result.cap = len;
  5041. + result.len = 0;
  5042. + result.data = buf;
  5043. +
  5044. + hid_dbg(hid, "%s: sending to cid=%#04x snc=%#04x\n", __func__, cid, HID_REQ_GET_REPORT == reqtype);
  5045. +
  5046. + status = surface_sam_ssh_rqst(&rqst, &result);
  5047. + hid_dbg(hid, "%s: status %i\n", __func__, status);
  5048. +
  5049. + if (status)
  5050. + return status;
  5051. +
  5052. + if (result.len > 0)
  5053. + print_hex_dump_debug("response:", DUMP_PREFIX_OFFSET, 16, 1, result.data, result.len, false);
  5054. +
  5055. + return result.len;
  5056. +}
  5057. +
  5058. +static struct hid_ll_driver sid_vhf_hid_ll_driver = {
  5059. + .start = sid_vhf_hid_start,
  5060. + .stop = sid_vhf_hid_stop,
  5061. + .open = sid_vhf_hid_open,
  5062. + .close = sid_vhf_hid_close,
  5063. + .parse = sid_vhf_hid_parse,
  5064. + .raw_request = sid_vhf_hid_raw_request,
  5065. +};
  5066. +
  5067. +
  5068. +static struct hid_device *sid_vhf_create_hid_device(struct platform_device *pdev, struct vhf_device_metadata *meta)
  5069. +{
  5070. + struct hid_device *hid;
  5071. +
  5072. + hid = hid_allocate_device();
  5073. + if (IS_ERR(hid))
  5074. + return hid;
  5075. +
  5076. + hid->dev.parent = &pdev->dev;
  5077. +
  5078. + hid->bus = BUS_VIRTUAL;
  5079. + hid->vendor = meta->vendor_id;
  5080. + hid->product = meta->product_id;
  5081. +
  5082. + hid->ll_driver = &sid_vhf_hid_ll_driver;
  5083. +
  5084. + sprintf(hid->name, "%s", SID_VHF_INPUT_NAME);
  5085. +
  5086. + return hid;
  5087. +}
  5088. +
  5089. +static int sid_vhf_event_handler(struct surface_sam_ssh_event *event, void *data)
  5090. +{
  5091. + struct sid_vhf_evtctx *ctx = (struct sid_vhf_evtctx *)data;
  5092. +
  5093. + // skip if HID hasn't started yet
  5094. + if (!test_bit(VHF_HID_STARTED, &ctx->flags))
  5095. + return 0;
  5096. +
  5097. + if (event->tc == SAM_EVENT_SID_VHF_TC && (event->cid == 0x00 || event->cid == 0x03 || event->cid == 0x04))
  5098. + return hid_input_report(ctx->hid, HID_INPUT_REPORT, event->pld, event->len, 1);
  5099. +
  5100. + dev_warn(ctx->dev, "unsupported event (tc = %d, cid = %d)\n", event->tc, event->cid);
  5101. + return 0;
  5102. +}
  5103. +
  5104. +static int surface_sam_sid_vhf_probe(struct platform_device *pdev)
  5105. +{
  5106. + struct sid_vhf_drvdata *drvdata;
  5107. + struct vhf_device_metadata meta = {};
  5108. + struct hid_device *hid;
  5109. + int status;
  5110. +
  5111. + // add device link to EC
  5112. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  5113. + if (status)
  5114. + return status == -ENXIO ? -EPROBE_DEFER : status;
  5115. +
  5116. + drvdata = kzalloc(sizeof(struct sid_vhf_drvdata), GFP_KERNEL);
  5117. + if (!drvdata)
  5118. + return -ENOMEM;
  5119. +
  5120. + status = vhf_get_metadata(0x00, &meta);
  5121. + if (status)
  5122. + goto err_create_hid;
  5123. +
  5124. + hid = sid_vhf_create_hid_device(pdev, &meta);
  5125. + if (IS_ERR(hid)) {
  5126. + status = PTR_ERR(hid);
  5127. + goto err_create_hid;
  5128. + }
  5129. +
  5130. + drvdata->event_ctx.dev = &pdev->dev;
  5131. + drvdata->event_ctx.hid = hid;
  5132. +
  5133. + platform_set_drvdata(pdev, drvdata);
  5134. +
  5135. + status = surface_sam_ssh_set_event_handler(
  5136. + SAM_EVENT_SID_VHF_RQID,
  5137. + sid_vhf_event_handler,
  5138. + &drvdata->event_ctx);
  5139. + if (status)
  5140. + goto err_event_handler;
  5141. +
  5142. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5143. + if (status)
  5144. + goto err_event_source;
  5145. +
  5146. + status = hid_add_device(hid);
  5147. + if (status)
  5148. + goto err_add_hid;
  5149. +
  5150. + return 0;
  5151. +
  5152. +err_add_hid:
  5153. + surface_sam_ssh_disable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5154. +err_event_source:
  5155. + surface_sam_ssh_remove_event_handler(SAM_EVENT_SID_VHF_RQID);
  5156. +err_event_handler:
  5157. + hid_destroy_device(hid);
  5158. + platform_set_drvdata(pdev, NULL);
  5159. +err_create_hid:
  5160. + kfree(drvdata);
  5161. + return status;
  5162. +}
  5163. +
  5164. +static int surface_sam_sid_vhf_remove(struct platform_device *pdev)
  5165. +{
  5166. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(pdev);
  5167. +
  5168. + surface_sam_ssh_disable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5169. + surface_sam_ssh_remove_event_handler(SAM_EVENT_SID_VHF_RQID);
  5170. +
  5171. + hid_destroy_device(drvdata->event_ctx.hid);
  5172. + kfree(drvdata);
  5173. +
  5174. + platform_set_drvdata(pdev, NULL);
  5175. + return 0;
  5176. +}
  5177. +
  5178. +static struct platform_driver surface_sam_sid_vhf = {
  5179. + .probe = surface_sam_sid_vhf_probe,
  5180. + .remove = surface_sam_sid_vhf_remove,
  5181. + .driver = {
  5182. + .name = "surface_sam_sid_vhf",
  5183. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  5184. + },
  5185. +};
  5186. +module_platform_driver(surface_sam_sid_vhf);
  5187. +
  5188. +MODULE_AUTHOR("Blaž Hrastnik <blaz@mxxn.io>");
  5189. +MODULE_DESCRIPTION("Driver for HID devices connected via Surface SAM");
  5190. +MODULE_LICENSE("GPL v2");
  5191. +MODULE_ALIAS("platform:surface_sam_sid_vhf");
  5192. diff --git a/drivers/platform/x86/surface_sam/surface_sam_ssh.c b/drivers/platform/x86/surface_sam/surface_sam_ssh.c
  5193. new file mode 100644
  5194. index 000000000000..988be7c2d286
  5195. --- /dev/null
  5196. +++ b/drivers/platform/x86/surface_sam/surface_sam_ssh.c
  5197. @@ -0,0 +1,1744 @@
  5198. +// SPDX-License-Identifier: GPL-2.0
  5199. +/*
  5200. + * Surface Serial Hub (SSH) driver for communication with the Surface/System
  5201. + * Aggregator Module.
  5202. + */
  5203. +
  5204. +#include <asm/unaligned.h>
  5205. +#include <linux/acpi.h>
  5206. +#include <linux/completion.h>
  5207. +#include <linux/crc-ccitt.h>
  5208. +#include <linux/dmaengine.h>
  5209. +#include <linux/gpio/consumer.h>
  5210. +#include <linux/interrupt.h>
  5211. +#include <linux/jiffies.h>
  5212. +#include <linux/kernel.h>
  5213. +#include <linux/kfifo.h>
  5214. +#include <linux/mutex.h>
  5215. +#include <linux/pm.h>
  5216. +#include <linux/refcount.h>
  5217. +#include <linux/serdev.h>
  5218. +#include <linux/spinlock.h>
  5219. +#include <linux/workqueue.h>
  5220. +
  5221. +#include "surface_sam_ssh.h"
  5222. +
  5223. +
  5224. +#define SSH_RQST_TAG_FULL "surface_sam_ssh_rqst: "
  5225. +#define SSH_RQST_TAG "rqst: "
  5226. +#define SSH_EVENT_TAG "event: "
  5227. +#define SSH_RECV_TAG "recv: "
  5228. +
  5229. +#define SSH_SUPPORTED_FLOW_CONTROL_MASK (~((u8) ACPI_UART_FLOW_CONTROL_HW))
  5230. +
  5231. +#define SSH_BYTELEN_SYNC 2
  5232. +#define SSH_BYTELEN_TERM 2
  5233. +#define SSH_BYTELEN_CRC 2
  5234. +#define SSH_BYTELEN_CTRL 4 // command-header, ACK, or RETRY
  5235. +#define SSH_BYTELEN_CMDFRAME 8 // without payload
  5236. +
  5237. +#define SSH_MAX_WRITE ( \
  5238. + SSH_BYTELEN_SYNC \
  5239. + + SSH_BYTELEN_CTRL \
  5240. + + SSH_BYTELEN_CRC \
  5241. + + SSH_BYTELEN_CMDFRAME \
  5242. + + SURFACE_SAM_SSH_MAX_RQST_PAYLOAD \
  5243. + + SSH_BYTELEN_CRC \
  5244. +)
  5245. +
  5246. +#define SSH_MSG_LEN_CTRL ( \
  5247. + SSH_BYTELEN_SYNC \
  5248. + + SSH_BYTELEN_CTRL \
  5249. + + SSH_BYTELEN_CRC \
  5250. + + SSH_BYTELEN_TERM \
  5251. +)
  5252. +
  5253. +#define SSH_MSG_LEN_CMD_BASE ( \
  5254. + SSH_BYTELEN_SYNC \
  5255. + + SSH_BYTELEN_CTRL \
  5256. + + SSH_BYTELEN_CRC \
  5257. + + SSH_BYTELEN_CRC \
  5258. +) // without payload and command-frame
  5259. +
  5260. +#define SSH_WRITE_TIMEOUT msecs_to_jiffies(1000)
  5261. +#define SSH_READ_TIMEOUT msecs_to_jiffies(1000)
  5262. +#define SSH_NUM_RETRY 3
  5263. +
  5264. +#define SSH_WRITE_BUF_LEN SSH_MAX_WRITE
  5265. +#define SSH_READ_BUF_LEN 512 // must be power of 2
  5266. +#define SSH_EVAL_BUF_LEN SSH_MAX_WRITE // also works for reading
  5267. +
  5268. +#define SSH_FRAME_TYPE_CMD_NOACK 0x00 // request/event that does not to be ACKed
  5269. +#define SSH_FRAME_TYPE_CMD 0x80 // request/event
  5270. +#define SSH_FRAME_TYPE_ACK 0x40 // ACK for request/event
  5271. +#define SSH_FRAME_TYPE_RETRY 0x04 // error or retry indicator
  5272. +
  5273. +#define SSH_FRAME_OFFS_CTRL SSH_BYTELEN_SYNC
  5274. +#define SSH_FRAME_OFFS_CTRL_CRC (SSH_FRAME_OFFS_CTRL + SSH_BYTELEN_CTRL)
  5275. +#define SSH_FRAME_OFFS_TERM (SSH_FRAME_OFFS_CTRL_CRC + SSH_BYTELEN_CRC)
  5276. +#define SSH_FRAME_OFFS_CMD SSH_FRAME_OFFS_TERM // either TERM or CMD
  5277. +#define SSH_FRAME_OFFS_CMD_PLD (SSH_FRAME_OFFS_CMD + SSH_BYTELEN_CMDFRAME)
  5278. +
  5279. +/*
  5280. + * A note on Request IDs (RQIDs):
  5281. + * 0x0000 is not a valid RQID
  5282. + * 0x0001 is valid, but reserved for Surface Laptop keyboard events
  5283. + */
  5284. +#define SAM_NUM_EVENT_TYPES ((1 << SURFACE_SAM_SSH_RQID_EVENT_BITS) - 1)
  5285. +
  5286. +/*
  5287. + * Sync: aa 55
  5288. + * Terminate: ff ff
  5289. + *
  5290. + * Request Message: sync cmd-hdr crc(cmd-hdr) cmd-rqst-frame crc(cmd-rqst-frame)
  5291. + * Ack Message: sync ack crc(ack) terminate
  5292. + * Retry Message: sync retry crc(retry) terminate
  5293. + * Response Message: sync cmd-hdr crc(cmd-hdr) cmd-resp-frame crc(cmd-resp-frame)
  5294. + *
  5295. + * Command Header: 80 LEN 00 SEQ
  5296. + * Ack: 40 00 00 SEQ
  5297. + * Retry: 04 00 00 00
  5298. + * Command Request Frame: 80 RTC 01 00 RIID RQID RCID PLD
  5299. + * Command Response Frame: 80 RTC 00 01 RIID RQID RCID PLD
  5300. + */
  5301. +
  5302. +struct ssh_frame_ctrl {
  5303. + u8 type;
  5304. + u8 len; // without crc
  5305. + u8 pad;
  5306. + u8 seq;
  5307. +} __packed;
  5308. +
  5309. +struct ssh_frame_cmd {
  5310. + u8 type;
  5311. + u8 tc;
  5312. + u8 pri_out;
  5313. + u8 pri_in;
  5314. + u8 iid;
  5315. + u8 rqid_lo; // id for request/response matching (low byte)
  5316. + u8 rqid_hi; // id for request/response matching (high byte)
  5317. + u8 cid;
  5318. +} __packed;
  5319. +
  5320. +
  5321. +enum ssh_ec_state {
  5322. + SSH_EC_UNINITIALIZED,
  5323. + SSH_EC_INITIALIZED,
  5324. + SSH_EC_SUSPENDED,
  5325. +};
  5326. +
  5327. +struct ssh_counters {
  5328. + u8 seq; // control sequence id
  5329. + u16 rqid; // id for request/response matching
  5330. +};
  5331. +
  5332. +struct ssh_writer {
  5333. + u8 *data;
  5334. + u8 *ptr;
  5335. +} __packed;
  5336. +
  5337. +enum ssh_receiver_state {
  5338. + SSH_RCV_DISCARD,
  5339. + SSH_RCV_CONTROL,
  5340. + SSH_RCV_COMMAND,
  5341. +};
  5342. +
  5343. +struct ssh_receiver {
  5344. + spinlock_t lock;
  5345. + enum ssh_receiver_state state;
  5346. + struct completion signal;
  5347. + struct kfifo fifo;
  5348. + struct {
  5349. + bool pld;
  5350. + u8 seq;
  5351. + u16 rqid;
  5352. + } expect;
  5353. + struct {
  5354. + u16 cap;
  5355. + u16 len;
  5356. + u8 *ptr;
  5357. + } eval_buf;
  5358. +};
  5359. +
  5360. +struct ssh_event_handler {
  5361. + surface_sam_ssh_event_handler_fn handler;
  5362. + surface_sam_ssh_event_handler_delay delay;
  5363. + void *data;
  5364. +};
  5365. +
  5366. +struct ssh_events {
  5367. + spinlock_t lock;
  5368. + struct workqueue_struct *queue_ack;
  5369. + struct workqueue_struct *queue_evt;
  5370. + struct ssh_event_handler handler[SAM_NUM_EVENT_TYPES];
  5371. +};
  5372. +
  5373. +struct sam_ssh_ec {
  5374. + struct mutex lock;
  5375. + enum ssh_ec_state state;
  5376. + struct serdev_device *serdev;
  5377. + struct ssh_counters counter;
  5378. + struct ssh_writer writer;
  5379. + struct ssh_receiver receiver;
  5380. + struct ssh_events events;
  5381. + int irq;
  5382. + bool irq_wakeup_enabled;
  5383. +};
  5384. +
  5385. +struct ssh_fifo_packet {
  5386. + u8 type; // packet type (ACK/RETRY/CMD)
  5387. + u8 seq;
  5388. + u8 len;
  5389. +};
  5390. +
  5391. +struct ssh_event_work {
  5392. + refcount_t refcount;
  5393. + struct sam_ssh_ec *ec;
  5394. + struct work_struct work_ack;
  5395. + struct delayed_work work_evt;
  5396. + struct surface_sam_ssh_event event;
  5397. + u8 seq;
  5398. +};
  5399. +
  5400. +
  5401. +static struct sam_ssh_ec ssh_ec = {
  5402. + .lock = __MUTEX_INITIALIZER(ssh_ec.lock),
  5403. + .state = SSH_EC_UNINITIALIZED,
  5404. + .serdev = NULL,
  5405. + .counter = {
  5406. + .seq = 0,
  5407. + .rqid = 0,
  5408. + },
  5409. + .writer = {
  5410. + .data = NULL,
  5411. + .ptr = NULL,
  5412. + },
  5413. + .receiver = {
  5414. + .lock = __SPIN_LOCK_UNLOCKED(),
  5415. + .state = SSH_RCV_DISCARD,
  5416. + .expect = {},
  5417. + },
  5418. + .events = {
  5419. + .lock = __SPIN_LOCK_UNLOCKED(),
  5420. + .handler = {},
  5421. + },
  5422. + .irq = -1,
  5423. +};
  5424. +
  5425. +
  5426. +static inline struct sam_ssh_ec *surface_sam_ssh_acquire(void)
  5427. +{
  5428. + struct sam_ssh_ec *ec = &ssh_ec;
  5429. +
  5430. + mutex_lock(&ec->lock);
  5431. + return ec;
  5432. +}
  5433. +
  5434. +static inline void surface_sam_ssh_release(struct sam_ssh_ec *ec)
  5435. +{
  5436. + mutex_unlock(&ec->lock);
  5437. +}
  5438. +
  5439. +static inline struct sam_ssh_ec *surface_sam_ssh_acquire_init(void)
  5440. +{
  5441. + struct sam_ssh_ec *ec = surface_sam_ssh_acquire();
  5442. +
  5443. + if (ec->state == SSH_EC_UNINITIALIZED) {
  5444. + surface_sam_ssh_release(ec);
  5445. + return NULL;
  5446. + }
  5447. +
  5448. + return ec;
  5449. +}
  5450. +
  5451. +int surface_sam_ssh_consumer_register(struct device *consumer)
  5452. +{
  5453. + u32 flags = DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER;
  5454. + struct sam_ssh_ec *ec;
  5455. + struct device_link *link;
  5456. +
  5457. + ec = surface_sam_ssh_acquire_init();
  5458. + if (!ec)
  5459. + return -ENXIO;
  5460. +
  5461. + link = device_link_add(consumer, &ec->serdev->dev, flags);
  5462. + if (!link)
  5463. + return -EFAULT;
  5464. +
  5465. + surface_sam_ssh_release(ec);
  5466. + return 0;
  5467. +}
  5468. +EXPORT_SYMBOL_GPL(surface_sam_ssh_consumer_register);
  5469. +
  5470. +
  5471. +static inline u16 sam_rqid_to_rqst(u16 rqid)
  5472. +{
  5473. + return rqid << SURFACE_SAM_SSH_RQID_EVENT_BITS;
  5474. +}
  5475. +
  5476. +static inline bool sam_rqid_is_event(u16 rqid)
  5477. +{
  5478. + const u16 mask = (1 << SURFACE_SAM_SSH_RQID_EVENT_BITS) - 1;
  5479. +
  5480. + return rqid != 0 && (rqid | mask) == mask;
  5481. +}
  5482. +
  5483. +int surface_sam_ssh_enable_event_source(u8 tc, u8 unknown, u16 rqid)
  5484. +{
  5485. + u8 pld[4] = { tc, unknown, rqid & 0xff, rqid >> 8 };
  5486. + u8 buf[1] = { 0x00 };
  5487. +
  5488. + struct surface_sam_ssh_rqst rqst = {
  5489. + .tc = 0x01,
  5490. + .cid = 0x0b,
  5491. + .iid = 0x00,
  5492. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5493. + .snc = 0x01,
  5494. + .cdl = 0x04,
  5495. + .pld = pld,
  5496. + };
  5497. +
  5498. + struct surface_sam_ssh_buf result = {
  5499. + result.cap = ARRAY_SIZE(buf),
  5500. + result.len = 0,
  5501. + result.data = buf,
  5502. + };
  5503. +
  5504. + int status;
  5505. +
  5506. + // only allow RQIDs that lie within event spectrum
  5507. + if (!sam_rqid_is_event(rqid))
  5508. + return -EINVAL;
  5509. +
  5510. + status = surface_sam_ssh_rqst(&rqst, &result);
  5511. +
  5512. + if (buf[0] != 0x00) {
  5513. + pr_warn(SSH_RQST_TAG_FULL
  5514. + "unexpected result while enabling event source: 0x%02x\n",
  5515. + buf[0]);
  5516. + }
  5517. +
  5518. + return status;
  5519. +
  5520. +}
  5521. +EXPORT_SYMBOL_GPL(surface_sam_ssh_enable_event_source);
  5522. +
  5523. +int surface_sam_ssh_disable_event_source(u8 tc, u8 unknown, u16 rqid)
  5524. +{
  5525. + u8 pld[4] = { tc, unknown, rqid & 0xff, rqid >> 8 };
  5526. + u8 buf[1] = { 0x00 };
  5527. +
  5528. + struct surface_sam_ssh_rqst rqst = {
  5529. + .tc = 0x01,
  5530. + .cid = 0x0c,
  5531. + .iid = 0x00,
  5532. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5533. + .snc = 0x01,
  5534. + .cdl = 0x04,
  5535. + .pld = pld,
  5536. + };
  5537. +
  5538. + struct surface_sam_ssh_buf result = {
  5539. + result.cap = ARRAY_SIZE(buf),
  5540. + result.len = 0,
  5541. + result.data = buf,
  5542. + };
  5543. +
  5544. + int status;
  5545. +
  5546. + // only allow RQIDs that lie within event spectrum
  5547. + if (!sam_rqid_is_event(rqid))
  5548. + return -EINVAL;
  5549. +
  5550. + status = surface_sam_ssh_rqst(&rqst, &result);
  5551. +
  5552. + if (buf[0] != 0x00) {
  5553. + pr_warn(SSH_RQST_TAG_FULL
  5554. + "unexpected result while disabling event source: 0x%02x\n",
  5555. + buf[0]);
  5556. + }
  5557. +
  5558. + return status;
  5559. +}
  5560. +EXPORT_SYMBOL_GPL(surface_sam_ssh_disable_event_source);
  5561. +
  5562. +static unsigned long sam_event_default_delay(struct surface_sam_ssh_event *event, void *data)
  5563. +{
  5564. + return event->pri == SURFACE_SAM_PRIORITY_HIGH ? SURFACE_SAM_SSH_EVENT_IMMEDIATE : 0;
  5565. +}
  5566. +
  5567. +int surface_sam_ssh_set_delayed_event_handler(
  5568. + u16 rqid, surface_sam_ssh_event_handler_fn fn,
  5569. + surface_sam_ssh_event_handler_delay delay,
  5570. + void *data)
  5571. +{
  5572. + struct sam_ssh_ec *ec;
  5573. + unsigned long flags;
  5574. +
  5575. + if (!sam_rqid_is_event(rqid))
  5576. + return -EINVAL;
  5577. +
  5578. + ec = surface_sam_ssh_acquire_init();
  5579. + if (!ec)
  5580. + return -ENXIO;
  5581. +
  5582. + if (!delay)
  5583. + delay = sam_event_default_delay;
  5584. +
  5585. + spin_lock_irqsave(&ec->events.lock, flags);
  5586. + // check if we already have a handler
  5587. + if (ec->events.handler[rqid - 1].handler) {
  5588. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5589. + return -EINVAL;
  5590. + }
  5591. +
  5592. + // 0 is not a valid event RQID
  5593. + ec->events.handler[rqid - 1].handler = fn;
  5594. + ec->events.handler[rqid - 1].delay = delay;
  5595. + ec->events.handler[rqid - 1].data = data;
  5596. +
  5597. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5598. + surface_sam_ssh_release(ec);
  5599. +
  5600. + return 0;
  5601. +}
  5602. +EXPORT_SYMBOL_GPL(surface_sam_ssh_set_delayed_event_handler);
  5603. +
  5604. +int surface_sam_ssh_remove_event_handler(u16 rqid)
  5605. +{
  5606. + struct sam_ssh_ec *ec;
  5607. + unsigned long flags;
  5608. +
  5609. + if (!sam_rqid_is_event(rqid))
  5610. + return -EINVAL;
  5611. +
  5612. + ec = surface_sam_ssh_acquire_init();
  5613. + if (!ec)
  5614. + return -ENXIO;
  5615. +
  5616. + spin_lock_irqsave(&ec->events.lock, flags);
  5617. +
  5618. + // 0 is not a valid event RQID
  5619. + ec->events.handler[rqid - 1].handler = NULL;
  5620. + ec->events.handler[rqid - 1].delay = NULL;
  5621. + ec->events.handler[rqid - 1].data = NULL;
  5622. +
  5623. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5624. + surface_sam_ssh_release(ec);
  5625. +
  5626. + /*
  5627. + * Make sure that the handler is not in use any more after we've
  5628. + * removed it.
  5629. + */
  5630. + flush_workqueue(ec->events.queue_evt);
  5631. +
  5632. + return 0;
  5633. +}
  5634. +EXPORT_SYMBOL_GPL(surface_sam_ssh_remove_event_handler);
  5635. +
  5636. +
  5637. +static inline u16 ssh_crc(const u8 *buf, size_t size)
  5638. +{
  5639. + return crc_ccitt_false(0xffff, buf, size);
  5640. +}
  5641. +
  5642. +static inline void ssh_write_u16(struct ssh_writer *writer, u16 in)
  5643. +{
  5644. + put_unaligned_le16(in, writer->ptr);
  5645. + writer->ptr += 2;
  5646. +}
  5647. +
  5648. +static inline void ssh_write_crc(struct ssh_writer *writer,
  5649. + const u8 *buf, size_t size)
  5650. +{
  5651. + ssh_write_u16(writer, ssh_crc(buf, size));
  5652. +}
  5653. +
  5654. +static inline void ssh_write_syn(struct ssh_writer *writer)
  5655. +{
  5656. + u8 *w = writer->ptr;
  5657. +
  5658. + *w++ = 0xaa;
  5659. + *w++ = 0x55;
  5660. +
  5661. + writer->ptr = w;
  5662. +}
  5663. +
  5664. +static inline void ssh_write_ter(struct ssh_writer *writer)
  5665. +{
  5666. + u8 *w = writer->ptr;
  5667. +
  5668. + *w++ = 0xff;
  5669. + *w++ = 0xff;
  5670. +
  5671. + writer->ptr = w;
  5672. +}
  5673. +
  5674. +static inline void ssh_write_buf(struct ssh_writer *writer,
  5675. + u8 *in, size_t len)
  5676. +{
  5677. + writer->ptr = memcpy(writer->ptr, in, len) + len;
  5678. +}
  5679. +
  5680. +static inline void ssh_write_hdr(struct ssh_writer *writer,
  5681. + const struct surface_sam_ssh_rqst *rqst,
  5682. + struct sam_ssh_ec *ec)
  5683. +{
  5684. + struct ssh_frame_ctrl *hdr = (struct ssh_frame_ctrl *)writer->ptr;
  5685. + u8 *begin = writer->ptr;
  5686. +
  5687. + hdr->type = SSH_FRAME_TYPE_CMD;
  5688. + hdr->len = SSH_BYTELEN_CMDFRAME + rqst->cdl; // without CRC
  5689. + hdr->pad = 0x00;
  5690. + hdr->seq = ec->counter.seq;
  5691. +
  5692. + writer->ptr += sizeof(*hdr);
  5693. +
  5694. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5695. +}
  5696. +
  5697. +static inline void ssh_write_cmd(struct ssh_writer *writer,
  5698. + const struct surface_sam_ssh_rqst *rqst,
  5699. + struct sam_ssh_ec *ec)
  5700. +{
  5701. + struct ssh_frame_cmd *cmd = (struct ssh_frame_cmd *)writer->ptr;
  5702. + u8 *begin = writer->ptr;
  5703. +
  5704. + u16 rqid = sam_rqid_to_rqst(ec->counter.rqid);
  5705. + u8 rqid_lo = rqid & 0xFF;
  5706. + u8 rqid_hi = rqid >> 8;
  5707. +
  5708. + cmd->type = SSH_FRAME_TYPE_CMD;
  5709. + cmd->tc = rqst->tc;
  5710. + cmd->pri_out = rqst->pri;
  5711. + cmd->pri_in = 0x00;
  5712. + cmd->iid = rqst->iid;
  5713. + cmd->rqid_lo = rqid_lo;
  5714. + cmd->rqid_hi = rqid_hi;
  5715. + cmd->cid = rqst->cid;
  5716. +
  5717. + writer->ptr += sizeof(*cmd);
  5718. +
  5719. + ssh_write_buf(writer, rqst->pld, rqst->cdl);
  5720. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5721. +}
  5722. +
  5723. +static inline void ssh_write_ack(struct ssh_writer *writer, u8 seq)
  5724. +{
  5725. + struct ssh_frame_ctrl *ack = (struct ssh_frame_ctrl *)writer->ptr;
  5726. + u8 *begin = writer->ptr;
  5727. +
  5728. + ack->type = SSH_FRAME_TYPE_ACK;
  5729. + ack->len = 0x00;
  5730. + ack->pad = 0x00;
  5731. + ack->seq = seq;
  5732. +
  5733. + writer->ptr += sizeof(*ack);
  5734. +
  5735. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5736. +}
  5737. +
  5738. +static inline void ssh_writer_reset(struct ssh_writer *writer)
  5739. +{
  5740. + writer->ptr = writer->data;
  5741. +}
  5742. +
  5743. +static inline int ssh_writer_flush(struct sam_ssh_ec *ec)
  5744. +{
  5745. + struct ssh_writer *writer = &ec->writer;
  5746. + struct serdev_device *serdev = ec->serdev;
  5747. + int status;
  5748. +
  5749. + size_t len = writer->ptr - writer->data;
  5750. +
  5751. + dev_dbg(&ec->serdev->dev, "sending message\n");
  5752. + print_hex_dump_debug("send: ", DUMP_PREFIX_OFFSET, 16, 1,
  5753. + writer->data, writer->ptr - writer->data, false);
  5754. +
  5755. + status = serdev_device_write(serdev, writer->data, len, SSH_WRITE_TIMEOUT);
  5756. + return status >= 0 ? 0 : status;
  5757. +}
  5758. +
  5759. +static inline void ssh_write_msg_cmd(struct sam_ssh_ec *ec,
  5760. + const struct surface_sam_ssh_rqst *rqst)
  5761. +{
  5762. + ssh_writer_reset(&ec->writer);
  5763. + ssh_write_syn(&ec->writer);
  5764. + ssh_write_hdr(&ec->writer, rqst, ec);
  5765. + ssh_write_cmd(&ec->writer, rqst, ec);
  5766. +}
  5767. +
  5768. +static inline void ssh_write_msg_ack(struct sam_ssh_ec *ec, u8 seq)
  5769. +{
  5770. + ssh_writer_reset(&ec->writer);
  5771. + ssh_write_syn(&ec->writer);
  5772. + ssh_write_ack(&ec->writer, seq);
  5773. + ssh_write_ter(&ec->writer);
  5774. +}
  5775. +
  5776. +static inline void ssh_receiver_restart(struct sam_ssh_ec *ec,
  5777. + const struct surface_sam_ssh_rqst *rqst)
  5778. +{
  5779. + unsigned long flags;
  5780. +
  5781. + spin_lock_irqsave(&ec->receiver.lock, flags);
  5782. + reinit_completion(&ec->receiver.signal);
  5783. + ec->receiver.state = SSH_RCV_CONTROL;
  5784. + ec->receiver.expect.pld = rqst->snc;
  5785. + ec->receiver.expect.seq = ec->counter.seq;
  5786. + ec->receiver.expect.rqid = sam_rqid_to_rqst(ec->counter.rqid);
  5787. + ec->receiver.eval_buf.len = 0;
  5788. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  5789. +}
  5790. +
  5791. +static inline void ssh_receiver_discard(struct sam_ssh_ec *ec)
  5792. +{
  5793. + unsigned long flags;
  5794. +
  5795. + spin_lock_irqsave(&ec->receiver.lock, flags);
  5796. + ec->receiver.state = SSH_RCV_DISCARD;
  5797. + ec->receiver.eval_buf.len = 0;
  5798. + kfifo_reset(&ec->receiver.fifo);
  5799. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  5800. +}
  5801. +
  5802. +static int surface_sam_ssh_rqst_unlocked(struct sam_ssh_ec *ec,
  5803. + const struct surface_sam_ssh_rqst *rqst,
  5804. + struct surface_sam_ssh_buf *result)
  5805. +{
  5806. + struct device *dev = &ec->serdev->dev;
  5807. + struct ssh_fifo_packet packet = {};
  5808. + int status;
  5809. + int try;
  5810. + unsigned int rem;
  5811. +
  5812. + if (rqst->cdl > SURFACE_SAM_SSH_MAX_RQST_PAYLOAD) {
  5813. + dev_err(dev, SSH_RQST_TAG "request payload too large\n");
  5814. + return -EINVAL;
  5815. + }
  5816. +
  5817. + // write command in buffer, we may need it multiple times
  5818. + ssh_write_msg_cmd(ec, rqst);
  5819. + ssh_receiver_restart(ec, rqst);
  5820. +
  5821. + // send command, try to get an ack response
  5822. + for (try = 0; try < SSH_NUM_RETRY; try++) {
  5823. + status = ssh_writer_flush(ec);
  5824. + if (status)
  5825. + goto out;
  5826. +
  5827. + rem = wait_for_completion_timeout(&ec->receiver.signal, SSH_READ_TIMEOUT);
  5828. + if (rem) {
  5829. + // completion assures valid packet, thus ignore returned length
  5830. + (void) !kfifo_out(&ec->receiver.fifo, &packet, sizeof(packet));
  5831. +
  5832. + if (packet.type == SSH_FRAME_TYPE_ACK)
  5833. + break;
  5834. + }
  5835. + }
  5836. +
  5837. + // check if we ran out of tries?
  5838. + if (try >= SSH_NUM_RETRY) {
  5839. + dev_err(dev, SSH_RQST_TAG "communication failed %d times, giving up\n", try);
  5840. + status = -EIO;
  5841. + goto out;
  5842. + }
  5843. +
  5844. + ec->counter.seq += 1;
  5845. + ec->counter.rqid += 1;
  5846. +
  5847. + // get command response/payload
  5848. + if (rqst->snc && result) {
  5849. + rem = wait_for_completion_timeout(&ec->receiver.signal, SSH_READ_TIMEOUT);
  5850. + if (rem) {
  5851. + // completion assures valid packet, thus ignore returned length
  5852. + (void) !kfifo_out(&ec->receiver.fifo, &packet, sizeof(packet));
  5853. +
  5854. + if (result->cap < packet.len) {
  5855. + status = -EINVAL;
  5856. + goto out;
  5857. + }
  5858. +
  5859. + // completion assures valid packet, thus ignore returned length
  5860. + (void) !kfifo_out(&ec->receiver.fifo, result->data, packet.len);
  5861. + result->len = packet.len;
  5862. + } else {
  5863. + dev_err(dev, SSH_RQST_TAG "communication timed out\n");
  5864. + status = -EIO;
  5865. + goto out;
  5866. + }
  5867. +
  5868. + // send ACK
  5869. + if (packet.type == SSH_FRAME_TYPE_CMD) {
  5870. + ssh_write_msg_ack(ec, packet.seq);
  5871. + status = ssh_writer_flush(ec);
  5872. + if (status)
  5873. + goto out;
  5874. + }
  5875. + }
  5876. +
  5877. +out:
  5878. + ssh_receiver_discard(ec);
  5879. + return status;
  5880. +}
  5881. +
  5882. +int surface_sam_ssh_rqst(const struct surface_sam_ssh_rqst *rqst, struct surface_sam_ssh_buf *result)
  5883. +{
  5884. + struct sam_ssh_ec *ec;
  5885. + int status;
  5886. +
  5887. + ec = surface_sam_ssh_acquire_init();
  5888. + if (!ec) {
  5889. + pr_warn(SSH_RQST_TAG_FULL "embedded controller is uninitialized\n");
  5890. + return -ENXIO;
  5891. + }
  5892. +
  5893. + if (ec->state == SSH_EC_SUSPENDED) {
  5894. + dev_warn(&ec->serdev->dev, SSH_RQST_TAG "embedded controller is suspended\n");
  5895. +
  5896. + surface_sam_ssh_release(ec);
  5897. + return -EPERM;
  5898. + }
  5899. +
  5900. + status = surface_sam_ssh_rqst_unlocked(ec, rqst, result);
  5901. +
  5902. + surface_sam_ssh_release(ec);
  5903. + return status;
  5904. +}
  5905. +EXPORT_SYMBOL_GPL(surface_sam_ssh_rqst);
  5906. +
  5907. +
  5908. +static int surface_sam_ssh_ec_resume(struct sam_ssh_ec *ec)
  5909. +{
  5910. + u8 buf[1] = { 0x00 };
  5911. +
  5912. + struct surface_sam_ssh_rqst rqst = {
  5913. + .tc = 0x01,
  5914. + .cid = 0x16,
  5915. + .iid = 0x00,
  5916. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5917. + .snc = 0x01,
  5918. + .cdl = 0x00,
  5919. + .pld = NULL,
  5920. + };
  5921. +
  5922. + struct surface_sam_ssh_buf result = {
  5923. + result.cap = ARRAY_SIZE(buf),
  5924. + result.len = 0,
  5925. + result.data = buf,
  5926. + };
  5927. +
  5928. + int status;
  5929. +
  5930. + status = surface_sam_ssh_rqst_unlocked(ec, &rqst, &result);
  5931. + if (status)
  5932. + return status;
  5933. +
  5934. + if (buf[0] != 0x00) {
  5935. + dev_warn(&ec->serdev->dev,
  5936. + "unexpected result while trying to resume EC: 0x%02x\n",
  5937. + buf[0]);
  5938. + }
  5939. +
  5940. + return 0;
  5941. +}
  5942. +
  5943. +static int surface_sam_ssh_ec_suspend(struct sam_ssh_ec *ec)
  5944. +{
  5945. + u8 buf[1] = { 0x00 };
  5946. +
  5947. + struct surface_sam_ssh_rqst rqst = {
  5948. + .tc = 0x01,
  5949. + .cid = 0x15,
  5950. + .iid = 0x00,
  5951. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5952. + .snc = 0x01,
  5953. + .cdl = 0x00,
  5954. + .pld = NULL,
  5955. + };
  5956. +
  5957. + struct surface_sam_ssh_buf result = {
  5958. + result.cap = ARRAY_SIZE(buf),
  5959. + result.len = 0,
  5960. + result.data = buf,
  5961. + };
  5962. +
  5963. + int status;
  5964. +
  5965. + status = surface_sam_ssh_rqst_unlocked(ec, &rqst, &result);
  5966. + if (status)
  5967. + return status;
  5968. +
  5969. + if (buf[0] != 0x00) {
  5970. + dev_warn(&ec->serdev->dev,
  5971. + "unexpected result while trying to suspend EC: 0x%02x\n",
  5972. + buf[0]);
  5973. + }
  5974. +
  5975. + return 0;
  5976. +}
  5977. +
  5978. +
  5979. +static inline bool ssh_is_valid_syn(const u8 *ptr)
  5980. +{
  5981. + return ptr[0] == 0xaa && ptr[1] == 0x55;
  5982. +}
  5983. +
  5984. +static inline bool ssh_is_valid_ter(const u8 *ptr)
  5985. +{
  5986. + return ptr[0] == 0xff && ptr[1] == 0xff;
  5987. +}
  5988. +
  5989. +static inline bool ssh_is_valid_crc(const u8 *begin, const u8 *end)
  5990. +{
  5991. + u16 crc;
  5992. +
  5993. + crc = ssh_crc(begin, end - begin);
  5994. + return (end[0] == (crc & 0xff)) && (end[1] == (crc >> 8));
  5995. +}
  5996. +
  5997. +
  5998. +static int surface_sam_ssh_send_ack(struct sam_ssh_ec *ec, u8 seq)
  5999. +{
  6000. + int status;
  6001. + u8 buf[SSH_MSG_LEN_CTRL];
  6002. + u16 crc;
  6003. +
  6004. + buf[0] = 0xaa;
  6005. + buf[1] = 0x55;
  6006. + buf[2] = 0x40;
  6007. + buf[3] = 0x00;
  6008. + buf[4] = 0x00;
  6009. + buf[5] = seq;
  6010. +
  6011. + crc = ssh_crc(buf + SSH_FRAME_OFFS_CTRL, SSH_BYTELEN_CTRL);
  6012. + buf[6] = crc & 0xff;
  6013. + buf[7] = crc >> 8;
  6014. +
  6015. + buf[8] = 0xff;
  6016. + buf[9] = 0xff;
  6017. +
  6018. + dev_dbg(&ec->serdev->dev, "sending message\n");
  6019. + print_hex_dump_debug("send: ", DUMP_PREFIX_OFFSET, 16, 1,
  6020. + buf, SSH_MSG_LEN_CTRL, false);
  6021. +
  6022. + status = serdev_device_write(ec->serdev, buf, SSH_MSG_LEN_CTRL, SSH_WRITE_TIMEOUT);
  6023. + return status >= 0 ? 0 : status;
  6024. +}
  6025. +
  6026. +static void surface_sam_ssh_event_work_ack_handler(struct work_struct *_work)
  6027. +{
  6028. + struct surface_sam_ssh_event *event;
  6029. + struct ssh_event_work *work;
  6030. + struct sam_ssh_ec *ec;
  6031. + struct device *dev;
  6032. + int status;
  6033. +
  6034. + work = container_of(_work, struct ssh_event_work, work_ack);
  6035. + event = &work->event;
  6036. + ec = work->ec;
  6037. + dev = &ec->serdev->dev;
  6038. +
  6039. + /* make sure we load a fresh ec state */
  6040. + smp_mb();
  6041. +
  6042. + if (ec->state == SSH_EC_INITIALIZED) {
  6043. + status = surface_sam_ssh_send_ack(ec, work->seq);
  6044. + if (status)
  6045. + dev_err(dev, SSH_EVENT_TAG "failed to send ACK: %d\n", status);
  6046. + }
  6047. +
  6048. + if (refcount_dec_and_test(&work->refcount))
  6049. + kfree(work);
  6050. +}
  6051. +
  6052. +static void surface_sam_ssh_event_work_evt_handler(struct work_struct *_work)
  6053. +{
  6054. + struct delayed_work *dwork = (struct delayed_work *)_work;
  6055. + struct ssh_event_work *work;
  6056. + struct surface_sam_ssh_event *event;
  6057. + struct sam_ssh_ec *ec;
  6058. + struct device *dev;
  6059. + unsigned long flags;
  6060. +
  6061. + surface_sam_ssh_event_handler_fn handler;
  6062. + void *handler_data;
  6063. +
  6064. + int status = 0;
  6065. +
  6066. + work = container_of(dwork, struct ssh_event_work, work_evt);
  6067. + event = &work->event;
  6068. + ec = work->ec;
  6069. + dev = &ec->serdev->dev;
  6070. +
  6071. + spin_lock_irqsave(&ec->events.lock, flags);
  6072. + handler = ec->events.handler[event->rqid - 1].handler;
  6073. + handler_data = ec->events.handler[event->rqid - 1].data;
  6074. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6075. +
  6076. + /*
  6077. + * During handler removal or driver release, we ensure every event gets
  6078. + * handled before return of that function. Thus a handler obtained here is
  6079. + * guaranteed to be valid at least until this function returns.
  6080. + */
  6081. +
  6082. + if (handler)
  6083. + status = handler(event, handler_data);
  6084. + else
  6085. + dev_warn(dev, SSH_EVENT_TAG "unhandled event (rqid: %04x)\n", event->rqid);
  6086. +
  6087. + if (status)
  6088. + dev_err(dev, SSH_EVENT_TAG "error handling event: %d\n", status);
  6089. +
  6090. + if (refcount_dec_and_test(&work->refcount))
  6091. + kfree(work);
  6092. +}
  6093. +
  6094. +static void ssh_handle_event(struct sam_ssh_ec *ec, const u8 *buf)
  6095. +{
  6096. + const struct ssh_frame_ctrl *ctrl;
  6097. + const struct ssh_frame_cmd *cmd;
  6098. + struct ssh_event_work *work;
  6099. + unsigned long flags;
  6100. + u16 pld_len;
  6101. +
  6102. + surface_sam_ssh_event_handler_delay delay_fn;
  6103. + void *handler_data;
  6104. + unsigned long delay;
  6105. +
  6106. + ctrl = (const struct ssh_frame_ctrl *)(buf + SSH_FRAME_OFFS_CTRL);
  6107. + cmd = (const struct ssh_frame_cmd *)(buf + SSH_FRAME_OFFS_CMD);
  6108. +
  6109. + pld_len = ctrl->len - SSH_BYTELEN_CMDFRAME;
  6110. +
  6111. + work = kzalloc(sizeof(struct ssh_event_work) + pld_len, GFP_ATOMIC);
  6112. + if (!work)
  6113. + return;
  6114. +
  6115. + refcount_set(&work->refcount, 1);
  6116. + work->ec = ec;
  6117. + work->seq = ctrl->seq;
  6118. + work->event.rqid = (cmd->rqid_hi << 8) | cmd->rqid_lo;
  6119. + work->event.tc = cmd->tc;
  6120. + work->event.cid = cmd->cid;
  6121. + work->event.iid = cmd->iid;
  6122. + work->event.pri = cmd->pri_in;
  6123. + work->event.len = pld_len;
  6124. + work->event.pld = ((u8 *)work) + sizeof(struct ssh_event_work);
  6125. +
  6126. + memcpy(work->event.pld, buf + SSH_FRAME_OFFS_CMD_PLD, pld_len);
  6127. +
  6128. + // queue ACK for if required
  6129. + if (ctrl->type == SSH_FRAME_TYPE_CMD) {
  6130. + refcount_set(&work->refcount, 2);
  6131. + INIT_WORK(&work->work_ack, surface_sam_ssh_event_work_ack_handler);
  6132. + queue_work(ec->events.queue_ack, &work->work_ack);
  6133. + }
  6134. +
  6135. + spin_lock_irqsave(&ec->events.lock, flags);
  6136. + handler_data = ec->events.handler[work->event.rqid - 1].data;
  6137. + delay_fn = ec->events.handler[work->event.rqid - 1].delay;
  6138. +
  6139. + /* Note:
  6140. + * We need to check delay_fn here: This may have never been set as we
  6141. + * can't guarantee that events only occur when they have been enabled.
  6142. + */
  6143. + delay = delay_fn ? delay_fn(&work->event, handler_data) : 0;
  6144. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6145. +
  6146. + // immediate execution for high priority events (e.g. keyboard)
  6147. + if (delay == SURFACE_SAM_SSH_EVENT_IMMEDIATE) {
  6148. + surface_sam_ssh_event_work_evt_handler(&work->work_evt.work);
  6149. + } else {
  6150. + INIT_DELAYED_WORK(&work->work_evt, surface_sam_ssh_event_work_evt_handler);
  6151. + queue_delayed_work(ec->events.queue_evt, &work->work_evt, delay);
  6152. + }
  6153. +}
  6154. +
  6155. +static int ssh_receive_msg_ctrl(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6156. +{
  6157. + struct device *dev = &ec->serdev->dev;
  6158. + struct ssh_receiver *rcv = &ec->receiver;
  6159. + const struct ssh_frame_ctrl *ctrl;
  6160. + struct ssh_fifo_packet packet;
  6161. +
  6162. + const u8 *ctrl_begin = buf + SSH_FRAME_OFFS_CTRL;
  6163. + const u8 *ctrl_end = buf + SSH_FRAME_OFFS_CTRL_CRC;
  6164. +
  6165. + ctrl = (const struct ssh_frame_ctrl *)(ctrl_begin);
  6166. +
  6167. + // actual length check
  6168. + if (size < SSH_MSG_LEN_CTRL)
  6169. + return 0; // need more bytes
  6170. +
  6171. + // validate TERM
  6172. + if (!ssh_is_valid_ter(buf + SSH_FRAME_OFFS_TERM)) {
  6173. + dev_err(dev, SSH_RECV_TAG "invalid end of message\n");
  6174. + return size; // discard everything
  6175. + }
  6176. +
  6177. + // validate CRC
  6178. + if (!ssh_is_valid_crc(ctrl_begin, ctrl_end)) {
  6179. + dev_err(dev, SSH_RECV_TAG "invalid checksum (ctrl)\n");
  6180. + return SSH_MSG_LEN_CTRL; // only discard message
  6181. + }
  6182. +
  6183. + // check if we expect the message
  6184. + if (rcv->state != SSH_RCV_CONTROL) {
  6185. + dev_err(dev, SSH_RECV_TAG "discarding message: ctrl not expected\n");
  6186. + return SSH_MSG_LEN_CTRL; // discard message
  6187. + }
  6188. +
  6189. + // check if it is for our request
  6190. + if (ctrl->type == SSH_FRAME_TYPE_ACK && ctrl->seq != rcv->expect.seq) {
  6191. + dev_err(dev, SSH_RECV_TAG "discarding message: ack does not match\n");
  6192. + return SSH_MSG_LEN_CTRL; // discard message
  6193. + }
  6194. +
  6195. + // we now have a valid & expected ACK/RETRY message
  6196. + dev_dbg(dev, SSH_RECV_TAG "valid control message received (type: 0x%02x)\n", ctrl->type);
  6197. +
  6198. + packet.type = ctrl->type;
  6199. + packet.seq = ctrl->seq;
  6200. + packet.len = 0;
  6201. +
  6202. + if (kfifo_avail(&rcv->fifo) >= sizeof(packet)) {
  6203. + kfifo_in(&rcv->fifo, (u8 *) &packet, sizeof(packet));
  6204. +
  6205. + } else {
  6206. + dev_warn(dev, SSH_RECV_TAG
  6207. + "dropping frame: not enough space in fifo (type = %d)\n",
  6208. + ctrl->type);
  6209. +
  6210. + return SSH_MSG_LEN_CTRL; // discard message
  6211. + }
  6212. +
  6213. + // update decoder state
  6214. + if (ctrl->type == SSH_FRAME_TYPE_ACK) {
  6215. + rcv->state = rcv->expect.pld
  6216. + ? SSH_RCV_COMMAND
  6217. + : SSH_RCV_DISCARD;
  6218. + }
  6219. +
  6220. + complete(&rcv->signal);
  6221. + return SSH_MSG_LEN_CTRL; // handled message
  6222. +}
  6223. +
  6224. +static int ssh_receive_msg_cmd(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6225. +{
  6226. + struct device *dev = &ec->serdev->dev;
  6227. + struct ssh_receiver *rcv = &ec->receiver;
  6228. + const struct ssh_frame_ctrl *ctrl;
  6229. + const struct ssh_frame_cmd *cmd;
  6230. + struct ssh_fifo_packet packet;
  6231. +
  6232. + const u8 *ctrl_begin = buf + SSH_FRAME_OFFS_CTRL;
  6233. + const u8 *ctrl_end = buf + SSH_FRAME_OFFS_CTRL_CRC;
  6234. + const u8 *cmd_begin = buf + SSH_FRAME_OFFS_CMD;
  6235. + const u8 *cmd_begin_pld = buf + SSH_FRAME_OFFS_CMD_PLD;
  6236. + const u8 *cmd_end;
  6237. +
  6238. + size_t msg_len;
  6239. +
  6240. + ctrl = (const struct ssh_frame_ctrl *)(ctrl_begin);
  6241. + cmd = (const struct ssh_frame_cmd *)(cmd_begin);
  6242. +
  6243. + // we need at least a full control frame
  6244. + if (size < (SSH_BYTELEN_SYNC + SSH_BYTELEN_CTRL + SSH_BYTELEN_CRC))
  6245. + return 0; // need more bytes
  6246. +
  6247. + // validate control-frame CRC
  6248. + if (!ssh_is_valid_crc(ctrl_begin, ctrl_end)) {
  6249. + dev_err(dev, SSH_RECV_TAG "invalid checksum (cmd-ctrl)\n");
  6250. + /*
  6251. + * We can't be sure here if length is valid, thus
  6252. + * discard everything.
  6253. + */
  6254. + return size;
  6255. + }
  6256. +
  6257. + // actual length check (ctrl->len contains command-frame but not crc)
  6258. + msg_len = SSH_MSG_LEN_CMD_BASE + ctrl->len;
  6259. + if (size < msg_len)
  6260. + return 0; // need more bytes
  6261. +
  6262. + cmd_end = cmd_begin + ctrl->len;
  6263. +
  6264. + // validate command-frame type
  6265. + if (cmd->type != SSH_FRAME_TYPE_CMD) {
  6266. + dev_err(dev, SSH_RECV_TAG "expected command frame type but got 0x%02x\n", cmd->type);
  6267. + return size; // discard everything
  6268. + }
  6269. +
  6270. + // validate command-frame CRC
  6271. + if (!ssh_is_valid_crc(cmd_begin, cmd_end)) {
  6272. + dev_err(dev, SSH_RECV_TAG "invalid checksum (cmd-pld)\n");
  6273. +
  6274. + /*
  6275. + * The message length is provided in the control frame. As we
  6276. + * already validated that, we can be sure here that it's
  6277. + * correct, so we only need to discard the message.
  6278. + */
  6279. + return msg_len;
  6280. + }
  6281. +
  6282. + // check if we received an event notification
  6283. + if (sam_rqid_is_event((cmd->rqid_hi << 8) | cmd->rqid_lo)) {
  6284. + ssh_handle_event(ec, buf);
  6285. + return msg_len; // handled message
  6286. + }
  6287. +
  6288. + // check if we expect the message
  6289. + if (rcv->state != SSH_RCV_COMMAND) {
  6290. + dev_dbg(dev, SSH_RECV_TAG "discarding message: command not expected\n");
  6291. + return msg_len; // discard message
  6292. + }
  6293. +
  6294. + // check if response is for our request
  6295. + if (rcv->expect.rqid != (cmd->rqid_lo | (cmd->rqid_hi << 8))) {
  6296. + dev_dbg(dev, SSH_RECV_TAG "discarding message: command not a match\n");
  6297. + return msg_len; // discard message
  6298. + }
  6299. +
  6300. + // we now have a valid & expected command message
  6301. + dev_dbg(dev, SSH_RECV_TAG "valid command message received\n");
  6302. +
  6303. + packet.type = ctrl->type;
  6304. + packet.seq = ctrl->seq;
  6305. + packet.len = cmd_end - cmd_begin_pld;
  6306. +
  6307. + if (kfifo_avail(&rcv->fifo) >= sizeof(packet) + packet.len) {
  6308. + kfifo_in(&rcv->fifo, &packet, sizeof(packet));
  6309. + kfifo_in(&rcv->fifo, cmd_begin_pld, packet.len);
  6310. +
  6311. + } else {
  6312. + dev_warn(dev, SSH_RECV_TAG
  6313. + "dropping frame: not enough space in fifo (type = %d)\n",
  6314. + ctrl->type);
  6315. +
  6316. + return SSH_MSG_LEN_CTRL; // discard message
  6317. + }
  6318. +
  6319. + rcv->state = SSH_RCV_DISCARD;
  6320. +
  6321. + complete(&rcv->signal);
  6322. + return msg_len; // handled message
  6323. +}
  6324. +
  6325. +static int ssh_eval_buf(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6326. +{
  6327. + struct device *dev = &ec->serdev->dev;
  6328. + struct ssh_frame_ctrl *ctrl;
  6329. +
  6330. + // we need at least a control frame to check what to do
  6331. + if (size < (SSH_BYTELEN_SYNC + SSH_BYTELEN_CTRL))
  6332. + return 0; // need more bytes
  6333. +
  6334. + // make sure we're actually at the start of a new message
  6335. + if (!ssh_is_valid_syn(buf)) {
  6336. + dev_err(dev, SSH_RECV_TAG "invalid start of message\n");
  6337. + return size; // discard everything
  6338. + }
  6339. +
  6340. + // handle individual message types separately
  6341. + ctrl = (struct ssh_frame_ctrl *)(buf + SSH_FRAME_OFFS_CTRL);
  6342. +
  6343. + switch (ctrl->type) {
  6344. + case SSH_FRAME_TYPE_ACK:
  6345. + case SSH_FRAME_TYPE_RETRY:
  6346. + return ssh_receive_msg_ctrl(ec, buf, size);
  6347. +
  6348. + case SSH_FRAME_TYPE_CMD:
  6349. + case SSH_FRAME_TYPE_CMD_NOACK:
  6350. + return ssh_receive_msg_cmd(ec, buf, size);
  6351. +
  6352. + default:
  6353. + dev_err(dev, SSH_RECV_TAG "unknown frame type 0x%02x\n", ctrl->type);
  6354. + return size; // discard everything
  6355. + }
  6356. +}
  6357. +
  6358. +static int ssh_receive_buf(struct serdev_device *serdev,
  6359. + const unsigned char *buf, size_t size)
  6360. +{
  6361. + struct sam_ssh_ec *ec = serdev_device_get_drvdata(serdev);
  6362. + struct ssh_receiver *rcv = &ec->receiver;
  6363. + unsigned long flags;
  6364. + int offs = 0;
  6365. + int used, n;
  6366. +
  6367. + dev_dbg(&serdev->dev, SSH_RECV_TAG "received buffer (size: %zu)\n", size);
  6368. + print_hex_dump_debug(SSH_RECV_TAG, DUMP_PREFIX_OFFSET, 16, 1, buf, size, false);
  6369. +
  6370. + /*
  6371. + * The battery _BIX message gets a bit long, thus we have to add some
  6372. + * additional buffering here.
  6373. + */
  6374. +
  6375. + spin_lock_irqsave(&rcv->lock, flags);
  6376. +
  6377. + // copy to eval-buffer
  6378. + used = min(size, (size_t)(rcv->eval_buf.cap - rcv->eval_buf.len));
  6379. + memcpy(rcv->eval_buf.ptr + rcv->eval_buf.len, buf, used);
  6380. + rcv->eval_buf.len += used;
  6381. +
  6382. + // evaluate buffer until we need more bytes or eval-buf is empty
  6383. + while (offs < rcv->eval_buf.len) {
  6384. + n = rcv->eval_buf.len - offs;
  6385. + n = ssh_eval_buf(ec, rcv->eval_buf.ptr + offs, n);
  6386. + if (n <= 0)
  6387. + break; // need more bytes
  6388. +
  6389. + offs += n;
  6390. + }
  6391. +
  6392. + // throw away the evaluated parts
  6393. + rcv->eval_buf.len -= offs;
  6394. + memmove(rcv->eval_buf.ptr, rcv->eval_buf.ptr + offs, rcv->eval_buf.len);
  6395. +
  6396. + spin_unlock_irqrestore(&rcv->lock, flags);
  6397. +
  6398. + return used;
  6399. +}
  6400. +
  6401. +
  6402. +#ifdef CONFIG_SURFACE_SAM_SSH_DEBUG_DEVICE
  6403. +
  6404. +#include <linux/sysfs.h>
  6405. +
  6406. +static char sam_ssh_debug_rqst_buf_sysfs[SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1] = { 0 };
  6407. +static char sam_ssh_debug_rqst_buf_pld[SURFACE_SAM_SSH_MAX_RQST_PAYLOAD] = { 0 };
  6408. +static char sam_ssh_debug_rqst_buf_res[SURFACE_SAM_SSH_MAX_RQST_RESPONSE] = { 0 };
  6409. +
  6410. +struct sysfs_rqst {
  6411. + u8 tc;
  6412. + u8 cid;
  6413. + u8 iid;
  6414. + u8 pri;
  6415. + u8 snc;
  6416. + u8 cdl;
  6417. + u8 pld[0];
  6418. +} __packed;
  6419. +
  6420. +static ssize_t rqst_read(struct file *f, struct kobject *kobj, struct bin_attribute *attr,
  6421. + char *buf, loff_t offs, size_t count)
  6422. +{
  6423. + if (offs < 0 || count + offs > SURFACE_SAM_SSH_MAX_RQST_RESPONSE)
  6424. + return -EINVAL;
  6425. +
  6426. + memcpy(buf, sam_ssh_debug_rqst_buf_sysfs + offs, count);
  6427. + return count;
  6428. +}
  6429. +
  6430. +static ssize_t rqst_write(struct file *f, struct kobject *kobj, struct bin_attribute *attr,
  6431. + char *buf, loff_t offs, size_t count)
  6432. +{
  6433. + struct sysfs_rqst *input;
  6434. + struct surface_sam_ssh_rqst rqst = {};
  6435. + struct surface_sam_ssh_buf result = {};
  6436. + int status;
  6437. +
  6438. + // check basic write constriants
  6439. + if (offs != 0 || count > SURFACE_SAM_SSH_MAX_RQST_PAYLOAD + sizeof(struct sysfs_rqst))
  6440. + return -EINVAL;
  6441. +
  6442. + if (count < sizeof(struct sysfs_rqst))
  6443. + return -EINVAL;
  6444. +
  6445. + input = (struct sysfs_rqst *)buf;
  6446. +
  6447. + // payload length should be consistent with data provided
  6448. + if (input->cdl + sizeof(struct sysfs_rqst) != count)
  6449. + return -EINVAL;
  6450. +
  6451. + rqst.tc = input->tc;
  6452. + rqst.cid = input->cid;
  6453. + rqst.iid = input->iid;
  6454. + rqst.pri = input->pri;
  6455. + rqst.snc = input->snc;
  6456. + rqst.cdl = input->cdl;
  6457. + rqst.pld = sam_ssh_debug_rqst_buf_pld;
  6458. + memcpy(sam_ssh_debug_rqst_buf_pld, &input->pld[0], input->cdl);
  6459. +
  6460. + result.cap = SURFACE_SAM_SSH_MAX_RQST_RESPONSE;
  6461. + result.len = 0;
  6462. + result.data = sam_ssh_debug_rqst_buf_res;
  6463. +
  6464. + status = surface_sam_ssh_rqst(&rqst, &result);
  6465. + if (status)
  6466. + return status;
  6467. +
  6468. + sam_ssh_debug_rqst_buf_sysfs[0] = result.len;
  6469. + memcpy(sam_ssh_debug_rqst_buf_sysfs + 1, result.data, result.len);
  6470. + memset(sam_ssh_debug_rqst_buf_sysfs + result.len + 1, 0,
  6471. + SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1 - result.len);
  6472. +
  6473. + return count;
  6474. +}
  6475. +
  6476. +static const BIN_ATTR_RW(rqst, SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1);
  6477. +
  6478. +
  6479. +static int surface_sam_ssh_sysfs_register(struct device *dev)
  6480. +{
  6481. + return sysfs_create_bin_file(&dev->kobj, &bin_attr_rqst);
  6482. +}
  6483. +
  6484. +static void surface_sam_ssh_sysfs_unregister(struct device *dev)
  6485. +{
  6486. + sysfs_remove_bin_file(&dev->kobj, &bin_attr_rqst);
  6487. +}
  6488. +
  6489. +#else /* CONFIG_SURFACE_ACPI_SSH_DEBUG_DEVICE */
  6490. +
  6491. +static int surface_sam_ssh_sysfs_register(struct device *dev)
  6492. +{
  6493. + return 0;
  6494. +}
  6495. +
  6496. +static void surface_sam_ssh_sysfs_unregister(struct device *dev)
  6497. +{
  6498. +}
  6499. +
  6500. +#endif /* CONFIG_SURFACE_SAM_SSH_DEBUG_DEVICE */
  6501. +
  6502. +
  6503. +static const struct acpi_gpio_params gpio_sam_wakeup_int = { 0, 0, false };
  6504. +static const struct acpi_gpio_params gpio_sam_wakeup = { 1, 0, false };
  6505. +
  6506. +static const struct acpi_gpio_mapping surface_sam_acpi_gpios[] = {
  6507. + { "sam_wakeup-int-gpio", &gpio_sam_wakeup_int, 1 },
  6508. + { "sam_wakeup-gpio", &gpio_sam_wakeup, 1 },
  6509. + { },
  6510. +};
  6511. +
  6512. +static irqreturn_t surface_sam_irq_handler(int irq, void *dev_id)
  6513. +{
  6514. + struct serdev_device *serdev = dev_id;
  6515. +
  6516. + dev_info(&serdev->dev, "wake irq triggered\n");
  6517. + return IRQ_HANDLED;
  6518. +}
  6519. +
  6520. +static int surface_sam_setup_irq(struct serdev_device *serdev)
  6521. +{
  6522. + const int irqf = IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_RISING;
  6523. + struct gpio_desc *gpiod;
  6524. + int irq;
  6525. + int status;
  6526. +
  6527. + gpiod = gpiod_get(&serdev->dev, "sam_wakeup-int", GPIOD_ASIS);
  6528. + if (IS_ERR(gpiod))
  6529. + return PTR_ERR(gpiod);
  6530. +
  6531. + irq = gpiod_to_irq(gpiod);
  6532. + gpiod_put(gpiod);
  6533. +
  6534. + if (irq < 0)
  6535. + return irq;
  6536. +
  6537. + status = request_threaded_irq(irq, NULL, surface_sam_irq_handler,
  6538. + irqf, "surface_sam_wakeup", serdev);
  6539. + if (status)
  6540. + return status;
  6541. +
  6542. + return irq;
  6543. +}
  6544. +
  6545. +
  6546. +static acpi_status
  6547. +ssh_setup_from_resource(struct acpi_resource *resource, void *context)
  6548. +{
  6549. + struct serdev_device *serdev = context;
  6550. + struct acpi_resource_common_serialbus *serial;
  6551. + struct acpi_resource_uart_serialbus *uart;
  6552. + int status = 0;
  6553. +
  6554. + if (resource->type != ACPI_RESOURCE_TYPE_SERIAL_BUS)
  6555. + return AE_OK;
  6556. +
  6557. + serial = &resource->data.common_serial_bus;
  6558. + if (serial->type != ACPI_RESOURCE_SERIAL_TYPE_UART)
  6559. + return AE_OK;
  6560. +
  6561. + uart = &resource->data.uart_serial_bus;
  6562. +
  6563. + // set up serdev device
  6564. + serdev_device_set_baudrate(serdev, uart->default_baud_rate);
  6565. +
  6566. + // serdev currently only supports RTSCTS flow control
  6567. + if (uart->flow_control & SSH_SUPPORTED_FLOW_CONTROL_MASK)
  6568. + dev_warn(&serdev->dev, "unsupported flow control (value: 0x%02x)\n", uart->flow_control);
  6569. +
  6570. + // set RTSCTS flow control
  6571. + serdev_device_set_flow_control(serdev, uart->flow_control & ACPI_UART_FLOW_CONTROL_HW);
  6572. +
  6573. + // serdev currently only supports EVEN/ODD parity
  6574. + switch (uart->parity) {
  6575. + case ACPI_UART_PARITY_NONE:
  6576. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE);
  6577. + break;
  6578. + case ACPI_UART_PARITY_EVEN:
  6579. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_EVEN);
  6580. + break;
  6581. + case ACPI_UART_PARITY_ODD:
  6582. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_ODD);
  6583. + break;
  6584. + default:
  6585. + dev_warn(&serdev->dev, "unsupported parity (value: 0x%02x)\n", uart->parity);
  6586. + break;
  6587. + }
  6588. +
  6589. + if (status) {
  6590. + dev_err(&serdev->dev, "failed to set parity (value: 0x%02x)\n", uart->parity);
  6591. + return status;
  6592. + }
  6593. +
  6594. + return AE_CTRL_TERMINATE; // we've found the resource and are done
  6595. +}
  6596. +
  6597. +
  6598. +static int surface_sam_ssh_suspend(struct device *dev)
  6599. +{
  6600. + struct sam_ssh_ec *ec;
  6601. + int status;
  6602. +
  6603. + dev_dbg(dev, "suspending\n");
  6604. +
  6605. + ec = surface_sam_ssh_acquire_init();
  6606. + if (ec) {
  6607. + status = surface_sam_ssh_ec_suspend(ec);
  6608. + if (status) {
  6609. + surface_sam_ssh_release(ec);
  6610. + return status;
  6611. + }
  6612. +
  6613. + if (device_may_wakeup(dev)) {
  6614. + status = enable_irq_wake(ec->irq);
  6615. + if (status) {
  6616. + surface_sam_ssh_release(ec);
  6617. + return status;
  6618. + }
  6619. +
  6620. + ec->irq_wakeup_enabled = true;
  6621. + } else {
  6622. + ec->irq_wakeup_enabled = false;
  6623. + }
  6624. +
  6625. + ec->state = SSH_EC_SUSPENDED;
  6626. + surface_sam_ssh_release(ec);
  6627. + }
  6628. +
  6629. + return 0;
  6630. +}
  6631. +
  6632. +static int surface_sam_ssh_resume(struct device *dev)
  6633. +{
  6634. + struct sam_ssh_ec *ec;
  6635. + int status;
  6636. +
  6637. + dev_dbg(dev, "resuming\n");
  6638. +
  6639. + ec = surface_sam_ssh_acquire_init();
  6640. + if (ec) {
  6641. + ec->state = SSH_EC_INITIALIZED;
  6642. +
  6643. + if (ec->irq_wakeup_enabled) {
  6644. + status = disable_irq_wake(ec->irq);
  6645. + if (status) {
  6646. + surface_sam_ssh_release(ec);
  6647. + return status;
  6648. + }
  6649. +
  6650. + ec->irq_wakeup_enabled = false;
  6651. + }
  6652. +
  6653. + status = surface_sam_ssh_ec_resume(ec);
  6654. + if (status) {
  6655. + surface_sam_ssh_release(ec);
  6656. + return status;
  6657. + }
  6658. +
  6659. + surface_sam_ssh_release(ec);
  6660. + }
  6661. +
  6662. + return 0;
  6663. +}
  6664. +
  6665. +static SIMPLE_DEV_PM_OPS(surface_sam_ssh_pm_ops, surface_sam_ssh_suspend, surface_sam_ssh_resume);
  6666. +
  6667. +
  6668. +static const struct serdev_device_ops ssh_device_ops = {
  6669. + .receive_buf = ssh_receive_buf,
  6670. + .write_wakeup = serdev_device_write_wakeup,
  6671. +};
  6672. +
  6673. +
  6674. +static int surface_sam_ssh_sysfs_register(struct device *dev);
  6675. +static void surface_sam_ssh_sysfs_unregister(struct device *dev);
  6676. +
  6677. +static int surface_sam_ssh_probe(struct serdev_device *serdev)
  6678. +{
  6679. + struct sam_ssh_ec *ec;
  6680. + struct workqueue_struct *event_queue_ack;
  6681. + struct workqueue_struct *event_queue_evt;
  6682. + u8 *write_buf;
  6683. + u8 *read_buf;
  6684. + u8 *eval_buf;
  6685. + acpi_handle *ssh = ACPI_HANDLE(&serdev->dev);
  6686. + acpi_status status;
  6687. + int irq;
  6688. +
  6689. + dev_dbg(&serdev->dev, "probing\n");
  6690. +
  6691. + if (gpiod_count(&serdev->dev, NULL) < 0)
  6692. + return -ENODEV;
  6693. +
  6694. + status = devm_acpi_dev_add_driver_gpios(&serdev->dev, surface_sam_acpi_gpios);
  6695. + if (status)
  6696. + return status;
  6697. +
  6698. + // allocate buffers
  6699. + write_buf = kzalloc(SSH_WRITE_BUF_LEN, GFP_KERNEL);
  6700. + if (!write_buf) {
  6701. + status = -ENOMEM;
  6702. + goto err_write_buf;
  6703. + }
  6704. +
  6705. + read_buf = kzalloc(SSH_READ_BUF_LEN, GFP_KERNEL);
  6706. + if (!read_buf) {
  6707. + status = -ENOMEM;
  6708. + goto err_read_buf;
  6709. + }
  6710. +
  6711. + eval_buf = kzalloc(SSH_EVAL_BUF_LEN, GFP_KERNEL);
  6712. + if (!eval_buf) {
  6713. + status = -ENOMEM;
  6714. + goto err_eval_buf;
  6715. + }
  6716. +
  6717. + event_queue_ack = create_singlethread_workqueue("surface_sh_ackq");
  6718. + if (!event_queue_ack) {
  6719. + status = -ENOMEM;
  6720. + goto err_ackq;
  6721. + }
  6722. +
  6723. + event_queue_evt = create_workqueue("surface_sh_evtq");
  6724. + if (!event_queue_evt) {
  6725. + status = -ENOMEM;
  6726. + goto err_evtq;
  6727. + }
  6728. +
  6729. + irq = surface_sam_setup_irq(serdev);
  6730. + if (irq < 0) {
  6731. + status = irq;
  6732. + goto err_irq;
  6733. + }
  6734. +
  6735. + // set up EC
  6736. + ec = surface_sam_ssh_acquire();
  6737. + if (ec->state != SSH_EC_UNINITIALIZED) {
  6738. + dev_err(&serdev->dev, "embedded controller already initialized\n");
  6739. + surface_sam_ssh_release(ec);
  6740. +
  6741. + status = -EBUSY;
  6742. + goto err_busy;
  6743. + }
  6744. +
  6745. + ec->serdev = serdev;
  6746. + ec->irq = irq;
  6747. + ec->writer.data = write_buf;
  6748. + ec->writer.ptr = write_buf;
  6749. +
  6750. + // initialize receiver
  6751. + init_completion(&ec->receiver.signal);
  6752. + kfifo_init(&ec->receiver.fifo, read_buf, SSH_READ_BUF_LEN);
  6753. + ec->receiver.eval_buf.ptr = eval_buf;
  6754. + ec->receiver.eval_buf.cap = SSH_EVAL_BUF_LEN;
  6755. + ec->receiver.eval_buf.len = 0;
  6756. +
  6757. + // initialize event handling
  6758. + ec->events.queue_ack = event_queue_ack;
  6759. + ec->events.queue_evt = event_queue_evt;
  6760. +
  6761. + ec->state = SSH_EC_INITIALIZED;
  6762. +
  6763. + serdev_device_set_drvdata(serdev, ec);
  6764. +
  6765. + /* ensure everything is properly set-up before we open the device */
  6766. + smp_mb();
  6767. +
  6768. + serdev_device_set_client_ops(serdev, &ssh_device_ops);
  6769. + status = serdev_device_open(serdev);
  6770. + if (status)
  6771. + goto err_open;
  6772. +
  6773. + status = acpi_walk_resources(ssh, METHOD_NAME__CRS,
  6774. + ssh_setup_from_resource, serdev);
  6775. + if (ACPI_FAILURE(status))
  6776. + goto err_devinit;
  6777. +
  6778. + status = surface_sam_ssh_ec_resume(ec);
  6779. + if (status)
  6780. + goto err_devinit;
  6781. +
  6782. + status = surface_sam_ssh_sysfs_register(&serdev->dev);
  6783. + if (status)
  6784. + goto err_devinit;
  6785. +
  6786. + surface_sam_ssh_release(ec);
  6787. +
  6788. + // TODO: The EC can wake up the system via the associated GPIO interrupt in
  6789. + // multiple situations. One of which is the remaining battery capacity
  6790. + // falling below a certain threshold. Normally, we should use the
  6791. + // device_init_wakeup function, however, the EC also seems to have other
  6792. + // reasons for waking up the system and it seems that Windows has
  6793. + // additional checks whether the system should be resumed. In short, this
  6794. + // causes some spourious unwanted wake-ups. For now let's thus default
  6795. + // power/wakeup to false.
  6796. + device_set_wakeup_capable(&serdev->dev, true);
  6797. + acpi_walk_dep_device_list(ssh);
  6798. +
  6799. + return 0;
  6800. +
  6801. +err_devinit:
  6802. + serdev_device_close(serdev);
  6803. +err_open:
  6804. + ec->state = SSH_EC_UNINITIALIZED;
  6805. + serdev_device_set_drvdata(serdev, NULL);
  6806. + surface_sam_ssh_release(ec);
  6807. +err_busy:
  6808. + free_irq(irq, serdev);
  6809. +err_irq:
  6810. + destroy_workqueue(event_queue_evt);
  6811. +err_evtq:
  6812. + destroy_workqueue(event_queue_ack);
  6813. +err_ackq:
  6814. + kfree(eval_buf);
  6815. +err_eval_buf:
  6816. + kfree(read_buf);
  6817. +err_read_buf:
  6818. + kfree(write_buf);
  6819. +err_write_buf:
  6820. + return status;
  6821. +}
  6822. +
  6823. +static void surface_sam_ssh_remove(struct serdev_device *serdev)
  6824. +{
  6825. + struct sam_ssh_ec *ec;
  6826. + unsigned long flags;
  6827. + int status;
  6828. +
  6829. + ec = surface_sam_ssh_acquire_init();
  6830. + if (!ec)
  6831. + return;
  6832. +
  6833. + free_irq(ec->irq, serdev);
  6834. + surface_sam_ssh_sysfs_unregister(&serdev->dev);
  6835. +
  6836. + // suspend EC and disable events
  6837. + status = surface_sam_ssh_ec_suspend(ec);
  6838. + if (status)
  6839. + dev_err(&serdev->dev, "failed to suspend EC: %d\n", status);
  6840. +
  6841. + // make sure all events (received up to now) have been properly handled
  6842. + flush_workqueue(ec->events.queue_ack);
  6843. + flush_workqueue(ec->events.queue_evt);
  6844. +
  6845. + // remove event handlers
  6846. + spin_lock_irqsave(&ec->events.lock, flags);
  6847. + memset(ec->events.handler, 0,
  6848. + sizeof(struct ssh_event_handler)
  6849. + * SAM_NUM_EVENT_TYPES);
  6850. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6851. +
  6852. + // set device to deinitialized state
  6853. + ec->state = SSH_EC_UNINITIALIZED;
  6854. + ec->serdev = NULL;
  6855. +
  6856. + /* ensure state and serdev get set before continuing */
  6857. + smp_mb();
  6858. +
  6859. + /*
  6860. + * Flush any event that has not been processed yet to ensure we're not going to
  6861. + * use the serial device any more (e.g. for ACKing).
  6862. + */
  6863. + flush_workqueue(ec->events.queue_ack);
  6864. + flush_workqueue(ec->events.queue_evt);
  6865. +
  6866. + serdev_device_close(serdev);
  6867. +
  6868. + /*
  6869. + * Only at this point, no new events can be received. Destroying the
  6870. + * workqueue here flushes all remaining events. Those events will be
  6871. + * silently ignored and neither ACKed nor any handler gets called.
  6872. + */
  6873. + destroy_workqueue(ec->events.queue_ack);
  6874. + destroy_workqueue(ec->events.queue_evt);
  6875. +
  6876. + // free writer
  6877. + kfree(ec->writer.data);
  6878. + ec->writer.data = NULL;
  6879. + ec->writer.ptr = NULL;
  6880. +
  6881. + // free receiver
  6882. + spin_lock_irqsave(&ec->receiver.lock, flags);
  6883. + ec->receiver.state = SSH_RCV_DISCARD;
  6884. + kfifo_free(&ec->receiver.fifo);
  6885. +
  6886. + kfree(ec->receiver.eval_buf.ptr);
  6887. + ec->receiver.eval_buf.ptr = NULL;
  6888. + ec->receiver.eval_buf.cap = 0;
  6889. + ec->receiver.eval_buf.len = 0;
  6890. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  6891. +
  6892. + device_set_wakeup_capable(&serdev->dev, false);
  6893. + serdev_device_set_drvdata(serdev, NULL);
  6894. + surface_sam_ssh_release(ec);
  6895. +}
  6896. +
  6897. +
  6898. +static const struct acpi_device_id surface_sam_ssh_match[] = {
  6899. + { "MSHW0084", 0 },
  6900. + { },
  6901. +};
  6902. +MODULE_DEVICE_TABLE(acpi, surface_sam_ssh_match);
  6903. +
  6904. +static struct serdev_device_driver surface_sam_ssh = {
  6905. + .probe = surface_sam_ssh_probe,
  6906. + .remove = surface_sam_ssh_remove,
  6907. + .driver = {
  6908. + .name = "surface_sam_ssh",
  6909. + .acpi_match_table = ACPI_PTR(surface_sam_ssh_match),
  6910. + .pm = &surface_sam_ssh_pm_ops,
  6911. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  6912. + },
  6913. +};
  6914. +
  6915. +
  6916. +static int __init surface_sam_ssh_init(void)
  6917. +{
  6918. + return serdev_device_driver_register(&surface_sam_ssh);
  6919. +}
  6920. +
  6921. +static void __exit surface_sam_ssh_exit(void)
  6922. +{
  6923. + serdev_device_driver_unregister(&surface_sam_ssh);
  6924. +}
  6925. +
  6926. +/*
  6927. + * Ensure that the driver is loaded late due to some issues with the UART
  6928. + * communication. Specifically, we want to ensure that DMA is ready and being
  6929. + * used. Not using DMA can result in spurious communication failures,
  6930. + * especially during boot, which among other things will result in wrong
  6931. + * battery information (via ACPI _BIX) being displayed. Using a late init_call
  6932. + * instead of the normal module_init gives the DMA subsystem time to
  6933. + * initialize and via that results in a more stable communication, avoiding
  6934. + * such failures.
  6935. + */
  6936. +late_initcall(surface_sam_ssh_init);
  6937. +module_exit(surface_sam_ssh_exit);
  6938. +
  6939. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  6940. +MODULE_DESCRIPTION("Surface Serial Hub Driver for 5th Generation Surface Devices");
  6941. +MODULE_LICENSE("GPL v2");
  6942. diff --git a/drivers/platform/x86/surface_sam/surface_sam_ssh.h b/drivers/platform/x86/surface_sam/surface_sam_ssh.h
  6943. new file mode 100644
  6944. index 000000000000..435b5c7bac9a
  6945. --- /dev/null
  6946. +++ b/drivers/platform/x86/surface_sam/surface_sam_ssh.h
  6947. @@ -0,0 +1,98 @@
  6948. +/* SPDX-License-Identifier: GPL-2.0 */
  6949. +/*
  6950. + * Interface for Surface Serial Hub (SSH).
  6951. + *
  6952. + * The SSH is the main communication hub for communication between host and
  6953. + * the Surface/System Aggregator Module (SAM) on newer Microsoft Surface
  6954. + * devices (Book 2, Pro 5, Laptops, ...). Also referred to as SAM-over-SSH.
  6955. + * Older devices (Book 1, Pro 4) use SAM-over-I2C.
  6956. + */
  6957. +
  6958. +#ifndef _SURFACE_SAM_SSH_H
  6959. +#define _SURFACE_SAM_SSH_H
  6960. +
  6961. +#include <linux/types.h>
  6962. +#include <linux/device.h>
  6963. +
  6964. +
  6965. +/*
  6966. + * Maximum request payload size in bytes.
  6967. + * Value based on ACPI (255 bytes minus header/status bytes).
  6968. + */
  6969. +#define SURFACE_SAM_SSH_MAX_RQST_PAYLOAD (255 - 10)
  6970. +
  6971. +/*
  6972. + * Maximum response payload size in bytes.
  6973. + * Value based on ACPI (255 bytes minus header/status bytes).
  6974. + */
  6975. +#define SURFACE_SAM_SSH_MAX_RQST_RESPONSE (255 - 4)
  6976. +
  6977. +/*
  6978. + * The number of (lower) bits of the request ID (RQID) reserved for events.
  6979. + * These bits may only be used exclusively for events sent from the EC to the
  6980. + * host.
  6981. + */
  6982. +#define SURFACE_SAM_SSH_RQID_EVENT_BITS 5
  6983. +
  6984. +/*
  6985. + * Special event-handler delay value indicating that the corresponding event
  6986. + * should be handled immediately in the interrupt and not be relayed through
  6987. + * the workqueue. Intended for low-latency events, such as keyboard events.
  6988. + */
  6989. +#define SURFACE_SAM_SSH_EVENT_IMMEDIATE ((unsigned long) -1)
  6990. +
  6991. +
  6992. +#define SURFACE_SAM_PRIORITY_NORMAL 1
  6993. +#define SURFACE_SAM_PRIORITY_HIGH 2
  6994. +
  6995. +
  6996. +struct surface_sam_ssh_buf {
  6997. + u8 cap;
  6998. + u8 len;
  6999. + u8 *data;
  7000. +};
  7001. +
  7002. +struct surface_sam_ssh_rqst {
  7003. + u8 tc; // target category
  7004. + u8 cid; // command ID
  7005. + u8 iid; // instance ID
  7006. + u8 pri; // priority
  7007. + u8 snc; // expect response flag
  7008. + u8 cdl; // command data length (length of payload)
  7009. + u8 *pld; // pointer to payload of length cdl
  7010. +};
  7011. +
  7012. +struct surface_sam_ssh_event {
  7013. + u16 rqid; // event type/source ID
  7014. + u8 tc; // target category
  7015. + u8 cid; // command ID
  7016. + u8 iid; // instance ID
  7017. + u8 pri; // priority
  7018. + u8 len; // length of payload
  7019. + u8 *pld; // payload of length len
  7020. +};
  7021. +
  7022. +
  7023. +typedef int (*surface_sam_ssh_event_handler_fn)(struct surface_sam_ssh_event *event, void *data);
  7024. +typedef unsigned long (*surface_sam_ssh_event_handler_delay)(struct surface_sam_ssh_event *event, void *data);
  7025. +
  7026. +int surface_sam_ssh_consumer_register(struct device *consumer);
  7027. +
  7028. +int surface_sam_ssh_rqst(const struct surface_sam_ssh_rqst *rqst, struct surface_sam_ssh_buf *result);
  7029. +
  7030. +int surface_sam_ssh_enable_event_source(u8 tc, u8 unknown, u16 rqid);
  7031. +int surface_sam_ssh_disable_event_source(u8 tc, u8 unknown, u16 rqid);
  7032. +int surface_sam_ssh_remove_event_handler(u16 rqid);
  7033. +
  7034. +int surface_sam_ssh_set_delayed_event_handler(u16 rqid,
  7035. + surface_sam_ssh_event_handler_fn fn,
  7036. + surface_sam_ssh_event_handler_delay delay,
  7037. + void *data);
  7038. +
  7039. +static inline int surface_sam_ssh_set_event_handler(u16 rqid, surface_sam_ssh_event_handler_fn fn, void *data)
  7040. +{
  7041. + return surface_sam_ssh_set_delayed_event_handler(rqid, fn, NULL, data);
  7042. +}
  7043. +
  7044. +
  7045. +#endif /* _SURFACE_SAM_SSH_H */
  7046. diff --git a/drivers/platform/x86/surface_sam/surface_sam_vhf.c b/drivers/platform/x86/surface_sam/surface_sam_vhf.c
  7047. new file mode 100644
  7048. index 000000000000..a00763805eca
  7049. --- /dev/null
  7050. +++ b/drivers/platform/x86/surface_sam/surface_sam_vhf.c
  7051. @@ -0,0 +1,270 @@
  7052. +// SPDX-License-Identifier: GPL-2.0
  7053. +/*
  7054. + * Virtual HID Framework (VHF) driver for input events via SAM.
  7055. + * Used for keyboard input events on the Surface Laptops.
  7056. + */
  7057. +
  7058. +#include <linux/acpi.h>
  7059. +#include <linux/hid.h>
  7060. +#include <linux/input.h>
  7061. +#include <linux/platform_device.h>
  7062. +#include <linux/types.h>
  7063. +
  7064. +#include "surface_sam_ssh.h"
  7065. +
  7066. +
  7067. +#define USB_VENDOR_ID_MICROSOFT 0x045e
  7068. +#define USB_DEVICE_ID_MS_VHF 0xf001
  7069. +
  7070. +#define VHF_INPUT_NAME "Microsoft Virtual HID Framework Device"
  7071. +
  7072. +/*
  7073. + * Request ID for VHF events. This value is based on the output of the Surface
  7074. + * EC and should not be changed.
  7075. + */
  7076. +#define SAM_EVENT_VHF_RQID 0x0001
  7077. +#define SAM_EVENT_VHF_TC 0x08
  7078. +
  7079. +
  7080. +struct vhf_evtctx {
  7081. + struct device *dev;
  7082. + struct hid_device *hid;
  7083. +};
  7084. +
  7085. +struct vhf_drvdata {
  7086. + struct vhf_evtctx event_ctx;
  7087. +};
  7088. +
  7089. +
  7090. +/*
  7091. + * These report descriptors have been extracted from a Surface Book 2.
  7092. + * They seems to be similar enough to be usable on the Surface Laptop.
  7093. + */
  7094. +static const u8 vhf_hid_desc[] = {
  7095. + // keyboard descriptor (event command ID 0x03)
  7096. + 0x05, 0x01, /* Usage Page (Desktop), */
  7097. + 0x09, 0x06, /* Usage (Keyboard), */
  7098. + 0xA1, 0x01, /* Collection (Application), */
  7099. + 0x85, 0x01, /* Report ID (1), */
  7100. + 0x15, 0x00, /* Logical Minimum (0), */
  7101. + 0x25, 0x01, /* Logical Maximum (1), */
  7102. + 0x75, 0x01, /* Report Size (1), */
  7103. + 0x95, 0x08, /* Report Count (8), */
  7104. + 0x05, 0x07, /* Usage Page (Keyboard), */
  7105. + 0x19, 0xE0, /* Usage Minimum (KB Leftcontrol), */
  7106. + 0x29, 0xE7, /* Usage Maximum (KB Right GUI), */
  7107. + 0x81, 0x02, /* Input (Variable), */
  7108. + 0x75, 0x08, /* Report Size (8), */
  7109. + 0x95, 0x0A, /* Report Count (10), */
  7110. + 0x19, 0x00, /* Usage Minimum (None), */
  7111. + 0x29, 0x91, /* Usage Maximum (KB LANG2), */
  7112. + 0x26, 0xFF, 0x00, /* Logical Maximum (255), */
  7113. + 0x81, 0x00, /* Input, */
  7114. + 0x05, 0x0C, /* Usage Page (Consumer), */
  7115. + 0x0A, 0xC0, 0x02, /* Usage (02C0h), */
  7116. + 0xA1, 0x02, /* Collection (Logical), */
  7117. + 0x1A, 0xC1, 0x02, /* Usage Minimum (02C1h), */
  7118. + 0x2A, 0xC6, 0x02, /* Usage Maximum (02C6h), */
  7119. + 0x95, 0x06, /* Report Count (6), */
  7120. + 0xB1, 0x03, /* Feature (Constant, Variable), */
  7121. + 0xC0, /* End Collection, */
  7122. + 0x05, 0x08, /* Usage Page (LED), */
  7123. + 0x19, 0x01, /* Usage Minimum (01h), */
  7124. + 0x29, 0x03, /* Usage Maximum (03h), */
  7125. + 0x75, 0x01, /* Report Size (1), */
  7126. + 0x95, 0x03, /* Report Count (3), */
  7127. + 0x25, 0x01, /* Logical Maximum (1), */
  7128. + 0x91, 0x02, /* Output (Variable), */
  7129. + 0x95, 0x05, /* Report Count (5), */
  7130. + 0x91, 0x01, /* Output (Constant), */
  7131. + 0xC0, /* End Collection, */
  7132. +
  7133. + // media key descriptor (event command ID 0x04)
  7134. + 0x05, 0x0C, /* Usage Page (Consumer), */
  7135. + 0x09, 0x01, /* Usage (Consumer Control), */
  7136. + 0xA1, 0x01, /* Collection (Application), */
  7137. + 0x85, 0x03, /* Report ID (3), */
  7138. + 0x75, 0x10, /* Report Size (16), */
  7139. + 0x15, 0x00, /* Logical Minimum (0), */
  7140. + 0x26, 0xFF, 0x03, /* Logical Maximum (1023), */
  7141. + 0x19, 0x00, /* Usage Minimum (00h), */
  7142. + 0x2A, 0xFF, 0x03, /* Usage Maximum (03FFh), */
  7143. + 0x81, 0x00, /* Input, */
  7144. + 0xC0, /* End Collection, */
  7145. +};
  7146. +
  7147. +
  7148. +static int vhf_hid_start(struct hid_device *hid)
  7149. +{
  7150. + hid_dbg(hid, "%s\n", __func__);
  7151. + return 0;
  7152. +}
  7153. +
  7154. +static void vhf_hid_stop(struct hid_device *hid)
  7155. +{
  7156. + hid_dbg(hid, "%s\n", __func__);
  7157. +}
  7158. +
  7159. +static int vhf_hid_open(struct hid_device *hid)
  7160. +{
  7161. + hid_dbg(hid, "%s\n", __func__);
  7162. + return 0;
  7163. +}
  7164. +
  7165. +static void vhf_hid_close(struct hid_device *hid)
  7166. +{
  7167. + hid_dbg(hid, "%s\n", __func__);
  7168. +}
  7169. +
  7170. +static int vhf_hid_parse(struct hid_device *hid)
  7171. +{
  7172. + return hid_parse_report(hid, (u8 *)vhf_hid_desc, ARRAY_SIZE(vhf_hid_desc));
  7173. +}
  7174. +
  7175. +static int vhf_hid_raw_request(struct hid_device *hid, unsigned char reportnum,
  7176. + u8 *buf, size_t len, unsigned char rtype,
  7177. + int reqtype)
  7178. +{
  7179. + hid_dbg(hid, "%s\n", __func__);
  7180. + return 0;
  7181. +}
  7182. +
  7183. +static int vhf_hid_output_report(struct hid_device *hid, u8 *buf, size_t len)
  7184. +{
  7185. + hid_dbg(hid, "%s\n", __func__);
  7186. + print_hex_dump_debug("report:", DUMP_PREFIX_OFFSET, 16, 1, buf, len, false);
  7187. +
  7188. + return len;
  7189. +}
  7190. +
  7191. +static struct hid_ll_driver vhf_hid_ll_driver = {
  7192. + .start = vhf_hid_start,
  7193. + .stop = vhf_hid_stop,
  7194. + .open = vhf_hid_open,
  7195. + .close = vhf_hid_close,
  7196. + .parse = vhf_hid_parse,
  7197. + .raw_request = vhf_hid_raw_request,
  7198. + .output_report = vhf_hid_output_report,
  7199. +};
  7200. +
  7201. +
  7202. +static struct hid_device *vhf_create_hid_device(struct platform_device *pdev)
  7203. +{
  7204. + struct hid_device *hid;
  7205. +
  7206. + hid = hid_allocate_device();
  7207. + if (IS_ERR(hid))
  7208. + return hid;
  7209. +
  7210. + hid->dev.parent = &pdev->dev;
  7211. +
  7212. + hid->bus = BUS_VIRTUAL;
  7213. + hid->vendor = USB_VENDOR_ID_MICROSOFT;
  7214. + hid->product = USB_DEVICE_ID_MS_VHF;
  7215. +
  7216. + hid->ll_driver = &vhf_hid_ll_driver;
  7217. +
  7218. + sprintf(hid->name, "%s", VHF_INPUT_NAME);
  7219. +
  7220. + return hid;
  7221. +}
  7222. +
  7223. +static int vhf_event_handler(struct surface_sam_ssh_event *event, void *data)
  7224. +{
  7225. + struct vhf_evtctx *ctx = (struct vhf_evtctx *)data;
  7226. +
  7227. + if (event->tc == 0x08 && (event->cid == 0x03 || event->cid == 0x04))
  7228. + return hid_input_report(ctx->hid, HID_INPUT_REPORT, event->pld, event->len, 1);
  7229. +
  7230. + dev_warn(ctx->dev, "unsupported event (tc = %d, cid = %d)\n", event->tc, event->cid);
  7231. + return 0;
  7232. +}
  7233. +
  7234. +static int surface_sam_vhf_probe(struct platform_device *pdev)
  7235. +{
  7236. + struct vhf_drvdata *drvdata;
  7237. + struct hid_device *hid;
  7238. + int status;
  7239. +
  7240. + // add device link to EC
  7241. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  7242. + if (status)
  7243. + return status == -ENXIO ? -EPROBE_DEFER : status;
  7244. +
  7245. + drvdata = kzalloc(sizeof(struct vhf_drvdata), GFP_KERNEL);
  7246. + if (!drvdata)
  7247. + return -ENOMEM;
  7248. +
  7249. + hid = vhf_create_hid_device(pdev);
  7250. + if (IS_ERR(hid)) {
  7251. + status = PTR_ERR(hid);
  7252. + goto err_probe_hid;
  7253. + }
  7254. +
  7255. + status = hid_add_device(hid);
  7256. + if (status)
  7257. + goto err_add_hid;
  7258. +
  7259. + drvdata->event_ctx.dev = &pdev->dev;
  7260. + drvdata->event_ctx.hid = hid;
  7261. +
  7262. + platform_set_drvdata(pdev, drvdata);
  7263. +
  7264. + status = surface_sam_ssh_set_event_handler(
  7265. + SAM_EVENT_VHF_RQID,
  7266. + vhf_event_handler,
  7267. + &drvdata->event_ctx);
  7268. + if (status)
  7269. + goto err_add_hid;
  7270. +
  7271. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_VHF_TC, 0x01, SAM_EVENT_VHF_RQID);
  7272. + if (status)
  7273. + goto err_event_source;
  7274. +
  7275. + return 0;
  7276. +
  7277. +err_event_source:
  7278. + surface_sam_ssh_remove_event_handler(SAM_EVENT_VHF_RQID);
  7279. +err_add_hid:
  7280. + hid_destroy_device(hid);
  7281. + platform_set_drvdata(pdev, NULL);
  7282. +err_probe_hid:
  7283. + kfree(drvdata);
  7284. + return status;
  7285. +}
  7286. +
  7287. +static int surface_sam_vhf_remove(struct platform_device *pdev)
  7288. +{
  7289. + struct vhf_drvdata *drvdata = platform_get_drvdata(pdev);
  7290. +
  7291. + surface_sam_ssh_disable_event_source(SAM_EVENT_VHF_TC, 0x01, SAM_EVENT_VHF_RQID);
  7292. + surface_sam_ssh_remove_event_handler(SAM_EVENT_VHF_RQID);
  7293. +
  7294. + hid_destroy_device(drvdata->event_ctx.hid);
  7295. + kfree(drvdata);
  7296. +
  7297. + platform_set_drvdata(pdev, NULL);
  7298. + return 0;
  7299. +}
  7300. +
  7301. +
  7302. +static const struct acpi_device_id surface_sam_vhf_match[] = {
  7303. + { "MSHW0096" },
  7304. + { },
  7305. +};
  7306. +MODULE_DEVICE_TABLE(acpi, surface_sam_vhf_match);
  7307. +
  7308. +static struct platform_driver surface_sam_vhf = {
  7309. + .probe = surface_sam_vhf_probe,
  7310. + .remove = surface_sam_vhf_remove,
  7311. + .driver = {
  7312. + .name = "surface_sam_vhf",
  7313. + .acpi_match_table = ACPI_PTR(surface_sam_vhf_match),
  7314. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  7315. + },
  7316. +};
  7317. +module_platform_driver(surface_sam_vhf);
  7318. +
  7319. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  7320. +MODULE_DESCRIPTION("Virtual HID Framework Driver for 5th Generation Surface Devices");
  7321. +MODULE_LICENSE("GPL v2");
  7322. --
  7323. 2.26.0