0004-surface-sam.patch 194 KB

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  1. From 45ed13097d294c78ced0b0430d292b26faa4e2cf Mon Sep 17 00:00:00 2001
  2. From: qzed <qzed@users.noreply.github.com>
  3. Date: Mon, 26 Aug 2019 01:11:08 +0200
  4. Subject: [PATCH 4/7] surface-sam
  5. ---
  6. drivers/acpi/acpica/dsopcode.c | 2 +-
  7. drivers/acpi/acpica/exfield.c | 12 +-
  8. drivers/platform/x86/Kconfig | 1 +
  9. drivers/platform/x86/Makefile | 1 +
  10. drivers/platform/x86/surface_sam/Kconfig | 164 ++
  11. drivers/platform/x86/surface_sam/Makefile | 10 +
  12. .../x86/surface_sam/surface_sam_dtx.c | 604 ++++++
  13. .../x86/surface_sam/surface_sam_hps.c | 1110 +++++++++++
  14. .../x86/surface_sam/surface_sam_san.c | 883 +++++++++
  15. .../x86/surface_sam/surface_sam_san.h | 30 +
  16. .../x86/surface_sam/surface_sam_sid.c | 137 ++
  17. .../x86/surface_sam/surface_sam_sid_gpelid.c | 224 +++
  18. .../surface_sam/surface_sam_sid_perfmode.c | 216 ++
  19. .../x86/surface_sam/surface_sam_sid_power.c | 1264 ++++++++++++
  20. .../x86/surface_sam/surface_sam_sid_vhf.c | 428 ++++
  21. .../x86/surface_sam/surface_sam_ssh.c | 1744 +++++++++++++++++
  22. .../x86/surface_sam/surface_sam_ssh.h | 98 +
  23. .../x86/surface_sam/surface_sam_vhf.c | 270 +++
  24. 18 files changed, 7194 insertions(+), 4 deletions(-)
  25. create mode 100644 drivers/platform/x86/surface_sam/Kconfig
  26. create mode 100644 drivers/platform/x86/surface_sam/Makefile
  27. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_dtx.c
  28. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_hps.c
  29. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_san.c
  30. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_san.h
  31. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid.c
  32. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  33. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  34. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  35. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  36. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_ssh.c
  37. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_ssh.h
  38. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_vhf.c
  39. diff --git a/drivers/acpi/acpica/dsopcode.c b/drivers/acpi/acpica/dsopcode.c
  40. index 10f32b62608e..7b2a4987f050 100644
  41. --- a/drivers/acpi/acpica/dsopcode.c
  42. +++ b/drivers/acpi/acpica/dsopcode.c
  43. @@ -123,7 +123,7 @@ acpi_ds_init_buffer_field(u16 aml_opcode,
  44. /* Offset is in bits, count is in bits */
  45. - field_flags = AML_FIELD_ACCESS_BYTE;
  46. + field_flags = AML_FIELD_ACCESS_BUFFER;
  47. bit_offset = offset;
  48. bit_count = (u32) length_desc->integer.value;
  49. diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c
  50. index d3d2dbfba680..0b7f617a6e9b 100644
  51. --- a/drivers/acpi/acpica/exfield.c
  52. +++ b/drivers/acpi/acpica/exfield.c
  53. @@ -109,6 +109,7 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
  54. union acpi_operand_object *buffer_desc;
  55. void *buffer;
  56. u32 buffer_length;
  57. + u8 field_flags;
  58. ACPI_FUNCTION_TRACE_PTR(ex_read_data_from_field, obj_desc);
  59. @@ -157,11 +158,16 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
  60. * Note: Field.length is in bits.
  61. */
  62. buffer_length =
  63. - (acpi_size)ACPI_ROUND_BITS_UP_TO_BYTES(obj_desc->field.bit_length);
  64. + (acpi_size)ACPI_ROUND_BITS_UP_TO_BYTES(obj_desc->common_field.bit_length);
  65. + field_flags = obj_desc->common_field.field_flags;
  66. - if (buffer_length > acpi_gbl_integer_byte_width) {
  67. + if (buffer_length > acpi_gbl_integer_byte_width ||
  68. + (field_flags & AML_FIELD_ACCESS_TYPE_MASK) == AML_FIELD_ACCESS_BUFFER) {
  69. - /* Field is too large for an Integer, create a Buffer instead */
  70. + /*
  71. + * Field is either too large for an Integer, or a actually of type
  72. + * buffer, so create a Buffer.
  73. + */
  74. buffer_desc = acpi_ut_create_buffer_object(buffer_length);
  75. if (!buffer_desc) {
  76. diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
  77. index 0e389c2e2101..4673aed07e98 100644
  78. --- a/drivers/platform/x86/Kconfig
  79. +++ b/drivers/platform/x86/Kconfig
  80. @@ -1345,6 +1345,7 @@ config PCENGINES_APU2
  81. will be called pcengines-apuv2.
  82. source "drivers/platform/x86/intel_speed_select_if/Kconfig"
  83. +source "drivers/platform/x86/surface_sam/Kconfig"
  84. config SYSTEM76_ACPI
  85. tristate "System76 ACPI Driver"
  86. diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
  87. index d707a8edd738..56ebd493b38f 100644
  88. --- a/drivers/platform/x86/Makefile
  89. +++ b/drivers/platform/x86/Makefile
  90. @@ -106,3 +106,4 @@ obj-$(CONFIG_INTEL_ATOMISP2_PM) += intel_atomisp2_pm.o
  91. obj-$(CONFIG_PCENGINES_APU2) += pcengines-apuv2.o
  92. obj-$(CONFIG_INTEL_SPEED_SELECT_INTERFACE) += intel_speed_select_if/
  93. obj-$(CONFIG_SYSTEM76_ACPI) += system76_acpi.o
  94. +obj-$(CONFIG_SURFACE_SAM) += surface_sam/
  95. diff --git a/drivers/platform/x86/surface_sam/Kconfig b/drivers/platform/x86/surface_sam/Kconfig
  96. new file mode 100644
  97. index 000000000000..c4556e58b9a5
  98. --- /dev/null
  99. +++ b/drivers/platform/x86/surface_sam/Kconfig
  100. @@ -0,0 +1,164 @@
  101. +menuconfig SURFACE_SAM
  102. + depends on ACPI
  103. + tristate "Microsoft Surface/System Aggregator Module and Platform Drivers"
  104. + help
  105. + Drivers for the Surface/System Aggregator Module (SAM) of Microsoft
  106. + Surface devices.
  107. +
  108. + SAM is an embedded controller that provides access to various
  109. + functionalities on these devices, including battery status, keyboard
  110. + events (on the Laptops) and many more.
  111. +
  112. + Say M/Y here if you have a Microsoft Surface device with a SAM device
  113. + (i.e. 5th generation or later).
  114. +
  115. +config SURFACE_SAM_SSH
  116. + tristate "Surface Serial Hub Driver"
  117. + depends on SURFACE_SAM
  118. + depends on SERIAL_DEV_CTRL_TTYPORT
  119. + select CRC_CCITT
  120. + default m
  121. + help
  122. + Surface Serial Hub driver for 5th generation (or later) Microsoft
  123. + Surface devices.
  124. +
  125. + This is the base driver for the embedded serial controller found on
  126. + 5th generation (and later) Microsoft Surface devices (e.g. Book 2,
  127. + Laptop, Laptop 2, Pro 2017, Pro 6, ...). This driver itself only
  128. + provides access to the embedded controller (SAM) and subsequent
  129. + drivers are required for the respective functionalities.
  130. +
  131. + If you have a 5th generation (or later) Microsoft Surface device, say
  132. + Y or M here.
  133. +
  134. +config SURFACE_SAM_SSH_DEBUG_DEVICE
  135. + bool "Surface Serial Hub Debug Device"
  136. + depends on SURFACE_SAM_SSH
  137. + depends on SYSFS
  138. + default n
  139. + help
  140. + Debug device for direct communication with the embedded controller
  141. + found on 5th generation (and later) Microsoft Surface devices (e.g.
  142. + Book 2, Laptop, Laptop 2, Pro 2017, Pro 6, ...) via sysfs.
  143. +
  144. + If you are not sure, say N here.
  145. +
  146. +config SURFACE_SAM_SAN
  147. + tristate "Surface ACPI Notify Driver"
  148. + depends on SURFACE_SAM_SSH
  149. + default m
  150. + help
  151. + Surface ACPI Notify driver for 5th generation (or later) Microsoft
  152. + Surface devices.
  153. +
  154. + This driver enables basic ACPI events and requests, such as battery
  155. + status requests/events, thermal events, lid status, and possibly more,
  156. + which would otherwise not work on these devices.
  157. +
  158. + If you are not sure, say M here.
  159. +
  160. +config SURFACE_SAM_VHF
  161. + tristate "Surface Virtual HID Framework Driver"
  162. + depends on SURFACE_SAM_SSH
  163. + depends on HID
  164. + default m
  165. + help
  166. + Surface Virtual HID Framework driver for 5th generation (or later)
  167. + Microsoft Surface devices.
  168. +
  169. + This driver provides support for the Microsoft Virtual HID framework,
  170. + which is required for keyboard support on the Surface Laptop 1 and 2.
  171. +
  172. + If you are not sure, say M here.
  173. +
  174. +config SURFACE_SAM_DTX
  175. + tristate "Surface Detachment System (DTX) Driver"
  176. + depends on SURFACE_SAM_SSH
  177. + depends on INPUT
  178. + default m
  179. + help
  180. + Surface Detachment System (DTX) driver for the Microsoft Surface Book
  181. + 2. This driver provides support for proper detachment handling in
  182. + user-space, status-events relating to the base and support for
  183. + the safe-guard keeping the base attached when the discrete GPU
  184. + contained in it is running via the special /dev/surface-dtx device.
  185. +
  186. + Also provides a standard input device to provide SW_TABLET_MODE events
  187. + upon device mode change.
  188. +
  189. + If you are not sure, say M here.
  190. +
  191. +config SURFACE_SAM_HPS
  192. + tristate "Surface dGPU Hot-Plug System (dGPU-HPS) Driver"
  193. + depends on SURFACE_SAM_SSH
  194. + depends on SURFACE_SAM_SAN
  195. + depends on GPIO_SYSFS
  196. + default m
  197. + help
  198. + Driver to properly handle hot-plugging and explicit power-on/power-off
  199. + of the discrete GPU (dGPU) on the Surface Book 2.
  200. +
  201. + If you are not sure, say M here.
  202. +
  203. +config SURFACE_SAM_SID
  204. + tristate "Surface Platform Integration Driver"
  205. + depends on SURFACE_SAM_SSH
  206. + default m
  207. + help
  208. + Surface Platform Integration Driver for the Microsoft Surface Devices.
  209. + This driver loads various model-specific sub-drivers, including
  210. + battery and keyboard support on 7th generation Surface devices, proper
  211. + lid setup to enable device wakeup when the lid is opened on multiple
  212. + models, as well as performance mode setting support on the Surface
  213. + Book 2.
  214. +
  215. + If you are not sure, say M here.
  216. +
  217. +config SURFACE_SAM_SID_GPELID
  218. + tristate "Surface Lid Wakeup Driver"
  219. + depends on SURFACE_SAM_SID
  220. + default m
  221. + help
  222. + Driver to set up device wake-up via lid on Intel-based Microsoft
  223. + Surface devices. These devices do not wake up from sleep as their GPE
  224. + interrupt is not configured automatically. This driver solves that
  225. + problem.
  226. +
  227. + If you are not sure, say M here.
  228. +
  229. +config SURFACE_SAM_SID_PERFMODE
  230. + tristate "Surface Performance Mode Driver"
  231. + depends on SURFACE_SAM_SID
  232. + depends on SYSFS
  233. + default m
  234. + help
  235. + This driver provides support for setting performance-modes on Surface
  236. + devices via the perf_mode sysfs attribute. Currently only supports the
  237. + Surface Book 2. Performance-modes directly influence the fan-profile
  238. + of the device, allowing to choose between higher performance or
  239. + quieter operation.
  240. +
  241. + If you are not sure, say M here.
  242. +
  243. +config SURFACE_SAM_SID_VHF
  244. + tristate "Surface SAM HID Driver"
  245. + depends on SURFACE_SAM_SID
  246. + depends on HID
  247. + default m
  248. + help
  249. + This driver provides support for HID devices connected via the Surface
  250. + SAM embedded controller. It provides support for keyboard and touchpad
  251. + on the Surface Laptop 3 models.
  252. +
  253. + If you are not sure, say M here.
  254. +
  255. +config SURFACE_SAM_SID_POWER
  256. + tristate "Surface SAM Battery/AC Driver"
  257. + depends on SURFACE_SAM_SID
  258. + select POWER_SUPPLY
  259. + default m
  260. + help
  261. + This driver provides support for the battery and AC on 7th generation
  262. + Surface devices.
  263. +
  264. + If you are not sure, say M here.
  265. diff --git a/drivers/platform/x86/surface_sam/Makefile b/drivers/platform/x86/surface_sam/Makefile
  266. new file mode 100644
  267. index 000000000000..188975ccde5c
  268. --- /dev/null
  269. +++ b/drivers/platform/x86/surface_sam/Makefile
  270. @@ -0,0 +1,10 @@
  271. +obj-$(CONFIG_SURFACE_SAM_SSH) += surface_sam_ssh.o
  272. +obj-$(CONFIG_SURFACE_SAM_SAN) += surface_sam_san.o
  273. +obj-$(CONFIG_SURFACE_SAM_DTX) += surface_sam_dtx.o
  274. +obj-$(CONFIG_SURFACE_SAM_HPS) += surface_sam_hps.o
  275. +obj-$(CONFIG_SURFACE_SAM_VHF) += surface_sam_vhf.o
  276. +obj-$(CONFIG_SURFACE_SAM_SID) += surface_sam_sid.o
  277. +obj-$(CONFIG_SURFACE_SAM_SID_GPELID) += surface_sam_sid_gpelid.o
  278. +obj-$(CONFIG_SURFACE_SAM_SID_PERFMODE) += surface_sam_sid_perfmode.o
  279. +obj-$(CONFIG_SURFACE_SAM_SID_POWER) += surface_sam_sid_power.o
  280. +obj-$(CONFIG_SURFACE_SAM_SID_VHF) += surface_sam_sid_vhf.o
  281. diff --git a/drivers/platform/x86/surface_sam/surface_sam_dtx.c b/drivers/platform/x86/surface_sam/surface_sam_dtx.c
  282. new file mode 100644
  283. index 000000000000..1e772fd5b0be
  284. --- /dev/null
  285. +++ b/drivers/platform/x86/surface_sam/surface_sam_dtx.c
  286. @@ -0,0 +1,604 @@
  287. +// SPDX-License-Identifier: GPL-2.0
  288. +/*
  289. + * Detachment system (DTX) driver for Microsoft Surface Book 2.
  290. + */
  291. +
  292. +#include <linux/acpi.h>
  293. +#include <linux/delay.h>
  294. +#include <linux/fs.h>
  295. +#include <linux/input.h>
  296. +#include <linux/ioctl.h>
  297. +#include <linux/kernel.h>
  298. +#include <linux/miscdevice.h>
  299. +#include <linux/module.h>
  300. +#include <linux/poll.h>
  301. +#include <linux/rculist.h>
  302. +#include <linux/slab.h>
  303. +#include <linux/spinlock.h>
  304. +#include <linux/platform_device.h>
  305. +
  306. +#include "surface_sam_ssh.h"
  307. +
  308. +
  309. +#define USB_VENDOR_ID_MICROSOFT 0x045e
  310. +#define USB_DEVICE_ID_MS_SURFACE_BASE_2_INTEGRATION 0x0922
  311. +
  312. +// name copied from MS device manager
  313. +#define DTX_INPUT_NAME "Microsoft Surface Base 2 Integration Device"
  314. +
  315. +
  316. +#define DTX_CMD_LATCH_LOCK _IO(0x11, 0x01)
  317. +#define DTX_CMD_LATCH_UNLOCK _IO(0x11, 0x02)
  318. +#define DTX_CMD_LATCH_REQUEST _IO(0x11, 0x03)
  319. +#define DTX_CMD_LATCH_OPEN _IO(0x11, 0x04)
  320. +#define DTX_CMD_GET_OPMODE _IOR(0x11, 0x05, int)
  321. +
  322. +#define SAM_RQST_DTX_TC 0x11
  323. +#define SAM_RQST_DTX_CID_LATCH_LOCK 0x06
  324. +#define SAM_RQST_DTX_CID_LATCH_UNLOCK 0x07
  325. +#define SAM_RQST_DTX_CID_LATCH_REQUEST 0x08
  326. +#define SAM_RQST_DTX_CID_LATCH_OPEN 0x09
  327. +#define SAM_RQST_DTX_CID_GET_OPMODE 0x0D
  328. +
  329. +#define SAM_EVENT_DTX_TC 0x11
  330. +#define SAM_EVENT_DTX_RQID 0x0011
  331. +#define SAM_EVENT_DTX_CID_CONNECTION 0x0c
  332. +#define SAM_EVENT_DTX_CID_BUTTON 0x0e
  333. +#define SAM_EVENT_DTX_CID_ERROR 0x0f
  334. +#define SAM_EVENT_DTX_CID_LATCH_STATUS 0x11
  335. +
  336. +#define DTX_OPMODE_TABLET 0x00
  337. +#define DTX_OPMODE_LAPTOP 0x01
  338. +#define DTX_OPMODE_STUDIO 0x02
  339. +
  340. +#define DTX_LATCH_CLOSED 0x00
  341. +#define DTX_LATCH_OPENED 0x01
  342. +
  343. +
  344. +// Warning: This must always be a power of 2!
  345. +#define DTX_CLIENT_BUF_SIZE 16
  346. +
  347. +#define DTX_CONNECT_OPMODE_DELAY 1000
  348. +
  349. +#define DTX_ERR KERN_ERR "surface_sam_dtx: "
  350. +#define DTX_WARN KERN_WARNING "surface_sam_dtx: "
  351. +
  352. +
  353. +struct surface_dtx_event {
  354. + u8 type;
  355. + u8 code;
  356. + u8 arg0;
  357. + u8 arg1;
  358. +} __packed;
  359. +
  360. +struct surface_dtx_dev {
  361. + wait_queue_head_t waitq;
  362. + struct miscdevice mdev;
  363. + spinlock_t client_lock;
  364. + struct list_head client_list;
  365. + struct mutex mutex;
  366. + bool active;
  367. + spinlock_t input_lock;
  368. + struct input_dev *input_dev;
  369. +};
  370. +
  371. +struct surface_dtx_client {
  372. + struct list_head node;
  373. + struct surface_dtx_dev *ddev;
  374. + struct fasync_struct *fasync;
  375. + spinlock_t buffer_lock;
  376. + unsigned int buffer_head;
  377. + unsigned int buffer_tail;
  378. + struct surface_dtx_event buffer[DTX_CLIENT_BUF_SIZE];
  379. +};
  380. +
  381. +
  382. +static struct surface_dtx_dev surface_dtx_dev;
  383. +
  384. +
  385. +static int surface_sam_query_opmpde(void)
  386. +{
  387. + u8 result_buf[1];
  388. + int status;
  389. +
  390. + struct surface_sam_ssh_rqst rqst = {
  391. + .tc = SAM_RQST_DTX_TC,
  392. + .cid = SAM_RQST_DTX_CID_GET_OPMODE,
  393. + .iid = 0,
  394. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  395. + .snc = 1,
  396. + .cdl = 0,
  397. + .pld = NULL,
  398. + };
  399. +
  400. + struct surface_sam_ssh_buf result = {
  401. + .cap = 1,
  402. + .len = 0,
  403. + .data = result_buf,
  404. + };
  405. +
  406. + status = surface_sam_ssh_rqst(&rqst, &result);
  407. + if (status)
  408. + return status;
  409. +
  410. + if (result.len != 1)
  411. + return -EFAULT;
  412. +
  413. + return result.data[0];
  414. +}
  415. +
  416. +
  417. +static int dtx_cmd_simple(u8 cid)
  418. +{
  419. + struct surface_sam_ssh_rqst rqst = {
  420. + .tc = SAM_RQST_DTX_TC,
  421. + .cid = cid,
  422. + .iid = 0,
  423. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  424. + .snc = 0,
  425. + .cdl = 0,
  426. + .pld = NULL,
  427. + };
  428. +
  429. + return surface_sam_ssh_rqst(&rqst, NULL);
  430. +}
  431. +
  432. +static int dtx_cmd_get_opmode(int __user *buf)
  433. +{
  434. + int opmode;
  435. +
  436. + opmode = surface_sam_query_opmpde();
  437. + if (opmode < 0)
  438. + return opmode;
  439. +
  440. + if (put_user(opmode, buf))
  441. + return -EACCES;
  442. +
  443. + return 0;
  444. +}
  445. +
  446. +
  447. +static int surface_dtx_open(struct inode *inode, struct file *file)
  448. +{
  449. + struct surface_dtx_dev *ddev = container_of(file->private_data, struct surface_dtx_dev, mdev);
  450. + struct surface_dtx_client *client;
  451. +
  452. + // initialize client
  453. + client = kzalloc(sizeof(struct surface_dtx_client), GFP_KERNEL);
  454. + if (!client)
  455. + return -ENOMEM;
  456. +
  457. + spin_lock_init(&client->buffer_lock);
  458. + client->buffer_head = 0;
  459. + client->buffer_tail = 0;
  460. + client->ddev = ddev;
  461. +
  462. + // attach client
  463. + spin_lock(&ddev->client_lock);
  464. + list_add_tail_rcu(&client->node, &ddev->client_list);
  465. + spin_unlock(&ddev->client_lock);
  466. +
  467. + file->private_data = client;
  468. + nonseekable_open(inode, file);
  469. +
  470. + return 0;
  471. +}
  472. +
  473. +static int surface_dtx_release(struct inode *inode, struct file *file)
  474. +{
  475. + struct surface_dtx_client *client = file->private_data;
  476. +
  477. + // detach client
  478. + spin_lock(&client->ddev->client_lock);
  479. + list_del_rcu(&client->node);
  480. + spin_unlock(&client->ddev->client_lock);
  481. + synchronize_rcu();
  482. +
  483. + kfree(client);
  484. + file->private_data = NULL;
  485. +
  486. + return 0;
  487. +}
  488. +
  489. +static ssize_t surface_dtx_read(struct file *file, char __user *buf, size_t count, loff_t *offs)
  490. +{
  491. + struct surface_dtx_client *client = file->private_data;
  492. + struct surface_dtx_dev *ddev = client->ddev;
  493. + struct surface_dtx_event event;
  494. + size_t read = 0;
  495. + int status = 0;
  496. +
  497. + if (count != 0 && count < sizeof(struct surface_dtx_event))
  498. + return -EINVAL;
  499. +
  500. + if (!ddev->active)
  501. + return -ENODEV;
  502. +
  503. + // check availability
  504. + if (client->buffer_head == client->buffer_tail) {
  505. + if (file->f_flags & O_NONBLOCK)
  506. + return -EAGAIN;
  507. +
  508. + status = wait_event_interruptible(ddev->waitq,
  509. + client->buffer_head != client->buffer_tail ||
  510. + !ddev->active);
  511. + if (status)
  512. + return status;
  513. +
  514. + if (!ddev->active)
  515. + return -ENODEV;
  516. + }
  517. +
  518. + // copy events one by one
  519. + while (read + sizeof(struct surface_dtx_event) <= count) {
  520. + spin_lock_irq(&client->buffer_lock);
  521. +
  522. + if (client->buffer_head == client->buffer_tail) {
  523. + spin_unlock_irq(&client->buffer_lock);
  524. + break;
  525. + }
  526. +
  527. + // get one event
  528. + event = client->buffer[client->buffer_tail];
  529. + client->buffer_tail = (client->buffer_tail + 1) & (DTX_CLIENT_BUF_SIZE - 1);
  530. + spin_unlock_irq(&client->buffer_lock);
  531. +
  532. + // copy to userspace
  533. + if (copy_to_user(buf, &event, sizeof(struct surface_dtx_event)))
  534. + return -EFAULT;
  535. +
  536. + read += sizeof(struct surface_dtx_event);
  537. + }
  538. +
  539. + return read;
  540. +}
  541. +
  542. +static __poll_t surface_dtx_poll(struct file *file, struct poll_table_struct *pt)
  543. +{
  544. + struct surface_dtx_client *client = file->private_data;
  545. + int mask;
  546. +
  547. + poll_wait(file, &client->ddev->waitq, pt);
  548. +
  549. + if (client->ddev->active)
  550. + mask = EPOLLOUT | EPOLLWRNORM;
  551. + else
  552. + mask = EPOLLHUP | EPOLLERR;
  553. +
  554. + if (client->buffer_head != client->buffer_tail)
  555. + mask |= EPOLLIN | EPOLLRDNORM;
  556. +
  557. + return mask;
  558. +}
  559. +
  560. +static int surface_dtx_fasync(int fd, struct file *file, int on)
  561. +{
  562. + struct surface_dtx_client *client = file->private_data;
  563. +
  564. + return fasync_helper(fd, file, on, &client->fasync);
  565. +}
  566. +
  567. +static long surface_dtx_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  568. +{
  569. + struct surface_dtx_client *client = file->private_data;
  570. + struct surface_dtx_dev *ddev = client->ddev;
  571. + int status;
  572. +
  573. + status = mutex_lock_interruptible(&ddev->mutex);
  574. + if (status)
  575. + return status;
  576. +
  577. + if (!ddev->active) {
  578. + mutex_unlock(&ddev->mutex);
  579. + return -ENODEV;
  580. + }
  581. +
  582. + switch (cmd) {
  583. + case DTX_CMD_LATCH_LOCK:
  584. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_LOCK);
  585. + break;
  586. +
  587. + case DTX_CMD_LATCH_UNLOCK:
  588. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_UNLOCK);
  589. + break;
  590. +
  591. + case DTX_CMD_LATCH_REQUEST:
  592. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_REQUEST);
  593. + break;
  594. +
  595. + case DTX_CMD_LATCH_OPEN:
  596. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_OPEN);
  597. + break;
  598. +
  599. + case DTX_CMD_GET_OPMODE:
  600. + status = dtx_cmd_get_opmode((int __user *)arg);
  601. + break;
  602. +
  603. + default:
  604. + status = -EINVAL;
  605. + break;
  606. + }
  607. +
  608. + mutex_unlock(&ddev->mutex);
  609. + return status;
  610. +}
  611. +
  612. +static const struct file_operations surface_dtx_fops = {
  613. + .owner = THIS_MODULE,
  614. + .open = surface_dtx_open,
  615. + .release = surface_dtx_release,
  616. + .read = surface_dtx_read,
  617. + .poll = surface_dtx_poll,
  618. + .fasync = surface_dtx_fasync,
  619. + .unlocked_ioctl = surface_dtx_ioctl,
  620. + .llseek = no_llseek,
  621. +};
  622. +
  623. +static struct surface_dtx_dev surface_dtx_dev = {
  624. + .mdev = {
  625. + .minor = MISC_DYNAMIC_MINOR,
  626. + .name = "surface_dtx",
  627. + .fops = &surface_dtx_fops,
  628. + },
  629. + .client_lock = __SPIN_LOCK_UNLOCKED(),
  630. + .input_lock = __SPIN_LOCK_UNLOCKED(),
  631. + .mutex = __MUTEX_INITIALIZER(surface_dtx_dev.mutex),
  632. + .active = false,
  633. +};
  634. +
  635. +
  636. +static void surface_dtx_push_event(struct surface_dtx_dev *ddev, struct surface_dtx_event *event)
  637. +{
  638. + struct surface_dtx_client *client;
  639. +
  640. + rcu_read_lock();
  641. + list_for_each_entry_rcu(client, &ddev->client_list, node) {
  642. + spin_lock(&client->buffer_lock);
  643. +
  644. + client->buffer[client->buffer_head++] = *event;
  645. + client->buffer_head &= DTX_CLIENT_BUF_SIZE - 1;
  646. +
  647. + if (unlikely(client->buffer_head == client->buffer_tail)) {
  648. + printk(DTX_WARN "event buffer overrun\n");
  649. + client->buffer_tail = (client->buffer_tail + 1) & (DTX_CLIENT_BUF_SIZE - 1);
  650. + }
  651. +
  652. + spin_unlock(&client->buffer_lock);
  653. +
  654. + kill_fasync(&client->fasync, SIGIO, POLL_IN);
  655. + }
  656. + rcu_read_unlock();
  657. +
  658. + wake_up_interruptible(&ddev->waitq);
  659. +}
  660. +
  661. +
  662. +static void surface_dtx_update_opmpde(struct surface_dtx_dev *ddev)
  663. +{
  664. + struct surface_dtx_event event;
  665. + int opmode;
  666. +
  667. + // get operation mode
  668. + opmode = surface_sam_query_opmpde();
  669. + if (opmode < 0)
  670. + printk(DTX_ERR "EC request failed with error %d\n", opmode);
  671. +
  672. + // send DTX event
  673. + event.type = 0x11;
  674. + event.code = 0x0D;
  675. + event.arg0 = opmode;
  676. + event.arg1 = 0x00;
  677. +
  678. + surface_dtx_push_event(ddev, &event);
  679. +
  680. + // send SW_TABLET_MODE event
  681. + spin_lock(&ddev->input_lock);
  682. + input_report_switch(ddev->input_dev, SW_TABLET_MODE, opmode != DTX_OPMODE_LAPTOP);
  683. + input_sync(ddev->input_dev);
  684. + spin_unlock(&ddev->input_lock);
  685. +}
  686. +
  687. +static int surface_dtx_evt_dtx(struct surface_sam_ssh_event *in_event, void *data)
  688. +{
  689. + struct surface_dtx_dev *ddev = data;
  690. + struct surface_dtx_event event;
  691. +
  692. + switch (in_event->cid) {
  693. + case SAM_EVENT_DTX_CID_CONNECTION:
  694. + case SAM_EVENT_DTX_CID_BUTTON:
  695. + case SAM_EVENT_DTX_CID_ERROR:
  696. + case SAM_EVENT_DTX_CID_LATCH_STATUS:
  697. + if (in_event->len > 2) {
  698. + printk(DTX_ERR "unexpected payload size (cid: %x, len: %u)\n",
  699. + in_event->cid, in_event->len);
  700. + return 0;
  701. + }
  702. +
  703. + event.type = in_event->tc;
  704. + event.code = in_event->cid;
  705. + event.arg0 = in_event->len >= 1 ? in_event->pld[0] : 0x00;
  706. + event.arg1 = in_event->len >= 2 ? in_event->pld[1] : 0x00;
  707. + surface_dtx_push_event(ddev, &event);
  708. + break;
  709. +
  710. + default:
  711. + printk(DTX_WARN "unhandled dtx event (cid: %x)\n", in_event->cid);
  712. + }
  713. +
  714. + // update device mode
  715. + if (in_event->cid == SAM_EVENT_DTX_CID_CONNECTION) {
  716. + if (in_event->pld[0]) {
  717. + // Note: we're already in a workqueue task
  718. + msleep(DTX_CONNECT_OPMODE_DELAY);
  719. + }
  720. +
  721. + surface_dtx_update_opmpde(ddev);
  722. + }
  723. +
  724. + return 0;
  725. +}
  726. +
  727. +static int surface_dtx_events_setup(struct surface_dtx_dev *ddev)
  728. +{
  729. + int status;
  730. +
  731. + status = surface_sam_ssh_set_event_handler(SAM_EVENT_DTX_RQID, surface_dtx_evt_dtx, ddev);
  732. + if (status)
  733. + goto err_handler;
  734. +
  735. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_DTX_TC, 0x01, SAM_EVENT_DTX_RQID);
  736. + if (status)
  737. + goto err_source;
  738. +
  739. + return 0;
  740. +
  741. +err_source:
  742. + surface_sam_ssh_remove_event_handler(SAM_EVENT_DTX_RQID);
  743. +err_handler:
  744. + return status;
  745. +}
  746. +
  747. +static void surface_dtx_events_disable(void)
  748. +{
  749. + surface_sam_ssh_disable_event_source(SAM_EVENT_DTX_TC, 0x01, SAM_EVENT_DTX_RQID);
  750. + surface_sam_ssh_remove_event_handler(SAM_EVENT_DTX_RQID);
  751. +}
  752. +
  753. +
  754. +static struct input_dev *surface_dtx_register_inputdev(struct platform_device *pdev)
  755. +{
  756. + struct input_dev *input_dev;
  757. + int status;
  758. +
  759. + input_dev = input_allocate_device();
  760. + if (!input_dev)
  761. + return ERR_PTR(-ENOMEM);
  762. +
  763. + input_dev->name = DTX_INPUT_NAME;
  764. + input_dev->dev.parent = &pdev->dev;
  765. + input_dev->id.bustype = BUS_VIRTUAL;
  766. + input_dev->id.vendor = USB_VENDOR_ID_MICROSOFT;
  767. + input_dev->id.product = USB_DEVICE_ID_MS_SURFACE_BASE_2_INTEGRATION;
  768. +
  769. + input_set_capability(input_dev, EV_SW, SW_TABLET_MODE);
  770. +
  771. + status = surface_sam_query_opmpde();
  772. + if (status < 0) {
  773. + input_free_device(input_dev);
  774. + return ERR_PTR(status);
  775. + }
  776. +
  777. + input_report_switch(input_dev, SW_TABLET_MODE, status != DTX_OPMODE_LAPTOP);
  778. +
  779. + status = input_register_device(input_dev);
  780. + if (status) {
  781. + input_unregister_device(input_dev);
  782. + return ERR_PTR(status);
  783. + }
  784. +
  785. + return input_dev;
  786. +}
  787. +
  788. +
  789. +static int surface_sam_dtx_probe(struct platform_device *pdev)
  790. +{
  791. + struct surface_dtx_dev *ddev = &surface_dtx_dev;
  792. + struct input_dev *input_dev;
  793. + int status;
  794. +
  795. + // link to ec
  796. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  797. + if (status)
  798. + return status == -ENXIO ? -EPROBE_DEFER : status;
  799. +
  800. + input_dev = surface_dtx_register_inputdev(pdev);
  801. + if (IS_ERR(input_dev))
  802. + return PTR_ERR(input_dev);
  803. +
  804. + // initialize device
  805. + mutex_lock(&ddev->mutex);
  806. + if (ddev->active) {
  807. + mutex_unlock(&ddev->mutex);
  808. + status = -ENODEV;
  809. + goto err_register;
  810. + }
  811. +
  812. + INIT_LIST_HEAD(&ddev->client_list);
  813. + init_waitqueue_head(&ddev->waitq);
  814. + ddev->active = true;
  815. + ddev->input_dev = input_dev;
  816. + mutex_unlock(&ddev->mutex);
  817. +
  818. + status = misc_register(&ddev->mdev);
  819. + if (status)
  820. + goto err_register;
  821. +
  822. + // enable events
  823. + status = surface_dtx_events_setup(ddev);
  824. + if (status)
  825. + goto err_events_setup;
  826. +
  827. + return 0;
  828. +
  829. +err_events_setup:
  830. + misc_deregister(&ddev->mdev);
  831. +err_register:
  832. + input_unregister_device(ddev->input_dev);
  833. + return status;
  834. +}
  835. +
  836. +static int surface_sam_dtx_remove(struct platform_device *pdev)
  837. +{
  838. + struct surface_dtx_dev *ddev = &surface_dtx_dev;
  839. + struct surface_dtx_client *client;
  840. +
  841. + mutex_lock(&ddev->mutex);
  842. + if (!ddev->active) {
  843. + mutex_unlock(&ddev->mutex);
  844. + return 0;
  845. + }
  846. +
  847. + // mark as inactive
  848. + ddev->active = false;
  849. + mutex_unlock(&ddev->mutex);
  850. +
  851. + // After this call we're guaranteed that no more input events will arive
  852. + surface_dtx_events_disable();
  853. +
  854. + // wake up clients
  855. + spin_lock(&ddev->client_lock);
  856. + list_for_each_entry(client, &ddev->client_list, node) {
  857. + kill_fasync(&client->fasync, SIGIO, POLL_HUP);
  858. + }
  859. + spin_unlock(&ddev->client_lock);
  860. +
  861. + wake_up_interruptible(&ddev->waitq);
  862. +
  863. + // unregister user-space devices
  864. + input_unregister_device(ddev->input_dev);
  865. + misc_deregister(&ddev->mdev);
  866. +
  867. + return 0;
  868. +}
  869. +
  870. +
  871. +static const struct acpi_device_id surface_sam_dtx_match[] = {
  872. + { "MSHW0133", 0 },
  873. + { },
  874. +};
  875. +MODULE_DEVICE_TABLE(acpi, surface_sam_dtx_match);
  876. +
  877. +static struct platform_driver surface_sam_dtx = {
  878. + .probe = surface_sam_dtx_probe,
  879. + .remove = surface_sam_dtx_remove,
  880. + .driver = {
  881. + .name = "surface_sam_dtx",
  882. + .acpi_match_table = ACPI_PTR(surface_sam_dtx_match),
  883. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  884. + },
  885. +};
  886. +module_platform_driver(surface_sam_dtx);
  887. +
  888. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  889. +MODULE_DESCRIPTION("Surface Detachment System (DTX) Driver for 5th Generation Surface Devices");
  890. +MODULE_LICENSE("GPL v2");
  891. diff --git a/drivers/platform/x86/surface_sam/surface_sam_hps.c b/drivers/platform/x86/surface_sam/surface_sam_hps.c
  892. new file mode 100644
  893. index 000000000000..4fba5ee75a66
  894. --- /dev/null
  895. +++ b/drivers/platform/x86/surface_sam/surface_sam_hps.c
  896. @@ -0,0 +1,1110 @@
  897. +// SPDX-License-Identifier: GPL-2.0
  898. +/*
  899. + * Surface dGPU hot-plug system driver.
  900. + * Supports explicit setting of the dGPU power-state on the Surface Book 2 and
  901. + * properly handles hot-plugging by detaching the base.
  902. + */
  903. +
  904. +#include <linux/acpi.h>
  905. +#include <linux/delay.h>
  906. +#include <linux/gpio.h>
  907. +#include <linux/kernel.h>
  908. +#include <linux/module.h>
  909. +#include <linux/mutex.h>
  910. +#include <linux/pci.h>
  911. +#include <linux/platform_device.h>
  912. +#include <linux/sysfs.h>
  913. +
  914. +#include "surface_sam_ssh.h"
  915. +#include "surface_sam_san.h"
  916. +
  917. +
  918. +// TODO: vgaswitcheroo integration
  919. +
  920. +
  921. +static void dbg_dump_drvsta(struct platform_device *pdev, const char *prefix);
  922. +
  923. +
  924. +#define SHPS_DSM_REVISION 1
  925. +#define SHPS_DSM_GPU_ADDRS 0x02
  926. +#define SHPS_DSM_GPU_POWER 0x05
  927. +static const guid_t SHPS_DSM_UUID =
  928. + GUID_INIT(0x5515a847, 0xed55, 0x4b27, 0x83, 0x52, 0xcd,
  929. + 0x32, 0x0e, 0x10, 0x36, 0x0a);
  930. +
  931. +
  932. +#define SAM_DGPU_TC 0x13
  933. +#define SAM_DGPU_CID_POWERON 0x02
  934. +
  935. +#define SAM_DTX_TC 0x11
  936. +#define SAM_DTX_CID_LATCH_LOCK 0x06
  937. +#define SAM_DTX_CID_LATCH_UNLOCK 0x07
  938. +
  939. +#define SHPS_DSM_GPU_ADDRS_RP "RP5_PCIE"
  940. +#define SHPS_DSM_GPU_ADDRS_DGPU "DGPU_PCIE"
  941. +
  942. +
  943. +static const struct acpi_gpio_params gpio_base_presence_int = { 0, 0, false };
  944. +static const struct acpi_gpio_params gpio_base_presence = { 1, 0, false };
  945. +static const struct acpi_gpio_params gpio_dgpu_power_int = { 2, 0, false };
  946. +static const struct acpi_gpio_params gpio_dgpu_power = { 3, 0, false };
  947. +static const struct acpi_gpio_params gpio_dgpu_presence_int = { 4, 0, false };
  948. +static const struct acpi_gpio_params gpio_dgpu_presence = { 5, 0, false };
  949. +
  950. +static const struct acpi_gpio_mapping shps_acpi_gpios[] = {
  951. + { "base_presence-int-gpio", &gpio_base_presence_int, 1 },
  952. + { "base_presence-gpio", &gpio_base_presence, 1 },
  953. + { "dgpu_power-int-gpio", &gpio_dgpu_power_int, 1 },
  954. + { "dgpu_power-gpio", &gpio_dgpu_power, 1 },
  955. + { "dgpu_presence-int-gpio", &gpio_dgpu_presence_int, 1 },
  956. + { "dgpu_presence-gpio", &gpio_dgpu_presence, 1 },
  957. + { },
  958. +};
  959. +
  960. +
  961. +enum shps_dgpu_power {
  962. + SHPS_DGPU_POWER_OFF = 0,
  963. + SHPS_DGPU_POWER_ON = 1,
  964. + SHPS_DGPU_POWER_UNKNOWN = 2,
  965. +};
  966. +
  967. +static const char *shps_dgpu_power_str(enum shps_dgpu_power power)
  968. +{
  969. + if (power == SHPS_DGPU_POWER_OFF)
  970. + return "off";
  971. + else if (power == SHPS_DGPU_POWER_ON)
  972. + return "on";
  973. + else if (power == SHPS_DGPU_POWER_UNKNOWN)
  974. + return "unknown";
  975. + else
  976. + return "<invalid>";
  977. +}
  978. +
  979. +
  980. +struct shps_driver_data {
  981. + struct mutex lock;
  982. + struct pci_dev *dgpu_root_port;
  983. + struct pci_saved_state *dgpu_root_port_state;
  984. + struct gpio_desc *gpio_dgpu_power;
  985. + struct gpio_desc *gpio_dgpu_presence;
  986. + struct gpio_desc *gpio_base_presence;
  987. + unsigned int irq_dgpu_presence;
  988. + unsigned int irq_base_presence;
  989. + unsigned long state;
  990. +};
  991. +
  992. +#define SHPS_STATE_BIT_PWRTGT 0 /* desired power state: 1 for on, 0 for off */
  993. +#define SHPS_STATE_BIT_RPPWRON_SYNC 1 /* synchronous/requested power-up in progress */
  994. +#define SHPS_STATE_BIT_WAKE_ENABLED 2 /* wakeup via base-presence GPIO enabled */
  995. +
  996. +
  997. +#define SHPS_DGPU_PARAM_PERM 0644
  998. +
  999. +enum shps_dgpu_power_mp {
  1000. + SHPS_DGPU_MP_POWER_OFF = SHPS_DGPU_POWER_OFF,
  1001. + SHPS_DGPU_MP_POWER_ON = SHPS_DGPU_POWER_ON,
  1002. + SHPS_DGPU_MP_POWER_ASIS = -1,
  1003. +
  1004. + __SHPS_DGPU_MP_POWER_START = -1,
  1005. + __SHPS_DGPU_MP_POWER_END = 1,
  1006. +};
  1007. +
  1008. +static int param_dgpu_power_set(const char *val, const struct kernel_param *kp)
  1009. +{
  1010. + int power = SHPS_DGPU_MP_POWER_OFF;
  1011. + int status;
  1012. +
  1013. + status = kstrtoint(val, 0, &power);
  1014. + if (status)
  1015. + return status;
  1016. +
  1017. + if (power < __SHPS_DGPU_MP_POWER_START || power > __SHPS_DGPU_MP_POWER_END)
  1018. + return -EINVAL;
  1019. +
  1020. + return param_set_int(val, kp);
  1021. +}
  1022. +
  1023. +static const struct kernel_param_ops param_dgpu_power_ops = {
  1024. + .set = param_dgpu_power_set,
  1025. + .get = param_get_int,
  1026. +};
  1027. +
  1028. +static int param_dgpu_power_init = SHPS_DGPU_MP_POWER_OFF;
  1029. +static int param_dgpu_power_exit = SHPS_DGPU_MP_POWER_ON;
  1030. +static int param_dgpu_power_susp = SHPS_DGPU_MP_POWER_ASIS;
  1031. +static bool param_dtx_latch = true;
  1032. +
  1033. +module_param_cb(dgpu_power_init, &param_dgpu_power_ops, &param_dgpu_power_init, SHPS_DGPU_PARAM_PERM);
  1034. +module_param_cb(dgpu_power_exit, &param_dgpu_power_ops, &param_dgpu_power_exit, SHPS_DGPU_PARAM_PERM);
  1035. +module_param_cb(dgpu_power_susp, &param_dgpu_power_ops, &param_dgpu_power_susp, SHPS_DGPU_PARAM_PERM);
  1036. +module_param_named(dtx_latch, param_dtx_latch, bool, SHPS_DGPU_PARAM_PERM);
  1037. +
  1038. +MODULE_PARM_DESC(dgpu_power_init, "dGPU power state to be set on init (0: off / 1: on / 2: as-is, default: off)");
  1039. +MODULE_PARM_DESC(dgpu_power_exit, "dGPU power state to be set on exit (0: off / 1: on / 2: as-is, default: on)");
  1040. +MODULE_PARM_DESC(dgpu_power_susp, "dGPU power state to be set on exit (0: off / 1: on / 2: as-is, default: as-is)");
  1041. +MODULE_PARM_DESC(dtx_latch, "lock/unlock DTX base latch in accordance to power-state (Y/n)");
  1042. +
  1043. +
  1044. +static int dtx_cmd_simple(u8 cid)
  1045. +{
  1046. + struct surface_sam_ssh_rqst rqst = {
  1047. + .tc = SAM_DTX_TC,
  1048. + .cid = cid,
  1049. + .iid = 0,
  1050. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  1051. + .snc = 0,
  1052. + .cdl = 0,
  1053. + .pld = NULL,
  1054. + };
  1055. +
  1056. + return surface_sam_ssh_rqst(&rqst, NULL);
  1057. +}
  1058. +
  1059. +static inline int shps_dtx_latch_lock(void)
  1060. +{
  1061. + return dtx_cmd_simple(SAM_DTX_CID_LATCH_LOCK);
  1062. +}
  1063. +
  1064. +static inline int shps_dtx_latch_unlock(void)
  1065. +{
  1066. + return dtx_cmd_simple(SAM_DTX_CID_LATCH_UNLOCK);
  1067. +}
  1068. +
  1069. +
  1070. +static int shps_dgpu_dsm_get_pci_addr(struct platform_device *pdev, const char *entry)
  1071. +{
  1072. + acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  1073. + union acpi_object *result;
  1074. + union acpi_object *e0;
  1075. + union acpi_object *e1;
  1076. + union acpi_object *e2;
  1077. + u64 device_addr = 0;
  1078. + u8 bus, dev, fun;
  1079. + int i;
  1080. +
  1081. + result = acpi_evaluate_dsm_typed(handle, &SHPS_DSM_UUID, SHPS_DSM_REVISION,
  1082. + SHPS_DSM_GPU_ADDRS, NULL, ACPI_TYPE_PACKAGE);
  1083. +
  1084. + if (IS_ERR_OR_NULL(result))
  1085. + return result ? PTR_ERR(result) : -EIO;
  1086. +
  1087. + // three entries per device: name, address, <integer>
  1088. + for (i = 0; i + 2 < result->package.count; i += 3) {
  1089. + e0 = &result->package.elements[i];
  1090. + e1 = &result->package.elements[i + 1];
  1091. + e2 = &result->package.elements[i + 2];
  1092. +
  1093. + if (e0->type != ACPI_TYPE_STRING) {
  1094. + ACPI_FREE(result);
  1095. + return -EIO;
  1096. + }
  1097. +
  1098. + if (e1->type != ACPI_TYPE_INTEGER) {
  1099. + ACPI_FREE(result);
  1100. + return -EIO;
  1101. + }
  1102. +
  1103. + if (e2->type != ACPI_TYPE_INTEGER) {
  1104. + ACPI_FREE(result);
  1105. + return -EIO;
  1106. + }
  1107. +
  1108. + if (strncmp(e0->string.pointer, entry, 64) == 0)
  1109. + device_addr = e1->integer.value;
  1110. + }
  1111. +
  1112. + ACPI_FREE(result);
  1113. + if (device_addr == 0)
  1114. + return -ENODEV;
  1115. +
  1116. + // convert address
  1117. + bus = (device_addr & 0x0FF00000) >> 20;
  1118. + dev = (device_addr & 0x000F8000) >> 15;
  1119. + fun = (device_addr & 0x00007000) >> 12;
  1120. +
  1121. + return bus << 8 | PCI_DEVFN(dev, fun);
  1122. +}
  1123. +
  1124. +static struct pci_dev *shps_dgpu_dsm_get_pci_dev(struct platform_device *pdev, const char *entry)
  1125. +{
  1126. + struct pci_dev *dev;
  1127. + int addr;
  1128. +
  1129. + addr = shps_dgpu_dsm_get_pci_addr(pdev, entry);
  1130. + if (addr < 0)
  1131. + return ERR_PTR(addr);
  1132. +
  1133. + dev = pci_get_domain_bus_and_slot(0, (addr & 0xFF00) >> 8, addr & 0xFF);
  1134. + return dev ? dev : ERR_PTR(-ENODEV);
  1135. +}
  1136. +
  1137. +
  1138. +static int shps_dgpu_dsm_get_power_unlocked(struct platform_device *pdev)
  1139. +{
  1140. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1141. + struct gpio_desc *gpio = drvdata->gpio_dgpu_power;
  1142. + int status;
  1143. +
  1144. + status = gpiod_get_value_cansleep(gpio);
  1145. + if (status < 0)
  1146. + return status;
  1147. +
  1148. + return status == 0 ? SHPS_DGPU_POWER_OFF : SHPS_DGPU_POWER_ON;
  1149. +}
  1150. +
  1151. +static int shps_dgpu_dsm_get_power(struct platform_device *pdev)
  1152. +{
  1153. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1154. + int status;
  1155. +
  1156. + mutex_lock(&drvdata->lock);
  1157. + status = shps_dgpu_dsm_get_power_unlocked(pdev);
  1158. + mutex_unlock(&drvdata->lock);
  1159. +
  1160. + return status;
  1161. +}
  1162. +
  1163. +static int __shps_dgpu_dsm_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1164. +{
  1165. + acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  1166. + union acpi_object *result;
  1167. + union acpi_object param;
  1168. +
  1169. + dev_info(&pdev->dev, "setting dGPU direct power to \'%s\'\n", shps_dgpu_power_str(power));
  1170. +
  1171. + param.type = ACPI_TYPE_INTEGER;
  1172. + param.integer.value = power == SHPS_DGPU_POWER_ON;
  1173. +
  1174. + result = acpi_evaluate_dsm_typed(handle, &SHPS_DSM_UUID, SHPS_DSM_REVISION,
  1175. + SHPS_DSM_GPU_POWER, &param, ACPI_TYPE_BUFFER);
  1176. +
  1177. + if (IS_ERR_OR_NULL(result))
  1178. + return result ? PTR_ERR(result) : -EIO;
  1179. +
  1180. + // check for the expected result
  1181. + if (result->buffer.length != 1 || result->buffer.pointer[0] != 0) {
  1182. + ACPI_FREE(result);
  1183. + return -EIO;
  1184. + }
  1185. +
  1186. + ACPI_FREE(result);
  1187. + return 0;
  1188. +}
  1189. +
  1190. +static int shps_dgpu_dsm_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1191. +{
  1192. + int status;
  1193. +
  1194. + if (power != SHPS_DGPU_POWER_ON && power != SHPS_DGPU_POWER_OFF)
  1195. + return -EINVAL;
  1196. +
  1197. + status = shps_dgpu_dsm_get_power_unlocked(pdev);
  1198. + if (status < 0)
  1199. + return status;
  1200. + if (status == power)
  1201. + return 0;
  1202. +
  1203. + return __shps_dgpu_dsm_set_power_unlocked(pdev, power);
  1204. +}
  1205. +
  1206. +static int shps_dgpu_dsm_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1207. +{
  1208. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1209. + int status;
  1210. +
  1211. + mutex_lock(&drvdata->lock);
  1212. + status = shps_dgpu_dsm_set_power_unlocked(pdev, power);
  1213. + mutex_unlock(&drvdata->lock);
  1214. +
  1215. + return status;
  1216. +}
  1217. +
  1218. +
  1219. +static bool shps_rp_link_up(struct pci_dev *rp)
  1220. +{
  1221. + u16 lnksta = 0, sltsta = 0;
  1222. +
  1223. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA, &lnksta);
  1224. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA, &sltsta);
  1225. +
  1226. + return (lnksta & PCI_EXP_LNKSTA_DLLLA) || (sltsta & PCI_EXP_SLTSTA_PDS);
  1227. +}
  1228. +
  1229. +
  1230. +static int shps_dgpu_rp_get_power_unlocked(struct platform_device *pdev)
  1231. +{
  1232. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1233. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1234. +
  1235. + if (rp->current_state == PCI_D3hot || rp->current_state == PCI_D3cold)
  1236. + return SHPS_DGPU_POWER_OFF;
  1237. + else if (rp->current_state == PCI_UNKNOWN || rp->current_state == PCI_POWER_ERROR)
  1238. + return SHPS_DGPU_POWER_UNKNOWN;
  1239. + else
  1240. + return SHPS_DGPU_POWER_ON;
  1241. +}
  1242. +
  1243. +static int shps_dgpu_rp_get_power(struct platform_device *pdev)
  1244. +{
  1245. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1246. + int status;
  1247. +
  1248. + mutex_lock(&drvdata->lock);
  1249. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1250. + mutex_unlock(&drvdata->lock);
  1251. +
  1252. + return status;
  1253. +}
  1254. +
  1255. +static int __shps_dgpu_rp_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1256. +{
  1257. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1258. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1259. + int status, i;
  1260. +
  1261. + dev_info(&pdev->dev, "setting dGPU power state to \'%s\'\n", shps_dgpu_power_str(power));
  1262. +
  1263. + dbg_dump_drvsta(pdev, "__shps_dgpu_rp_set_power_unlocked.1");
  1264. + if (power == SHPS_DGPU_POWER_ON) {
  1265. + set_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state);
  1266. + pci_set_power_state(rp, PCI_D0);
  1267. +
  1268. + if (drvdata->dgpu_root_port_state)
  1269. + pci_load_and_free_saved_state(rp, &drvdata->dgpu_root_port_state);
  1270. +
  1271. + pci_restore_state(rp);
  1272. +
  1273. + if (!pci_is_enabled(rp))
  1274. + pci_enable_device(rp);
  1275. +
  1276. + pci_set_master(rp);
  1277. + clear_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state);
  1278. +
  1279. + set_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1280. + } else {
  1281. + if (!drvdata->dgpu_root_port_state) {
  1282. + pci_save_state(rp);
  1283. + drvdata->dgpu_root_port_state = pci_store_saved_state(rp);
  1284. + }
  1285. +
  1286. + /*
  1287. + * To properly update the hot-plug system we need to "remove" the dGPU
  1288. + * before disabling it and sending it to D3cold. Following this, we
  1289. + * need to wait for the link and slot status to actually change.
  1290. + */
  1291. + status = shps_dgpu_dsm_set_power_unlocked(pdev, SHPS_DGPU_POWER_OFF);
  1292. + if (status)
  1293. + return status;
  1294. +
  1295. + for (i = 0; i < 20 && shps_rp_link_up(rp); i++)
  1296. + msleep(50);
  1297. +
  1298. + if (shps_rp_link_up(rp))
  1299. + dev_err(&pdev->dev, "dGPU removal via DSM timed out\n");
  1300. +
  1301. + pci_clear_master(rp);
  1302. +
  1303. + if (pci_is_enabled(rp))
  1304. + pci_disable_device(rp);
  1305. +
  1306. + pci_set_power_state(rp, PCI_D3cold);
  1307. +
  1308. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1309. + }
  1310. + dbg_dump_drvsta(pdev, "__shps_dgpu_rp_set_power_unlocked.2");
  1311. +
  1312. + return 0;
  1313. +}
  1314. +
  1315. +static int shps_dgpu_rp_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1316. +{
  1317. + int status;
  1318. +
  1319. + if (power != SHPS_DGPU_POWER_ON && power != SHPS_DGPU_POWER_OFF)
  1320. + return -EINVAL;
  1321. +
  1322. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1323. + if (status < 0)
  1324. + return status;
  1325. + if (status == power)
  1326. + return 0;
  1327. +
  1328. + return __shps_dgpu_rp_set_power_unlocked(pdev, power);
  1329. +}
  1330. +
  1331. +static int shps_dgpu_rp_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1332. +{
  1333. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1334. + int status;
  1335. +
  1336. + mutex_lock(&drvdata->lock);
  1337. + status = shps_dgpu_rp_set_power_unlocked(pdev, power);
  1338. + mutex_unlock(&drvdata->lock);
  1339. +
  1340. + return status;
  1341. +}
  1342. +
  1343. +
  1344. +static int shps_dgpu_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1345. +{
  1346. + int status;
  1347. +
  1348. + if (!param_dtx_latch)
  1349. + return shps_dgpu_rp_set_power(pdev, power);
  1350. +
  1351. + if (power == SHPS_DGPU_POWER_ON) {
  1352. + status = shps_dtx_latch_lock();
  1353. + if (status)
  1354. + return status;
  1355. +
  1356. + status = shps_dgpu_rp_set_power(pdev, power);
  1357. + if (status)
  1358. + shps_dtx_latch_unlock();
  1359. +
  1360. + } else {
  1361. + status = shps_dgpu_rp_set_power(pdev, power);
  1362. + if (status)
  1363. + return status;
  1364. +
  1365. + status = shps_dtx_latch_unlock();
  1366. + }
  1367. +
  1368. + return status;
  1369. +}
  1370. +
  1371. +
  1372. +static int shps_dgpu_is_present(struct platform_device *pdev)
  1373. +{
  1374. + struct shps_driver_data *drvdata;
  1375. +
  1376. + drvdata = platform_get_drvdata(pdev);
  1377. + return gpiod_get_value_cansleep(drvdata->gpio_dgpu_presence);
  1378. +}
  1379. +
  1380. +
  1381. +static ssize_t dgpu_power_show(struct device *dev, struct device_attribute *attr, char *data)
  1382. +{
  1383. + struct platform_device *pdev = to_platform_device(dev);
  1384. + int power = shps_dgpu_rp_get_power(pdev);
  1385. +
  1386. + if (power < 0)
  1387. + return power;
  1388. +
  1389. + return sprintf(data, "%s\n", shps_dgpu_power_str(power));
  1390. +}
  1391. +
  1392. +static ssize_t dgpu_power_store(struct device *dev, struct device_attribute *attr,
  1393. + const char *data, size_t count)
  1394. +{
  1395. + struct platform_device *pdev = to_platform_device(dev);
  1396. + enum shps_dgpu_power power;
  1397. + bool b = false;
  1398. + int status;
  1399. +
  1400. + status = kstrtobool(data, &b);
  1401. + if (status)
  1402. + return status;
  1403. +
  1404. + status = shps_dgpu_is_present(pdev);
  1405. + if (status <= 0)
  1406. + return status < 0 ? status : -EPERM;
  1407. +
  1408. + power = b ? SHPS_DGPU_POWER_ON : SHPS_DGPU_POWER_OFF;
  1409. + status = shps_dgpu_set_power(pdev, power);
  1410. +
  1411. + return status < 0 ? status : count;
  1412. +}
  1413. +
  1414. +static ssize_t dgpu_power_dsm_show(struct device *dev, struct device_attribute *attr, char *data)
  1415. +{
  1416. + struct platform_device *pdev = to_platform_device(dev);
  1417. + int power = shps_dgpu_dsm_get_power(pdev);
  1418. +
  1419. + if (power < 0)
  1420. + return power;
  1421. +
  1422. + return sprintf(data, "%s\n", shps_dgpu_power_str(power));
  1423. +}
  1424. +
  1425. +static ssize_t dgpu_power_dsm_store(struct device *dev, struct device_attribute *attr,
  1426. + const char *data, size_t count)
  1427. +{
  1428. + struct platform_device *pdev = to_platform_device(dev);
  1429. + enum shps_dgpu_power power;
  1430. + bool b = false;
  1431. + int status;
  1432. +
  1433. + status = kstrtobool(data, &b);
  1434. + if (status)
  1435. + return status;
  1436. +
  1437. + status = shps_dgpu_is_present(pdev);
  1438. + if (status <= 0)
  1439. + return status < 0 ? status : -EPERM;
  1440. +
  1441. + power = b ? SHPS_DGPU_POWER_ON : SHPS_DGPU_POWER_OFF;
  1442. + status = shps_dgpu_dsm_set_power(pdev, power);
  1443. +
  1444. + return status < 0 ? status : count;
  1445. +}
  1446. +
  1447. +static DEVICE_ATTR_RW(dgpu_power);
  1448. +static DEVICE_ATTR_RW(dgpu_power_dsm);
  1449. +
  1450. +static struct attribute *shps_power_attrs[] = {
  1451. + &dev_attr_dgpu_power.attr,
  1452. + &dev_attr_dgpu_power_dsm.attr,
  1453. + NULL,
  1454. +};
  1455. +ATTRIBUTE_GROUPS(shps_power);
  1456. +
  1457. +
  1458. +static void dbg_dump_power_states(struct platform_device *pdev, const char *prefix)
  1459. +{
  1460. + enum shps_dgpu_power power_dsm;
  1461. + enum shps_dgpu_power power_rp;
  1462. + int status;
  1463. +
  1464. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1465. + if (status < 0)
  1466. + dev_err(&pdev->dev, "%s: failed to get root-port power state: %d\n", prefix, status);
  1467. + power_rp = status;
  1468. +
  1469. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1470. + if (status < 0)
  1471. + dev_err(&pdev->dev, "%s: failed to get direct power state: %d\n", prefix, status);
  1472. + power_dsm = status;
  1473. +
  1474. + dev_dbg(&pdev->dev, "%s: root-port power state: %d\n", prefix, power_rp);
  1475. + dev_dbg(&pdev->dev, "%s: direct power state: %d\n", prefix, power_dsm);
  1476. +}
  1477. +
  1478. +static void dbg_dump_pciesta(struct platform_device *pdev, const char *prefix)
  1479. +{
  1480. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1481. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1482. + u16 lnksta, lnksta2, sltsta, sltsta2;
  1483. +
  1484. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA, &lnksta);
  1485. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA2, &lnksta2);
  1486. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA, &sltsta);
  1487. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA2, &sltsta2);
  1488. +
  1489. + dev_dbg(&pdev->dev, "%s: LNKSTA: 0x%04x", prefix, lnksta);
  1490. + dev_dbg(&pdev->dev, "%s: LNKSTA2: 0x%04x", prefix, lnksta2);
  1491. + dev_dbg(&pdev->dev, "%s: SLTSTA: 0x%04x", prefix, sltsta);
  1492. + dev_dbg(&pdev->dev, "%s: SLTSTA2: 0x%04x", prefix, sltsta2);
  1493. +}
  1494. +
  1495. +static void dbg_dump_drvsta(struct platform_device *pdev, const char *prefix)
  1496. +{
  1497. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1498. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1499. +
  1500. + dev_dbg(&pdev->dev, "%s: RP power: %d", prefix, rp->current_state);
  1501. + dev_dbg(&pdev->dev, "%s: RP state saved: %d", prefix, rp->state_saved);
  1502. + dev_dbg(&pdev->dev, "%s: RP state stored: %d", prefix, !!drvdata->dgpu_root_port_state);
  1503. + dev_dbg(&pdev->dev, "%s: RP enabled: %d", prefix, atomic_read(&rp->enable_cnt));
  1504. + dev_dbg(&pdev->dev, "%s: RP mastered: %d", prefix, rp->is_busmaster);
  1505. +}
  1506. +
  1507. +
  1508. +static int shps_pm_prepare(struct device *dev)
  1509. +{
  1510. + struct platform_device *pdev = to_platform_device(dev);
  1511. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1512. + bool pwrtgt;
  1513. + int status = 0;
  1514. +
  1515. + dbg_dump_power_states(pdev, "shps_pm_prepare");
  1516. +
  1517. + if (param_dgpu_power_susp != SHPS_DGPU_MP_POWER_ASIS) {
  1518. + pwrtgt = test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1519. +
  1520. + status = shps_dgpu_set_power(pdev, param_dgpu_power_susp);
  1521. + if (status) {
  1522. + dev_err(&pdev->dev, "failed to power %s dGPU: %d\n",
  1523. + param_dgpu_power_susp == SHPS_DGPU_MP_POWER_OFF ? "off" : "on",
  1524. + status);
  1525. + return status;
  1526. + }
  1527. +
  1528. + if (pwrtgt)
  1529. + set_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1530. + else
  1531. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1532. + }
  1533. +
  1534. + return 0;
  1535. +}
  1536. +
  1537. +static void shps_pm_complete(struct device *dev)
  1538. +{
  1539. + struct platform_device *pdev = to_platform_device(dev);
  1540. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1541. + int status;
  1542. +
  1543. + dbg_dump_power_states(pdev, "shps_pm_complete");
  1544. + dbg_dump_pciesta(pdev, "shps_pm_complete");
  1545. + dbg_dump_drvsta(pdev, "shps_pm_complete.1");
  1546. +
  1547. + // update power target, dGPU may have been detached while suspended
  1548. + status = shps_dgpu_is_present(pdev);
  1549. + if (status < 0) {
  1550. + dev_err(&pdev->dev, "failed to get dGPU presence: %d\n", status);
  1551. + return;
  1552. + } else if (status == 0) {
  1553. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1554. + }
  1555. +
  1556. + /*
  1557. + * During resume, the PCIe core will power on the root-port, which in turn
  1558. + * will power on the dGPU. Most of the state synchronization is already
  1559. + * handled via the SAN RQSG handler, so it is in a fully consistent
  1560. + * on-state here. If requested, turn it off here.
  1561. + *
  1562. + * As there seem to be some synchronization issues turning off the dGPU
  1563. + * directly after the power-on SAN RQSG notification during the resume
  1564. + * process, let's do this here.
  1565. + *
  1566. + * TODO/FIXME:
  1567. + * This does not combat unhandled power-ons when the device is not fully
  1568. + * resumed, i.e. re-suspended before shps_pm_complete is called. Those
  1569. + * should normally not be an issue, but the dGPU does get hot even though
  1570. + * it is suspended, so ideally we want to keep it off.
  1571. + */
  1572. + if (!test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state)) {
  1573. + status = shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_OFF);
  1574. + if (status)
  1575. + dev_err(&pdev->dev, "failed to power-off dGPU: %d\n", status);
  1576. + }
  1577. +
  1578. + dbg_dump_drvsta(pdev, "shps_pm_complete.2");
  1579. +}
  1580. +
  1581. +static int shps_pm_suspend(struct device *dev)
  1582. +{
  1583. + struct platform_device *pdev = to_platform_device(dev);
  1584. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1585. + int status;
  1586. +
  1587. + if (device_may_wakeup(dev)) {
  1588. + status = enable_irq_wake(drvdata->irq_base_presence);
  1589. + if (status)
  1590. + return status;
  1591. +
  1592. + set_bit(SHPS_STATE_BIT_WAKE_ENABLED, &drvdata->state);
  1593. + }
  1594. +
  1595. + return 0;
  1596. +}
  1597. +
  1598. +static int shps_pm_resume(struct device *dev)
  1599. +{
  1600. + struct platform_device *pdev = to_platform_device(dev);
  1601. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1602. + int status = 0;
  1603. +
  1604. + if (test_and_clear_bit(SHPS_STATE_BIT_WAKE_ENABLED, &drvdata->state))
  1605. + status = disable_irq_wake(drvdata->irq_base_presence);
  1606. +
  1607. + return status;
  1608. +}
  1609. +
  1610. +static void shps_shutdown(struct platform_device *pdev)
  1611. +{
  1612. + int status;
  1613. +
  1614. + /*
  1615. + * Turn on dGPU before shutting down. This allows the core drivers to
  1616. + * properly shut down the device. If we don't do this, the pcieport driver
  1617. + * will complain that the device has already been disabled.
  1618. + */
  1619. + status = shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_ON);
  1620. + if (status)
  1621. + dev_err(&pdev->dev, "failed to turn on dGPU: %d\n", status);
  1622. +}
  1623. +
  1624. +static int shps_dgpu_detached(struct platform_device *pdev)
  1625. +{
  1626. + dbg_dump_power_states(pdev, "shps_dgpu_detached");
  1627. + return shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_OFF);
  1628. +}
  1629. +
  1630. +static int shps_dgpu_attached(struct platform_device *pdev)
  1631. +{
  1632. + dbg_dump_power_states(pdev, "shps_dgpu_attached");
  1633. + return 0;
  1634. +}
  1635. +
  1636. +static int shps_dgpu_powered_on(struct platform_device *pdev)
  1637. +{
  1638. + /*
  1639. + * This function gets called directly after a power-state transition of
  1640. + * the dGPU root port out of D3cold state, indicating a power-on of the
  1641. + * dGPU. Specifically, this function is called from the RQSG handler of
  1642. + * SAN, invoked by the ACPI _ON method of the dGPU root port. This means
  1643. + * that this function is run inside `pci_set_power_state(rp, ...)`
  1644. + * syncrhonously and thus returns before the `pci_set_power_state` call
  1645. + * does.
  1646. + *
  1647. + * `pci_set_power_state` may either be called by us or when the PCI
  1648. + * subsystem decides to power up the root port (e.g. during resume). Thus
  1649. + * we should use this function to ensure that the dGPU and root port
  1650. + * states are consistent when an unexpected power-up is encountered.
  1651. + */
  1652. +
  1653. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1654. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1655. + int status;
  1656. +
  1657. + dbg_dump_drvsta(pdev, "shps_dgpu_powered_on.1");
  1658. +
  1659. + // if we caused the root port to power-on, return
  1660. + if (test_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state))
  1661. + return 0;
  1662. +
  1663. + // if dGPU is not present, force power-target to off and return
  1664. + status = shps_dgpu_is_present(pdev);
  1665. + if (status == 0)
  1666. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1667. + if (status <= 0)
  1668. + return status;
  1669. +
  1670. + mutex_lock(&drvdata->lock);
  1671. +
  1672. + dbg_dump_power_states(pdev, "shps_dgpu_powered_on.1");
  1673. + dbg_dump_pciesta(pdev, "shps_dgpu_powered_on.1");
  1674. + if (drvdata->dgpu_root_port_state)
  1675. + pci_load_and_free_saved_state(rp, &drvdata->dgpu_root_port_state);
  1676. + pci_restore_state(rp);
  1677. + if (!pci_is_enabled(rp))
  1678. + pci_enable_device(rp);
  1679. + pci_set_master(rp);
  1680. + dbg_dump_drvsta(pdev, "shps_dgpu_powered_on.2");
  1681. + dbg_dump_power_states(pdev, "shps_dgpu_powered_on.2");
  1682. + dbg_dump_pciesta(pdev, "shps_dgpu_powered_on.2");
  1683. +
  1684. + mutex_unlock(&drvdata->lock);
  1685. +
  1686. + if (!test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state)) {
  1687. + dev_warn(&pdev->dev, "unexpected dGPU power-on detected");
  1688. + // TODO: schedule state re-check and update
  1689. + }
  1690. +
  1691. + return 0;
  1692. +}
  1693. +
  1694. +
  1695. +static int shps_dgpu_handle_rqsg(struct surface_sam_san_rqsg *rqsg, void *data)
  1696. +{
  1697. + struct platform_device *pdev = data;
  1698. +
  1699. + if (rqsg->tc == SAM_DGPU_TC && rqsg->cid == SAM_DGPU_CID_POWERON)
  1700. + return shps_dgpu_powered_on(pdev);
  1701. +
  1702. + dev_warn(&pdev->dev, "unimplemented dGPU request: RQSG(0x%02x, 0x%02x, 0x%02x)",
  1703. + rqsg->tc, rqsg->cid, rqsg->iid);
  1704. + return 0;
  1705. +}
  1706. +
  1707. +static irqreturn_t shps_dgpu_presence_irq(int irq, void *data)
  1708. +{
  1709. + struct platform_device *pdev = data;
  1710. + bool dgpu_present;
  1711. + int status;
  1712. +
  1713. + status = shps_dgpu_is_present(pdev);
  1714. + if (status < 0) {
  1715. + dev_err(&pdev->dev, "failed to check physical dGPU presence: %d\n", status);
  1716. + return IRQ_HANDLED;
  1717. + }
  1718. +
  1719. + dgpu_present = status != 0;
  1720. + dev_info(&pdev->dev, "dGPU physically %s\n", dgpu_present ? "attached" : "detached");
  1721. +
  1722. + if (dgpu_present)
  1723. + status = shps_dgpu_attached(pdev);
  1724. + else
  1725. + status = shps_dgpu_detached(pdev);
  1726. +
  1727. + if (status)
  1728. + dev_err(&pdev->dev, "error handling dGPU interrupt: %d\n", status);
  1729. +
  1730. + return IRQ_HANDLED;
  1731. +}
  1732. +
  1733. +static irqreturn_t shps_base_presence_irq(int irq, void *data)
  1734. +{
  1735. + return IRQ_HANDLED; // nothing to do, just wake
  1736. +}
  1737. +
  1738. +
  1739. +static int shps_gpios_setup(struct platform_device *pdev)
  1740. +{
  1741. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1742. + struct gpio_desc *gpio_dgpu_power;
  1743. + struct gpio_desc *gpio_dgpu_presence;
  1744. + struct gpio_desc *gpio_base_presence;
  1745. + int status;
  1746. +
  1747. + // get GPIOs
  1748. + gpio_dgpu_power = devm_gpiod_get(&pdev->dev, "dgpu_power", GPIOD_IN);
  1749. + if (IS_ERR(gpio_dgpu_power)) {
  1750. + status = PTR_ERR(gpio_dgpu_power);
  1751. + goto err_out;
  1752. + }
  1753. +
  1754. + gpio_dgpu_presence = devm_gpiod_get(&pdev->dev, "dgpu_presence", GPIOD_IN);
  1755. + if (IS_ERR(gpio_dgpu_presence)) {
  1756. + status = PTR_ERR(gpio_dgpu_presence);
  1757. + goto err_out;
  1758. + }
  1759. +
  1760. + gpio_base_presence = devm_gpiod_get(&pdev->dev, "base_presence", GPIOD_IN);
  1761. + if (IS_ERR(gpio_base_presence)) {
  1762. + status = PTR_ERR(gpio_base_presence);
  1763. + goto err_out;
  1764. + }
  1765. +
  1766. + // export GPIOs
  1767. + status = gpiod_export(gpio_dgpu_power, false);
  1768. + if (status)
  1769. + goto err_out;
  1770. +
  1771. + status = gpiod_export(gpio_dgpu_presence, false);
  1772. + if (status)
  1773. + goto err_export_dgpu_presence;
  1774. +
  1775. + status = gpiod_export(gpio_base_presence, false);
  1776. + if (status)
  1777. + goto err_export_base_presence;
  1778. +
  1779. + // create sysfs links
  1780. + status = gpiod_export_link(&pdev->dev, "gpio-dgpu_power", gpio_dgpu_power);
  1781. + if (status)
  1782. + goto err_link_dgpu_power;
  1783. +
  1784. + status = gpiod_export_link(&pdev->dev, "gpio-dgpu_presence", gpio_dgpu_presence);
  1785. + if (status)
  1786. + goto err_link_dgpu_presence;
  1787. +
  1788. + status = gpiod_export_link(&pdev->dev, "gpio-base_presence", gpio_base_presence);
  1789. + if (status)
  1790. + goto err_link_base_presence;
  1791. +
  1792. + drvdata->gpio_dgpu_power = gpio_dgpu_power;
  1793. + drvdata->gpio_dgpu_presence = gpio_dgpu_presence;
  1794. + drvdata->gpio_base_presence = gpio_base_presence;
  1795. + return 0;
  1796. +
  1797. +err_link_base_presence:
  1798. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_presence");
  1799. +err_link_dgpu_presence:
  1800. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_power");
  1801. +err_link_dgpu_power:
  1802. + gpiod_unexport(gpio_base_presence);
  1803. +err_export_base_presence:
  1804. + gpiod_unexport(gpio_dgpu_presence);
  1805. +err_export_dgpu_presence:
  1806. + gpiod_unexport(gpio_dgpu_power);
  1807. +err_out:
  1808. + return status;
  1809. +}
  1810. +
  1811. +static void shps_gpios_remove(struct platform_device *pdev)
  1812. +{
  1813. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1814. +
  1815. + sysfs_remove_link(&pdev->dev.kobj, "gpio-base_presence");
  1816. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_presence");
  1817. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_power");
  1818. + gpiod_unexport(drvdata->gpio_base_presence);
  1819. + gpiod_unexport(drvdata->gpio_dgpu_presence);
  1820. + gpiod_unexport(drvdata->gpio_dgpu_power);
  1821. +}
  1822. +
  1823. +static int shps_gpios_setup_irq(struct platform_device *pdev)
  1824. +{
  1825. + const int irqf_dgpu = IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
  1826. + const int irqf_base = IRQF_SHARED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
  1827. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1828. + int status;
  1829. +
  1830. + status = gpiod_to_irq(drvdata->gpio_base_presence);
  1831. + if (status < 0)
  1832. + return status;
  1833. + drvdata->irq_base_presence = status;
  1834. +
  1835. + status = gpiod_to_irq(drvdata->gpio_dgpu_presence);
  1836. + if (status < 0)
  1837. + return status;
  1838. + drvdata->irq_dgpu_presence = status;
  1839. +
  1840. + status = request_irq(drvdata->irq_base_presence,
  1841. + shps_base_presence_irq, irqf_base,
  1842. + "shps_base_presence_irq", pdev);
  1843. + if (status)
  1844. + return status;
  1845. +
  1846. + status = request_threaded_irq(drvdata->irq_dgpu_presence,
  1847. + NULL, shps_dgpu_presence_irq, irqf_dgpu,
  1848. + "shps_dgpu_presence_irq", pdev);
  1849. + if (status) {
  1850. + free_irq(drvdata->irq_base_presence, pdev);
  1851. + return status;
  1852. + }
  1853. +
  1854. + return 0;
  1855. +}
  1856. +
  1857. +static void shps_gpios_remove_irq(struct platform_device *pdev)
  1858. +{
  1859. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1860. +
  1861. + free_irq(drvdata->irq_base_presence, pdev);
  1862. + free_irq(drvdata->irq_dgpu_presence, pdev);
  1863. +}
  1864. +
  1865. +static int shps_probe(struct platform_device *pdev)
  1866. +{
  1867. + struct acpi_device *shps_dev = ACPI_COMPANION(&pdev->dev);
  1868. + struct shps_driver_data *drvdata;
  1869. + struct device_link *link;
  1870. + int power, status;
  1871. +
  1872. + if (gpiod_count(&pdev->dev, NULL) < 0)
  1873. + return -ENODEV;
  1874. +
  1875. + // link to SSH
  1876. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  1877. + if (status)
  1878. + return status == -ENXIO ? -EPROBE_DEFER : status;
  1879. +
  1880. + // link to SAN
  1881. + status = surface_sam_san_consumer_register(&pdev->dev, 0);
  1882. + if (status)
  1883. + return status == -ENXIO ? -EPROBE_DEFER : status;
  1884. +
  1885. + status = acpi_dev_add_driver_gpios(shps_dev, shps_acpi_gpios);
  1886. + if (status)
  1887. + return status;
  1888. +
  1889. + drvdata = kzalloc(sizeof(struct shps_driver_data), GFP_KERNEL);
  1890. + if (!drvdata) {
  1891. + status = -ENOMEM;
  1892. + goto err_drvdata;
  1893. + }
  1894. + mutex_init(&drvdata->lock);
  1895. + platform_set_drvdata(pdev, drvdata);
  1896. +
  1897. + drvdata->dgpu_root_port = shps_dgpu_dsm_get_pci_dev(pdev, SHPS_DSM_GPU_ADDRS_RP);
  1898. + if (IS_ERR(drvdata->dgpu_root_port)) {
  1899. + status = PTR_ERR(drvdata->dgpu_root_port);
  1900. + goto err_rp_lookup;
  1901. + }
  1902. +
  1903. + status = shps_gpios_setup(pdev);
  1904. + if (status)
  1905. + goto err_gpio;
  1906. +
  1907. + status = shps_gpios_setup_irq(pdev);
  1908. + if (status)
  1909. + goto err_gpio_irqs;
  1910. +
  1911. + status = device_add_groups(&pdev->dev, shps_power_groups);
  1912. + if (status)
  1913. + goto err_devattr;
  1914. +
  1915. + link = device_link_add(&pdev->dev, &drvdata->dgpu_root_port->dev,
  1916. + DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER);
  1917. + if (!link)
  1918. + goto err_devlink;
  1919. +
  1920. + surface_sam_san_set_rqsg_handler(shps_dgpu_handle_rqsg, pdev);
  1921. +
  1922. + // if dGPU is not present turn-off root-port, else obey module param
  1923. + status = shps_dgpu_is_present(pdev);
  1924. + if (status < 0)
  1925. + goto err_devlink;
  1926. +
  1927. + power = status == 0 ? SHPS_DGPU_POWER_OFF : param_dgpu_power_init;
  1928. + if (power != SHPS_DGPU_MP_POWER_ASIS) {
  1929. + status = shps_dgpu_set_power(pdev, power);
  1930. + if (status)
  1931. + goto err_devlink;
  1932. + }
  1933. +
  1934. + device_init_wakeup(&pdev->dev, true);
  1935. + return 0;
  1936. +
  1937. +err_devlink:
  1938. + device_remove_groups(&pdev->dev, shps_power_groups);
  1939. +err_devattr:
  1940. + shps_gpios_remove_irq(pdev);
  1941. +err_gpio_irqs:
  1942. + shps_gpios_remove(pdev);
  1943. +err_gpio:
  1944. + pci_dev_put(drvdata->dgpu_root_port);
  1945. +err_rp_lookup:
  1946. + platform_set_drvdata(pdev, NULL);
  1947. + kfree(drvdata);
  1948. +err_drvdata:
  1949. + acpi_dev_remove_driver_gpios(shps_dev);
  1950. + return status;
  1951. +}
  1952. +
  1953. +static int shps_remove(struct platform_device *pdev)
  1954. +{
  1955. + struct acpi_device *shps_dev = ACPI_COMPANION(&pdev->dev);
  1956. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1957. + int status;
  1958. +
  1959. + if (param_dgpu_power_exit != SHPS_DGPU_MP_POWER_ASIS) {
  1960. + status = shps_dgpu_set_power(pdev, param_dgpu_power_exit);
  1961. + if (status)
  1962. + dev_err(&pdev->dev, "failed to set dGPU power state: %d\n", status);
  1963. + }
  1964. +
  1965. + device_set_wakeup_capable(&pdev->dev, false);
  1966. + surface_sam_san_set_rqsg_handler(NULL, NULL);
  1967. + device_remove_groups(&pdev->dev, shps_power_groups);
  1968. + shps_gpios_remove_irq(pdev);
  1969. + shps_gpios_remove(pdev);
  1970. + pci_dev_put(drvdata->dgpu_root_port);
  1971. + platform_set_drvdata(pdev, NULL);
  1972. + kfree(drvdata);
  1973. +
  1974. + acpi_dev_remove_driver_gpios(shps_dev);
  1975. + return 0;
  1976. +}
  1977. +
  1978. +
  1979. +static const struct dev_pm_ops shps_pm_ops = {
  1980. + .prepare = shps_pm_prepare,
  1981. + .complete = shps_pm_complete,
  1982. + .suspend = shps_pm_suspend,
  1983. + .resume = shps_pm_resume,
  1984. +};
  1985. +
  1986. +static const struct acpi_device_id shps_acpi_match[] = {
  1987. + { "MSHW0153", 0 },
  1988. + { },
  1989. +};
  1990. +MODULE_DEVICE_TABLE(acpi, shps_acpi_match);
  1991. +
  1992. +static struct platform_driver surface_sam_hps = {
  1993. + .probe = shps_probe,
  1994. + .remove = shps_remove,
  1995. + .shutdown = shps_shutdown,
  1996. + .driver = {
  1997. + .name = "surface_dgpu_hps",
  1998. + .acpi_match_table = ACPI_PTR(shps_acpi_match),
  1999. + .pm = &shps_pm_ops,
  2000. + },
  2001. +};
  2002. +module_platform_driver(surface_sam_hps);
  2003. +
  2004. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  2005. +MODULE_DESCRIPTION("Surface Hot-Plug System (HPS) and dGPU power-state Driver for Surface Book 2");
  2006. +MODULE_LICENSE("GPL v2");
  2007. diff --git a/drivers/platform/x86/surface_sam/surface_sam_san.c b/drivers/platform/x86/surface_sam/surface_sam_san.c
  2008. new file mode 100644
  2009. index 000000000000..63478945e6b2
  2010. --- /dev/null
  2011. +++ b/drivers/platform/x86/surface_sam/surface_sam_san.c
  2012. @@ -0,0 +1,883 @@
  2013. +// SPDX-License-Identifier: GPL-2.0
  2014. +/*
  2015. + * Surface ACPI Notify (SAN) and ACPI integration driver for SAM.
  2016. + * Translates communication from ACPI to SSH and back.
  2017. + */
  2018. +
  2019. +#include <linux/acpi.h>
  2020. +#include <linux/delay.h>
  2021. +#include <linux/jiffies.h>
  2022. +#include <linux/kernel.h>
  2023. +#include <linux/platform_device.h>
  2024. +
  2025. +#include "surface_sam_ssh.h"
  2026. +#include "surface_sam_san.h"
  2027. +
  2028. +
  2029. +#define SAN_RQST_RETRY 5
  2030. +
  2031. +#define SAN_DSM_REVISION 0
  2032. +#define SAN_DSM_FN_NOTIFY_SENSOR_TRIP_POINT 0x09
  2033. +
  2034. +static const guid_t SAN_DSM_UUID =
  2035. + GUID_INIT(0x93b666c5, 0x70c6, 0x469f, 0xa2, 0x15, 0x3d,
  2036. + 0x48, 0x7c, 0x91, 0xab, 0x3c);
  2037. +
  2038. +#define SAM_EVENT_DELAY_PWR_ADAPTER msecs_to_jiffies(5000)
  2039. +#define SAM_EVENT_DELAY_PWR_BST msecs_to_jiffies(2500)
  2040. +
  2041. +#define SAM_EVENT_PWR_TC 0x02
  2042. +#define SAM_EVENT_PWR_RQID 0x0002
  2043. +#define SAM_EVENT_PWR_CID_BIX 0x15
  2044. +#define SAM_EVENT_PWR_CID_BST 0x16
  2045. +#define SAM_EVENT_PWR_CID_ADAPTER 0x17
  2046. +#define SAM_EVENT_PWR_CID_DPTF 0x4f
  2047. +
  2048. +#define SAM_EVENT_TEMP_TC 0x03
  2049. +#define SAM_EVENT_TEMP_RQID 0x0003
  2050. +#define SAM_EVENT_TEMP_CID_NOTIFY_SENSOR_TRIP_POINT 0x0b
  2051. +
  2052. +#define SAN_RQST_TAG "surface_sam_san: rqst: "
  2053. +#define SAN_RQSG_TAG "surface_sam_san: rqsg: "
  2054. +
  2055. +#define SAN_QUIRK_BASE_STATE_DELAY 1000
  2056. +
  2057. +
  2058. +struct san_acpi_consumer {
  2059. + char *path;
  2060. + bool required;
  2061. + u32 flags;
  2062. +};
  2063. +
  2064. +struct san_opreg_context {
  2065. + struct acpi_connection_info connection;
  2066. + struct device *dev;
  2067. +};
  2068. +
  2069. +struct san_consumer_link {
  2070. + const struct san_acpi_consumer *properties;
  2071. + struct device_link *link;
  2072. +};
  2073. +
  2074. +struct san_consumers {
  2075. + u32 num;
  2076. + struct san_consumer_link *links;
  2077. +};
  2078. +
  2079. +struct san_drvdata {
  2080. + struct san_opreg_context opreg_ctx;
  2081. + struct san_consumers consumers;
  2082. + bool has_power_events;
  2083. +};
  2084. +
  2085. +struct gsb_data_in {
  2086. + u8 cv;
  2087. +} __packed;
  2088. +
  2089. +struct gsb_data_rqsx {
  2090. + u8 cv; // command value (should be 0x01 or 0x03)
  2091. + u8 tc; // target controller
  2092. + u8 tid; // expected to be 0x01, could be revision
  2093. + u8 iid; // target sub-controller (e.g. primary vs. secondary battery)
  2094. + u8 snc; // expect-response-flag
  2095. + u8 cid; // command ID
  2096. + u8 cdl; // payload length
  2097. + u8 _pad; // padding
  2098. + u8 pld[0]; // payload
  2099. +} __packed;
  2100. +
  2101. +struct gsb_data_etwl {
  2102. + u8 cv; // command value (should be 0x02)
  2103. + u8 etw3; // ?
  2104. + u8 etw4; // ?
  2105. + u8 msg[0]; // error message (ASCIIZ)
  2106. +} __packed;
  2107. +
  2108. +struct gsb_data_out {
  2109. + u8 status; // _SSH communication status
  2110. + u8 len; // _SSH payload length
  2111. + u8 pld[0]; // _SSH payload
  2112. +} __packed;
  2113. +
  2114. +union gsb_buffer_data {
  2115. + struct gsb_data_in in; // common input
  2116. + struct gsb_data_rqsx rqsx; // RQSX input
  2117. + struct gsb_data_etwl etwl; // ETWL input
  2118. + struct gsb_data_out out; // output
  2119. +};
  2120. +
  2121. +struct gsb_buffer {
  2122. + u8 status; // GSB AttribRawProcess status
  2123. + u8 len; // GSB AttribRawProcess length
  2124. + union gsb_buffer_data data;
  2125. +} __packed;
  2126. +
  2127. +
  2128. +enum san_pwr_event {
  2129. + SAN_PWR_EVENT_BAT1_STAT = 0x03,
  2130. + SAN_PWR_EVENT_BAT1_INFO = 0x04,
  2131. + SAN_PWR_EVENT_ADP1_STAT = 0x05,
  2132. + SAN_PWR_EVENT_ADP1_INFO = 0x06,
  2133. + SAN_PWR_EVENT_BAT2_STAT = 0x07,
  2134. + SAN_PWR_EVENT_BAT2_INFO = 0x08,
  2135. +};
  2136. +
  2137. +
  2138. +static int sam_san_default_rqsg_handler(struct surface_sam_san_rqsg *rqsg, void *data);
  2139. +
  2140. +struct sam_san_rqsg_if {
  2141. + struct mutex lock;
  2142. + struct device *san_dev;
  2143. + surface_sam_san_rqsg_handler_fn handler;
  2144. + void *handler_data;
  2145. +};
  2146. +
  2147. +static struct sam_san_rqsg_if rqsg_if = {
  2148. + .lock = __MUTEX_INITIALIZER(rqsg_if.lock),
  2149. + .san_dev = NULL,
  2150. + .handler = sam_san_default_rqsg_handler,
  2151. + .handler_data = NULL,
  2152. +};
  2153. +
  2154. +int surface_sam_san_consumer_register(struct device *consumer, u32 flags)
  2155. +{
  2156. + const u32 valid = DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE;
  2157. + int status;
  2158. +
  2159. + if ((flags | valid) != valid)
  2160. + return -EINVAL;
  2161. +
  2162. + flags |= DL_FLAG_AUTOREMOVE_CONSUMER;
  2163. +
  2164. + mutex_lock(&rqsg_if.lock);
  2165. + if (rqsg_if.san_dev)
  2166. + status = device_link_add(consumer, rqsg_if.san_dev, flags) ? 0 : -EINVAL;
  2167. + else
  2168. + status = -ENXIO;
  2169. + mutex_unlock(&rqsg_if.lock);
  2170. + return status;
  2171. +}
  2172. +EXPORT_SYMBOL_GPL(surface_sam_san_consumer_register);
  2173. +
  2174. +int surface_sam_san_set_rqsg_handler(surface_sam_san_rqsg_handler_fn fn, void *data)
  2175. +{
  2176. + int status = -EBUSY;
  2177. +
  2178. + mutex_lock(&rqsg_if.lock);
  2179. +
  2180. + if (rqsg_if.handler == sam_san_default_rqsg_handler || !fn) {
  2181. + rqsg_if.handler = fn ? fn : sam_san_default_rqsg_handler;
  2182. + rqsg_if.handler_data = data;
  2183. + status = 0;
  2184. + }
  2185. +
  2186. + mutex_unlock(&rqsg_if.lock);
  2187. + return status;
  2188. +}
  2189. +EXPORT_SYMBOL_GPL(surface_sam_san_set_rqsg_handler);
  2190. +
  2191. +int san_call_rqsg_handler(struct surface_sam_san_rqsg *rqsg)
  2192. +{
  2193. + int status;
  2194. +
  2195. + mutex_lock(&rqsg_if.lock);
  2196. + status = rqsg_if.handler(rqsg, rqsg_if.handler_data);
  2197. + mutex_unlock(&rqsg_if.lock);
  2198. +
  2199. + return status;
  2200. +}
  2201. +
  2202. +static int sam_san_default_rqsg_handler(struct surface_sam_san_rqsg *rqsg, void *data)
  2203. +{
  2204. + pr_warn(SAN_RQSG_TAG "unhandled request: RQSG(0x%02x, 0x%02x, 0x%02x)\n",
  2205. + rqsg->tc, rqsg->cid, rqsg->iid);
  2206. +
  2207. + return 0;
  2208. +}
  2209. +
  2210. +
  2211. +static int san_acpi_notify_power_event(struct device *dev, enum san_pwr_event event)
  2212. +{
  2213. + acpi_handle san = ACPI_HANDLE(dev);
  2214. + union acpi_object *obj;
  2215. +
  2216. + dev_dbg(dev, "notify power event 0x%02x\n", event);
  2217. + obj = acpi_evaluate_dsm_typed(san, &SAN_DSM_UUID, SAN_DSM_REVISION,
  2218. + (u8) event, NULL, ACPI_TYPE_BUFFER);
  2219. +
  2220. + if (IS_ERR_OR_NULL(obj))
  2221. + return obj ? PTR_ERR(obj) : -ENXIO;
  2222. +
  2223. + if (obj->buffer.length != 1 || obj->buffer.pointer[0] != 0) {
  2224. + dev_err(dev, "got unexpected result from _DSM\n");
  2225. + return -EFAULT;
  2226. + }
  2227. +
  2228. + ACPI_FREE(obj);
  2229. + return 0;
  2230. +}
  2231. +
  2232. +static int san_acpi_notify_sensor_trip_point(struct device *dev, u8 iid)
  2233. +{
  2234. + acpi_handle san = ACPI_HANDLE(dev);
  2235. + union acpi_object *obj;
  2236. + union acpi_object param;
  2237. +
  2238. + param.type = ACPI_TYPE_INTEGER;
  2239. + param.integer.value = iid;
  2240. +
  2241. + obj = acpi_evaluate_dsm_typed(san, &SAN_DSM_UUID, SAN_DSM_REVISION,
  2242. + SAN_DSM_FN_NOTIFY_SENSOR_TRIP_POINT,
  2243. + &param, ACPI_TYPE_BUFFER);
  2244. +
  2245. + if (IS_ERR_OR_NULL(obj))
  2246. + return obj ? PTR_ERR(obj) : -ENXIO;
  2247. +
  2248. + if (obj->buffer.length != 1 || obj->buffer.pointer[0] != 0) {
  2249. + dev_err(dev, "got unexpected result from _DSM\n");
  2250. + return -EFAULT;
  2251. + }
  2252. +
  2253. + ACPI_FREE(obj);
  2254. + return 0;
  2255. +}
  2256. +
  2257. +
  2258. +static inline int san_evt_power_adapter(struct device *dev, struct surface_sam_ssh_event *event)
  2259. +{
  2260. + int status;
  2261. +
  2262. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_ADP1_STAT);
  2263. + if (status) {
  2264. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2265. + return status;
  2266. + }
  2267. +
  2268. + /*
  2269. + * Enusre that the battery states get updated correctly.
  2270. + * When the battery is fully charged and an adapter is plugged in, it
  2271. + * sometimes is not updated correctly, instead showing it as charging.
  2272. + * Explicitly trigger battery updates to fix this.
  2273. + */
  2274. +
  2275. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_BAT1_STAT);
  2276. + if (status) {
  2277. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2278. + return status;
  2279. + }
  2280. +
  2281. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_BAT2_STAT);
  2282. + if (status) {
  2283. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2284. + return status;
  2285. + }
  2286. +
  2287. + return 0;
  2288. +}
  2289. +
  2290. +static inline int san_evt_power_bix(struct device *dev, struct surface_sam_ssh_event *event)
  2291. +{
  2292. + enum san_pwr_event evcode;
  2293. + int status;
  2294. +
  2295. + if (event->iid == 0x02)
  2296. + evcode = SAN_PWR_EVENT_BAT2_INFO;
  2297. + else
  2298. + evcode = SAN_PWR_EVENT_BAT1_INFO;
  2299. +
  2300. + status = san_acpi_notify_power_event(dev, evcode);
  2301. + if (status) {
  2302. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2303. + return status;
  2304. + }
  2305. +
  2306. + return 0;
  2307. +}
  2308. +
  2309. +static inline int san_evt_power_bst(struct device *dev, struct surface_sam_ssh_event *event)
  2310. +{
  2311. + enum san_pwr_event evcode;
  2312. + int status;
  2313. +
  2314. + if (event->iid == 0x02)
  2315. + evcode = SAN_PWR_EVENT_BAT2_STAT;
  2316. + else
  2317. + evcode = SAN_PWR_EVENT_BAT1_STAT;
  2318. +
  2319. + status = san_acpi_notify_power_event(dev, evcode);
  2320. + if (status) {
  2321. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2322. + return status;
  2323. + }
  2324. +
  2325. + return 0;
  2326. +}
  2327. +
  2328. +static unsigned long san_evt_power_delay(struct surface_sam_ssh_event *event, void *data)
  2329. +{
  2330. + switch (event->cid) {
  2331. + case SAM_EVENT_PWR_CID_ADAPTER:
  2332. + /*
  2333. + * Wait for battery state to update before signalling adapter change.
  2334. + */
  2335. + return SAM_EVENT_DELAY_PWR_ADAPTER;
  2336. +
  2337. + case SAM_EVENT_PWR_CID_BST:
  2338. + /*
  2339. + * Ensure we do not miss anything important due to caching.
  2340. + */
  2341. + return SAM_EVENT_DELAY_PWR_BST;
  2342. +
  2343. + case SAM_EVENT_PWR_CID_BIX:
  2344. + case SAM_EVENT_PWR_CID_DPTF:
  2345. + default:
  2346. + return 0;
  2347. + }
  2348. +}
  2349. +
  2350. +static int san_evt_power(struct surface_sam_ssh_event *event, void *data)
  2351. +{
  2352. + struct device *dev = (struct device *)data;
  2353. +
  2354. + switch (event->cid) {
  2355. + case SAM_EVENT_PWR_CID_BIX:
  2356. + return san_evt_power_bix(dev, event);
  2357. +
  2358. + case SAM_EVENT_PWR_CID_BST:
  2359. + return san_evt_power_bst(dev, event);
  2360. +
  2361. + case SAM_EVENT_PWR_CID_ADAPTER:
  2362. + return san_evt_power_adapter(dev, event);
  2363. +
  2364. + case SAM_EVENT_PWR_CID_DPTF:
  2365. + /*
  2366. + * Ignored for now.
  2367. + * This signals a change in Intel DPTF PMAX, and possibly other
  2368. + * fields. Ignore for now as there is no corresponding _DSM call and
  2369. + * DPTF is implemented via a separate INT3407 device.
  2370. + *
  2371. + * The payload of this event is: [u32 PMAX, unknown...].
  2372. + */
  2373. + return 0;
  2374. +
  2375. + default:
  2376. + dev_warn(dev, "unhandled power event (cid = %x)\n", event->cid);
  2377. + }
  2378. +
  2379. + return 0;
  2380. +}
  2381. +
  2382. +
  2383. +static inline int san_evt_thermal_notify(struct device *dev, struct surface_sam_ssh_event *event)
  2384. +{
  2385. + int status;
  2386. +
  2387. + status = san_acpi_notify_sensor_trip_point(dev, event->iid);
  2388. + if (status) {
  2389. + dev_err(dev, "error handling thermal event (cid = %x)\n", event->cid);
  2390. + return status;
  2391. + }
  2392. +
  2393. + return 0;
  2394. +}
  2395. +
  2396. +static int san_evt_thermal(struct surface_sam_ssh_event *event, void *data)
  2397. +{
  2398. + struct device *dev = (struct device *)data;
  2399. +
  2400. + switch (event->cid) {
  2401. + case SAM_EVENT_TEMP_CID_NOTIFY_SENSOR_TRIP_POINT:
  2402. + return san_evt_thermal_notify(dev, event);
  2403. +
  2404. + default:
  2405. + dev_warn(dev, "unhandled thermal event (cid = %x)\n", event->cid);
  2406. + }
  2407. +
  2408. + return 0;
  2409. +}
  2410. +
  2411. +
  2412. +static struct gsb_data_rqsx
  2413. +*san_validate_rqsx(struct device *dev, const char *type, struct gsb_buffer *buffer)
  2414. +{
  2415. + struct gsb_data_rqsx *rqsx = &buffer->data.rqsx;
  2416. +
  2417. + if (buffer->len < 8) {
  2418. + dev_err(dev, "invalid %s package (len = %d)\n",
  2419. + type, buffer->len);
  2420. + return NULL;
  2421. + }
  2422. +
  2423. + if (rqsx->cdl != buffer->len - 8) {
  2424. + dev_err(dev, "bogus %s package (len = %d, cdl = %d)\n",
  2425. + type, buffer->len, rqsx->cdl);
  2426. + return NULL;
  2427. + }
  2428. +
  2429. + if (rqsx->tid != 0x01) {
  2430. + dev_warn(dev, "unsupported %s package (tid = 0x%02x)\n",
  2431. + type, rqsx->tid);
  2432. + return NULL;
  2433. + }
  2434. +
  2435. + return rqsx;
  2436. +}
  2437. +
  2438. +static acpi_status
  2439. +san_etwl(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2440. +{
  2441. + struct gsb_data_etwl *etwl = &buffer->data.etwl;
  2442. +
  2443. + if (buffer->len < 3) {
  2444. + dev_err(ctx->dev, "invalid ETWL package (len = %d)\n", buffer->len);
  2445. + return AE_OK;
  2446. + }
  2447. +
  2448. + dev_err(ctx->dev, "ETWL(0x%02x, 0x%02x): %.*s\n",
  2449. + etwl->etw3, etwl->etw4,
  2450. + buffer->len - 3, (char *)etwl->msg);
  2451. +
  2452. + // indicate success
  2453. + buffer->status = 0x00;
  2454. + buffer->len = 0x00;
  2455. +
  2456. + return AE_OK;
  2457. +}
  2458. +
  2459. +static acpi_status
  2460. +san_rqst(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2461. +{
  2462. + struct gsb_data_rqsx *gsb_rqst = san_validate_rqsx(ctx->dev, "RQST", buffer);
  2463. + struct surface_sam_ssh_rqst rqst = {};
  2464. + struct surface_sam_ssh_buf result = {};
  2465. + int status = 0;
  2466. + int try;
  2467. +
  2468. + if (!gsb_rqst)
  2469. + return AE_OK;
  2470. +
  2471. + rqst.tc = gsb_rqst->tc;
  2472. + rqst.cid = gsb_rqst->cid;
  2473. + rqst.iid = gsb_rqst->iid;
  2474. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  2475. + rqst.snc = gsb_rqst->snc;
  2476. + rqst.cdl = gsb_rqst->cdl;
  2477. + rqst.pld = &gsb_rqst->pld[0];
  2478. +
  2479. + result.cap = SURFACE_SAM_SSH_MAX_RQST_RESPONSE;
  2480. + result.len = 0;
  2481. + result.data = kzalloc(result.cap, GFP_KERNEL);
  2482. +
  2483. + if (!result.data)
  2484. + return AE_NO_MEMORY;
  2485. +
  2486. + for (try = 0; try < SAN_RQST_RETRY; try++) {
  2487. + if (try)
  2488. + dev_warn(ctx->dev, SAN_RQST_TAG "IO error occurred, trying again\n");
  2489. +
  2490. + status = surface_sam_ssh_rqst(&rqst, &result);
  2491. + if (status != -EIO)
  2492. + break;
  2493. + }
  2494. +
  2495. + if (rqst.tc == 0x11 && rqst.cid == 0x0D && status == -EPERM) {
  2496. + /* Base state quirk:
  2497. + * The base state may be queried from ACPI when the EC is still
  2498. + * suspended. In this case it will return '-EPERM'. This query
  2499. + * will only be triggered from the ACPI lid GPE interrupt, thus
  2500. + * we are either in laptop or studio mode (base status 0x01 or
  2501. + * 0x02). Furthermore, we will only get here if the device (and
  2502. + * EC) have been suspended.
  2503. + *
  2504. + * We now assume that the device is in laptop mode (0x01). This
  2505. + * has the drawback that it will wake the device when unfolding
  2506. + * it in studio mode, but it also allows us to avoid actively
  2507. + * waiting for the EC to wake up, which may incur a notable
  2508. + * delay.
  2509. + */
  2510. +
  2511. + buffer->status = 0x00;
  2512. + buffer->len = 0x03;
  2513. + buffer->data.out.status = 0x00;
  2514. + buffer->data.out.len = 0x01;
  2515. + buffer->data.out.pld[0] = 0x01;
  2516. +
  2517. + } else if (!status) { // success
  2518. + buffer->status = 0x00;
  2519. + buffer->len = result.len + 2;
  2520. + buffer->data.out.status = 0x00;
  2521. + buffer->data.out.len = result.len;
  2522. + memcpy(&buffer->data.out.pld[0], result.data, result.len);
  2523. +
  2524. + } else { // failure
  2525. + dev_err(ctx->dev, SAN_RQST_TAG "failed with error %d\n", status);
  2526. + buffer->status = 0x00;
  2527. + buffer->len = 0x02;
  2528. + buffer->data.out.status = 0x01; // indicate _SSH error
  2529. + buffer->data.out.len = 0x00;
  2530. + }
  2531. +
  2532. + kfree(result.data);
  2533. +
  2534. + return AE_OK;
  2535. +}
  2536. +
  2537. +static acpi_status
  2538. +san_rqsg(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2539. +{
  2540. + struct gsb_data_rqsx *gsb_rqsg = san_validate_rqsx(ctx->dev, "RQSG", buffer);
  2541. + struct surface_sam_san_rqsg rqsg = {};
  2542. + int status;
  2543. +
  2544. + if (!gsb_rqsg)
  2545. + return AE_OK;
  2546. +
  2547. + rqsg.tc = gsb_rqsg->tc;
  2548. + rqsg.cid = gsb_rqsg->cid;
  2549. + rqsg.iid = gsb_rqsg->iid;
  2550. + rqsg.cdl = gsb_rqsg->cdl;
  2551. + rqsg.pld = &gsb_rqsg->pld[0];
  2552. +
  2553. + status = san_call_rqsg_handler(&rqsg);
  2554. + if (!status) {
  2555. + buffer->status = 0x00;
  2556. + buffer->len = 0x02;
  2557. + buffer->data.out.status = 0x00;
  2558. + buffer->data.out.len = 0x00;
  2559. + } else {
  2560. + dev_err(ctx->dev, SAN_RQSG_TAG "failed with error %d\n", status);
  2561. + buffer->status = 0x00;
  2562. + buffer->len = 0x02;
  2563. + buffer->data.out.status = 0x01; // indicate _SSH error
  2564. + buffer->data.out.len = 0x00;
  2565. + }
  2566. +
  2567. + return AE_OK;
  2568. +}
  2569. +
  2570. +
  2571. +static acpi_status
  2572. +san_opreg_handler(u32 function, acpi_physical_address command,
  2573. + u32 bits, u64 *value64,
  2574. + void *opreg_context, void *region_context)
  2575. +{
  2576. + struct san_opreg_context *context = opreg_context;
  2577. + struct gsb_buffer *buffer = (struct gsb_buffer *)value64;
  2578. + int accessor_type = (0xFFFF0000 & function) >> 16;
  2579. +
  2580. + if (command != 0) {
  2581. + dev_warn(context->dev, "unsupported command: 0x%02llx\n", command);
  2582. + return AE_OK;
  2583. + }
  2584. +
  2585. + if (accessor_type != ACPI_GSB_ACCESS_ATTRIB_RAW_PROCESS) {
  2586. + dev_err(context->dev, "invalid access type: 0x%02x\n", accessor_type);
  2587. + return AE_OK;
  2588. + }
  2589. +
  2590. + // buffer must have at least contain the command-value
  2591. + if (buffer->len == 0) {
  2592. + dev_err(context->dev, "request-package too small\n");
  2593. + return AE_OK;
  2594. + }
  2595. +
  2596. + switch (buffer->data.in.cv) {
  2597. + case 0x01: return san_rqst(context, buffer);
  2598. + case 0x02: return san_etwl(context, buffer);
  2599. + case 0x03: return san_rqsg(context, buffer);
  2600. + }
  2601. +
  2602. + dev_warn(context->dev, "unsupported SAN0 request (cv: 0x%02x)\n", buffer->data.in.cv);
  2603. + return AE_OK;
  2604. +}
  2605. +
  2606. +static int san_enable_power_events(struct platform_device *pdev)
  2607. +{
  2608. + int status;
  2609. +
  2610. + status = surface_sam_ssh_set_delayed_event_handler(
  2611. + SAM_EVENT_PWR_RQID, san_evt_power,
  2612. + san_evt_power_delay, &pdev->dev);
  2613. + if (status)
  2614. + return status;
  2615. +
  2616. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_PWR_TC, 0x01, SAM_EVENT_PWR_RQID);
  2617. + if (status) {
  2618. + surface_sam_ssh_remove_event_handler(SAM_EVENT_PWR_RQID);
  2619. + return status;
  2620. + }
  2621. +
  2622. + return 0;
  2623. +}
  2624. +
  2625. +static int san_enable_thermal_events(struct platform_device *pdev)
  2626. +{
  2627. + int status;
  2628. +
  2629. + status = surface_sam_ssh_set_event_handler(
  2630. + SAM_EVENT_TEMP_RQID, san_evt_thermal,
  2631. + &pdev->dev);
  2632. + if (status)
  2633. + return status;
  2634. +
  2635. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_TEMP_TC, 0x01, SAM_EVENT_TEMP_RQID);
  2636. + if (status) {
  2637. + surface_sam_ssh_remove_event_handler(SAM_EVENT_TEMP_RQID);
  2638. + return status;
  2639. + }
  2640. +
  2641. + return 0;
  2642. +}
  2643. +
  2644. +static void san_disable_power_events(void)
  2645. +{
  2646. + surface_sam_ssh_disable_event_source(SAM_EVENT_PWR_TC, 0x01, SAM_EVENT_PWR_RQID);
  2647. + surface_sam_ssh_remove_event_handler(SAM_EVENT_PWR_RQID);
  2648. +}
  2649. +
  2650. +static void san_disable_thermal_events(void)
  2651. +{
  2652. + surface_sam_ssh_disable_event_source(SAM_EVENT_TEMP_TC, 0x01, SAM_EVENT_TEMP_RQID);
  2653. + surface_sam_ssh_remove_event_handler(SAM_EVENT_TEMP_RQID);
  2654. +}
  2655. +
  2656. +
  2657. +static int san_enable_events(struct platform_device *pdev)
  2658. +{
  2659. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2660. + int status;
  2661. +
  2662. + status = san_enable_thermal_events(pdev);
  2663. + if (status)
  2664. + return status;
  2665. +
  2666. + /*
  2667. + * We have to figure out if this device uses SAN or requires a separate
  2668. + * driver for the battery. If it uses the separate driver, that driver
  2669. + * will enable and handle power events.
  2670. + */
  2671. + drvdata->has_power_events = acpi_has_method(NULL, "\\_SB.BAT1._BST");
  2672. + if (drvdata->has_power_events) {
  2673. + status = san_enable_power_events(pdev);
  2674. + if (status)
  2675. + goto err;
  2676. + }
  2677. +
  2678. + return 0;
  2679. +
  2680. +err:
  2681. + san_disable_thermal_events();
  2682. + return status;
  2683. +}
  2684. +
  2685. +static void san_disable_events(struct platform_device *pdev)
  2686. +{
  2687. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2688. +
  2689. + san_disable_thermal_events();
  2690. + if (drvdata->has_power_events)
  2691. + san_disable_power_events();
  2692. +}
  2693. +
  2694. +
  2695. +static int san_consumers_link(struct platform_device *pdev,
  2696. + const struct san_acpi_consumer *cons,
  2697. + struct san_consumers *out)
  2698. +{
  2699. + const struct san_acpi_consumer *con;
  2700. + struct san_consumer_link *links, *link;
  2701. + struct acpi_device *adev;
  2702. + acpi_handle handle;
  2703. + u32 max_links = 0;
  2704. + int status;
  2705. +
  2706. + if (!cons)
  2707. + return 0;
  2708. +
  2709. + // count links
  2710. + for (con = cons; con->path; ++con)
  2711. + max_links += 1;
  2712. +
  2713. + // allocate
  2714. + links = kcalloc(max_links, sizeof(struct san_consumer_link), GFP_KERNEL);
  2715. + link = &links[0];
  2716. +
  2717. + if (!links)
  2718. + return -ENOMEM;
  2719. +
  2720. + // create links
  2721. + for (con = cons; con->path; ++con) {
  2722. + status = acpi_get_handle(NULL, con->path, &handle);
  2723. + if (status) {
  2724. + if (con->required || status != AE_NOT_FOUND) {
  2725. + status = -ENXIO;
  2726. + goto cleanup;
  2727. + } else {
  2728. + continue;
  2729. + }
  2730. + }
  2731. +
  2732. + status = acpi_bus_get_device(handle, &adev);
  2733. + if (status)
  2734. + goto cleanup;
  2735. +
  2736. + link->link = device_link_add(&adev->dev, &pdev->dev, con->flags);
  2737. + if (!(link->link)) {
  2738. + status = -EFAULT;
  2739. + goto cleanup;
  2740. + }
  2741. + link->properties = con;
  2742. +
  2743. + link += 1;
  2744. + }
  2745. +
  2746. + out->num = link - links;
  2747. + out->links = links;
  2748. +
  2749. + return 0;
  2750. +
  2751. +cleanup:
  2752. + for (link = link - 1; link >= links; --link) {
  2753. + if (link->properties->flags & DL_FLAG_STATELESS)
  2754. + device_link_del(link->link);
  2755. + }
  2756. +
  2757. + return status;
  2758. +}
  2759. +
  2760. +static void san_consumers_unlink(struct san_consumers *consumers)
  2761. +{
  2762. + u32 i;
  2763. +
  2764. + if (!consumers)
  2765. + return;
  2766. +
  2767. + for (i = 0; i < consumers->num; ++i) {
  2768. + if (consumers->links[i].properties->flags & DL_FLAG_STATELESS)
  2769. + device_link_del(consumers->links[i].link);
  2770. + }
  2771. +
  2772. + kfree(consumers->links);
  2773. +
  2774. + consumers->num = 0;
  2775. + consumers->links = NULL;
  2776. +}
  2777. +
  2778. +static int surface_sam_san_probe(struct platform_device *pdev)
  2779. +{
  2780. + const struct san_acpi_consumer *cons;
  2781. + struct san_drvdata *drvdata;
  2782. + acpi_handle san = ACPI_HANDLE(&pdev->dev); // _SAN device node
  2783. + int status;
  2784. +
  2785. + /*
  2786. + * Defer probe if the _SSH driver has not set up the controller yet. This
  2787. + * makes sure we do not fail any initial requests (e.g. _STA request without
  2788. + * which the battery does not get set up correctly). Otherwise register as
  2789. + * consumer to set up a device_link.
  2790. + */
  2791. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  2792. + if (status)
  2793. + return status == -ENXIO ? -EPROBE_DEFER : status;
  2794. +
  2795. + drvdata = kzalloc(sizeof(struct san_drvdata), GFP_KERNEL);
  2796. + if (!drvdata)
  2797. + return -ENOMEM;
  2798. +
  2799. + drvdata->opreg_ctx.dev = &pdev->dev;
  2800. +
  2801. + cons = acpi_device_get_match_data(&pdev->dev);
  2802. + status = san_consumers_link(pdev, cons, &drvdata->consumers);
  2803. + if (status)
  2804. + goto err_consumers;
  2805. +
  2806. + platform_set_drvdata(pdev, drvdata);
  2807. +
  2808. + status = acpi_install_address_space_handler(san,
  2809. + ACPI_ADR_SPACE_GSBUS,
  2810. + &san_opreg_handler,
  2811. + NULL, &drvdata->opreg_ctx);
  2812. +
  2813. + if (ACPI_FAILURE(status)) {
  2814. + status = -ENODEV;
  2815. + goto err_install_handler;
  2816. + }
  2817. +
  2818. + status = san_enable_events(pdev);
  2819. + if (status)
  2820. + goto err_enable_events;
  2821. +
  2822. + mutex_lock(&rqsg_if.lock);
  2823. + if (!rqsg_if.san_dev)
  2824. + rqsg_if.san_dev = &pdev->dev;
  2825. + else
  2826. + status = -EBUSY;
  2827. + mutex_unlock(&rqsg_if.lock);
  2828. +
  2829. + if (status)
  2830. + goto err_install_dev;
  2831. +
  2832. + acpi_walk_dep_device_list(san);
  2833. + return 0;
  2834. +
  2835. +err_install_dev:
  2836. + san_disable_events(pdev);
  2837. +err_enable_events:
  2838. + acpi_remove_address_space_handler(san, ACPI_ADR_SPACE_GSBUS, &san_opreg_handler);
  2839. +err_install_handler:
  2840. + platform_set_drvdata(san, NULL);
  2841. + san_consumers_unlink(&drvdata->consumers);
  2842. +err_consumers:
  2843. + kfree(drvdata);
  2844. + return status;
  2845. +}
  2846. +
  2847. +static int surface_sam_san_remove(struct platform_device *pdev)
  2848. +{
  2849. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2850. + acpi_handle san = ACPI_HANDLE(&pdev->dev); // _SAN device node
  2851. + acpi_status status = AE_OK;
  2852. +
  2853. + mutex_lock(&rqsg_if.lock);
  2854. + rqsg_if.san_dev = NULL;
  2855. + mutex_unlock(&rqsg_if.lock);
  2856. +
  2857. + acpi_remove_address_space_handler(san, ACPI_ADR_SPACE_GSBUS, &san_opreg_handler);
  2858. + san_disable_events(pdev);
  2859. +
  2860. + san_consumers_unlink(&drvdata->consumers);
  2861. + kfree(drvdata);
  2862. +
  2863. + platform_set_drvdata(pdev, NULL);
  2864. + return status;
  2865. +}
  2866. +
  2867. +
  2868. +static const struct san_acpi_consumer san_mshw0091_consumers[] = {
  2869. + { "\\_SB.SRTC", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2870. + { "\\ADP1", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2871. + { "\\_SB.BAT1", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2872. + { "\\_SB.BAT2", false, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2873. + { },
  2874. +};
  2875. +
  2876. +static const struct acpi_device_id surface_sam_san_match[] = {
  2877. + { "MSHW0091", (unsigned long) san_mshw0091_consumers },
  2878. + { },
  2879. +};
  2880. +MODULE_DEVICE_TABLE(acpi, surface_sam_san_match);
  2881. +
  2882. +static struct platform_driver surface_sam_san = {
  2883. + .probe = surface_sam_san_probe,
  2884. + .remove = surface_sam_san_remove,
  2885. + .driver = {
  2886. + .name = "surface_sam_san",
  2887. + .acpi_match_table = ACPI_PTR(surface_sam_san_match),
  2888. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  2889. + },
  2890. +};
  2891. +module_platform_driver(surface_sam_san);
  2892. +
  2893. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  2894. +MODULE_DESCRIPTION("Surface ACPI Notify Driver for 5th Generation Surface Devices");
  2895. +MODULE_LICENSE("GPL v2");
  2896. diff --git a/drivers/platform/x86/surface_sam/surface_sam_san.h b/drivers/platform/x86/surface_sam/surface_sam_san.h
  2897. new file mode 100644
  2898. index 000000000000..85b6d6569947
  2899. --- /dev/null
  2900. +++ b/drivers/platform/x86/surface_sam/surface_sam_san.h
  2901. @@ -0,0 +1,30 @@
  2902. +/* SPDX-License-Identifier: GPL-2.0 */
  2903. +/*
  2904. + * Interface for Surface ACPI/Notify (SAN).
  2905. + *
  2906. + * The SAN is the main interface between the Surface Serial Hub (SSH) and the
  2907. + * Surface/System Aggregator Module (SAM). It allows requests to be translated
  2908. + * from ACPI to SSH/SAM. It also interfaces with the discrete GPU hot-plug
  2909. + * driver.
  2910. + */
  2911. +
  2912. +#ifndef _SURFACE_SAM_SAN_H
  2913. +#define _SURFACE_SAM_SAN_H
  2914. +
  2915. +#include <linux/types.h>
  2916. +
  2917. +
  2918. +struct surface_sam_san_rqsg {
  2919. + u8 tc; // target category
  2920. + u8 cid; // command ID
  2921. + u8 iid; // instance ID
  2922. + u8 cdl; // command data length (length of payload)
  2923. + u8 *pld; // pointer to payload of length cdl
  2924. +};
  2925. +
  2926. +typedef int (*surface_sam_san_rqsg_handler_fn)(struct surface_sam_san_rqsg *rqsg, void *data);
  2927. +
  2928. +int surface_sam_san_consumer_register(struct device *consumer, u32 flags);
  2929. +int surface_sam_san_set_rqsg_handler(surface_sam_san_rqsg_handler_fn fn, void *data);
  2930. +
  2931. +#endif /* _SURFACE_SAM_SAN_H */
  2932. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid.c b/drivers/platform/x86/surface_sam/surface_sam_sid.c
  2933. new file mode 100644
  2934. index 000000000000..fb49d0e00808
  2935. --- /dev/null
  2936. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid.c
  2937. @@ -0,0 +1,137 @@
  2938. +// SPDX-License-Identifier: GPL-2.0
  2939. +/*
  2940. + * Surface Integration Driver.
  2941. + * MFD driver to provide device/model dependent functionality.
  2942. + */
  2943. +
  2944. +#include <linux/acpi.h>
  2945. +#include <linux/kernel.h>
  2946. +#include <linux/module.h>
  2947. +#include <linux/platform_device.h>
  2948. +#include <linux/mfd/core.h>
  2949. +
  2950. +
  2951. +static const struct mfd_cell sid_devs_sp4[] = {
  2952. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2953. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  2954. + { },
  2955. +};
  2956. +
  2957. +static const struct mfd_cell sid_devs_sp7[] = {
  2958. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2959. + { .name = "surface_sam_sid_ac", .id = -1 },
  2960. + { .name = "surface_sam_sid_battery", .id = -1 },
  2961. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  2962. + { },
  2963. +};
  2964. +
  2965. +static const struct mfd_cell sid_devs_sb1[] = {
  2966. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2967. + { },
  2968. +};
  2969. +
  2970. +static const struct mfd_cell sid_devs_sb2[] = {
  2971. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2972. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  2973. + { },
  2974. +};
  2975. +
  2976. +static const struct mfd_cell sid_devs_sl1[] = {
  2977. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2978. + { },
  2979. +};
  2980. +
  2981. +static const struct mfd_cell sid_devs_sl2[] = {
  2982. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2983. + { },
  2984. +};
  2985. +
  2986. +static const struct mfd_cell sid_devs_sl3_13[] = {
  2987. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2988. + { .name = "surface_sam_sid_vhf", .id = -1 },
  2989. + { .name = "surface_sam_sid_ac", .id = -1 },
  2990. + { .name = "surface_sam_sid_battery", .id = -1 },
  2991. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  2992. + { },
  2993. +};
  2994. +
  2995. +static const struct mfd_cell sid_devs_sl3_15[] = {
  2996. + { .name = "surface_sam_sid_vhf", .id = -1 },
  2997. + { .name = "surface_sam_sid_ac", .id = -1 },
  2998. + { .name = "surface_sam_sid_battery", .id = -1 },
  2999. + { },
  3000. +};
  3001. +
  3002. +static const struct acpi_device_id surface_sam_sid_match[] = {
  3003. + /* Surface Pro 4, 5, and 6 */
  3004. + { "MSHW0081", (unsigned long)sid_devs_sp4 },
  3005. +
  3006. + /* Surface Pro 7 */
  3007. + { "MSHW0116", (unsigned long)sid_devs_sp7 },
  3008. +
  3009. + /* Surface Book 1 */
  3010. + { "MSHW0080", (unsigned long)sid_devs_sb1 },
  3011. +
  3012. + /* Surface Book 2 */
  3013. + { "MSHW0107", (unsigned long)sid_devs_sb2 },
  3014. +
  3015. + /* Surface Laptop 1 */
  3016. + { "MSHW0086", (unsigned long)sid_devs_sl1 },
  3017. +
  3018. + /* Surface Laptop 2 */
  3019. + { "MSHW0112", (unsigned long)sid_devs_sl2 },
  3020. +
  3021. + /* Surface Laptop 3 (13") */
  3022. + { "MSHW0114", (unsigned long)sid_devs_sl3_13 },
  3023. +
  3024. + /* Surface Laptop 3 (15") */
  3025. + { "MSHW0110", (unsigned long)sid_devs_sl3_15 },
  3026. +
  3027. + { },
  3028. +};
  3029. +MODULE_DEVICE_TABLE(acpi, surface_sam_sid_match);
  3030. +
  3031. +
  3032. +static int surface_sam_sid_probe(struct platform_device *pdev)
  3033. +{
  3034. + const struct acpi_device_id *match;
  3035. + const struct mfd_cell *cells, *p;
  3036. +
  3037. + match = acpi_match_device(surface_sam_sid_match, &pdev->dev);
  3038. + if (!match)
  3039. + return -ENODEV;
  3040. +
  3041. + cells = (struct mfd_cell *)match->driver_data;
  3042. + if (!cells)
  3043. + return -ENODEV;
  3044. +
  3045. + for (p = cells; p->name; ++p) {
  3046. + /* just count */
  3047. + }
  3048. +
  3049. + if (p == cells)
  3050. + return -ENODEV;
  3051. +
  3052. + return mfd_add_devices(&pdev->dev, 0, cells, p - cells, NULL, 0, NULL);
  3053. +}
  3054. +
  3055. +static int surface_sam_sid_remove(struct platform_device *pdev)
  3056. +{
  3057. + mfd_remove_devices(&pdev->dev);
  3058. + return 0;
  3059. +}
  3060. +
  3061. +static struct platform_driver surface_sam_sid = {
  3062. + .probe = surface_sam_sid_probe,
  3063. + .remove = surface_sam_sid_remove,
  3064. + .driver = {
  3065. + .name = "surface_sam_sid",
  3066. + .acpi_match_table = ACPI_PTR(surface_sam_sid_match),
  3067. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3068. + },
  3069. +};
  3070. +module_platform_driver(surface_sam_sid);
  3071. +
  3072. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3073. +MODULE_DESCRIPTION("Surface Integration Driver for 5th Generation Surface Devices");
  3074. +MODULE_LICENSE("GPL v2");
  3075. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c b/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  3076. new file mode 100644
  3077. index 000000000000..286411701d36
  3078. --- /dev/null
  3079. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  3080. @@ -0,0 +1,224 @@
  3081. +// SPDX-License-Identifier: GPL-2.0
  3082. +/*
  3083. + * Surface Lid driver to enable wakeup from suspend via the lid.
  3084. + */
  3085. +
  3086. +#include <linux/acpi.h>
  3087. +#include <linux/dmi.h>
  3088. +#include <linux/kernel.h>
  3089. +#include <linux/module.h>
  3090. +#include <linux/platform_device.h>
  3091. +
  3092. +
  3093. +struct sid_lid_device {
  3094. + const char *acpi_path;
  3095. + const u32 gpe_number;
  3096. +};
  3097. +
  3098. +
  3099. +static const struct sid_lid_device lid_device_l17 = {
  3100. + .acpi_path = "\\_SB.LID0",
  3101. + .gpe_number = 0x17,
  3102. +};
  3103. +
  3104. +static const struct sid_lid_device lid_device_l4D = {
  3105. + .acpi_path = "\\_SB.LID0",
  3106. + .gpe_number = 0x4D,
  3107. +};
  3108. +
  3109. +static const struct sid_lid_device lid_device_l4F = {
  3110. + .acpi_path = "\\_SB.LID0",
  3111. + .gpe_number = 0x4F,
  3112. +};
  3113. +
  3114. +static const struct sid_lid_device lid_device_l57 = {
  3115. + .acpi_path = "\\_SB.LID0",
  3116. + .gpe_number = 0x57,
  3117. +};
  3118. +
  3119. +
  3120. +static const struct dmi_system_id dmi_lid_device_table[] = {
  3121. + {
  3122. + .ident = "Surface Pro 4",
  3123. + .matches = {
  3124. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3125. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 4"),
  3126. + },
  3127. + .driver_data = (void *)&lid_device_l17,
  3128. + },
  3129. + {
  3130. + .ident = "Surface Pro 5",
  3131. + .matches = {
  3132. + /* match for SKU here due to generic product name "Surface Pro" */
  3133. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3134. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1796"),
  3135. + },
  3136. + .driver_data = (void *)&lid_device_l4F,
  3137. + },
  3138. + {
  3139. + .ident = "Surface Pro 5 (LTE)",
  3140. + .matches = {
  3141. + /* match for SKU here due to generic product name "Surface Pro" */
  3142. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3143. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1807"),
  3144. + },
  3145. + .driver_data = (void *)&lid_device_l4F,
  3146. + },
  3147. + {
  3148. + .ident = "Surface Pro 6",
  3149. + .matches = {
  3150. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3151. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 6"),
  3152. + },
  3153. + .driver_data = (void *)&lid_device_l4F,
  3154. + },
  3155. + {
  3156. + .ident = "Surface Pro 7",
  3157. + .matches = {
  3158. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3159. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 7"),
  3160. + },
  3161. + .driver_data = (void *)&lid_device_l4D,
  3162. + },
  3163. + {
  3164. + .ident = "Surface Book 1",
  3165. + .matches = {
  3166. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3167. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book"),
  3168. + },
  3169. + .driver_data = (void *)&lid_device_l17,
  3170. + },
  3171. + {
  3172. + .ident = "Surface Book 2",
  3173. + .matches = {
  3174. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3175. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book 2"),
  3176. + },
  3177. + .driver_data = (void *)&lid_device_l17,
  3178. + },
  3179. + {
  3180. + .ident = "Surface Laptop 1",
  3181. + .matches = {
  3182. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3183. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop"),
  3184. + },
  3185. + .driver_data = (void *)&lid_device_l57,
  3186. + },
  3187. + {
  3188. + .ident = "Surface Laptop 2",
  3189. + .matches = {
  3190. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3191. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop 2"),
  3192. + },
  3193. + .driver_data = (void *)&lid_device_l57,
  3194. + },
  3195. + {
  3196. + .ident = "Surface Laptop 3 (13\")",
  3197. + .matches = {
  3198. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3199. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Laptop_3_1867:1868"),
  3200. + },
  3201. + .driver_data = (void *)&lid_device_l4D,
  3202. + },
  3203. + { }
  3204. +};
  3205. +
  3206. +
  3207. +static int sid_lid_enable_wakeup(const struct sid_lid_device *dev, bool enable)
  3208. +{
  3209. + int action = enable ? ACPI_GPE_ENABLE : ACPI_GPE_DISABLE;
  3210. + int status;
  3211. +
  3212. + status = acpi_set_gpe_wake_mask(NULL, dev->gpe_number, action);
  3213. + if (status)
  3214. + return -EFAULT;
  3215. +
  3216. + return 0;
  3217. +}
  3218. +
  3219. +
  3220. +static int surface_sam_sid_gpelid_suspend(struct device *dev)
  3221. +{
  3222. + const struct sid_lid_device *ldev;
  3223. +
  3224. + ldev = dev_get_drvdata(dev);
  3225. + return sid_lid_enable_wakeup(ldev, true);
  3226. +}
  3227. +
  3228. +static int surface_sam_sid_gpelid_resume(struct device *dev)
  3229. +{
  3230. + const struct sid_lid_device *ldev;
  3231. +
  3232. + ldev = dev_get_drvdata(dev);
  3233. + return sid_lid_enable_wakeup(ldev, false);
  3234. +}
  3235. +
  3236. +static SIMPLE_DEV_PM_OPS(surface_sam_sid_gpelid_pm,
  3237. + surface_sam_sid_gpelid_suspend,
  3238. + surface_sam_sid_gpelid_resume);
  3239. +
  3240. +
  3241. +static int surface_sam_sid_gpelid_probe(struct platform_device *pdev)
  3242. +{
  3243. + const struct dmi_system_id *match;
  3244. + struct sid_lid_device *dev;
  3245. + acpi_handle lid_handle;
  3246. + int status;
  3247. +
  3248. + match = dmi_first_match(dmi_lid_device_table);
  3249. + if (!match)
  3250. + return -ENODEV;
  3251. +
  3252. + dev = match->driver_data;
  3253. + if (!dev)
  3254. + return -ENODEV;
  3255. +
  3256. + status = acpi_get_handle(NULL, (acpi_string)dev->acpi_path, &lid_handle);
  3257. + if (status)
  3258. + return -EFAULT;
  3259. +
  3260. + status = acpi_setup_gpe_for_wake(lid_handle, NULL, dev->gpe_number);
  3261. + if (status)
  3262. + return -EFAULT;
  3263. +
  3264. + status = acpi_enable_gpe(NULL, dev->gpe_number);
  3265. + if (status)
  3266. + return -EFAULT;
  3267. +
  3268. + status = sid_lid_enable_wakeup(dev, false);
  3269. + if (status) {
  3270. + acpi_disable_gpe(NULL, dev->gpe_number);
  3271. + return status;
  3272. + }
  3273. +
  3274. + platform_set_drvdata(pdev, dev);
  3275. + return 0;
  3276. +}
  3277. +
  3278. +static int surface_sam_sid_gpelid_remove(struct platform_device *pdev)
  3279. +{
  3280. + struct sid_lid_device *dev = platform_get_drvdata(pdev);
  3281. +
  3282. + /* restore default behavior without this module */
  3283. + sid_lid_enable_wakeup(dev, false);
  3284. + acpi_disable_gpe(NULL, dev->gpe_number);
  3285. +
  3286. + platform_set_drvdata(pdev, NULL);
  3287. + return 0;
  3288. +}
  3289. +
  3290. +static struct platform_driver surface_sam_sid_gpelid = {
  3291. + .probe = surface_sam_sid_gpelid_probe,
  3292. + .remove = surface_sam_sid_gpelid_remove,
  3293. + .driver = {
  3294. + .name = "surface_sam_sid_gpelid",
  3295. + .pm = &surface_sam_sid_gpelid_pm,
  3296. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3297. + },
  3298. +};
  3299. +module_platform_driver(surface_sam_sid_gpelid);
  3300. +
  3301. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3302. +MODULE_DESCRIPTION("Surface Lid Driver for 5th Generation Surface Devices");
  3303. +MODULE_LICENSE("GPL v2");
  3304. +MODULE_ALIAS("platform:surface_sam_sid_gpelid");
  3305. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c b/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  3306. new file mode 100644
  3307. index 000000000000..f74e2b51604d
  3308. --- /dev/null
  3309. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  3310. @@ -0,0 +1,216 @@
  3311. +// SPDX-License-Identifier: GPL-2.0
  3312. +/*
  3313. + * Surface Performance Mode Driver.
  3314. + * Allows to change cooling capabilities based on user preference.
  3315. + */
  3316. +
  3317. +#include <asm/unaligned.h>
  3318. +#include <linux/kernel.h>
  3319. +#include <linux/module.h>
  3320. +#include <linux/platform_device.h>
  3321. +
  3322. +#include "surface_sam_ssh.h"
  3323. +
  3324. +
  3325. +#define SID_PARAM_PERM 0644
  3326. +
  3327. +enum sam_perf_mode {
  3328. + SAM_PERF_MODE_NORMAL = 1,
  3329. + SAM_PERF_MODE_BATTERY = 2,
  3330. + SAM_PERF_MODE_PERF1 = 3,
  3331. + SAM_PERF_MODE_PERF2 = 4,
  3332. +
  3333. + __SAM_PERF_MODE__START = 1,
  3334. + __SAM_PERF_MODE__END = 4,
  3335. +};
  3336. +
  3337. +enum sid_param_perf_mode {
  3338. + SID_PARAM_PERF_MODE_AS_IS = 0,
  3339. + SID_PARAM_PERF_MODE_NORMAL = SAM_PERF_MODE_NORMAL,
  3340. + SID_PARAM_PERF_MODE_BATTERY = SAM_PERF_MODE_BATTERY,
  3341. + SID_PARAM_PERF_MODE_PERF1 = SAM_PERF_MODE_PERF1,
  3342. + SID_PARAM_PERF_MODE_PERF2 = SAM_PERF_MODE_PERF2,
  3343. +
  3344. + __SID_PARAM_PERF_MODE__START = 0,
  3345. + __SID_PARAM_PERF_MODE__END = 4,
  3346. +};
  3347. +
  3348. +
  3349. +static int surface_sam_perf_mode_get(void)
  3350. +{
  3351. + u8 result_buf[8] = { 0 };
  3352. + int status;
  3353. +
  3354. + struct surface_sam_ssh_rqst rqst = {
  3355. + .tc = 0x03,
  3356. + .cid = 0x02,
  3357. + .iid = 0x00,
  3358. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  3359. + .snc = 0x01,
  3360. + .cdl = 0x00,
  3361. + .pld = NULL,
  3362. + };
  3363. +
  3364. + struct surface_sam_ssh_buf result = {
  3365. + .cap = ARRAY_SIZE(result_buf),
  3366. + .len = 0,
  3367. + .data = result_buf,
  3368. + };
  3369. +
  3370. + status = surface_sam_ssh_rqst(&rqst, &result);
  3371. + if (status)
  3372. + return status;
  3373. +
  3374. + if (result.len != 8)
  3375. + return -EFAULT;
  3376. +
  3377. + return get_unaligned_le32(&result.data[0]);
  3378. +}
  3379. +
  3380. +static int surface_sam_perf_mode_set(int perf_mode)
  3381. +{
  3382. + u8 payload[4] = { 0 };
  3383. +
  3384. + struct surface_sam_ssh_rqst rqst = {
  3385. + .tc = 0x03,
  3386. + .cid = 0x03,
  3387. + .iid = 0x00,
  3388. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  3389. + .snc = 0x00,
  3390. + .cdl = ARRAY_SIZE(payload),
  3391. + .pld = payload,
  3392. + };
  3393. +
  3394. + if (perf_mode < __SAM_PERF_MODE__START || perf_mode > __SAM_PERF_MODE__END)
  3395. + return -EINVAL;
  3396. +
  3397. + put_unaligned_le32(perf_mode, &rqst.pld[0]);
  3398. + return surface_sam_ssh_rqst(&rqst, NULL);
  3399. +}
  3400. +
  3401. +
  3402. +static int param_perf_mode_set(const char *val, const struct kernel_param *kp)
  3403. +{
  3404. + int perf_mode;
  3405. + int status;
  3406. +
  3407. + status = kstrtoint(val, 0, &perf_mode);
  3408. + if (status)
  3409. + return status;
  3410. +
  3411. + if (perf_mode < __SID_PARAM_PERF_MODE__START || perf_mode > __SID_PARAM_PERF_MODE__END)
  3412. + return -EINVAL;
  3413. +
  3414. + return param_set_int(val, kp);
  3415. +}
  3416. +
  3417. +static const struct kernel_param_ops param_perf_mode_ops = {
  3418. + .set = param_perf_mode_set,
  3419. + .get = param_get_int,
  3420. +};
  3421. +
  3422. +static int param_perf_mode_init = SID_PARAM_PERF_MODE_AS_IS;
  3423. +static int param_perf_mode_exit = SID_PARAM_PERF_MODE_AS_IS;
  3424. +
  3425. +module_param_cb(perf_mode_init, &param_perf_mode_ops, &param_perf_mode_init, SID_PARAM_PERM);
  3426. +module_param_cb(perf_mode_exit, &param_perf_mode_ops, &param_perf_mode_exit, SID_PARAM_PERM);
  3427. +
  3428. +MODULE_PARM_DESC(perf_mode_init, "Performance-mode to be set on module initialization");
  3429. +MODULE_PARM_DESC(perf_mode_exit, "Performance-mode to be set on module exit");
  3430. +
  3431. +
  3432. +static ssize_t perf_mode_show(struct device *dev, struct device_attribute *attr, char *data)
  3433. +{
  3434. + int perf_mode;
  3435. +
  3436. + perf_mode = surface_sam_perf_mode_get();
  3437. + if (perf_mode < 0) {
  3438. + dev_err(dev, "failed to get current performance mode: %d", perf_mode);
  3439. + return -EIO;
  3440. + }
  3441. +
  3442. + return sprintf(data, "%d\n", perf_mode);
  3443. +}
  3444. +
  3445. +static ssize_t perf_mode_store(struct device *dev, struct device_attribute *attr,
  3446. + const char *data, size_t count)
  3447. +{
  3448. + int perf_mode;
  3449. + int status;
  3450. +
  3451. + status = kstrtoint(data, 0, &perf_mode);
  3452. + if (status)
  3453. + return status;
  3454. +
  3455. + status = surface_sam_perf_mode_set(perf_mode);
  3456. + if (status)
  3457. + return status;
  3458. +
  3459. + // TODO: Should we notify ACPI here?
  3460. + //
  3461. + // There is a _DSM call described as
  3462. + // WSID._DSM: Notify DPTF on Slider State change
  3463. + // which calls
  3464. + // ODV3 = ToInteger (Arg3)
  3465. + // Notify(IETM, 0x88)
  3466. + // IETM is an INT3400 Intel Dynamic Power Performance Management
  3467. + // device, part of the DPTF framework. From the corresponding
  3468. + // kernel driver, it looks like event 0x88 is being ignored. Also
  3469. + // it is currently unknown what the consequecnes of setting ODV3
  3470. + // are.
  3471. +
  3472. + return count;
  3473. +}
  3474. +
  3475. +const static DEVICE_ATTR_RW(perf_mode);
  3476. +
  3477. +
  3478. +static int surface_sam_sid_perfmode_probe(struct platform_device *pdev)
  3479. +{
  3480. + int status;
  3481. +
  3482. + // link to ec
  3483. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  3484. + if (status)
  3485. + return status == -ENXIO ? -EPROBE_DEFER : status;
  3486. +
  3487. + // set initial perf_mode
  3488. + if (param_perf_mode_init != SID_PARAM_PERF_MODE_AS_IS) {
  3489. + status = surface_sam_perf_mode_set(param_perf_mode_init);
  3490. + if (status)
  3491. + return status;
  3492. + }
  3493. +
  3494. + // register perf_mode attribute
  3495. + status = sysfs_create_file(&pdev->dev.kobj, &dev_attr_perf_mode.attr);
  3496. + if (status)
  3497. + goto err_sysfs;
  3498. +
  3499. + return 0;
  3500. +
  3501. +err_sysfs:
  3502. + surface_sam_perf_mode_set(param_perf_mode_exit);
  3503. + return status;
  3504. +}
  3505. +
  3506. +static int surface_sam_sid_perfmode_remove(struct platform_device *pdev)
  3507. +{
  3508. + sysfs_remove_file(&pdev->dev.kobj, &dev_attr_perf_mode.attr);
  3509. + surface_sam_perf_mode_set(param_perf_mode_exit);
  3510. + return 0;
  3511. +}
  3512. +
  3513. +static struct platform_driver surface_sam_sid_perfmode = {
  3514. + .probe = surface_sam_sid_perfmode_probe,
  3515. + .remove = surface_sam_sid_perfmode_remove,
  3516. + .driver = {
  3517. + .name = "surface_sam_sid_perfmode",
  3518. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3519. + },
  3520. +};
  3521. +module_platform_driver(surface_sam_sid_perfmode);
  3522. +
  3523. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3524. +MODULE_DESCRIPTION("Surface Performance Mode Driver for 5th Generation Surface Devices");
  3525. +MODULE_LICENSE("GPL v2");
  3526. +MODULE_ALIAS("platform:surface_sam_sid_perfmode");
  3527. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_power.c b/drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  3528. new file mode 100644
  3529. index 000000000000..eb925bdda883
  3530. --- /dev/null
  3531. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  3532. @@ -0,0 +1,1264 @@
  3533. +// SPDX-License-Identifier: GPL-2.0
  3534. +/*
  3535. + * Surface SID Battery/AC Driver.
  3536. + * Provides support for the battery and AC on 7th generation Surface devices.
  3537. + */
  3538. +
  3539. +#include <linux/kernel.h>
  3540. +#include <linux/delay.h>
  3541. +#include <linux/jiffies.h>
  3542. +#include <linux/module.h>
  3543. +#include <linux/platform_device.h>
  3544. +#include <linux/power_supply.h>
  3545. +#include <linux/workqueue.h>
  3546. +
  3547. +#include "surface_sam_ssh.h"
  3548. +
  3549. +#define SPWR_WARN KERN_WARNING KBUILD_MODNAME ": "
  3550. +#define SPWR_DEBUG KERN_DEBUG KBUILD_MODNAME ": "
  3551. +
  3552. +
  3553. +// TODO: check BIX/BST for unknown/unsupported 0xffffffff entries
  3554. +// TODO: DPTF (/SAN notifications)?
  3555. +// TODO: other properties?
  3556. +
  3557. +
  3558. +static unsigned int cache_time = 1000;
  3559. +module_param(cache_time, uint, 0644);
  3560. +MODULE_PARM_DESC(cache_time, "battery state chaching time in milliseconds [default: 1000]");
  3561. +
  3562. +#define SPWR_AC_BAT_UPDATE_DELAY msecs_to_jiffies(5000)
  3563. +
  3564. +
  3565. +/*
  3566. + * SAM Interface.
  3567. + */
  3568. +
  3569. +#define SAM_PWR_TC 0x02
  3570. +#define SAM_PWR_RQID 0x0002
  3571. +
  3572. +#define SAM_RQST_PWR_CID_STA 0x01
  3573. +#define SAM_RQST_PWR_CID_BIX 0x02
  3574. +#define SAM_RQST_PWR_CID_BST 0x03
  3575. +#define SAM_RQST_PWR_CID_BTP 0x04
  3576. +
  3577. +#define SAM_RQST_PWR_CID_PMAX 0x0b
  3578. +#define SAM_RQST_PWR_CID_PSOC 0x0c
  3579. +#define SAM_RQST_PWR_CID_PSRC 0x0d
  3580. +#define SAM_RQST_PWR_CID_CHGI 0x0e
  3581. +#define SAM_RQST_PWR_CID_ARTG 0x0f
  3582. +
  3583. +#define SAM_EVENT_PWR_CID_BIX 0x15
  3584. +#define SAM_EVENT_PWR_CID_BST 0x16
  3585. +#define SAM_EVENT_PWR_CID_ADAPTER 0x17
  3586. +#define SAM_EVENT_PWR_CID_DPTF 0x4f
  3587. +
  3588. +#define SAM_BATTERY_STA_OK 0x0f
  3589. +#define SAM_BATTERY_STA_PRESENT 0x10
  3590. +
  3591. +#define SAM_BATTERY_STATE_DISCHARGING 0x01
  3592. +#define SAM_BATTERY_STATE_CHARGING 0x02
  3593. +#define SAM_BATTERY_STATE_CRITICAL 0x04
  3594. +
  3595. +#define SAM_BATTERY_POWER_UNIT_MA 1
  3596. +
  3597. +
  3598. +/* Equivalent to data returned in ACPI _BIX method */
  3599. +struct spwr_bix {
  3600. + u8 revision;
  3601. + u32 power_unit;
  3602. + u32 design_cap;
  3603. + u32 last_full_charge_cap;
  3604. + u32 technology;
  3605. + u32 design_voltage;
  3606. + u32 design_cap_warn;
  3607. + u32 design_cap_low;
  3608. + u32 cycle_count;
  3609. + u32 measurement_accuracy;
  3610. + u32 max_sampling_time;
  3611. + u32 min_sampling_time;
  3612. + u32 max_avg_interval;
  3613. + u32 min_avg_interval;
  3614. + u32 bat_cap_granularity_1;
  3615. + u32 bat_cap_granularity_2;
  3616. + u8 model[21];
  3617. + u8 serial[11];
  3618. + u8 type[5];
  3619. + u8 oem_info[21];
  3620. +} __packed;
  3621. +
  3622. +/* Equivalent to data returned in ACPI _BST method */
  3623. +struct spwr_bst {
  3624. + u32 state;
  3625. + u32 present_rate;
  3626. + u32 remaining_cap;
  3627. + u32 present_voltage;
  3628. +} __packed;
  3629. +
  3630. +/* DPTF event payload */
  3631. +struct spwr_event_dptf {
  3632. + u32 pmax;
  3633. + u32 _1; /* currently unknown */
  3634. + u32 _2; /* currently unknown */
  3635. +} __packed;
  3636. +
  3637. +
  3638. +/* Get battery status (_STA) */
  3639. +static int sam_psy_get_sta(u8 iid, u32 *sta)
  3640. +{
  3641. + struct surface_sam_ssh_rqst rqst;
  3642. + struct surface_sam_ssh_buf result;
  3643. +
  3644. + rqst.tc = SAM_PWR_TC;
  3645. + rqst.cid = SAM_RQST_PWR_CID_STA;
  3646. + rqst.iid = iid;
  3647. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3648. + rqst.snc = 0x01;
  3649. + rqst.cdl = 0x00;
  3650. + rqst.pld = NULL;
  3651. +
  3652. + result.cap = sizeof(u32);
  3653. + result.len = 0;
  3654. + result.data = (u8 *)sta;
  3655. +
  3656. + return surface_sam_ssh_rqst(&rqst, &result);
  3657. +}
  3658. +
  3659. +/* Get battery static information (_BIX) */
  3660. +static int sam_psy_get_bix(u8 iid, struct spwr_bix *bix)
  3661. +{
  3662. + struct surface_sam_ssh_rqst rqst;
  3663. + struct surface_sam_ssh_buf result;
  3664. +
  3665. + rqst.tc = SAM_PWR_TC;
  3666. + rqst.cid = SAM_RQST_PWR_CID_BIX;
  3667. + rqst.iid = iid;
  3668. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3669. + rqst.snc = 0x01;
  3670. + rqst.cdl = 0x00;
  3671. + rqst.pld = NULL;
  3672. +
  3673. + result.cap = sizeof(struct spwr_bix);
  3674. + result.len = 0;
  3675. + result.data = (u8 *)bix;
  3676. +
  3677. + return surface_sam_ssh_rqst(&rqst, &result);
  3678. +}
  3679. +
  3680. +/* Get battery dynamic information (_BST) */
  3681. +static int sam_psy_get_bst(u8 iid, struct spwr_bst *bst)
  3682. +{
  3683. + struct surface_sam_ssh_rqst rqst;
  3684. + struct surface_sam_ssh_buf result;
  3685. +
  3686. + rqst.tc = SAM_PWR_TC;
  3687. + rqst.cid = SAM_RQST_PWR_CID_BST;
  3688. + rqst.iid = iid;
  3689. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3690. + rqst.snc = 0x01;
  3691. + rqst.cdl = 0x00;
  3692. + rqst.pld = NULL;
  3693. +
  3694. + result.cap = sizeof(struct spwr_bst);
  3695. + result.len = 0;
  3696. + result.data = (u8 *)bst;
  3697. +
  3698. + return surface_sam_ssh_rqst(&rqst, &result);
  3699. +}
  3700. +
  3701. +/* Set battery trip point (_BTP) */
  3702. +static int sam_psy_set_btp(u8 iid, u32 btp)
  3703. +{
  3704. + struct surface_sam_ssh_rqst rqst;
  3705. +
  3706. + rqst.tc = SAM_PWR_TC;
  3707. + rqst.cid = SAM_RQST_PWR_CID_BTP;
  3708. + rqst.iid = iid;
  3709. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3710. + rqst.snc = 0x00;
  3711. + rqst.cdl = sizeof(u32);
  3712. + rqst.pld = (u8 *)&btp;
  3713. +
  3714. + return surface_sam_ssh_rqst(&rqst, NULL);
  3715. +}
  3716. +
  3717. +/* Get platform power soruce for battery (DPTF PSRC) */
  3718. +static int sam_psy_get_psrc(u8 iid, u32 *psrc)
  3719. +{
  3720. + struct surface_sam_ssh_rqst rqst;
  3721. + struct surface_sam_ssh_buf result;
  3722. +
  3723. + rqst.tc = SAM_PWR_TC;
  3724. + rqst.cid = SAM_RQST_PWR_CID_PSRC;
  3725. + rqst.iid = iid;
  3726. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3727. + rqst.snc = 0x01;
  3728. + rqst.cdl = 0x00;
  3729. + rqst.pld = NULL;
  3730. +
  3731. + result.cap = sizeof(u32);
  3732. + result.len = 0;
  3733. + result.data = (u8 *)psrc;
  3734. +
  3735. + return surface_sam_ssh_rqst(&rqst, &result);
  3736. +}
  3737. +
  3738. +/* Get maximum platform power for battery (DPTF PMAX) */
  3739. +__always_unused
  3740. +static int sam_psy_get_pmax(u8 iid, u32 *pmax)
  3741. +{
  3742. + struct surface_sam_ssh_rqst rqst;
  3743. + struct surface_sam_ssh_buf result;
  3744. +
  3745. + rqst.tc = SAM_PWR_TC;
  3746. + rqst.cid = SAM_RQST_PWR_CID_PMAX;
  3747. + rqst.iid = iid;
  3748. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3749. + rqst.snc = 0x01;
  3750. + rqst.cdl = 0x00;
  3751. + rqst.pld = NULL;
  3752. +
  3753. + result.cap = sizeof(u32);
  3754. + result.len = 0;
  3755. + result.data = (u8 *)pmax;
  3756. +
  3757. + return surface_sam_ssh_rqst(&rqst, &result);
  3758. +}
  3759. +
  3760. +/* Get adapter rating (DPTF ARTG) */
  3761. +__always_unused
  3762. +static int sam_psy_get_artg(u8 iid, u32 *artg)
  3763. +{
  3764. + struct surface_sam_ssh_rqst rqst;
  3765. + struct surface_sam_ssh_buf result;
  3766. +
  3767. + rqst.tc = SAM_PWR_TC;
  3768. + rqst.cid = SAM_RQST_PWR_CID_ARTG;
  3769. + rqst.iid = iid;
  3770. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3771. + rqst.snc = 0x01;
  3772. + rqst.cdl = 0x00;
  3773. + rqst.pld = NULL;
  3774. +
  3775. + result.cap = sizeof(u32);
  3776. + result.len = 0;
  3777. + result.data = (u8 *)artg;
  3778. +
  3779. + return surface_sam_ssh_rqst(&rqst, &result);
  3780. +}
  3781. +
  3782. +/* Unknown (DPTF PSOC) */
  3783. +__always_unused
  3784. +static int sam_psy_get_psoc(u8 iid, u32 *psoc)
  3785. +{
  3786. + struct surface_sam_ssh_rqst rqst;
  3787. + struct surface_sam_ssh_buf result;
  3788. +
  3789. + rqst.tc = SAM_PWR_TC;
  3790. + rqst.cid = SAM_RQST_PWR_CID_PSOC;
  3791. + rqst.iid = iid;
  3792. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3793. + rqst.snc = 0x01;
  3794. + rqst.cdl = 0x00;
  3795. + rqst.pld = NULL;
  3796. +
  3797. + result.cap = sizeof(u32);
  3798. + result.len = 0;
  3799. + result.data = (u8 *)psoc;
  3800. +
  3801. + return surface_sam_ssh_rqst(&rqst, &result);
  3802. +}
  3803. +
  3804. +/* Unknown (DPTF CHGI/ INT3403 SPPC) */
  3805. +__always_unused
  3806. +static int sam_psy_set_chgi(u8 iid, u32 chgi)
  3807. +{
  3808. + struct surface_sam_ssh_rqst rqst;
  3809. +
  3810. + rqst.tc = SAM_PWR_TC;
  3811. + rqst.cid = SAM_RQST_PWR_CID_CHGI;
  3812. + rqst.iid = iid;
  3813. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3814. + rqst.snc = 0x00;
  3815. + rqst.cdl = sizeof(u32);
  3816. + rqst.pld = (u8 *)&chgi;
  3817. +
  3818. + return surface_sam_ssh_rqst(&rqst, NULL);
  3819. +}
  3820. +
  3821. +
  3822. +/*
  3823. + * Common Power-Subsystem Interface.
  3824. + */
  3825. +
  3826. +enum spwr_battery_id {
  3827. + SPWR_BAT1,
  3828. + SPWR_BAT2,
  3829. + __SPWR_NUM_BAT,
  3830. +};
  3831. +#define SPWR_BAT_SINGLE PLATFORM_DEVID_NONE
  3832. +
  3833. +struct spwr_battery_device {
  3834. + struct platform_device *pdev;
  3835. + enum spwr_battery_id id;
  3836. +
  3837. + char name[32];
  3838. + struct power_supply *psy;
  3839. + struct power_supply_desc psy_desc;
  3840. +
  3841. + struct delayed_work update_work;
  3842. +
  3843. + struct mutex lock;
  3844. + unsigned long timestamp;
  3845. +
  3846. + u32 sta;
  3847. + struct spwr_bix bix;
  3848. + struct spwr_bst bst;
  3849. + u32 alarm;
  3850. +};
  3851. +
  3852. +struct spwr_ac_device {
  3853. + struct platform_device *pdev;
  3854. +
  3855. + char name[32];
  3856. + struct power_supply *psy;
  3857. + struct power_supply_desc psy_desc;
  3858. +
  3859. + struct mutex lock;
  3860. +
  3861. + u32 state;
  3862. +};
  3863. +
  3864. +struct spwr_subsystem {
  3865. + struct mutex lock;
  3866. +
  3867. + unsigned int refcount;
  3868. + struct spwr_ac_device *ac;
  3869. + struct spwr_battery_device *battery[__SPWR_NUM_BAT];
  3870. +};
  3871. +
  3872. +static struct spwr_subsystem spwr_subsystem = {
  3873. + .lock = __MUTEX_INITIALIZER(spwr_subsystem.lock),
  3874. +};
  3875. +
  3876. +static enum power_supply_property spwr_ac_props[] = {
  3877. + POWER_SUPPLY_PROP_ONLINE,
  3878. +};
  3879. +
  3880. +static enum power_supply_property spwr_battery_props_chg[] = {
  3881. + POWER_SUPPLY_PROP_STATUS,
  3882. + POWER_SUPPLY_PROP_PRESENT,
  3883. + POWER_SUPPLY_PROP_TECHNOLOGY,
  3884. + POWER_SUPPLY_PROP_CYCLE_COUNT,
  3885. + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  3886. + POWER_SUPPLY_PROP_VOLTAGE_NOW,
  3887. + POWER_SUPPLY_PROP_CURRENT_NOW,
  3888. + POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
  3889. + POWER_SUPPLY_PROP_CHARGE_FULL,
  3890. + POWER_SUPPLY_PROP_CHARGE_NOW,
  3891. + POWER_SUPPLY_PROP_CAPACITY,
  3892. + POWER_SUPPLY_PROP_CAPACITY_LEVEL,
  3893. + POWER_SUPPLY_PROP_MODEL_NAME,
  3894. + POWER_SUPPLY_PROP_MANUFACTURER,
  3895. + POWER_SUPPLY_PROP_SERIAL_NUMBER,
  3896. +};
  3897. +
  3898. +static enum power_supply_property spwr_battery_props_eng[] = {
  3899. + POWER_SUPPLY_PROP_STATUS,
  3900. + POWER_SUPPLY_PROP_PRESENT,
  3901. + POWER_SUPPLY_PROP_TECHNOLOGY,
  3902. + POWER_SUPPLY_PROP_CYCLE_COUNT,
  3903. + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  3904. + POWER_SUPPLY_PROP_VOLTAGE_NOW,
  3905. + POWER_SUPPLY_PROP_POWER_NOW,
  3906. + POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN,
  3907. + POWER_SUPPLY_PROP_ENERGY_FULL,
  3908. + POWER_SUPPLY_PROP_ENERGY_NOW,
  3909. + POWER_SUPPLY_PROP_CAPACITY,
  3910. + POWER_SUPPLY_PROP_CAPACITY_LEVEL,
  3911. + POWER_SUPPLY_PROP_MODEL_NAME,
  3912. + POWER_SUPPLY_PROP_MANUFACTURER,
  3913. + POWER_SUPPLY_PROP_SERIAL_NUMBER,
  3914. +};
  3915. +
  3916. +
  3917. +static int spwr_battery_register(struct spwr_battery_device *bat, struct platform_device *pdev,
  3918. + enum spwr_battery_id id);
  3919. +
  3920. +static int spwr_battery_unregister(struct spwr_battery_device *bat);
  3921. +
  3922. +
  3923. +static inline bool spwr_battery_present(struct spwr_battery_device *bat)
  3924. +{
  3925. + return bat->sta & SAM_BATTERY_STA_PRESENT;
  3926. +}
  3927. +
  3928. +
  3929. +static inline int spwr_battery_load_sta(struct spwr_battery_device *bat)
  3930. +{
  3931. + return sam_psy_get_sta(bat->id + 1, &bat->sta);
  3932. +}
  3933. +
  3934. +static inline int spwr_battery_load_bix(struct spwr_battery_device *bat)
  3935. +{
  3936. + if (!spwr_battery_present(bat))
  3937. + return 0;
  3938. +
  3939. + return sam_psy_get_bix(bat->id + 1, &bat->bix);
  3940. +}
  3941. +
  3942. +static inline int spwr_battery_load_bst(struct spwr_battery_device *bat)
  3943. +{
  3944. + if (!spwr_battery_present(bat))
  3945. + return 0;
  3946. +
  3947. + return sam_psy_get_bst(bat->id + 1, &bat->bst);
  3948. +}
  3949. +
  3950. +
  3951. +static inline int spwr_battery_set_alarm_unlocked(struct spwr_battery_device *bat, u32 value)
  3952. +{
  3953. + bat->alarm = value;
  3954. + return sam_psy_set_btp(bat->id + 1, bat->alarm);
  3955. +}
  3956. +
  3957. +static inline int spwr_battery_set_alarm(struct spwr_battery_device *bat, u32 value)
  3958. +{
  3959. + int status;
  3960. +
  3961. + mutex_lock(&bat->lock);
  3962. + status = spwr_battery_set_alarm_unlocked(bat, value);
  3963. + mutex_unlock(&bat->lock);
  3964. +
  3965. + return status;
  3966. +}
  3967. +
  3968. +static inline int spwr_battery_update_bst_unlocked(struct spwr_battery_device *bat, bool cached)
  3969. +{
  3970. + unsigned long cache_deadline = bat->timestamp + msecs_to_jiffies(cache_time);
  3971. + int status;
  3972. +
  3973. + if (cached && bat->timestamp && time_is_after_jiffies(cache_deadline))
  3974. + return 0;
  3975. +
  3976. + status = spwr_battery_load_sta(bat);
  3977. + if (status)
  3978. + return status;
  3979. +
  3980. + status = spwr_battery_load_bst(bat);
  3981. + if (status)
  3982. + return status;
  3983. +
  3984. + bat->timestamp = jiffies;
  3985. + return 0;
  3986. +}
  3987. +
  3988. +static int spwr_battery_update_bst(struct spwr_battery_device *bat, bool cached)
  3989. +{
  3990. + int status;
  3991. +
  3992. + mutex_lock(&bat->lock);
  3993. + status = spwr_battery_update_bst_unlocked(bat, cached);
  3994. + mutex_unlock(&bat->lock);
  3995. +
  3996. + return status;
  3997. +}
  3998. +
  3999. +static inline int spwr_battery_update_bix_unlocked(struct spwr_battery_device *bat)
  4000. +{
  4001. + int status;
  4002. +
  4003. + status = spwr_battery_load_sta(bat);
  4004. + if (status)
  4005. + return status;
  4006. +
  4007. + status = spwr_battery_load_bix(bat);
  4008. + if (status)
  4009. + return status;
  4010. +
  4011. + status = spwr_battery_load_bst(bat);
  4012. + if (status)
  4013. + return status;
  4014. +
  4015. + bat->timestamp = jiffies;
  4016. + return 0;
  4017. +}
  4018. +
  4019. +static int spwr_battery_update_bix(struct spwr_battery_device *bat)
  4020. +{
  4021. + int status;
  4022. +
  4023. + mutex_lock(&bat->lock);
  4024. + status = spwr_battery_update_bix_unlocked(bat);
  4025. + mutex_unlock(&bat->lock);
  4026. +
  4027. + return status;
  4028. +}
  4029. +
  4030. +static inline int spwr_ac_update_unlocked(struct spwr_ac_device *ac)
  4031. +{
  4032. + return sam_psy_get_psrc(0x00, &ac->state);
  4033. +}
  4034. +
  4035. +static int spwr_ac_update(struct spwr_ac_device *ac)
  4036. +{
  4037. + int status;
  4038. +
  4039. + mutex_lock(&ac->lock);
  4040. + status = spwr_ac_update_unlocked(ac);
  4041. + mutex_unlock(&ac->lock);
  4042. +
  4043. + return status;
  4044. +}
  4045. +
  4046. +
  4047. +static int spwr_battery_recheck(struct spwr_battery_device *bat)
  4048. +{
  4049. + bool present = spwr_battery_present(bat);
  4050. + u32 unit = bat->bix.power_unit;
  4051. + int status;
  4052. +
  4053. + status = spwr_battery_update_bix(bat);
  4054. + if (status)
  4055. + return status;
  4056. +
  4057. + // if battery has been attached, (re-)initialize alarm
  4058. + if (!present && spwr_battery_present(bat)) {
  4059. + status = spwr_battery_set_alarm(bat, bat->bix.design_cap_warn);
  4060. + if (status)
  4061. + return status;
  4062. + }
  4063. +
  4064. + // if the unit has changed, re-add the battery
  4065. + if (unit != bat->bix.power_unit) {
  4066. + mutex_unlock(&spwr_subsystem.lock);
  4067. +
  4068. + status = spwr_battery_unregister(bat);
  4069. + if (status)
  4070. + return status;
  4071. +
  4072. + status = spwr_battery_register(bat, bat->pdev, bat->id);
  4073. + }
  4074. +
  4075. + return status;
  4076. +}
  4077. +
  4078. +
  4079. +static int spwr_handle_event_bix(struct surface_sam_ssh_event *event)
  4080. +{
  4081. + struct spwr_battery_device *bat;
  4082. + enum spwr_battery_id bat_id = event->iid - 1;
  4083. + int status = 0;
  4084. +
  4085. + if (bat_id < 0 || bat_id >= __SPWR_NUM_BAT) {
  4086. + printk(SPWR_WARN "invalid BIX event iid 0x%02x\n", event->iid);
  4087. + bat_id = SPWR_BAT1;
  4088. + }
  4089. +
  4090. + mutex_lock(&spwr_subsystem.lock);
  4091. + bat = spwr_subsystem.battery[bat_id];
  4092. + if (bat) {
  4093. + status = spwr_battery_recheck(bat);
  4094. + if (!status)
  4095. + power_supply_changed(bat->psy);
  4096. + }
  4097. +
  4098. + mutex_unlock(&spwr_subsystem.lock);
  4099. + return status;
  4100. +}
  4101. +
  4102. +static int spwr_handle_event_bst(struct surface_sam_ssh_event *event)
  4103. +{
  4104. + struct spwr_battery_device *bat;
  4105. + enum spwr_battery_id bat_id = event->iid - 1;
  4106. + int status = 0;
  4107. +
  4108. + if (bat_id < 0 || bat_id >= __SPWR_NUM_BAT) {
  4109. + printk(SPWR_WARN "invalid BST event iid 0x%02x\n", event->iid);
  4110. + bat_id = SPWR_BAT1;
  4111. + }
  4112. +
  4113. + mutex_lock(&spwr_subsystem.lock);
  4114. +
  4115. + bat = spwr_subsystem.battery[bat_id];
  4116. + if (bat) {
  4117. + status = spwr_battery_update_bst(bat, false);
  4118. + if (!status)
  4119. + power_supply_changed(bat->psy);
  4120. + }
  4121. +
  4122. + mutex_unlock(&spwr_subsystem.lock);
  4123. + return status;
  4124. +}
  4125. +
  4126. +static int spwr_handle_event_adapter(struct surface_sam_ssh_event *event)
  4127. +{
  4128. + struct spwr_battery_device *bat1 = NULL;
  4129. + struct spwr_battery_device *bat2 = NULL;
  4130. + struct spwr_ac_device *ac;
  4131. + int status = 0;
  4132. +
  4133. + mutex_lock(&spwr_subsystem.lock);
  4134. +
  4135. + ac = spwr_subsystem.ac;
  4136. + if (ac) {
  4137. + status = spwr_ac_update(ac);
  4138. + if (status)
  4139. + goto out;
  4140. +
  4141. + power_supply_changed(ac->psy);
  4142. + }
  4143. +
  4144. + /*
  4145. + * Handle battery update quirk:
  4146. + * When the battery is fully charged and the adapter is plugged in or
  4147. + * removed, the EC does not send a separate event for the state
  4148. + * (charging/discharging) change. Furthermore it may take some time until
  4149. + * the state is updated on the battery. Schedule an update to solve this.
  4150. + */
  4151. +
  4152. + bat1 = spwr_subsystem.battery[SPWR_BAT1];
  4153. + if (bat1 && bat1->bst.remaining_cap >= bat1->bix.last_full_charge_cap)
  4154. + schedule_delayed_work(&bat1->update_work, SPWR_AC_BAT_UPDATE_DELAY);
  4155. +
  4156. + bat2 = spwr_subsystem.battery[SPWR_BAT2];
  4157. + if (bat2 && bat2->bst.remaining_cap >= bat2->bix.last_full_charge_cap)
  4158. + schedule_delayed_work(&bat2->update_work, SPWR_AC_BAT_UPDATE_DELAY);
  4159. +
  4160. +out:
  4161. + mutex_unlock(&spwr_subsystem.lock);
  4162. + return status;
  4163. +}
  4164. +
  4165. +static int spwr_handle_event_dptf(struct surface_sam_ssh_event *event)
  4166. +{
  4167. + return 0; // TODO: spwr_handle_event_dptf
  4168. +}
  4169. +
  4170. +static int spwr_handle_event(struct surface_sam_ssh_event *event, void *data)
  4171. +{
  4172. + printk(SPWR_DEBUG "power event (cid = 0x%02x)\n", event->cid);
  4173. +
  4174. + switch (event->cid) {
  4175. + case SAM_EVENT_PWR_CID_BIX:
  4176. + return spwr_handle_event_bix(event);
  4177. +
  4178. + case SAM_EVENT_PWR_CID_BST:
  4179. + return spwr_handle_event_bst(event);
  4180. +
  4181. + case SAM_EVENT_PWR_CID_ADAPTER:
  4182. + return spwr_handle_event_adapter(event);
  4183. +
  4184. + case SAM_EVENT_PWR_CID_DPTF:
  4185. + return spwr_handle_event_dptf(event);
  4186. +
  4187. + default:
  4188. + printk(SPWR_WARN "unhandled power event (cid = 0x%02x)\n", event->cid);
  4189. + return 0;
  4190. + }
  4191. +}
  4192. +
  4193. +static void spwr_battery_update_bst_workfn(struct work_struct *work)
  4194. +{
  4195. + struct delayed_work *dwork = to_delayed_work(work);
  4196. + struct spwr_battery_device *bat = container_of(dwork, struct spwr_battery_device, update_work);
  4197. + int status;
  4198. +
  4199. + status = spwr_battery_update_bst(bat, false);
  4200. + if (!status)
  4201. + power_supply_changed(bat->psy);
  4202. +
  4203. + if (status)
  4204. + dev_err(&bat->pdev->dev, "failed to update battery state: %d\n", status);
  4205. +}
  4206. +
  4207. +
  4208. +static inline int spwr_battery_prop_status(struct spwr_battery_device *bat)
  4209. +{
  4210. + if (bat->bst.state & SAM_BATTERY_STATE_DISCHARGING)
  4211. + return POWER_SUPPLY_STATUS_DISCHARGING;
  4212. +
  4213. + if (bat->bst.state & SAM_BATTERY_STATE_CHARGING)
  4214. + return POWER_SUPPLY_STATUS_CHARGING;
  4215. +
  4216. + if (bat->bix.last_full_charge_cap == bat->bst.remaining_cap)
  4217. + return POWER_SUPPLY_STATUS_FULL;
  4218. +
  4219. + if (bat->bst.present_rate == 0)
  4220. + return POWER_SUPPLY_STATUS_NOT_CHARGING;
  4221. +
  4222. + return POWER_SUPPLY_STATUS_UNKNOWN;
  4223. +}
  4224. +
  4225. +static inline int spwr_battery_prop_technology(struct spwr_battery_device *bat)
  4226. +{
  4227. + if (!strcasecmp("NiCd", bat->bix.type))
  4228. + return POWER_SUPPLY_TECHNOLOGY_NiCd;
  4229. +
  4230. + if (!strcasecmp("NiMH", bat->bix.type))
  4231. + return POWER_SUPPLY_TECHNOLOGY_NiMH;
  4232. +
  4233. + if (!strcasecmp("LION", bat->bix.type))
  4234. + return POWER_SUPPLY_TECHNOLOGY_LION;
  4235. +
  4236. + if (!strncasecmp("LI-ION", bat->bix.type, 6))
  4237. + return POWER_SUPPLY_TECHNOLOGY_LION;
  4238. +
  4239. + if (!strcasecmp("LiP", bat->bix.type))
  4240. + return POWER_SUPPLY_TECHNOLOGY_LIPO;
  4241. +
  4242. + return POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
  4243. +}
  4244. +
  4245. +static inline int spwr_battery_prop_capacity(struct spwr_battery_device *bat)
  4246. +{
  4247. + if (bat->bst.remaining_cap && bat->bix.last_full_charge_cap)
  4248. + return bat->bst.remaining_cap * 100 / bat->bix.last_full_charge_cap;
  4249. + else
  4250. + return 0;
  4251. +}
  4252. +
  4253. +static inline int spwr_battery_prop_capacity_level(struct spwr_battery_device *bat)
  4254. +{
  4255. + if (bat->bst.state & SAM_BATTERY_STATE_CRITICAL)
  4256. + return POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
  4257. +
  4258. + if (bat->bst.remaining_cap >= bat->bix.last_full_charge_cap)
  4259. + return POWER_SUPPLY_CAPACITY_LEVEL_FULL;
  4260. +
  4261. + if (bat->bst.remaining_cap <= bat->alarm)
  4262. + return POWER_SUPPLY_CAPACITY_LEVEL_LOW;
  4263. +
  4264. + return POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
  4265. +}
  4266. +
  4267. +static int spwr_ac_get_property(struct power_supply *psy,
  4268. + enum power_supply_property psp,
  4269. + union power_supply_propval *val)
  4270. +{
  4271. + struct spwr_ac_device *ac = power_supply_get_drvdata(psy);
  4272. + int status;
  4273. +
  4274. + mutex_lock(&ac->lock);
  4275. +
  4276. + status = spwr_ac_update_unlocked(ac);
  4277. + if (status)
  4278. + goto out;
  4279. +
  4280. + switch (psp) {
  4281. + case POWER_SUPPLY_PROP_ONLINE:
  4282. + val->intval = ac->state == 1;
  4283. + break;
  4284. +
  4285. + default:
  4286. + status = -EINVAL;
  4287. + goto out;
  4288. + }
  4289. +
  4290. +out:
  4291. + mutex_unlock(&ac->lock);
  4292. + return status;
  4293. +}
  4294. +
  4295. +static int spwr_battery_get_property(struct power_supply *psy,
  4296. + enum power_supply_property psp,
  4297. + union power_supply_propval *val)
  4298. +{
  4299. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4300. + int status;
  4301. +
  4302. + mutex_lock(&bat->lock);
  4303. +
  4304. + status = spwr_battery_update_bst_unlocked(bat, true);
  4305. + if (status)
  4306. + goto out;
  4307. +
  4308. + // abort if battery is not present
  4309. + if (!spwr_battery_present(bat) && psp != POWER_SUPPLY_PROP_PRESENT) {
  4310. + status = -ENODEV;
  4311. + goto out;
  4312. + }
  4313. +
  4314. + switch (psp) {
  4315. + case POWER_SUPPLY_PROP_STATUS:
  4316. + val->intval = spwr_battery_prop_status(bat);
  4317. + break;
  4318. +
  4319. + case POWER_SUPPLY_PROP_PRESENT:
  4320. + val->intval = spwr_battery_present(bat);
  4321. + break;
  4322. +
  4323. + case POWER_SUPPLY_PROP_TECHNOLOGY:
  4324. + val->intval = spwr_battery_prop_technology(bat);
  4325. + break;
  4326. +
  4327. + case POWER_SUPPLY_PROP_CYCLE_COUNT:
  4328. + val->intval = bat->bix.cycle_count;
  4329. + break;
  4330. +
  4331. + case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
  4332. + val->intval = bat->bix.design_voltage * 1000;
  4333. + break;
  4334. +
  4335. + case POWER_SUPPLY_PROP_VOLTAGE_NOW:
  4336. + val->intval = bat->bst.present_voltage * 1000;
  4337. + break;
  4338. +
  4339. + case POWER_SUPPLY_PROP_CURRENT_NOW:
  4340. + case POWER_SUPPLY_PROP_POWER_NOW:
  4341. + val->intval = bat->bst.present_rate * 1000;
  4342. + break;
  4343. +
  4344. + case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
  4345. + case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
  4346. + val->intval = bat->bix.design_cap * 1000;
  4347. + break;
  4348. +
  4349. + case POWER_SUPPLY_PROP_CHARGE_FULL:
  4350. + case POWER_SUPPLY_PROP_ENERGY_FULL:
  4351. + val->intval = bat->bix.last_full_charge_cap * 1000;
  4352. + break;
  4353. +
  4354. + case POWER_SUPPLY_PROP_CHARGE_NOW:
  4355. + case POWER_SUPPLY_PROP_ENERGY_NOW:
  4356. + val->intval = bat->bst.remaining_cap * 1000;
  4357. + break;
  4358. +
  4359. + case POWER_SUPPLY_PROP_CAPACITY:
  4360. + val->intval = spwr_battery_prop_capacity(bat);
  4361. + break;
  4362. +
  4363. + case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
  4364. + val->intval = spwr_battery_prop_capacity_level(bat);
  4365. + break;
  4366. +
  4367. + case POWER_SUPPLY_PROP_MODEL_NAME:
  4368. + val->strval = bat->bix.model;
  4369. + break;
  4370. +
  4371. + case POWER_SUPPLY_PROP_MANUFACTURER:
  4372. + val->strval = bat->bix.oem_info;
  4373. + break;
  4374. +
  4375. + case POWER_SUPPLY_PROP_SERIAL_NUMBER:
  4376. + val->strval = bat->bix.serial;
  4377. + break;
  4378. +
  4379. + default:
  4380. + status = -EINVAL;
  4381. + goto out;
  4382. + }
  4383. +
  4384. +out:
  4385. + mutex_unlock(&bat->lock);
  4386. + return status;
  4387. +}
  4388. +
  4389. +
  4390. +static ssize_t spwr_battery_alarm_show(struct device *dev,
  4391. + struct device_attribute *attr,
  4392. + char *buf)
  4393. +{
  4394. + struct power_supply *psy = dev_get_drvdata(dev);
  4395. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4396. +
  4397. + return sprintf(buf, "%d\n", bat->alarm * 1000);
  4398. +}
  4399. +
  4400. +static ssize_t spwr_battery_alarm_store(struct device *dev,
  4401. + struct device_attribute *attr,
  4402. + const char *buf, size_t count)
  4403. +{
  4404. + struct power_supply *psy = dev_get_drvdata(dev);
  4405. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4406. + unsigned long value;
  4407. + int status;
  4408. +
  4409. + status = kstrtoul(buf, 0, &value);
  4410. + if (status)
  4411. + return status;
  4412. +
  4413. + if (!spwr_battery_present(bat))
  4414. + return -ENODEV;
  4415. +
  4416. + status = spwr_battery_set_alarm(bat, value / 1000);
  4417. + if (status)
  4418. + return status;
  4419. +
  4420. + return count;
  4421. +}
  4422. +
  4423. +static const struct device_attribute alarm_attr = {
  4424. + .attr = {.name = "alarm", .mode = 0644},
  4425. + .show = spwr_battery_alarm_show,
  4426. + .store = spwr_battery_alarm_store,
  4427. +};
  4428. +
  4429. +
  4430. +static int spwr_subsys_init_unlocked(void)
  4431. +{
  4432. + int status;
  4433. +
  4434. + status = surface_sam_ssh_set_event_handler(SAM_PWR_RQID, spwr_handle_event, NULL);
  4435. + if (status)
  4436. + goto err_handler;
  4437. +
  4438. + status = surface_sam_ssh_enable_event_source(SAM_PWR_TC, 0x01, SAM_PWR_RQID);
  4439. + if (status)
  4440. + goto err_source;
  4441. +
  4442. + return 0;
  4443. +
  4444. +err_source:
  4445. + surface_sam_ssh_remove_event_handler(SAM_PWR_RQID);
  4446. +err_handler:
  4447. + return status;
  4448. +}
  4449. +
  4450. +static int spwr_subsys_deinit_unlocked(void)
  4451. +{
  4452. + surface_sam_ssh_disable_event_source(SAM_PWR_TC, 0x01, SAM_PWR_RQID);
  4453. + surface_sam_ssh_remove_event_handler(SAM_PWR_RQID);
  4454. + return 0;
  4455. +}
  4456. +
  4457. +static inline int spwr_subsys_ref_unlocked(void)
  4458. +{
  4459. + int status = 0;
  4460. +
  4461. + if (!spwr_subsystem.refcount)
  4462. + status = spwr_subsys_init_unlocked();
  4463. +
  4464. + spwr_subsystem.refcount += 1;
  4465. + return status;
  4466. +}
  4467. +
  4468. +static inline int spwr_subsys_unref_unlocked(void)
  4469. +{
  4470. + int status = 0;
  4471. +
  4472. + if (spwr_subsystem.refcount)
  4473. + spwr_subsystem.refcount -= 1;
  4474. +
  4475. + if (!spwr_subsystem.refcount)
  4476. + status = spwr_subsys_deinit_unlocked();
  4477. +
  4478. + return status;
  4479. +}
  4480. +
  4481. +
  4482. +static int spwr_ac_register(struct spwr_ac_device *ac, struct platform_device *pdev)
  4483. +{
  4484. + struct power_supply_config psy_cfg = {};
  4485. + u32 sta;
  4486. + int status;
  4487. +
  4488. + // make sure the device is there and functioning properly
  4489. + status = sam_psy_get_sta(0x00, &sta);
  4490. + if (status)
  4491. + return status;
  4492. +
  4493. + if ((sta & SAM_BATTERY_STA_OK) != SAM_BATTERY_STA_OK)
  4494. + return -ENODEV;
  4495. +
  4496. + psy_cfg.drv_data = ac;
  4497. +
  4498. + ac->pdev = pdev;
  4499. + mutex_init(&ac->lock);
  4500. +
  4501. + snprintf(ac->name, ARRAY_SIZE(ac->name), "ADP0");
  4502. +
  4503. + ac->psy_desc.name = ac->name;
  4504. + ac->psy_desc.type = POWER_SUPPLY_TYPE_MAINS;
  4505. + ac->psy_desc.properties = spwr_ac_props;
  4506. + ac->psy_desc.num_properties = ARRAY_SIZE(spwr_ac_props);
  4507. + ac->psy_desc.get_property = spwr_ac_get_property;
  4508. +
  4509. + mutex_lock(&spwr_subsystem.lock);
  4510. + if (spwr_subsystem.ac) {
  4511. + status = -EEXIST;
  4512. + goto err;
  4513. + }
  4514. +
  4515. + status = spwr_subsys_ref_unlocked();
  4516. + if (status)
  4517. + goto err;
  4518. +
  4519. + ac->psy = power_supply_register(&ac->pdev->dev, &ac->psy_desc, &psy_cfg);
  4520. + if (IS_ERR(ac->psy)) {
  4521. + status = PTR_ERR(ac->psy);
  4522. + goto err_unref;
  4523. + }
  4524. +
  4525. + spwr_subsystem.ac = ac;
  4526. + mutex_unlock(&spwr_subsystem.lock);
  4527. + return 0;
  4528. +
  4529. +err_unref:
  4530. + spwr_subsys_unref_unlocked();
  4531. +err:
  4532. + mutex_unlock(&spwr_subsystem.lock);
  4533. + mutex_destroy(&ac->lock);
  4534. + return status;
  4535. +}
  4536. +
  4537. +static int spwr_ac_unregister(struct spwr_ac_device *ac)
  4538. +{
  4539. + int status;
  4540. +
  4541. + mutex_lock(&spwr_subsystem.lock);
  4542. + if (spwr_subsystem.ac != ac) {
  4543. + mutex_unlock(&spwr_subsystem.lock);
  4544. + return -EINVAL;
  4545. + }
  4546. +
  4547. + spwr_subsystem.ac = NULL;
  4548. + power_supply_unregister(ac->psy);
  4549. +
  4550. + status = spwr_subsys_unref_unlocked();
  4551. + mutex_unlock(&spwr_subsystem.lock);
  4552. +
  4553. + mutex_destroy(&ac->lock);
  4554. + return status;
  4555. +}
  4556. +
  4557. +static int spwr_battery_register(struct spwr_battery_device *bat, struct platform_device *pdev,
  4558. + enum spwr_battery_id id)
  4559. +{
  4560. + struct power_supply_config psy_cfg = {};
  4561. + u32 sta;
  4562. + int status;
  4563. +
  4564. + if ((id < 0 || id >= __SPWR_NUM_BAT) && id != SPWR_BAT_SINGLE)
  4565. + return -EINVAL;
  4566. +
  4567. + bat->pdev = pdev;
  4568. + bat->id = id != SPWR_BAT_SINGLE ? id : SPWR_BAT1;
  4569. +
  4570. + // make sure the device is there and functioning properly
  4571. + status = sam_psy_get_sta(bat->id + 1, &sta);
  4572. + if (status)
  4573. + return status;
  4574. +
  4575. + if ((sta & SAM_BATTERY_STA_OK) != SAM_BATTERY_STA_OK)
  4576. + return -ENODEV;
  4577. +
  4578. + status = spwr_battery_update_bix_unlocked(bat);
  4579. + if (status)
  4580. + return status;
  4581. +
  4582. + if (spwr_battery_present(bat)) {
  4583. + status = spwr_battery_set_alarm_unlocked(bat, bat->bix.design_cap_warn);
  4584. + if (status)
  4585. + return status;
  4586. + }
  4587. +
  4588. + snprintf(bat->name, ARRAY_SIZE(bat->name), "BAT%d", bat->id);
  4589. + bat->psy_desc.name = bat->name;
  4590. + bat->psy_desc.type = POWER_SUPPLY_TYPE_BATTERY;
  4591. +
  4592. + if (bat->bix.power_unit == SAM_BATTERY_POWER_UNIT_MA) {
  4593. + bat->psy_desc.properties = spwr_battery_props_chg;
  4594. + bat->psy_desc.num_properties = ARRAY_SIZE(spwr_battery_props_chg);
  4595. + } else {
  4596. + bat->psy_desc.properties = spwr_battery_props_eng;
  4597. + bat->psy_desc.num_properties = ARRAY_SIZE(spwr_battery_props_eng);
  4598. + }
  4599. +
  4600. + bat->psy_desc.get_property = spwr_battery_get_property;
  4601. +
  4602. + mutex_init(&bat->lock);
  4603. + psy_cfg.drv_data = bat;
  4604. +
  4605. + INIT_DELAYED_WORK(&bat->update_work, spwr_battery_update_bst_workfn);
  4606. +
  4607. + mutex_lock(&spwr_subsystem.lock);
  4608. + if (spwr_subsystem.battery[bat->id]) {
  4609. + status = -EEXIST;
  4610. + goto err;
  4611. + }
  4612. +
  4613. + status = spwr_subsys_ref_unlocked();
  4614. + if (status)
  4615. + goto err;
  4616. +
  4617. + bat->psy = power_supply_register(&bat->pdev->dev, &bat->psy_desc, &psy_cfg);
  4618. + if (IS_ERR(bat->psy)) {
  4619. + status = PTR_ERR(bat->psy);
  4620. + goto err_unref;
  4621. + }
  4622. +
  4623. + status = device_create_file(&bat->psy->dev, &alarm_attr);
  4624. + if (status)
  4625. + goto err_dereg;
  4626. +
  4627. + spwr_subsystem.battery[bat->id] = bat;
  4628. + mutex_unlock(&spwr_subsystem.lock);
  4629. + return 0;
  4630. +
  4631. +err_dereg:
  4632. + power_supply_unregister(bat->psy);
  4633. +err_unref:
  4634. + spwr_subsys_unref_unlocked();
  4635. +err:
  4636. + mutex_unlock(&spwr_subsystem.lock);
  4637. + return status;
  4638. +}
  4639. +
  4640. +static int spwr_battery_unregister(struct spwr_battery_device *bat)
  4641. +{
  4642. + int status;
  4643. +
  4644. + if (bat->id < 0 || bat->id >= __SPWR_NUM_BAT)
  4645. + return -EINVAL;
  4646. +
  4647. + mutex_lock(&spwr_subsystem.lock);
  4648. + if (spwr_subsystem.battery[bat->id] != bat) {
  4649. + mutex_unlock(&spwr_subsystem.lock);
  4650. + return -EINVAL;
  4651. + }
  4652. +
  4653. + spwr_subsystem.battery[bat->id] = NULL;
  4654. +
  4655. + status = spwr_subsys_unref_unlocked();
  4656. + mutex_unlock(&spwr_subsystem.lock);
  4657. +
  4658. + cancel_delayed_work_sync(&bat->update_work);
  4659. + device_remove_file(&bat->psy->dev, &alarm_attr);
  4660. + power_supply_unregister(bat->psy);
  4661. +
  4662. + mutex_destroy(&bat->lock);
  4663. + return status;
  4664. +}
  4665. +
  4666. +
  4667. +/*
  4668. + * Battery Driver.
  4669. + */
  4670. +
  4671. +#ifdef CONFIG_PM_SLEEP
  4672. +static int surface_sam_sid_battery_resume(struct device *dev)
  4673. +{
  4674. + struct spwr_battery_device *bat;
  4675. +
  4676. + bat = dev_get_drvdata(dev);
  4677. + return spwr_battery_recheck(bat);
  4678. +}
  4679. +#else
  4680. +#define surface_sam_sid_battery_resume NULL
  4681. +#endif
  4682. +
  4683. +SIMPLE_DEV_PM_OPS(surface_sam_sid_battery_pm, NULL, surface_sam_sid_battery_resume);
  4684. +
  4685. +static int surface_sam_sid_battery_probe(struct platform_device *pdev)
  4686. +{
  4687. + int status;
  4688. + struct spwr_battery_device *bat;
  4689. +
  4690. + // link to ec
  4691. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  4692. + if (status)
  4693. + return status == -ENXIO ? -EPROBE_DEFER : status;
  4694. +
  4695. + bat = devm_kzalloc(&pdev->dev, sizeof(struct spwr_battery_device), GFP_KERNEL);
  4696. + if (!bat)
  4697. + return -ENOMEM;
  4698. +
  4699. + platform_set_drvdata(pdev, bat);
  4700. + return spwr_battery_register(bat, pdev, pdev->id);
  4701. +}
  4702. +
  4703. +static int surface_sam_sid_battery_remove(struct platform_device *pdev)
  4704. +{
  4705. + struct spwr_battery_device *bat;
  4706. +
  4707. + bat = platform_get_drvdata(pdev);
  4708. + return spwr_battery_unregister(bat);
  4709. +}
  4710. +
  4711. +static struct platform_driver surface_sam_sid_battery = {
  4712. + .probe = surface_sam_sid_battery_probe,
  4713. + .remove = surface_sam_sid_battery_remove,
  4714. + .driver = {
  4715. + .name = "surface_sam_sid_battery",
  4716. + .pm = &surface_sam_sid_battery_pm,
  4717. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4718. + },
  4719. +};
  4720. +
  4721. +
  4722. +/*
  4723. + * AC Driver.
  4724. + */
  4725. +
  4726. +static int surface_sam_sid_ac_probe(struct platform_device *pdev)
  4727. +{
  4728. + int status;
  4729. + struct spwr_ac_device *ac;
  4730. +
  4731. + // link to ec
  4732. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  4733. + if (status)
  4734. + return status == -ENXIO ? -EPROBE_DEFER : status;
  4735. +
  4736. + ac = devm_kzalloc(&pdev->dev, sizeof(struct spwr_ac_device), GFP_KERNEL);
  4737. + if (!ac)
  4738. + return -ENOMEM;
  4739. +
  4740. + status = spwr_ac_register(ac, pdev);
  4741. + if (status)
  4742. + return status;
  4743. +
  4744. + platform_set_drvdata(pdev, ac);
  4745. + return 0;
  4746. +}
  4747. +
  4748. +static int surface_sam_sid_ac_remove(struct platform_device *pdev)
  4749. +{
  4750. + struct spwr_ac_device *ac;
  4751. +
  4752. + ac = platform_get_drvdata(pdev);
  4753. + return spwr_ac_unregister(ac);
  4754. +}
  4755. +
  4756. +static struct platform_driver surface_sam_sid_ac = {
  4757. + .probe = surface_sam_sid_ac_probe,
  4758. + .remove = surface_sam_sid_ac_remove,
  4759. + .driver = {
  4760. + .name = "surface_sam_sid_ac",
  4761. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4762. + },
  4763. +};
  4764. +
  4765. +
  4766. +static int __init surface_sam_sid_power_init(void)
  4767. +{
  4768. + int status;
  4769. +
  4770. + status = platform_driver_register(&surface_sam_sid_battery);
  4771. + if (status)
  4772. + return status;
  4773. +
  4774. + status = platform_driver_register(&surface_sam_sid_ac);
  4775. + if (status) {
  4776. + platform_driver_unregister(&surface_sam_sid_battery);
  4777. + return status;
  4778. + }
  4779. +
  4780. + return 0;
  4781. +}
  4782. +
  4783. +static void __exit surface_sam_sid_power_exit(void)
  4784. +{
  4785. + platform_driver_unregister(&surface_sam_sid_battery);
  4786. + platform_driver_unregister(&surface_sam_sid_ac);
  4787. +}
  4788. +
  4789. +module_init(surface_sam_sid_power_init);
  4790. +module_exit(surface_sam_sid_power_exit);
  4791. +
  4792. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  4793. +MODULE_DESCRIPTION("Surface Battery/AC Driver for 7th Generation Surface Devices");
  4794. +MODULE_LICENSE("GPL v2");
  4795. +MODULE_ALIAS("platform:surface_sam_sid_ac");
  4796. +MODULE_ALIAS("platform:surface_sam_sid_battery");
  4797. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c b/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  4798. new file mode 100644
  4799. index 000000000000..9cf912a44171
  4800. --- /dev/null
  4801. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  4802. @@ -0,0 +1,428 @@
  4803. +// SPDX-License-Identifier: GPL-2.0
  4804. +/*
  4805. + * Microsofs Surface HID (VHF) driver for HID input events via SAM.
  4806. + * Used for keyboard input events on the 7th generation Surface Laptops.
  4807. + */
  4808. +
  4809. +#include <linux/acpi.h>
  4810. +#include <linux/hid.h>
  4811. +#include <linux/input.h>
  4812. +#include <linux/platform_device.h>
  4813. +#include <linux/types.h>
  4814. +
  4815. +#include "surface_sam_ssh.h"
  4816. +
  4817. +#define SID_VHF_INPUT_NAME "Microsoft Surface HID"
  4818. +
  4819. +/*
  4820. + * Request ID for VHF events. This value is based on the output of the Surface
  4821. + * EC and should not be changed.
  4822. + */
  4823. +#define SAM_EVENT_SID_VHF_RQID 0x0015
  4824. +#define SAM_EVENT_SID_VHF_TC 0x15
  4825. +
  4826. +#define VHF_HID_STARTED 0
  4827. +
  4828. +struct sid_vhf_evtctx {
  4829. + struct device *dev;
  4830. + struct hid_device *hid;
  4831. + unsigned long flags;
  4832. +};
  4833. +
  4834. +struct sid_vhf_drvdata {
  4835. + struct sid_vhf_evtctx event_ctx;
  4836. +};
  4837. +
  4838. +
  4839. +static int sid_vhf_hid_start(struct hid_device *hid)
  4840. +{
  4841. + hid_dbg(hid, "%s\n", __func__);
  4842. + return 0;
  4843. +}
  4844. +
  4845. +static void sid_vhf_hid_stop(struct hid_device *hid)
  4846. +{
  4847. + hid_dbg(hid, "%s\n", __func__);
  4848. +}
  4849. +
  4850. +static int sid_vhf_hid_open(struct hid_device *hid)
  4851. +{
  4852. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(to_platform_device(hid->dev.parent));
  4853. +
  4854. + hid_dbg(hid, "%s\n", __func__);
  4855. +
  4856. + set_bit(VHF_HID_STARTED, &drvdata->event_ctx.flags);
  4857. + return 0;
  4858. +}
  4859. +
  4860. +static void sid_vhf_hid_close(struct hid_device *hid)
  4861. +{
  4862. +
  4863. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(to_platform_device(hid->dev.parent));
  4864. +
  4865. + hid_dbg(hid, "%s\n", __func__);
  4866. +
  4867. + clear_bit(VHF_HID_STARTED, &drvdata->event_ctx.flags);
  4868. +}
  4869. +
  4870. +struct surface_sam_sid_vhf_meta_rqst {
  4871. + u8 id;
  4872. + u32 offset;
  4873. + u32 length; // buffer limit on send, length of data received on receive
  4874. + u8 end; // 0x01 if end was reached
  4875. +} __packed;
  4876. +
  4877. +struct vhf_device_metadata_info {
  4878. + u8 len;
  4879. + u8 _2;
  4880. + u8 _3;
  4881. + u8 _4;
  4882. + u8 _5;
  4883. + u8 _6;
  4884. + u8 _7;
  4885. + u16 hid_len; // hid descriptor length
  4886. +} __packed;
  4887. +
  4888. +struct vhf_device_metadata {
  4889. + u32 len;
  4890. + u16 vendor_id;
  4891. + u16 product_id;
  4892. + u8 _1[24];
  4893. +} __packed;
  4894. +
  4895. +union vhf_buffer_data {
  4896. + struct vhf_device_metadata_info info;
  4897. + u8 pld[0x76];
  4898. + struct vhf_device_metadata meta;
  4899. +};
  4900. +
  4901. +struct surface_sam_sid_vhf_meta_resp {
  4902. + struct surface_sam_sid_vhf_meta_rqst rqst;
  4903. + union vhf_buffer_data data;
  4904. +} __packed;
  4905. +
  4906. +
  4907. +static int vhf_get_metadata(u8 iid, struct vhf_device_metadata *meta)
  4908. +{
  4909. + int status;
  4910. +
  4911. + struct surface_sam_sid_vhf_meta_resp resp = {
  4912. + .rqst = {
  4913. + .id = 2,
  4914. + .offset = 0,
  4915. + .length = 0x76,
  4916. + .end = 0
  4917. + }
  4918. + };
  4919. +
  4920. + struct surface_sam_ssh_rqst rqst = {
  4921. + .tc = 0x15,
  4922. + .cid = 0x04,
  4923. + .iid = iid,
  4924. + .pri = 0x02,
  4925. + .snc = 0x01,
  4926. + .cdl = sizeof(struct surface_sam_sid_vhf_meta_rqst),
  4927. + .pld = (u8 *)&resp.rqst,
  4928. + };
  4929. +
  4930. + struct surface_sam_ssh_buf result = {
  4931. + .cap = sizeof(struct surface_sam_sid_vhf_meta_resp),
  4932. + .len = 0,
  4933. + .data = (u8 *)&resp,
  4934. + };
  4935. +
  4936. + status = surface_sam_ssh_rqst(&rqst, &result);
  4937. + if (status)
  4938. + return status;
  4939. +
  4940. + *meta = resp.data.meta;
  4941. +
  4942. + return 0;
  4943. +}
  4944. +
  4945. +static int vhf_get_hid_descriptor(struct hid_device *hid, u8 iid, u8 **desc, int *size)
  4946. +{
  4947. + int status, len;
  4948. + u8 *buf;
  4949. +
  4950. + struct surface_sam_sid_vhf_meta_resp resp = {
  4951. + .rqst = {
  4952. + .id = 0,
  4953. + .offset = 0,
  4954. + .length = 0x76,
  4955. + .end = 0,
  4956. + }
  4957. + };
  4958. +
  4959. + struct surface_sam_ssh_rqst rqst = {
  4960. + .tc = 0x15,
  4961. + .cid = 0x04,
  4962. + .iid = iid,
  4963. + .pri = 0x02,
  4964. + .snc = 0x01,
  4965. + .cdl = sizeof(struct surface_sam_sid_vhf_meta_rqst),
  4966. + .pld = (u8 *)&resp.rqst,
  4967. + };
  4968. +
  4969. + struct surface_sam_ssh_buf result = {
  4970. + .cap = sizeof(struct surface_sam_sid_vhf_meta_resp),
  4971. + .len = 0,
  4972. + .data = (u8 *)&resp,
  4973. + };
  4974. +
  4975. + // first fetch 00 to get the total length
  4976. + status = surface_sam_ssh_rqst(&rqst, &result);
  4977. + if (status)
  4978. + return status;
  4979. +
  4980. + len = resp.data.info.hid_len;
  4981. +
  4982. + // allocate a buffer for the descriptor
  4983. + buf = kzalloc(len, GFP_KERNEL);
  4984. +
  4985. + // then, iterate and write into buffer, copying out bytes
  4986. + resp.rqst.id = 1;
  4987. + resp.rqst.offset = 0;
  4988. + resp.rqst.length = 0x76;
  4989. + resp.rqst.end = 0;
  4990. +
  4991. + while (!resp.rqst.end && resp.rqst.offset < len) {
  4992. + status = surface_sam_ssh_rqst(&rqst, &result);
  4993. + if (status) {
  4994. + kfree(buf);
  4995. + return status;
  4996. + }
  4997. + memcpy(buf + resp.rqst.offset, resp.data.pld, resp.rqst.length);
  4998. +
  4999. + resp.rqst.offset += resp.rqst.length;
  5000. + }
  5001. +
  5002. + *desc = buf;
  5003. + *size = len;
  5004. +
  5005. + return 0;
  5006. +}
  5007. +
  5008. +static int sid_vhf_hid_parse(struct hid_device *hid)
  5009. +{
  5010. + int ret = 0, size;
  5011. + u8 *buf;
  5012. +
  5013. + ret = vhf_get_hid_descriptor(hid, 0x00, &buf, &size);
  5014. + if (ret != 0) {
  5015. + hid_err(hid, "Failed to read HID descriptor from device: %d\n", ret);
  5016. + return -EIO;
  5017. + }
  5018. + hid_dbg(hid, "HID descriptor of device:");
  5019. + print_hex_dump_debug("descriptor:", DUMP_PREFIX_OFFSET, 16, 1, buf, size, false);
  5020. +
  5021. + ret = hid_parse_report(hid, buf, size);
  5022. + kfree(buf);
  5023. + return ret;
  5024. +
  5025. +}
  5026. +
  5027. +static int sid_vhf_hid_raw_request(struct hid_device *hid, unsigned char
  5028. + reportnum, u8 *buf, size_t len, unsigned char rtype, int
  5029. + reqtype)
  5030. +{
  5031. + int status;
  5032. + u8 cid;
  5033. + struct surface_sam_ssh_rqst rqst = {};
  5034. + struct surface_sam_ssh_buf result = {};
  5035. +
  5036. + hid_dbg(hid, "%s: reportnum=%#04x rtype=%i reqtype=%i\n", __func__, reportnum, rtype, reqtype);
  5037. + print_hex_dump_debug("report:", DUMP_PREFIX_OFFSET, 16, 1, buf, len, false);
  5038. +
  5039. + // Byte 0 is the report number. Report data starts at byte 1.
  5040. + buf[0] = reportnum;
  5041. +
  5042. + switch (rtype) {
  5043. + case HID_OUTPUT_REPORT:
  5044. + cid = 0x01;
  5045. + break;
  5046. + case HID_FEATURE_REPORT:
  5047. + switch (reqtype) {
  5048. + case HID_REQ_GET_REPORT:
  5049. + // The EC doesn't respond to GET FEATURE for these touchpad reports
  5050. + // we immediately discard to avoid waiting for a timeout.
  5051. + if (reportnum == 6 || reportnum == 7 || reportnum == 8 || reportnum == 9 || reportnum == 0x0b) {
  5052. + hid_dbg(hid, "%s: skipping get feature report for 0x%02x\n", __func__, reportnum);
  5053. + return 0;
  5054. + }
  5055. +
  5056. + cid = 0x02;
  5057. + break;
  5058. + case HID_REQ_SET_REPORT:
  5059. + cid = 0x03;
  5060. + break;
  5061. + default:
  5062. + hid_err(hid, "%s: unknown req type 0x%02x\n", __func__, rtype);
  5063. + return -EIO;
  5064. + }
  5065. + break;
  5066. + default:
  5067. + hid_err(hid, "%s: unknown report type 0x%02x\n", __func__, reportnum);
  5068. + return -EIO;
  5069. + }
  5070. +
  5071. + rqst.tc = SAM_EVENT_SID_VHF_TC;
  5072. + rqst.pri = SURFACE_SAM_PRIORITY_HIGH;
  5073. + rqst.iid = 0x00; // windows tends to distinguish iids, but EC will take it
  5074. + rqst.cid = cid;
  5075. + rqst.snc = reqtype == HID_REQ_GET_REPORT ? 0x01 : 0x00;
  5076. + rqst.cdl = reqtype == HID_REQ_GET_REPORT ? 0x01 : len;
  5077. + rqst.pld = buf;
  5078. +
  5079. + result.cap = len;
  5080. + result.len = 0;
  5081. + result.data = buf;
  5082. +
  5083. + hid_dbg(hid, "%s: sending to cid=%#04x snc=%#04x\n", __func__, cid, HID_REQ_GET_REPORT == reqtype);
  5084. +
  5085. + status = surface_sam_ssh_rqst(&rqst, &result);
  5086. + hid_dbg(hid, "%s: status %i\n", __func__, status);
  5087. +
  5088. + if (status)
  5089. + return status;
  5090. +
  5091. + if (result.len > 0)
  5092. + print_hex_dump_debug("response:", DUMP_PREFIX_OFFSET, 16, 1, result.data, result.len, false);
  5093. +
  5094. + return result.len;
  5095. +}
  5096. +
  5097. +static struct hid_ll_driver sid_vhf_hid_ll_driver = {
  5098. + .start = sid_vhf_hid_start,
  5099. + .stop = sid_vhf_hid_stop,
  5100. + .open = sid_vhf_hid_open,
  5101. + .close = sid_vhf_hid_close,
  5102. + .parse = sid_vhf_hid_parse,
  5103. + .raw_request = sid_vhf_hid_raw_request,
  5104. +};
  5105. +
  5106. +
  5107. +static struct hid_device *sid_vhf_create_hid_device(struct platform_device *pdev, struct vhf_device_metadata *meta)
  5108. +{
  5109. + struct hid_device *hid;
  5110. +
  5111. + hid = hid_allocate_device();
  5112. + if (IS_ERR(hid))
  5113. + return hid;
  5114. +
  5115. + hid->dev.parent = &pdev->dev;
  5116. +
  5117. + hid->bus = BUS_VIRTUAL;
  5118. + hid->vendor = meta->vendor_id;
  5119. + hid->product = meta->product_id;
  5120. +
  5121. + hid->ll_driver = &sid_vhf_hid_ll_driver;
  5122. +
  5123. + sprintf(hid->name, "%s", SID_VHF_INPUT_NAME);
  5124. +
  5125. + return hid;
  5126. +}
  5127. +
  5128. +static int sid_vhf_event_handler(struct surface_sam_ssh_event *event, void *data)
  5129. +{
  5130. + struct sid_vhf_evtctx *ctx = (struct sid_vhf_evtctx *)data;
  5131. +
  5132. + // skip if HID hasn't started yet
  5133. + if (!test_bit(VHF_HID_STARTED, &ctx->flags))
  5134. + return 0;
  5135. +
  5136. + if (event->tc == SAM_EVENT_SID_VHF_TC && (event->cid == 0x00 || event->cid == 0x03 || event->cid == 0x04))
  5137. + return hid_input_report(ctx->hid, HID_INPUT_REPORT, event->pld, event->len, 1);
  5138. +
  5139. + dev_warn(ctx->dev, "unsupported event (tc = %d, cid = %d)\n", event->tc, event->cid);
  5140. + return 0;
  5141. +}
  5142. +
  5143. +static int surface_sam_sid_vhf_probe(struct platform_device *pdev)
  5144. +{
  5145. + struct sid_vhf_drvdata *drvdata;
  5146. + struct vhf_device_metadata meta = {};
  5147. + struct hid_device *hid;
  5148. + int status;
  5149. +
  5150. + // add device link to EC
  5151. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  5152. + if (status)
  5153. + return status == -ENXIO ? -EPROBE_DEFER : status;
  5154. +
  5155. + drvdata = kzalloc(sizeof(struct sid_vhf_drvdata), GFP_KERNEL);
  5156. + if (!drvdata)
  5157. + return -ENOMEM;
  5158. +
  5159. + status = vhf_get_metadata(0x00, &meta);
  5160. + if (status)
  5161. + goto err_create_hid;
  5162. +
  5163. + hid = sid_vhf_create_hid_device(pdev, &meta);
  5164. + if (IS_ERR(hid)) {
  5165. + status = PTR_ERR(hid);
  5166. + goto err_create_hid;
  5167. + }
  5168. +
  5169. + drvdata->event_ctx.dev = &pdev->dev;
  5170. + drvdata->event_ctx.hid = hid;
  5171. +
  5172. + platform_set_drvdata(pdev, drvdata);
  5173. +
  5174. + status = surface_sam_ssh_set_event_handler(
  5175. + SAM_EVENT_SID_VHF_RQID,
  5176. + sid_vhf_event_handler,
  5177. + &drvdata->event_ctx);
  5178. + if (status)
  5179. + goto err_event_handler;
  5180. +
  5181. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5182. + if (status)
  5183. + goto err_event_source;
  5184. +
  5185. + status = hid_add_device(hid);
  5186. + if (status)
  5187. + goto err_add_hid;
  5188. +
  5189. + return 0;
  5190. +
  5191. +err_add_hid:
  5192. + surface_sam_ssh_disable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5193. +err_event_source:
  5194. + surface_sam_ssh_remove_event_handler(SAM_EVENT_SID_VHF_RQID);
  5195. +err_event_handler:
  5196. + hid_destroy_device(hid);
  5197. + platform_set_drvdata(pdev, NULL);
  5198. +err_create_hid:
  5199. + kfree(drvdata);
  5200. + return status;
  5201. +}
  5202. +
  5203. +static int surface_sam_sid_vhf_remove(struct platform_device *pdev)
  5204. +{
  5205. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(pdev);
  5206. +
  5207. + surface_sam_ssh_disable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5208. + surface_sam_ssh_remove_event_handler(SAM_EVENT_SID_VHF_RQID);
  5209. +
  5210. + hid_destroy_device(drvdata->event_ctx.hid);
  5211. + kfree(drvdata);
  5212. +
  5213. + platform_set_drvdata(pdev, NULL);
  5214. + return 0;
  5215. +}
  5216. +
  5217. +static struct platform_driver surface_sam_sid_vhf = {
  5218. + .probe = surface_sam_sid_vhf_probe,
  5219. + .remove = surface_sam_sid_vhf_remove,
  5220. + .driver = {
  5221. + .name = "surface_sam_sid_vhf",
  5222. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  5223. + },
  5224. +};
  5225. +module_platform_driver(surface_sam_sid_vhf);
  5226. +
  5227. +MODULE_AUTHOR("Blaž Hrastnik <blaz@mxxn.io>");
  5228. +MODULE_DESCRIPTION("Driver for HID devices connected via Surface SAM");
  5229. +MODULE_LICENSE("GPL v2");
  5230. +MODULE_ALIAS("platform:surface_sam_sid_vhf");
  5231. diff --git a/drivers/platform/x86/surface_sam/surface_sam_ssh.c b/drivers/platform/x86/surface_sam/surface_sam_ssh.c
  5232. new file mode 100644
  5233. index 000000000000..988be7c2d286
  5234. --- /dev/null
  5235. +++ b/drivers/platform/x86/surface_sam/surface_sam_ssh.c
  5236. @@ -0,0 +1,1744 @@
  5237. +// SPDX-License-Identifier: GPL-2.0
  5238. +/*
  5239. + * Surface Serial Hub (SSH) driver for communication with the Surface/System
  5240. + * Aggregator Module.
  5241. + */
  5242. +
  5243. +#include <asm/unaligned.h>
  5244. +#include <linux/acpi.h>
  5245. +#include <linux/completion.h>
  5246. +#include <linux/crc-ccitt.h>
  5247. +#include <linux/dmaengine.h>
  5248. +#include <linux/gpio/consumer.h>
  5249. +#include <linux/interrupt.h>
  5250. +#include <linux/jiffies.h>
  5251. +#include <linux/kernel.h>
  5252. +#include <linux/kfifo.h>
  5253. +#include <linux/mutex.h>
  5254. +#include <linux/pm.h>
  5255. +#include <linux/refcount.h>
  5256. +#include <linux/serdev.h>
  5257. +#include <linux/spinlock.h>
  5258. +#include <linux/workqueue.h>
  5259. +
  5260. +#include "surface_sam_ssh.h"
  5261. +
  5262. +
  5263. +#define SSH_RQST_TAG_FULL "surface_sam_ssh_rqst: "
  5264. +#define SSH_RQST_TAG "rqst: "
  5265. +#define SSH_EVENT_TAG "event: "
  5266. +#define SSH_RECV_TAG "recv: "
  5267. +
  5268. +#define SSH_SUPPORTED_FLOW_CONTROL_MASK (~((u8) ACPI_UART_FLOW_CONTROL_HW))
  5269. +
  5270. +#define SSH_BYTELEN_SYNC 2
  5271. +#define SSH_BYTELEN_TERM 2
  5272. +#define SSH_BYTELEN_CRC 2
  5273. +#define SSH_BYTELEN_CTRL 4 // command-header, ACK, or RETRY
  5274. +#define SSH_BYTELEN_CMDFRAME 8 // without payload
  5275. +
  5276. +#define SSH_MAX_WRITE ( \
  5277. + SSH_BYTELEN_SYNC \
  5278. + + SSH_BYTELEN_CTRL \
  5279. + + SSH_BYTELEN_CRC \
  5280. + + SSH_BYTELEN_CMDFRAME \
  5281. + + SURFACE_SAM_SSH_MAX_RQST_PAYLOAD \
  5282. + + SSH_BYTELEN_CRC \
  5283. +)
  5284. +
  5285. +#define SSH_MSG_LEN_CTRL ( \
  5286. + SSH_BYTELEN_SYNC \
  5287. + + SSH_BYTELEN_CTRL \
  5288. + + SSH_BYTELEN_CRC \
  5289. + + SSH_BYTELEN_TERM \
  5290. +)
  5291. +
  5292. +#define SSH_MSG_LEN_CMD_BASE ( \
  5293. + SSH_BYTELEN_SYNC \
  5294. + + SSH_BYTELEN_CTRL \
  5295. + + SSH_BYTELEN_CRC \
  5296. + + SSH_BYTELEN_CRC \
  5297. +) // without payload and command-frame
  5298. +
  5299. +#define SSH_WRITE_TIMEOUT msecs_to_jiffies(1000)
  5300. +#define SSH_READ_TIMEOUT msecs_to_jiffies(1000)
  5301. +#define SSH_NUM_RETRY 3
  5302. +
  5303. +#define SSH_WRITE_BUF_LEN SSH_MAX_WRITE
  5304. +#define SSH_READ_BUF_LEN 512 // must be power of 2
  5305. +#define SSH_EVAL_BUF_LEN SSH_MAX_WRITE // also works for reading
  5306. +
  5307. +#define SSH_FRAME_TYPE_CMD_NOACK 0x00 // request/event that does not to be ACKed
  5308. +#define SSH_FRAME_TYPE_CMD 0x80 // request/event
  5309. +#define SSH_FRAME_TYPE_ACK 0x40 // ACK for request/event
  5310. +#define SSH_FRAME_TYPE_RETRY 0x04 // error or retry indicator
  5311. +
  5312. +#define SSH_FRAME_OFFS_CTRL SSH_BYTELEN_SYNC
  5313. +#define SSH_FRAME_OFFS_CTRL_CRC (SSH_FRAME_OFFS_CTRL + SSH_BYTELEN_CTRL)
  5314. +#define SSH_FRAME_OFFS_TERM (SSH_FRAME_OFFS_CTRL_CRC + SSH_BYTELEN_CRC)
  5315. +#define SSH_FRAME_OFFS_CMD SSH_FRAME_OFFS_TERM // either TERM or CMD
  5316. +#define SSH_FRAME_OFFS_CMD_PLD (SSH_FRAME_OFFS_CMD + SSH_BYTELEN_CMDFRAME)
  5317. +
  5318. +/*
  5319. + * A note on Request IDs (RQIDs):
  5320. + * 0x0000 is not a valid RQID
  5321. + * 0x0001 is valid, but reserved for Surface Laptop keyboard events
  5322. + */
  5323. +#define SAM_NUM_EVENT_TYPES ((1 << SURFACE_SAM_SSH_RQID_EVENT_BITS) - 1)
  5324. +
  5325. +/*
  5326. + * Sync: aa 55
  5327. + * Terminate: ff ff
  5328. + *
  5329. + * Request Message: sync cmd-hdr crc(cmd-hdr) cmd-rqst-frame crc(cmd-rqst-frame)
  5330. + * Ack Message: sync ack crc(ack) terminate
  5331. + * Retry Message: sync retry crc(retry) terminate
  5332. + * Response Message: sync cmd-hdr crc(cmd-hdr) cmd-resp-frame crc(cmd-resp-frame)
  5333. + *
  5334. + * Command Header: 80 LEN 00 SEQ
  5335. + * Ack: 40 00 00 SEQ
  5336. + * Retry: 04 00 00 00
  5337. + * Command Request Frame: 80 RTC 01 00 RIID RQID RCID PLD
  5338. + * Command Response Frame: 80 RTC 00 01 RIID RQID RCID PLD
  5339. + */
  5340. +
  5341. +struct ssh_frame_ctrl {
  5342. + u8 type;
  5343. + u8 len; // without crc
  5344. + u8 pad;
  5345. + u8 seq;
  5346. +} __packed;
  5347. +
  5348. +struct ssh_frame_cmd {
  5349. + u8 type;
  5350. + u8 tc;
  5351. + u8 pri_out;
  5352. + u8 pri_in;
  5353. + u8 iid;
  5354. + u8 rqid_lo; // id for request/response matching (low byte)
  5355. + u8 rqid_hi; // id for request/response matching (high byte)
  5356. + u8 cid;
  5357. +} __packed;
  5358. +
  5359. +
  5360. +enum ssh_ec_state {
  5361. + SSH_EC_UNINITIALIZED,
  5362. + SSH_EC_INITIALIZED,
  5363. + SSH_EC_SUSPENDED,
  5364. +};
  5365. +
  5366. +struct ssh_counters {
  5367. + u8 seq; // control sequence id
  5368. + u16 rqid; // id for request/response matching
  5369. +};
  5370. +
  5371. +struct ssh_writer {
  5372. + u8 *data;
  5373. + u8 *ptr;
  5374. +} __packed;
  5375. +
  5376. +enum ssh_receiver_state {
  5377. + SSH_RCV_DISCARD,
  5378. + SSH_RCV_CONTROL,
  5379. + SSH_RCV_COMMAND,
  5380. +};
  5381. +
  5382. +struct ssh_receiver {
  5383. + spinlock_t lock;
  5384. + enum ssh_receiver_state state;
  5385. + struct completion signal;
  5386. + struct kfifo fifo;
  5387. + struct {
  5388. + bool pld;
  5389. + u8 seq;
  5390. + u16 rqid;
  5391. + } expect;
  5392. + struct {
  5393. + u16 cap;
  5394. + u16 len;
  5395. + u8 *ptr;
  5396. + } eval_buf;
  5397. +};
  5398. +
  5399. +struct ssh_event_handler {
  5400. + surface_sam_ssh_event_handler_fn handler;
  5401. + surface_sam_ssh_event_handler_delay delay;
  5402. + void *data;
  5403. +};
  5404. +
  5405. +struct ssh_events {
  5406. + spinlock_t lock;
  5407. + struct workqueue_struct *queue_ack;
  5408. + struct workqueue_struct *queue_evt;
  5409. + struct ssh_event_handler handler[SAM_NUM_EVENT_TYPES];
  5410. +};
  5411. +
  5412. +struct sam_ssh_ec {
  5413. + struct mutex lock;
  5414. + enum ssh_ec_state state;
  5415. + struct serdev_device *serdev;
  5416. + struct ssh_counters counter;
  5417. + struct ssh_writer writer;
  5418. + struct ssh_receiver receiver;
  5419. + struct ssh_events events;
  5420. + int irq;
  5421. + bool irq_wakeup_enabled;
  5422. +};
  5423. +
  5424. +struct ssh_fifo_packet {
  5425. + u8 type; // packet type (ACK/RETRY/CMD)
  5426. + u8 seq;
  5427. + u8 len;
  5428. +};
  5429. +
  5430. +struct ssh_event_work {
  5431. + refcount_t refcount;
  5432. + struct sam_ssh_ec *ec;
  5433. + struct work_struct work_ack;
  5434. + struct delayed_work work_evt;
  5435. + struct surface_sam_ssh_event event;
  5436. + u8 seq;
  5437. +};
  5438. +
  5439. +
  5440. +static struct sam_ssh_ec ssh_ec = {
  5441. + .lock = __MUTEX_INITIALIZER(ssh_ec.lock),
  5442. + .state = SSH_EC_UNINITIALIZED,
  5443. + .serdev = NULL,
  5444. + .counter = {
  5445. + .seq = 0,
  5446. + .rqid = 0,
  5447. + },
  5448. + .writer = {
  5449. + .data = NULL,
  5450. + .ptr = NULL,
  5451. + },
  5452. + .receiver = {
  5453. + .lock = __SPIN_LOCK_UNLOCKED(),
  5454. + .state = SSH_RCV_DISCARD,
  5455. + .expect = {},
  5456. + },
  5457. + .events = {
  5458. + .lock = __SPIN_LOCK_UNLOCKED(),
  5459. + .handler = {},
  5460. + },
  5461. + .irq = -1,
  5462. +};
  5463. +
  5464. +
  5465. +static inline struct sam_ssh_ec *surface_sam_ssh_acquire(void)
  5466. +{
  5467. + struct sam_ssh_ec *ec = &ssh_ec;
  5468. +
  5469. + mutex_lock(&ec->lock);
  5470. + return ec;
  5471. +}
  5472. +
  5473. +static inline void surface_sam_ssh_release(struct sam_ssh_ec *ec)
  5474. +{
  5475. + mutex_unlock(&ec->lock);
  5476. +}
  5477. +
  5478. +static inline struct sam_ssh_ec *surface_sam_ssh_acquire_init(void)
  5479. +{
  5480. + struct sam_ssh_ec *ec = surface_sam_ssh_acquire();
  5481. +
  5482. + if (ec->state == SSH_EC_UNINITIALIZED) {
  5483. + surface_sam_ssh_release(ec);
  5484. + return NULL;
  5485. + }
  5486. +
  5487. + return ec;
  5488. +}
  5489. +
  5490. +int surface_sam_ssh_consumer_register(struct device *consumer)
  5491. +{
  5492. + u32 flags = DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER;
  5493. + struct sam_ssh_ec *ec;
  5494. + struct device_link *link;
  5495. +
  5496. + ec = surface_sam_ssh_acquire_init();
  5497. + if (!ec)
  5498. + return -ENXIO;
  5499. +
  5500. + link = device_link_add(consumer, &ec->serdev->dev, flags);
  5501. + if (!link)
  5502. + return -EFAULT;
  5503. +
  5504. + surface_sam_ssh_release(ec);
  5505. + return 0;
  5506. +}
  5507. +EXPORT_SYMBOL_GPL(surface_sam_ssh_consumer_register);
  5508. +
  5509. +
  5510. +static inline u16 sam_rqid_to_rqst(u16 rqid)
  5511. +{
  5512. + return rqid << SURFACE_SAM_SSH_RQID_EVENT_BITS;
  5513. +}
  5514. +
  5515. +static inline bool sam_rqid_is_event(u16 rqid)
  5516. +{
  5517. + const u16 mask = (1 << SURFACE_SAM_SSH_RQID_EVENT_BITS) - 1;
  5518. +
  5519. + return rqid != 0 && (rqid | mask) == mask;
  5520. +}
  5521. +
  5522. +int surface_sam_ssh_enable_event_source(u8 tc, u8 unknown, u16 rqid)
  5523. +{
  5524. + u8 pld[4] = { tc, unknown, rqid & 0xff, rqid >> 8 };
  5525. + u8 buf[1] = { 0x00 };
  5526. +
  5527. + struct surface_sam_ssh_rqst rqst = {
  5528. + .tc = 0x01,
  5529. + .cid = 0x0b,
  5530. + .iid = 0x00,
  5531. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5532. + .snc = 0x01,
  5533. + .cdl = 0x04,
  5534. + .pld = pld,
  5535. + };
  5536. +
  5537. + struct surface_sam_ssh_buf result = {
  5538. + result.cap = ARRAY_SIZE(buf),
  5539. + result.len = 0,
  5540. + result.data = buf,
  5541. + };
  5542. +
  5543. + int status;
  5544. +
  5545. + // only allow RQIDs that lie within event spectrum
  5546. + if (!sam_rqid_is_event(rqid))
  5547. + return -EINVAL;
  5548. +
  5549. + status = surface_sam_ssh_rqst(&rqst, &result);
  5550. +
  5551. + if (buf[0] != 0x00) {
  5552. + pr_warn(SSH_RQST_TAG_FULL
  5553. + "unexpected result while enabling event source: 0x%02x\n",
  5554. + buf[0]);
  5555. + }
  5556. +
  5557. + return status;
  5558. +
  5559. +}
  5560. +EXPORT_SYMBOL_GPL(surface_sam_ssh_enable_event_source);
  5561. +
  5562. +int surface_sam_ssh_disable_event_source(u8 tc, u8 unknown, u16 rqid)
  5563. +{
  5564. + u8 pld[4] = { tc, unknown, rqid & 0xff, rqid >> 8 };
  5565. + u8 buf[1] = { 0x00 };
  5566. +
  5567. + struct surface_sam_ssh_rqst rqst = {
  5568. + .tc = 0x01,
  5569. + .cid = 0x0c,
  5570. + .iid = 0x00,
  5571. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5572. + .snc = 0x01,
  5573. + .cdl = 0x04,
  5574. + .pld = pld,
  5575. + };
  5576. +
  5577. + struct surface_sam_ssh_buf result = {
  5578. + result.cap = ARRAY_SIZE(buf),
  5579. + result.len = 0,
  5580. + result.data = buf,
  5581. + };
  5582. +
  5583. + int status;
  5584. +
  5585. + // only allow RQIDs that lie within event spectrum
  5586. + if (!sam_rqid_is_event(rqid))
  5587. + return -EINVAL;
  5588. +
  5589. + status = surface_sam_ssh_rqst(&rqst, &result);
  5590. +
  5591. + if (buf[0] != 0x00) {
  5592. + pr_warn(SSH_RQST_TAG_FULL
  5593. + "unexpected result while disabling event source: 0x%02x\n",
  5594. + buf[0]);
  5595. + }
  5596. +
  5597. + return status;
  5598. +}
  5599. +EXPORT_SYMBOL_GPL(surface_sam_ssh_disable_event_source);
  5600. +
  5601. +static unsigned long sam_event_default_delay(struct surface_sam_ssh_event *event, void *data)
  5602. +{
  5603. + return event->pri == SURFACE_SAM_PRIORITY_HIGH ? SURFACE_SAM_SSH_EVENT_IMMEDIATE : 0;
  5604. +}
  5605. +
  5606. +int surface_sam_ssh_set_delayed_event_handler(
  5607. + u16 rqid, surface_sam_ssh_event_handler_fn fn,
  5608. + surface_sam_ssh_event_handler_delay delay,
  5609. + void *data)
  5610. +{
  5611. + struct sam_ssh_ec *ec;
  5612. + unsigned long flags;
  5613. +
  5614. + if (!sam_rqid_is_event(rqid))
  5615. + return -EINVAL;
  5616. +
  5617. + ec = surface_sam_ssh_acquire_init();
  5618. + if (!ec)
  5619. + return -ENXIO;
  5620. +
  5621. + if (!delay)
  5622. + delay = sam_event_default_delay;
  5623. +
  5624. + spin_lock_irqsave(&ec->events.lock, flags);
  5625. + // check if we already have a handler
  5626. + if (ec->events.handler[rqid - 1].handler) {
  5627. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5628. + return -EINVAL;
  5629. + }
  5630. +
  5631. + // 0 is not a valid event RQID
  5632. + ec->events.handler[rqid - 1].handler = fn;
  5633. + ec->events.handler[rqid - 1].delay = delay;
  5634. + ec->events.handler[rqid - 1].data = data;
  5635. +
  5636. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5637. + surface_sam_ssh_release(ec);
  5638. +
  5639. + return 0;
  5640. +}
  5641. +EXPORT_SYMBOL_GPL(surface_sam_ssh_set_delayed_event_handler);
  5642. +
  5643. +int surface_sam_ssh_remove_event_handler(u16 rqid)
  5644. +{
  5645. + struct sam_ssh_ec *ec;
  5646. + unsigned long flags;
  5647. +
  5648. + if (!sam_rqid_is_event(rqid))
  5649. + return -EINVAL;
  5650. +
  5651. + ec = surface_sam_ssh_acquire_init();
  5652. + if (!ec)
  5653. + return -ENXIO;
  5654. +
  5655. + spin_lock_irqsave(&ec->events.lock, flags);
  5656. +
  5657. + // 0 is not a valid event RQID
  5658. + ec->events.handler[rqid - 1].handler = NULL;
  5659. + ec->events.handler[rqid - 1].delay = NULL;
  5660. + ec->events.handler[rqid - 1].data = NULL;
  5661. +
  5662. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5663. + surface_sam_ssh_release(ec);
  5664. +
  5665. + /*
  5666. + * Make sure that the handler is not in use any more after we've
  5667. + * removed it.
  5668. + */
  5669. + flush_workqueue(ec->events.queue_evt);
  5670. +
  5671. + return 0;
  5672. +}
  5673. +EXPORT_SYMBOL_GPL(surface_sam_ssh_remove_event_handler);
  5674. +
  5675. +
  5676. +static inline u16 ssh_crc(const u8 *buf, size_t size)
  5677. +{
  5678. + return crc_ccitt_false(0xffff, buf, size);
  5679. +}
  5680. +
  5681. +static inline void ssh_write_u16(struct ssh_writer *writer, u16 in)
  5682. +{
  5683. + put_unaligned_le16(in, writer->ptr);
  5684. + writer->ptr += 2;
  5685. +}
  5686. +
  5687. +static inline void ssh_write_crc(struct ssh_writer *writer,
  5688. + const u8 *buf, size_t size)
  5689. +{
  5690. + ssh_write_u16(writer, ssh_crc(buf, size));
  5691. +}
  5692. +
  5693. +static inline void ssh_write_syn(struct ssh_writer *writer)
  5694. +{
  5695. + u8 *w = writer->ptr;
  5696. +
  5697. + *w++ = 0xaa;
  5698. + *w++ = 0x55;
  5699. +
  5700. + writer->ptr = w;
  5701. +}
  5702. +
  5703. +static inline void ssh_write_ter(struct ssh_writer *writer)
  5704. +{
  5705. + u8 *w = writer->ptr;
  5706. +
  5707. + *w++ = 0xff;
  5708. + *w++ = 0xff;
  5709. +
  5710. + writer->ptr = w;
  5711. +}
  5712. +
  5713. +static inline void ssh_write_buf(struct ssh_writer *writer,
  5714. + u8 *in, size_t len)
  5715. +{
  5716. + writer->ptr = memcpy(writer->ptr, in, len) + len;
  5717. +}
  5718. +
  5719. +static inline void ssh_write_hdr(struct ssh_writer *writer,
  5720. + const struct surface_sam_ssh_rqst *rqst,
  5721. + struct sam_ssh_ec *ec)
  5722. +{
  5723. + struct ssh_frame_ctrl *hdr = (struct ssh_frame_ctrl *)writer->ptr;
  5724. + u8 *begin = writer->ptr;
  5725. +
  5726. + hdr->type = SSH_FRAME_TYPE_CMD;
  5727. + hdr->len = SSH_BYTELEN_CMDFRAME + rqst->cdl; // without CRC
  5728. + hdr->pad = 0x00;
  5729. + hdr->seq = ec->counter.seq;
  5730. +
  5731. + writer->ptr += sizeof(*hdr);
  5732. +
  5733. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5734. +}
  5735. +
  5736. +static inline void ssh_write_cmd(struct ssh_writer *writer,
  5737. + const struct surface_sam_ssh_rqst *rqst,
  5738. + struct sam_ssh_ec *ec)
  5739. +{
  5740. + struct ssh_frame_cmd *cmd = (struct ssh_frame_cmd *)writer->ptr;
  5741. + u8 *begin = writer->ptr;
  5742. +
  5743. + u16 rqid = sam_rqid_to_rqst(ec->counter.rqid);
  5744. + u8 rqid_lo = rqid & 0xFF;
  5745. + u8 rqid_hi = rqid >> 8;
  5746. +
  5747. + cmd->type = SSH_FRAME_TYPE_CMD;
  5748. + cmd->tc = rqst->tc;
  5749. + cmd->pri_out = rqst->pri;
  5750. + cmd->pri_in = 0x00;
  5751. + cmd->iid = rqst->iid;
  5752. + cmd->rqid_lo = rqid_lo;
  5753. + cmd->rqid_hi = rqid_hi;
  5754. + cmd->cid = rqst->cid;
  5755. +
  5756. + writer->ptr += sizeof(*cmd);
  5757. +
  5758. + ssh_write_buf(writer, rqst->pld, rqst->cdl);
  5759. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5760. +}
  5761. +
  5762. +static inline void ssh_write_ack(struct ssh_writer *writer, u8 seq)
  5763. +{
  5764. + struct ssh_frame_ctrl *ack = (struct ssh_frame_ctrl *)writer->ptr;
  5765. + u8 *begin = writer->ptr;
  5766. +
  5767. + ack->type = SSH_FRAME_TYPE_ACK;
  5768. + ack->len = 0x00;
  5769. + ack->pad = 0x00;
  5770. + ack->seq = seq;
  5771. +
  5772. + writer->ptr += sizeof(*ack);
  5773. +
  5774. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5775. +}
  5776. +
  5777. +static inline void ssh_writer_reset(struct ssh_writer *writer)
  5778. +{
  5779. + writer->ptr = writer->data;
  5780. +}
  5781. +
  5782. +static inline int ssh_writer_flush(struct sam_ssh_ec *ec)
  5783. +{
  5784. + struct ssh_writer *writer = &ec->writer;
  5785. + struct serdev_device *serdev = ec->serdev;
  5786. + int status;
  5787. +
  5788. + size_t len = writer->ptr - writer->data;
  5789. +
  5790. + dev_dbg(&ec->serdev->dev, "sending message\n");
  5791. + print_hex_dump_debug("send: ", DUMP_PREFIX_OFFSET, 16, 1,
  5792. + writer->data, writer->ptr - writer->data, false);
  5793. +
  5794. + status = serdev_device_write(serdev, writer->data, len, SSH_WRITE_TIMEOUT);
  5795. + return status >= 0 ? 0 : status;
  5796. +}
  5797. +
  5798. +static inline void ssh_write_msg_cmd(struct sam_ssh_ec *ec,
  5799. + const struct surface_sam_ssh_rqst *rqst)
  5800. +{
  5801. + ssh_writer_reset(&ec->writer);
  5802. + ssh_write_syn(&ec->writer);
  5803. + ssh_write_hdr(&ec->writer, rqst, ec);
  5804. + ssh_write_cmd(&ec->writer, rqst, ec);
  5805. +}
  5806. +
  5807. +static inline void ssh_write_msg_ack(struct sam_ssh_ec *ec, u8 seq)
  5808. +{
  5809. + ssh_writer_reset(&ec->writer);
  5810. + ssh_write_syn(&ec->writer);
  5811. + ssh_write_ack(&ec->writer, seq);
  5812. + ssh_write_ter(&ec->writer);
  5813. +}
  5814. +
  5815. +static inline void ssh_receiver_restart(struct sam_ssh_ec *ec,
  5816. + const struct surface_sam_ssh_rqst *rqst)
  5817. +{
  5818. + unsigned long flags;
  5819. +
  5820. + spin_lock_irqsave(&ec->receiver.lock, flags);
  5821. + reinit_completion(&ec->receiver.signal);
  5822. + ec->receiver.state = SSH_RCV_CONTROL;
  5823. + ec->receiver.expect.pld = rqst->snc;
  5824. + ec->receiver.expect.seq = ec->counter.seq;
  5825. + ec->receiver.expect.rqid = sam_rqid_to_rqst(ec->counter.rqid);
  5826. + ec->receiver.eval_buf.len = 0;
  5827. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  5828. +}
  5829. +
  5830. +static inline void ssh_receiver_discard(struct sam_ssh_ec *ec)
  5831. +{
  5832. + unsigned long flags;
  5833. +
  5834. + spin_lock_irqsave(&ec->receiver.lock, flags);
  5835. + ec->receiver.state = SSH_RCV_DISCARD;
  5836. + ec->receiver.eval_buf.len = 0;
  5837. + kfifo_reset(&ec->receiver.fifo);
  5838. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  5839. +}
  5840. +
  5841. +static int surface_sam_ssh_rqst_unlocked(struct sam_ssh_ec *ec,
  5842. + const struct surface_sam_ssh_rqst *rqst,
  5843. + struct surface_sam_ssh_buf *result)
  5844. +{
  5845. + struct device *dev = &ec->serdev->dev;
  5846. + struct ssh_fifo_packet packet = {};
  5847. + int status;
  5848. + int try;
  5849. + unsigned int rem;
  5850. +
  5851. + if (rqst->cdl > SURFACE_SAM_SSH_MAX_RQST_PAYLOAD) {
  5852. + dev_err(dev, SSH_RQST_TAG "request payload too large\n");
  5853. + return -EINVAL;
  5854. + }
  5855. +
  5856. + // write command in buffer, we may need it multiple times
  5857. + ssh_write_msg_cmd(ec, rqst);
  5858. + ssh_receiver_restart(ec, rqst);
  5859. +
  5860. + // send command, try to get an ack response
  5861. + for (try = 0; try < SSH_NUM_RETRY; try++) {
  5862. + status = ssh_writer_flush(ec);
  5863. + if (status)
  5864. + goto out;
  5865. +
  5866. + rem = wait_for_completion_timeout(&ec->receiver.signal, SSH_READ_TIMEOUT);
  5867. + if (rem) {
  5868. + // completion assures valid packet, thus ignore returned length
  5869. + (void) !kfifo_out(&ec->receiver.fifo, &packet, sizeof(packet));
  5870. +
  5871. + if (packet.type == SSH_FRAME_TYPE_ACK)
  5872. + break;
  5873. + }
  5874. + }
  5875. +
  5876. + // check if we ran out of tries?
  5877. + if (try >= SSH_NUM_RETRY) {
  5878. + dev_err(dev, SSH_RQST_TAG "communication failed %d times, giving up\n", try);
  5879. + status = -EIO;
  5880. + goto out;
  5881. + }
  5882. +
  5883. + ec->counter.seq += 1;
  5884. + ec->counter.rqid += 1;
  5885. +
  5886. + // get command response/payload
  5887. + if (rqst->snc && result) {
  5888. + rem = wait_for_completion_timeout(&ec->receiver.signal, SSH_READ_TIMEOUT);
  5889. + if (rem) {
  5890. + // completion assures valid packet, thus ignore returned length
  5891. + (void) !kfifo_out(&ec->receiver.fifo, &packet, sizeof(packet));
  5892. +
  5893. + if (result->cap < packet.len) {
  5894. + status = -EINVAL;
  5895. + goto out;
  5896. + }
  5897. +
  5898. + // completion assures valid packet, thus ignore returned length
  5899. + (void) !kfifo_out(&ec->receiver.fifo, result->data, packet.len);
  5900. + result->len = packet.len;
  5901. + } else {
  5902. + dev_err(dev, SSH_RQST_TAG "communication timed out\n");
  5903. + status = -EIO;
  5904. + goto out;
  5905. + }
  5906. +
  5907. + // send ACK
  5908. + if (packet.type == SSH_FRAME_TYPE_CMD) {
  5909. + ssh_write_msg_ack(ec, packet.seq);
  5910. + status = ssh_writer_flush(ec);
  5911. + if (status)
  5912. + goto out;
  5913. + }
  5914. + }
  5915. +
  5916. +out:
  5917. + ssh_receiver_discard(ec);
  5918. + return status;
  5919. +}
  5920. +
  5921. +int surface_sam_ssh_rqst(const struct surface_sam_ssh_rqst *rqst, struct surface_sam_ssh_buf *result)
  5922. +{
  5923. + struct sam_ssh_ec *ec;
  5924. + int status;
  5925. +
  5926. + ec = surface_sam_ssh_acquire_init();
  5927. + if (!ec) {
  5928. + pr_warn(SSH_RQST_TAG_FULL "embedded controller is uninitialized\n");
  5929. + return -ENXIO;
  5930. + }
  5931. +
  5932. + if (ec->state == SSH_EC_SUSPENDED) {
  5933. + dev_warn(&ec->serdev->dev, SSH_RQST_TAG "embedded controller is suspended\n");
  5934. +
  5935. + surface_sam_ssh_release(ec);
  5936. + return -EPERM;
  5937. + }
  5938. +
  5939. + status = surface_sam_ssh_rqst_unlocked(ec, rqst, result);
  5940. +
  5941. + surface_sam_ssh_release(ec);
  5942. + return status;
  5943. +}
  5944. +EXPORT_SYMBOL_GPL(surface_sam_ssh_rqst);
  5945. +
  5946. +
  5947. +static int surface_sam_ssh_ec_resume(struct sam_ssh_ec *ec)
  5948. +{
  5949. + u8 buf[1] = { 0x00 };
  5950. +
  5951. + struct surface_sam_ssh_rqst rqst = {
  5952. + .tc = 0x01,
  5953. + .cid = 0x16,
  5954. + .iid = 0x00,
  5955. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5956. + .snc = 0x01,
  5957. + .cdl = 0x00,
  5958. + .pld = NULL,
  5959. + };
  5960. +
  5961. + struct surface_sam_ssh_buf result = {
  5962. + result.cap = ARRAY_SIZE(buf),
  5963. + result.len = 0,
  5964. + result.data = buf,
  5965. + };
  5966. +
  5967. + int status;
  5968. +
  5969. + status = surface_sam_ssh_rqst_unlocked(ec, &rqst, &result);
  5970. + if (status)
  5971. + return status;
  5972. +
  5973. + if (buf[0] != 0x00) {
  5974. + dev_warn(&ec->serdev->dev,
  5975. + "unexpected result while trying to resume EC: 0x%02x\n",
  5976. + buf[0]);
  5977. + }
  5978. +
  5979. + return 0;
  5980. +}
  5981. +
  5982. +static int surface_sam_ssh_ec_suspend(struct sam_ssh_ec *ec)
  5983. +{
  5984. + u8 buf[1] = { 0x00 };
  5985. +
  5986. + struct surface_sam_ssh_rqst rqst = {
  5987. + .tc = 0x01,
  5988. + .cid = 0x15,
  5989. + .iid = 0x00,
  5990. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5991. + .snc = 0x01,
  5992. + .cdl = 0x00,
  5993. + .pld = NULL,
  5994. + };
  5995. +
  5996. + struct surface_sam_ssh_buf result = {
  5997. + result.cap = ARRAY_SIZE(buf),
  5998. + result.len = 0,
  5999. + result.data = buf,
  6000. + };
  6001. +
  6002. + int status;
  6003. +
  6004. + status = surface_sam_ssh_rqst_unlocked(ec, &rqst, &result);
  6005. + if (status)
  6006. + return status;
  6007. +
  6008. + if (buf[0] != 0x00) {
  6009. + dev_warn(&ec->serdev->dev,
  6010. + "unexpected result while trying to suspend EC: 0x%02x\n",
  6011. + buf[0]);
  6012. + }
  6013. +
  6014. + return 0;
  6015. +}
  6016. +
  6017. +
  6018. +static inline bool ssh_is_valid_syn(const u8 *ptr)
  6019. +{
  6020. + return ptr[0] == 0xaa && ptr[1] == 0x55;
  6021. +}
  6022. +
  6023. +static inline bool ssh_is_valid_ter(const u8 *ptr)
  6024. +{
  6025. + return ptr[0] == 0xff && ptr[1] == 0xff;
  6026. +}
  6027. +
  6028. +static inline bool ssh_is_valid_crc(const u8 *begin, const u8 *end)
  6029. +{
  6030. + u16 crc;
  6031. +
  6032. + crc = ssh_crc(begin, end - begin);
  6033. + return (end[0] == (crc & 0xff)) && (end[1] == (crc >> 8));
  6034. +}
  6035. +
  6036. +
  6037. +static int surface_sam_ssh_send_ack(struct sam_ssh_ec *ec, u8 seq)
  6038. +{
  6039. + int status;
  6040. + u8 buf[SSH_MSG_LEN_CTRL];
  6041. + u16 crc;
  6042. +
  6043. + buf[0] = 0xaa;
  6044. + buf[1] = 0x55;
  6045. + buf[2] = 0x40;
  6046. + buf[3] = 0x00;
  6047. + buf[4] = 0x00;
  6048. + buf[5] = seq;
  6049. +
  6050. + crc = ssh_crc(buf + SSH_FRAME_OFFS_CTRL, SSH_BYTELEN_CTRL);
  6051. + buf[6] = crc & 0xff;
  6052. + buf[7] = crc >> 8;
  6053. +
  6054. + buf[8] = 0xff;
  6055. + buf[9] = 0xff;
  6056. +
  6057. + dev_dbg(&ec->serdev->dev, "sending message\n");
  6058. + print_hex_dump_debug("send: ", DUMP_PREFIX_OFFSET, 16, 1,
  6059. + buf, SSH_MSG_LEN_CTRL, false);
  6060. +
  6061. + status = serdev_device_write(ec->serdev, buf, SSH_MSG_LEN_CTRL, SSH_WRITE_TIMEOUT);
  6062. + return status >= 0 ? 0 : status;
  6063. +}
  6064. +
  6065. +static void surface_sam_ssh_event_work_ack_handler(struct work_struct *_work)
  6066. +{
  6067. + struct surface_sam_ssh_event *event;
  6068. + struct ssh_event_work *work;
  6069. + struct sam_ssh_ec *ec;
  6070. + struct device *dev;
  6071. + int status;
  6072. +
  6073. + work = container_of(_work, struct ssh_event_work, work_ack);
  6074. + event = &work->event;
  6075. + ec = work->ec;
  6076. + dev = &ec->serdev->dev;
  6077. +
  6078. + /* make sure we load a fresh ec state */
  6079. + smp_mb();
  6080. +
  6081. + if (ec->state == SSH_EC_INITIALIZED) {
  6082. + status = surface_sam_ssh_send_ack(ec, work->seq);
  6083. + if (status)
  6084. + dev_err(dev, SSH_EVENT_TAG "failed to send ACK: %d\n", status);
  6085. + }
  6086. +
  6087. + if (refcount_dec_and_test(&work->refcount))
  6088. + kfree(work);
  6089. +}
  6090. +
  6091. +static void surface_sam_ssh_event_work_evt_handler(struct work_struct *_work)
  6092. +{
  6093. + struct delayed_work *dwork = (struct delayed_work *)_work;
  6094. + struct ssh_event_work *work;
  6095. + struct surface_sam_ssh_event *event;
  6096. + struct sam_ssh_ec *ec;
  6097. + struct device *dev;
  6098. + unsigned long flags;
  6099. +
  6100. + surface_sam_ssh_event_handler_fn handler;
  6101. + void *handler_data;
  6102. +
  6103. + int status = 0;
  6104. +
  6105. + work = container_of(dwork, struct ssh_event_work, work_evt);
  6106. + event = &work->event;
  6107. + ec = work->ec;
  6108. + dev = &ec->serdev->dev;
  6109. +
  6110. + spin_lock_irqsave(&ec->events.lock, flags);
  6111. + handler = ec->events.handler[event->rqid - 1].handler;
  6112. + handler_data = ec->events.handler[event->rqid - 1].data;
  6113. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6114. +
  6115. + /*
  6116. + * During handler removal or driver release, we ensure every event gets
  6117. + * handled before return of that function. Thus a handler obtained here is
  6118. + * guaranteed to be valid at least until this function returns.
  6119. + */
  6120. +
  6121. + if (handler)
  6122. + status = handler(event, handler_data);
  6123. + else
  6124. + dev_warn(dev, SSH_EVENT_TAG "unhandled event (rqid: %04x)\n", event->rqid);
  6125. +
  6126. + if (status)
  6127. + dev_err(dev, SSH_EVENT_TAG "error handling event: %d\n", status);
  6128. +
  6129. + if (refcount_dec_and_test(&work->refcount))
  6130. + kfree(work);
  6131. +}
  6132. +
  6133. +static void ssh_handle_event(struct sam_ssh_ec *ec, const u8 *buf)
  6134. +{
  6135. + const struct ssh_frame_ctrl *ctrl;
  6136. + const struct ssh_frame_cmd *cmd;
  6137. + struct ssh_event_work *work;
  6138. + unsigned long flags;
  6139. + u16 pld_len;
  6140. +
  6141. + surface_sam_ssh_event_handler_delay delay_fn;
  6142. + void *handler_data;
  6143. + unsigned long delay;
  6144. +
  6145. + ctrl = (const struct ssh_frame_ctrl *)(buf + SSH_FRAME_OFFS_CTRL);
  6146. + cmd = (const struct ssh_frame_cmd *)(buf + SSH_FRAME_OFFS_CMD);
  6147. +
  6148. + pld_len = ctrl->len - SSH_BYTELEN_CMDFRAME;
  6149. +
  6150. + work = kzalloc(sizeof(struct ssh_event_work) + pld_len, GFP_ATOMIC);
  6151. + if (!work)
  6152. + return;
  6153. +
  6154. + refcount_set(&work->refcount, 1);
  6155. + work->ec = ec;
  6156. + work->seq = ctrl->seq;
  6157. + work->event.rqid = (cmd->rqid_hi << 8) | cmd->rqid_lo;
  6158. + work->event.tc = cmd->tc;
  6159. + work->event.cid = cmd->cid;
  6160. + work->event.iid = cmd->iid;
  6161. + work->event.pri = cmd->pri_in;
  6162. + work->event.len = pld_len;
  6163. + work->event.pld = ((u8 *)work) + sizeof(struct ssh_event_work);
  6164. +
  6165. + memcpy(work->event.pld, buf + SSH_FRAME_OFFS_CMD_PLD, pld_len);
  6166. +
  6167. + // queue ACK for if required
  6168. + if (ctrl->type == SSH_FRAME_TYPE_CMD) {
  6169. + refcount_set(&work->refcount, 2);
  6170. + INIT_WORK(&work->work_ack, surface_sam_ssh_event_work_ack_handler);
  6171. + queue_work(ec->events.queue_ack, &work->work_ack);
  6172. + }
  6173. +
  6174. + spin_lock_irqsave(&ec->events.lock, flags);
  6175. + handler_data = ec->events.handler[work->event.rqid - 1].data;
  6176. + delay_fn = ec->events.handler[work->event.rqid - 1].delay;
  6177. +
  6178. + /* Note:
  6179. + * We need to check delay_fn here: This may have never been set as we
  6180. + * can't guarantee that events only occur when they have been enabled.
  6181. + */
  6182. + delay = delay_fn ? delay_fn(&work->event, handler_data) : 0;
  6183. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6184. +
  6185. + // immediate execution for high priority events (e.g. keyboard)
  6186. + if (delay == SURFACE_SAM_SSH_EVENT_IMMEDIATE) {
  6187. + surface_sam_ssh_event_work_evt_handler(&work->work_evt.work);
  6188. + } else {
  6189. + INIT_DELAYED_WORK(&work->work_evt, surface_sam_ssh_event_work_evt_handler);
  6190. + queue_delayed_work(ec->events.queue_evt, &work->work_evt, delay);
  6191. + }
  6192. +}
  6193. +
  6194. +static int ssh_receive_msg_ctrl(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6195. +{
  6196. + struct device *dev = &ec->serdev->dev;
  6197. + struct ssh_receiver *rcv = &ec->receiver;
  6198. + const struct ssh_frame_ctrl *ctrl;
  6199. + struct ssh_fifo_packet packet;
  6200. +
  6201. + const u8 *ctrl_begin = buf + SSH_FRAME_OFFS_CTRL;
  6202. + const u8 *ctrl_end = buf + SSH_FRAME_OFFS_CTRL_CRC;
  6203. +
  6204. + ctrl = (const struct ssh_frame_ctrl *)(ctrl_begin);
  6205. +
  6206. + // actual length check
  6207. + if (size < SSH_MSG_LEN_CTRL)
  6208. + return 0; // need more bytes
  6209. +
  6210. + // validate TERM
  6211. + if (!ssh_is_valid_ter(buf + SSH_FRAME_OFFS_TERM)) {
  6212. + dev_err(dev, SSH_RECV_TAG "invalid end of message\n");
  6213. + return size; // discard everything
  6214. + }
  6215. +
  6216. + // validate CRC
  6217. + if (!ssh_is_valid_crc(ctrl_begin, ctrl_end)) {
  6218. + dev_err(dev, SSH_RECV_TAG "invalid checksum (ctrl)\n");
  6219. + return SSH_MSG_LEN_CTRL; // only discard message
  6220. + }
  6221. +
  6222. + // check if we expect the message
  6223. + if (rcv->state != SSH_RCV_CONTROL) {
  6224. + dev_err(dev, SSH_RECV_TAG "discarding message: ctrl not expected\n");
  6225. + return SSH_MSG_LEN_CTRL; // discard message
  6226. + }
  6227. +
  6228. + // check if it is for our request
  6229. + if (ctrl->type == SSH_FRAME_TYPE_ACK && ctrl->seq != rcv->expect.seq) {
  6230. + dev_err(dev, SSH_RECV_TAG "discarding message: ack does not match\n");
  6231. + return SSH_MSG_LEN_CTRL; // discard message
  6232. + }
  6233. +
  6234. + // we now have a valid & expected ACK/RETRY message
  6235. + dev_dbg(dev, SSH_RECV_TAG "valid control message received (type: 0x%02x)\n", ctrl->type);
  6236. +
  6237. + packet.type = ctrl->type;
  6238. + packet.seq = ctrl->seq;
  6239. + packet.len = 0;
  6240. +
  6241. + if (kfifo_avail(&rcv->fifo) >= sizeof(packet)) {
  6242. + kfifo_in(&rcv->fifo, (u8 *) &packet, sizeof(packet));
  6243. +
  6244. + } else {
  6245. + dev_warn(dev, SSH_RECV_TAG
  6246. + "dropping frame: not enough space in fifo (type = %d)\n",
  6247. + ctrl->type);
  6248. +
  6249. + return SSH_MSG_LEN_CTRL; // discard message
  6250. + }
  6251. +
  6252. + // update decoder state
  6253. + if (ctrl->type == SSH_FRAME_TYPE_ACK) {
  6254. + rcv->state = rcv->expect.pld
  6255. + ? SSH_RCV_COMMAND
  6256. + : SSH_RCV_DISCARD;
  6257. + }
  6258. +
  6259. + complete(&rcv->signal);
  6260. + return SSH_MSG_LEN_CTRL; // handled message
  6261. +}
  6262. +
  6263. +static int ssh_receive_msg_cmd(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6264. +{
  6265. + struct device *dev = &ec->serdev->dev;
  6266. + struct ssh_receiver *rcv = &ec->receiver;
  6267. + const struct ssh_frame_ctrl *ctrl;
  6268. + const struct ssh_frame_cmd *cmd;
  6269. + struct ssh_fifo_packet packet;
  6270. +
  6271. + const u8 *ctrl_begin = buf + SSH_FRAME_OFFS_CTRL;
  6272. + const u8 *ctrl_end = buf + SSH_FRAME_OFFS_CTRL_CRC;
  6273. + const u8 *cmd_begin = buf + SSH_FRAME_OFFS_CMD;
  6274. + const u8 *cmd_begin_pld = buf + SSH_FRAME_OFFS_CMD_PLD;
  6275. + const u8 *cmd_end;
  6276. +
  6277. + size_t msg_len;
  6278. +
  6279. + ctrl = (const struct ssh_frame_ctrl *)(ctrl_begin);
  6280. + cmd = (const struct ssh_frame_cmd *)(cmd_begin);
  6281. +
  6282. + // we need at least a full control frame
  6283. + if (size < (SSH_BYTELEN_SYNC + SSH_BYTELEN_CTRL + SSH_BYTELEN_CRC))
  6284. + return 0; // need more bytes
  6285. +
  6286. + // validate control-frame CRC
  6287. + if (!ssh_is_valid_crc(ctrl_begin, ctrl_end)) {
  6288. + dev_err(dev, SSH_RECV_TAG "invalid checksum (cmd-ctrl)\n");
  6289. + /*
  6290. + * We can't be sure here if length is valid, thus
  6291. + * discard everything.
  6292. + */
  6293. + return size;
  6294. + }
  6295. +
  6296. + // actual length check (ctrl->len contains command-frame but not crc)
  6297. + msg_len = SSH_MSG_LEN_CMD_BASE + ctrl->len;
  6298. + if (size < msg_len)
  6299. + return 0; // need more bytes
  6300. +
  6301. + cmd_end = cmd_begin + ctrl->len;
  6302. +
  6303. + // validate command-frame type
  6304. + if (cmd->type != SSH_FRAME_TYPE_CMD) {
  6305. + dev_err(dev, SSH_RECV_TAG "expected command frame type but got 0x%02x\n", cmd->type);
  6306. + return size; // discard everything
  6307. + }
  6308. +
  6309. + // validate command-frame CRC
  6310. + if (!ssh_is_valid_crc(cmd_begin, cmd_end)) {
  6311. + dev_err(dev, SSH_RECV_TAG "invalid checksum (cmd-pld)\n");
  6312. +
  6313. + /*
  6314. + * The message length is provided in the control frame. As we
  6315. + * already validated that, we can be sure here that it's
  6316. + * correct, so we only need to discard the message.
  6317. + */
  6318. + return msg_len;
  6319. + }
  6320. +
  6321. + // check if we received an event notification
  6322. + if (sam_rqid_is_event((cmd->rqid_hi << 8) | cmd->rqid_lo)) {
  6323. + ssh_handle_event(ec, buf);
  6324. + return msg_len; // handled message
  6325. + }
  6326. +
  6327. + // check if we expect the message
  6328. + if (rcv->state != SSH_RCV_COMMAND) {
  6329. + dev_dbg(dev, SSH_RECV_TAG "discarding message: command not expected\n");
  6330. + return msg_len; // discard message
  6331. + }
  6332. +
  6333. + // check if response is for our request
  6334. + if (rcv->expect.rqid != (cmd->rqid_lo | (cmd->rqid_hi << 8))) {
  6335. + dev_dbg(dev, SSH_RECV_TAG "discarding message: command not a match\n");
  6336. + return msg_len; // discard message
  6337. + }
  6338. +
  6339. + // we now have a valid & expected command message
  6340. + dev_dbg(dev, SSH_RECV_TAG "valid command message received\n");
  6341. +
  6342. + packet.type = ctrl->type;
  6343. + packet.seq = ctrl->seq;
  6344. + packet.len = cmd_end - cmd_begin_pld;
  6345. +
  6346. + if (kfifo_avail(&rcv->fifo) >= sizeof(packet) + packet.len) {
  6347. + kfifo_in(&rcv->fifo, &packet, sizeof(packet));
  6348. + kfifo_in(&rcv->fifo, cmd_begin_pld, packet.len);
  6349. +
  6350. + } else {
  6351. + dev_warn(dev, SSH_RECV_TAG
  6352. + "dropping frame: not enough space in fifo (type = %d)\n",
  6353. + ctrl->type);
  6354. +
  6355. + return SSH_MSG_LEN_CTRL; // discard message
  6356. + }
  6357. +
  6358. + rcv->state = SSH_RCV_DISCARD;
  6359. +
  6360. + complete(&rcv->signal);
  6361. + return msg_len; // handled message
  6362. +}
  6363. +
  6364. +static int ssh_eval_buf(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6365. +{
  6366. + struct device *dev = &ec->serdev->dev;
  6367. + struct ssh_frame_ctrl *ctrl;
  6368. +
  6369. + // we need at least a control frame to check what to do
  6370. + if (size < (SSH_BYTELEN_SYNC + SSH_BYTELEN_CTRL))
  6371. + return 0; // need more bytes
  6372. +
  6373. + // make sure we're actually at the start of a new message
  6374. + if (!ssh_is_valid_syn(buf)) {
  6375. + dev_err(dev, SSH_RECV_TAG "invalid start of message\n");
  6376. + return size; // discard everything
  6377. + }
  6378. +
  6379. + // handle individual message types separately
  6380. + ctrl = (struct ssh_frame_ctrl *)(buf + SSH_FRAME_OFFS_CTRL);
  6381. +
  6382. + switch (ctrl->type) {
  6383. + case SSH_FRAME_TYPE_ACK:
  6384. + case SSH_FRAME_TYPE_RETRY:
  6385. + return ssh_receive_msg_ctrl(ec, buf, size);
  6386. +
  6387. + case SSH_FRAME_TYPE_CMD:
  6388. + case SSH_FRAME_TYPE_CMD_NOACK:
  6389. + return ssh_receive_msg_cmd(ec, buf, size);
  6390. +
  6391. + default:
  6392. + dev_err(dev, SSH_RECV_TAG "unknown frame type 0x%02x\n", ctrl->type);
  6393. + return size; // discard everything
  6394. + }
  6395. +}
  6396. +
  6397. +static int ssh_receive_buf(struct serdev_device *serdev,
  6398. + const unsigned char *buf, size_t size)
  6399. +{
  6400. + struct sam_ssh_ec *ec = serdev_device_get_drvdata(serdev);
  6401. + struct ssh_receiver *rcv = &ec->receiver;
  6402. + unsigned long flags;
  6403. + int offs = 0;
  6404. + int used, n;
  6405. +
  6406. + dev_dbg(&serdev->dev, SSH_RECV_TAG "received buffer (size: %zu)\n", size);
  6407. + print_hex_dump_debug(SSH_RECV_TAG, DUMP_PREFIX_OFFSET, 16, 1, buf, size, false);
  6408. +
  6409. + /*
  6410. + * The battery _BIX message gets a bit long, thus we have to add some
  6411. + * additional buffering here.
  6412. + */
  6413. +
  6414. + spin_lock_irqsave(&rcv->lock, flags);
  6415. +
  6416. + // copy to eval-buffer
  6417. + used = min(size, (size_t)(rcv->eval_buf.cap - rcv->eval_buf.len));
  6418. + memcpy(rcv->eval_buf.ptr + rcv->eval_buf.len, buf, used);
  6419. + rcv->eval_buf.len += used;
  6420. +
  6421. + // evaluate buffer until we need more bytes or eval-buf is empty
  6422. + while (offs < rcv->eval_buf.len) {
  6423. + n = rcv->eval_buf.len - offs;
  6424. + n = ssh_eval_buf(ec, rcv->eval_buf.ptr + offs, n);
  6425. + if (n <= 0)
  6426. + break; // need more bytes
  6427. +
  6428. + offs += n;
  6429. + }
  6430. +
  6431. + // throw away the evaluated parts
  6432. + rcv->eval_buf.len -= offs;
  6433. + memmove(rcv->eval_buf.ptr, rcv->eval_buf.ptr + offs, rcv->eval_buf.len);
  6434. +
  6435. + spin_unlock_irqrestore(&rcv->lock, flags);
  6436. +
  6437. + return used;
  6438. +}
  6439. +
  6440. +
  6441. +#ifdef CONFIG_SURFACE_SAM_SSH_DEBUG_DEVICE
  6442. +
  6443. +#include <linux/sysfs.h>
  6444. +
  6445. +static char sam_ssh_debug_rqst_buf_sysfs[SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1] = { 0 };
  6446. +static char sam_ssh_debug_rqst_buf_pld[SURFACE_SAM_SSH_MAX_RQST_PAYLOAD] = { 0 };
  6447. +static char sam_ssh_debug_rqst_buf_res[SURFACE_SAM_SSH_MAX_RQST_RESPONSE] = { 0 };
  6448. +
  6449. +struct sysfs_rqst {
  6450. + u8 tc;
  6451. + u8 cid;
  6452. + u8 iid;
  6453. + u8 pri;
  6454. + u8 snc;
  6455. + u8 cdl;
  6456. + u8 pld[0];
  6457. +} __packed;
  6458. +
  6459. +static ssize_t rqst_read(struct file *f, struct kobject *kobj, struct bin_attribute *attr,
  6460. + char *buf, loff_t offs, size_t count)
  6461. +{
  6462. + if (offs < 0 || count + offs > SURFACE_SAM_SSH_MAX_RQST_RESPONSE)
  6463. + return -EINVAL;
  6464. +
  6465. + memcpy(buf, sam_ssh_debug_rqst_buf_sysfs + offs, count);
  6466. + return count;
  6467. +}
  6468. +
  6469. +static ssize_t rqst_write(struct file *f, struct kobject *kobj, struct bin_attribute *attr,
  6470. + char *buf, loff_t offs, size_t count)
  6471. +{
  6472. + struct sysfs_rqst *input;
  6473. + struct surface_sam_ssh_rqst rqst = {};
  6474. + struct surface_sam_ssh_buf result = {};
  6475. + int status;
  6476. +
  6477. + // check basic write constriants
  6478. + if (offs != 0 || count > SURFACE_SAM_SSH_MAX_RQST_PAYLOAD + sizeof(struct sysfs_rqst))
  6479. + return -EINVAL;
  6480. +
  6481. + if (count < sizeof(struct sysfs_rqst))
  6482. + return -EINVAL;
  6483. +
  6484. + input = (struct sysfs_rqst *)buf;
  6485. +
  6486. + // payload length should be consistent with data provided
  6487. + if (input->cdl + sizeof(struct sysfs_rqst) != count)
  6488. + return -EINVAL;
  6489. +
  6490. + rqst.tc = input->tc;
  6491. + rqst.cid = input->cid;
  6492. + rqst.iid = input->iid;
  6493. + rqst.pri = input->pri;
  6494. + rqst.snc = input->snc;
  6495. + rqst.cdl = input->cdl;
  6496. + rqst.pld = sam_ssh_debug_rqst_buf_pld;
  6497. + memcpy(sam_ssh_debug_rqst_buf_pld, &input->pld[0], input->cdl);
  6498. +
  6499. + result.cap = SURFACE_SAM_SSH_MAX_RQST_RESPONSE;
  6500. + result.len = 0;
  6501. + result.data = sam_ssh_debug_rqst_buf_res;
  6502. +
  6503. + status = surface_sam_ssh_rqst(&rqst, &result);
  6504. + if (status)
  6505. + return status;
  6506. +
  6507. + sam_ssh_debug_rqst_buf_sysfs[0] = result.len;
  6508. + memcpy(sam_ssh_debug_rqst_buf_sysfs + 1, result.data, result.len);
  6509. + memset(sam_ssh_debug_rqst_buf_sysfs + result.len + 1, 0,
  6510. + SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1 - result.len);
  6511. +
  6512. + return count;
  6513. +}
  6514. +
  6515. +static const BIN_ATTR_RW(rqst, SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1);
  6516. +
  6517. +
  6518. +static int surface_sam_ssh_sysfs_register(struct device *dev)
  6519. +{
  6520. + return sysfs_create_bin_file(&dev->kobj, &bin_attr_rqst);
  6521. +}
  6522. +
  6523. +static void surface_sam_ssh_sysfs_unregister(struct device *dev)
  6524. +{
  6525. + sysfs_remove_bin_file(&dev->kobj, &bin_attr_rqst);
  6526. +}
  6527. +
  6528. +#else /* CONFIG_SURFACE_ACPI_SSH_DEBUG_DEVICE */
  6529. +
  6530. +static int surface_sam_ssh_sysfs_register(struct device *dev)
  6531. +{
  6532. + return 0;
  6533. +}
  6534. +
  6535. +static void surface_sam_ssh_sysfs_unregister(struct device *dev)
  6536. +{
  6537. +}
  6538. +
  6539. +#endif /* CONFIG_SURFACE_SAM_SSH_DEBUG_DEVICE */
  6540. +
  6541. +
  6542. +static const struct acpi_gpio_params gpio_sam_wakeup_int = { 0, 0, false };
  6543. +static const struct acpi_gpio_params gpio_sam_wakeup = { 1, 0, false };
  6544. +
  6545. +static const struct acpi_gpio_mapping surface_sam_acpi_gpios[] = {
  6546. + { "sam_wakeup-int-gpio", &gpio_sam_wakeup_int, 1 },
  6547. + { "sam_wakeup-gpio", &gpio_sam_wakeup, 1 },
  6548. + { },
  6549. +};
  6550. +
  6551. +static irqreturn_t surface_sam_irq_handler(int irq, void *dev_id)
  6552. +{
  6553. + struct serdev_device *serdev = dev_id;
  6554. +
  6555. + dev_info(&serdev->dev, "wake irq triggered\n");
  6556. + return IRQ_HANDLED;
  6557. +}
  6558. +
  6559. +static int surface_sam_setup_irq(struct serdev_device *serdev)
  6560. +{
  6561. + const int irqf = IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_RISING;
  6562. + struct gpio_desc *gpiod;
  6563. + int irq;
  6564. + int status;
  6565. +
  6566. + gpiod = gpiod_get(&serdev->dev, "sam_wakeup-int", GPIOD_ASIS);
  6567. + if (IS_ERR(gpiod))
  6568. + return PTR_ERR(gpiod);
  6569. +
  6570. + irq = gpiod_to_irq(gpiod);
  6571. + gpiod_put(gpiod);
  6572. +
  6573. + if (irq < 0)
  6574. + return irq;
  6575. +
  6576. + status = request_threaded_irq(irq, NULL, surface_sam_irq_handler,
  6577. + irqf, "surface_sam_wakeup", serdev);
  6578. + if (status)
  6579. + return status;
  6580. +
  6581. + return irq;
  6582. +}
  6583. +
  6584. +
  6585. +static acpi_status
  6586. +ssh_setup_from_resource(struct acpi_resource *resource, void *context)
  6587. +{
  6588. + struct serdev_device *serdev = context;
  6589. + struct acpi_resource_common_serialbus *serial;
  6590. + struct acpi_resource_uart_serialbus *uart;
  6591. + int status = 0;
  6592. +
  6593. + if (resource->type != ACPI_RESOURCE_TYPE_SERIAL_BUS)
  6594. + return AE_OK;
  6595. +
  6596. + serial = &resource->data.common_serial_bus;
  6597. + if (serial->type != ACPI_RESOURCE_SERIAL_TYPE_UART)
  6598. + return AE_OK;
  6599. +
  6600. + uart = &resource->data.uart_serial_bus;
  6601. +
  6602. + // set up serdev device
  6603. + serdev_device_set_baudrate(serdev, uart->default_baud_rate);
  6604. +
  6605. + // serdev currently only supports RTSCTS flow control
  6606. + if (uart->flow_control & SSH_SUPPORTED_FLOW_CONTROL_MASK)
  6607. + dev_warn(&serdev->dev, "unsupported flow control (value: 0x%02x)\n", uart->flow_control);
  6608. +
  6609. + // set RTSCTS flow control
  6610. + serdev_device_set_flow_control(serdev, uart->flow_control & ACPI_UART_FLOW_CONTROL_HW);
  6611. +
  6612. + // serdev currently only supports EVEN/ODD parity
  6613. + switch (uart->parity) {
  6614. + case ACPI_UART_PARITY_NONE:
  6615. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE);
  6616. + break;
  6617. + case ACPI_UART_PARITY_EVEN:
  6618. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_EVEN);
  6619. + break;
  6620. + case ACPI_UART_PARITY_ODD:
  6621. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_ODD);
  6622. + break;
  6623. + default:
  6624. + dev_warn(&serdev->dev, "unsupported parity (value: 0x%02x)\n", uart->parity);
  6625. + break;
  6626. + }
  6627. +
  6628. + if (status) {
  6629. + dev_err(&serdev->dev, "failed to set parity (value: 0x%02x)\n", uart->parity);
  6630. + return status;
  6631. + }
  6632. +
  6633. + return AE_CTRL_TERMINATE; // we've found the resource and are done
  6634. +}
  6635. +
  6636. +
  6637. +static int surface_sam_ssh_suspend(struct device *dev)
  6638. +{
  6639. + struct sam_ssh_ec *ec;
  6640. + int status;
  6641. +
  6642. + dev_dbg(dev, "suspending\n");
  6643. +
  6644. + ec = surface_sam_ssh_acquire_init();
  6645. + if (ec) {
  6646. + status = surface_sam_ssh_ec_suspend(ec);
  6647. + if (status) {
  6648. + surface_sam_ssh_release(ec);
  6649. + return status;
  6650. + }
  6651. +
  6652. + if (device_may_wakeup(dev)) {
  6653. + status = enable_irq_wake(ec->irq);
  6654. + if (status) {
  6655. + surface_sam_ssh_release(ec);
  6656. + return status;
  6657. + }
  6658. +
  6659. + ec->irq_wakeup_enabled = true;
  6660. + } else {
  6661. + ec->irq_wakeup_enabled = false;
  6662. + }
  6663. +
  6664. + ec->state = SSH_EC_SUSPENDED;
  6665. + surface_sam_ssh_release(ec);
  6666. + }
  6667. +
  6668. + return 0;
  6669. +}
  6670. +
  6671. +static int surface_sam_ssh_resume(struct device *dev)
  6672. +{
  6673. + struct sam_ssh_ec *ec;
  6674. + int status;
  6675. +
  6676. + dev_dbg(dev, "resuming\n");
  6677. +
  6678. + ec = surface_sam_ssh_acquire_init();
  6679. + if (ec) {
  6680. + ec->state = SSH_EC_INITIALIZED;
  6681. +
  6682. + if (ec->irq_wakeup_enabled) {
  6683. + status = disable_irq_wake(ec->irq);
  6684. + if (status) {
  6685. + surface_sam_ssh_release(ec);
  6686. + return status;
  6687. + }
  6688. +
  6689. + ec->irq_wakeup_enabled = false;
  6690. + }
  6691. +
  6692. + status = surface_sam_ssh_ec_resume(ec);
  6693. + if (status) {
  6694. + surface_sam_ssh_release(ec);
  6695. + return status;
  6696. + }
  6697. +
  6698. + surface_sam_ssh_release(ec);
  6699. + }
  6700. +
  6701. + return 0;
  6702. +}
  6703. +
  6704. +static SIMPLE_DEV_PM_OPS(surface_sam_ssh_pm_ops, surface_sam_ssh_suspend, surface_sam_ssh_resume);
  6705. +
  6706. +
  6707. +static const struct serdev_device_ops ssh_device_ops = {
  6708. + .receive_buf = ssh_receive_buf,
  6709. + .write_wakeup = serdev_device_write_wakeup,
  6710. +};
  6711. +
  6712. +
  6713. +static int surface_sam_ssh_sysfs_register(struct device *dev);
  6714. +static void surface_sam_ssh_sysfs_unregister(struct device *dev);
  6715. +
  6716. +static int surface_sam_ssh_probe(struct serdev_device *serdev)
  6717. +{
  6718. + struct sam_ssh_ec *ec;
  6719. + struct workqueue_struct *event_queue_ack;
  6720. + struct workqueue_struct *event_queue_evt;
  6721. + u8 *write_buf;
  6722. + u8 *read_buf;
  6723. + u8 *eval_buf;
  6724. + acpi_handle *ssh = ACPI_HANDLE(&serdev->dev);
  6725. + acpi_status status;
  6726. + int irq;
  6727. +
  6728. + dev_dbg(&serdev->dev, "probing\n");
  6729. +
  6730. + if (gpiod_count(&serdev->dev, NULL) < 0)
  6731. + return -ENODEV;
  6732. +
  6733. + status = devm_acpi_dev_add_driver_gpios(&serdev->dev, surface_sam_acpi_gpios);
  6734. + if (status)
  6735. + return status;
  6736. +
  6737. + // allocate buffers
  6738. + write_buf = kzalloc(SSH_WRITE_BUF_LEN, GFP_KERNEL);
  6739. + if (!write_buf) {
  6740. + status = -ENOMEM;
  6741. + goto err_write_buf;
  6742. + }
  6743. +
  6744. + read_buf = kzalloc(SSH_READ_BUF_LEN, GFP_KERNEL);
  6745. + if (!read_buf) {
  6746. + status = -ENOMEM;
  6747. + goto err_read_buf;
  6748. + }
  6749. +
  6750. + eval_buf = kzalloc(SSH_EVAL_BUF_LEN, GFP_KERNEL);
  6751. + if (!eval_buf) {
  6752. + status = -ENOMEM;
  6753. + goto err_eval_buf;
  6754. + }
  6755. +
  6756. + event_queue_ack = create_singlethread_workqueue("surface_sh_ackq");
  6757. + if (!event_queue_ack) {
  6758. + status = -ENOMEM;
  6759. + goto err_ackq;
  6760. + }
  6761. +
  6762. + event_queue_evt = create_workqueue("surface_sh_evtq");
  6763. + if (!event_queue_evt) {
  6764. + status = -ENOMEM;
  6765. + goto err_evtq;
  6766. + }
  6767. +
  6768. + irq = surface_sam_setup_irq(serdev);
  6769. + if (irq < 0) {
  6770. + status = irq;
  6771. + goto err_irq;
  6772. + }
  6773. +
  6774. + // set up EC
  6775. + ec = surface_sam_ssh_acquire();
  6776. + if (ec->state != SSH_EC_UNINITIALIZED) {
  6777. + dev_err(&serdev->dev, "embedded controller already initialized\n");
  6778. + surface_sam_ssh_release(ec);
  6779. +
  6780. + status = -EBUSY;
  6781. + goto err_busy;
  6782. + }
  6783. +
  6784. + ec->serdev = serdev;
  6785. + ec->irq = irq;
  6786. + ec->writer.data = write_buf;
  6787. + ec->writer.ptr = write_buf;
  6788. +
  6789. + // initialize receiver
  6790. + init_completion(&ec->receiver.signal);
  6791. + kfifo_init(&ec->receiver.fifo, read_buf, SSH_READ_BUF_LEN);
  6792. + ec->receiver.eval_buf.ptr = eval_buf;
  6793. + ec->receiver.eval_buf.cap = SSH_EVAL_BUF_LEN;
  6794. + ec->receiver.eval_buf.len = 0;
  6795. +
  6796. + // initialize event handling
  6797. + ec->events.queue_ack = event_queue_ack;
  6798. + ec->events.queue_evt = event_queue_evt;
  6799. +
  6800. + ec->state = SSH_EC_INITIALIZED;
  6801. +
  6802. + serdev_device_set_drvdata(serdev, ec);
  6803. +
  6804. + /* ensure everything is properly set-up before we open the device */
  6805. + smp_mb();
  6806. +
  6807. + serdev_device_set_client_ops(serdev, &ssh_device_ops);
  6808. + status = serdev_device_open(serdev);
  6809. + if (status)
  6810. + goto err_open;
  6811. +
  6812. + status = acpi_walk_resources(ssh, METHOD_NAME__CRS,
  6813. + ssh_setup_from_resource, serdev);
  6814. + if (ACPI_FAILURE(status))
  6815. + goto err_devinit;
  6816. +
  6817. + status = surface_sam_ssh_ec_resume(ec);
  6818. + if (status)
  6819. + goto err_devinit;
  6820. +
  6821. + status = surface_sam_ssh_sysfs_register(&serdev->dev);
  6822. + if (status)
  6823. + goto err_devinit;
  6824. +
  6825. + surface_sam_ssh_release(ec);
  6826. +
  6827. + // TODO: The EC can wake up the system via the associated GPIO interrupt in
  6828. + // multiple situations. One of which is the remaining battery capacity
  6829. + // falling below a certain threshold. Normally, we should use the
  6830. + // device_init_wakeup function, however, the EC also seems to have other
  6831. + // reasons for waking up the system and it seems that Windows has
  6832. + // additional checks whether the system should be resumed. In short, this
  6833. + // causes some spourious unwanted wake-ups. For now let's thus default
  6834. + // power/wakeup to false.
  6835. + device_set_wakeup_capable(&serdev->dev, true);
  6836. + acpi_walk_dep_device_list(ssh);
  6837. +
  6838. + return 0;
  6839. +
  6840. +err_devinit:
  6841. + serdev_device_close(serdev);
  6842. +err_open:
  6843. + ec->state = SSH_EC_UNINITIALIZED;
  6844. + serdev_device_set_drvdata(serdev, NULL);
  6845. + surface_sam_ssh_release(ec);
  6846. +err_busy:
  6847. + free_irq(irq, serdev);
  6848. +err_irq:
  6849. + destroy_workqueue(event_queue_evt);
  6850. +err_evtq:
  6851. + destroy_workqueue(event_queue_ack);
  6852. +err_ackq:
  6853. + kfree(eval_buf);
  6854. +err_eval_buf:
  6855. + kfree(read_buf);
  6856. +err_read_buf:
  6857. + kfree(write_buf);
  6858. +err_write_buf:
  6859. + return status;
  6860. +}
  6861. +
  6862. +static void surface_sam_ssh_remove(struct serdev_device *serdev)
  6863. +{
  6864. + struct sam_ssh_ec *ec;
  6865. + unsigned long flags;
  6866. + int status;
  6867. +
  6868. + ec = surface_sam_ssh_acquire_init();
  6869. + if (!ec)
  6870. + return;
  6871. +
  6872. + free_irq(ec->irq, serdev);
  6873. + surface_sam_ssh_sysfs_unregister(&serdev->dev);
  6874. +
  6875. + // suspend EC and disable events
  6876. + status = surface_sam_ssh_ec_suspend(ec);
  6877. + if (status)
  6878. + dev_err(&serdev->dev, "failed to suspend EC: %d\n", status);
  6879. +
  6880. + // make sure all events (received up to now) have been properly handled
  6881. + flush_workqueue(ec->events.queue_ack);
  6882. + flush_workqueue(ec->events.queue_evt);
  6883. +
  6884. + // remove event handlers
  6885. + spin_lock_irqsave(&ec->events.lock, flags);
  6886. + memset(ec->events.handler, 0,
  6887. + sizeof(struct ssh_event_handler)
  6888. + * SAM_NUM_EVENT_TYPES);
  6889. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6890. +
  6891. + // set device to deinitialized state
  6892. + ec->state = SSH_EC_UNINITIALIZED;
  6893. + ec->serdev = NULL;
  6894. +
  6895. + /* ensure state and serdev get set before continuing */
  6896. + smp_mb();
  6897. +
  6898. + /*
  6899. + * Flush any event that has not been processed yet to ensure we're not going to
  6900. + * use the serial device any more (e.g. for ACKing).
  6901. + */
  6902. + flush_workqueue(ec->events.queue_ack);
  6903. + flush_workqueue(ec->events.queue_evt);
  6904. +
  6905. + serdev_device_close(serdev);
  6906. +
  6907. + /*
  6908. + * Only at this point, no new events can be received. Destroying the
  6909. + * workqueue here flushes all remaining events. Those events will be
  6910. + * silently ignored and neither ACKed nor any handler gets called.
  6911. + */
  6912. + destroy_workqueue(ec->events.queue_ack);
  6913. + destroy_workqueue(ec->events.queue_evt);
  6914. +
  6915. + // free writer
  6916. + kfree(ec->writer.data);
  6917. + ec->writer.data = NULL;
  6918. + ec->writer.ptr = NULL;
  6919. +
  6920. + // free receiver
  6921. + spin_lock_irqsave(&ec->receiver.lock, flags);
  6922. + ec->receiver.state = SSH_RCV_DISCARD;
  6923. + kfifo_free(&ec->receiver.fifo);
  6924. +
  6925. + kfree(ec->receiver.eval_buf.ptr);
  6926. + ec->receiver.eval_buf.ptr = NULL;
  6927. + ec->receiver.eval_buf.cap = 0;
  6928. + ec->receiver.eval_buf.len = 0;
  6929. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  6930. +
  6931. + device_set_wakeup_capable(&serdev->dev, false);
  6932. + serdev_device_set_drvdata(serdev, NULL);
  6933. + surface_sam_ssh_release(ec);
  6934. +}
  6935. +
  6936. +
  6937. +static const struct acpi_device_id surface_sam_ssh_match[] = {
  6938. + { "MSHW0084", 0 },
  6939. + { },
  6940. +};
  6941. +MODULE_DEVICE_TABLE(acpi, surface_sam_ssh_match);
  6942. +
  6943. +static struct serdev_device_driver surface_sam_ssh = {
  6944. + .probe = surface_sam_ssh_probe,
  6945. + .remove = surface_sam_ssh_remove,
  6946. + .driver = {
  6947. + .name = "surface_sam_ssh",
  6948. + .acpi_match_table = ACPI_PTR(surface_sam_ssh_match),
  6949. + .pm = &surface_sam_ssh_pm_ops,
  6950. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  6951. + },
  6952. +};
  6953. +
  6954. +
  6955. +static int __init surface_sam_ssh_init(void)
  6956. +{
  6957. + return serdev_device_driver_register(&surface_sam_ssh);
  6958. +}
  6959. +
  6960. +static void __exit surface_sam_ssh_exit(void)
  6961. +{
  6962. + serdev_device_driver_unregister(&surface_sam_ssh);
  6963. +}
  6964. +
  6965. +/*
  6966. + * Ensure that the driver is loaded late due to some issues with the UART
  6967. + * communication. Specifically, we want to ensure that DMA is ready and being
  6968. + * used. Not using DMA can result in spurious communication failures,
  6969. + * especially during boot, which among other things will result in wrong
  6970. + * battery information (via ACPI _BIX) being displayed. Using a late init_call
  6971. + * instead of the normal module_init gives the DMA subsystem time to
  6972. + * initialize and via that results in a more stable communication, avoiding
  6973. + * such failures.
  6974. + */
  6975. +late_initcall(surface_sam_ssh_init);
  6976. +module_exit(surface_sam_ssh_exit);
  6977. +
  6978. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  6979. +MODULE_DESCRIPTION("Surface Serial Hub Driver for 5th Generation Surface Devices");
  6980. +MODULE_LICENSE("GPL v2");
  6981. diff --git a/drivers/platform/x86/surface_sam/surface_sam_ssh.h b/drivers/platform/x86/surface_sam/surface_sam_ssh.h
  6982. new file mode 100644
  6983. index 000000000000..435b5c7bac9a
  6984. --- /dev/null
  6985. +++ b/drivers/platform/x86/surface_sam/surface_sam_ssh.h
  6986. @@ -0,0 +1,98 @@
  6987. +/* SPDX-License-Identifier: GPL-2.0 */
  6988. +/*
  6989. + * Interface for Surface Serial Hub (SSH).
  6990. + *
  6991. + * The SSH is the main communication hub for communication between host and
  6992. + * the Surface/System Aggregator Module (SAM) on newer Microsoft Surface
  6993. + * devices (Book 2, Pro 5, Laptops, ...). Also referred to as SAM-over-SSH.
  6994. + * Older devices (Book 1, Pro 4) use SAM-over-I2C.
  6995. + */
  6996. +
  6997. +#ifndef _SURFACE_SAM_SSH_H
  6998. +#define _SURFACE_SAM_SSH_H
  6999. +
  7000. +#include <linux/types.h>
  7001. +#include <linux/device.h>
  7002. +
  7003. +
  7004. +/*
  7005. + * Maximum request payload size in bytes.
  7006. + * Value based on ACPI (255 bytes minus header/status bytes).
  7007. + */
  7008. +#define SURFACE_SAM_SSH_MAX_RQST_PAYLOAD (255 - 10)
  7009. +
  7010. +/*
  7011. + * Maximum response payload size in bytes.
  7012. + * Value based on ACPI (255 bytes minus header/status bytes).
  7013. + */
  7014. +#define SURFACE_SAM_SSH_MAX_RQST_RESPONSE (255 - 4)
  7015. +
  7016. +/*
  7017. + * The number of (lower) bits of the request ID (RQID) reserved for events.
  7018. + * These bits may only be used exclusively for events sent from the EC to the
  7019. + * host.
  7020. + */
  7021. +#define SURFACE_SAM_SSH_RQID_EVENT_BITS 5
  7022. +
  7023. +/*
  7024. + * Special event-handler delay value indicating that the corresponding event
  7025. + * should be handled immediately in the interrupt and not be relayed through
  7026. + * the workqueue. Intended for low-latency events, such as keyboard events.
  7027. + */
  7028. +#define SURFACE_SAM_SSH_EVENT_IMMEDIATE ((unsigned long) -1)
  7029. +
  7030. +
  7031. +#define SURFACE_SAM_PRIORITY_NORMAL 1
  7032. +#define SURFACE_SAM_PRIORITY_HIGH 2
  7033. +
  7034. +
  7035. +struct surface_sam_ssh_buf {
  7036. + u8 cap;
  7037. + u8 len;
  7038. + u8 *data;
  7039. +};
  7040. +
  7041. +struct surface_sam_ssh_rqst {
  7042. + u8 tc; // target category
  7043. + u8 cid; // command ID
  7044. + u8 iid; // instance ID
  7045. + u8 pri; // priority
  7046. + u8 snc; // expect response flag
  7047. + u8 cdl; // command data length (length of payload)
  7048. + u8 *pld; // pointer to payload of length cdl
  7049. +};
  7050. +
  7051. +struct surface_sam_ssh_event {
  7052. + u16 rqid; // event type/source ID
  7053. + u8 tc; // target category
  7054. + u8 cid; // command ID
  7055. + u8 iid; // instance ID
  7056. + u8 pri; // priority
  7057. + u8 len; // length of payload
  7058. + u8 *pld; // payload of length len
  7059. +};
  7060. +
  7061. +
  7062. +typedef int (*surface_sam_ssh_event_handler_fn)(struct surface_sam_ssh_event *event, void *data);
  7063. +typedef unsigned long (*surface_sam_ssh_event_handler_delay)(struct surface_sam_ssh_event *event, void *data);
  7064. +
  7065. +int surface_sam_ssh_consumer_register(struct device *consumer);
  7066. +
  7067. +int surface_sam_ssh_rqst(const struct surface_sam_ssh_rqst *rqst, struct surface_sam_ssh_buf *result);
  7068. +
  7069. +int surface_sam_ssh_enable_event_source(u8 tc, u8 unknown, u16 rqid);
  7070. +int surface_sam_ssh_disable_event_source(u8 tc, u8 unknown, u16 rqid);
  7071. +int surface_sam_ssh_remove_event_handler(u16 rqid);
  7072. +
  7073. +int surface_sam_ssh_set_delayed_event_handler(u16 rqid,
  7074. + surface_sam_ssh_event_handler_fn fn,
  7075. + surface_sam_ssh_event_handler_delay delay,
  7076. + void *data);
  7077. +
  7078. +static inline int surface_sam_ssh_set_event_handler(u16 rqid, surface_sam_ssh_event_handler_fn fn, void *data)
  7079. +{
  7080. + return surface_sam_ssh_set_delayed_event_handler(rqid, fn, NULL, data);
  7081. +}
  7082. +
  7083. +
  7084. +#endif /* _SURFACE_SAM_SSH_H */
  7085. diff --git a/drivers/platform/x86/surface_sam/surface_sam_vhf.c b/drivers/platform/x86/surface_sam/surface_sam_vhf.c
  7086. new file mode 100644
  7087. index 000000000000..a00763805eca
  7088. --- /dev/null
  7089. +++ b/drivers/platform/x86/surface_sam/surface_sam_vhf.c
  7090. @@ -0,0 +1,270 @@
  7091. +// SPDX-License-Identifier: GPL-2.0
  7092. +/*
  7093. + * Virtual HID Framework (VHF) driver for input events via SAM.
  7094. + * Used for keyboard input events on the Surface Laptops.
  7095. + */
  7096. +
  7097. +#include <linux/acpi.h>
  7098. +#include <linux/hid.h>
  7099. +#include <linux/input.h>
  7100. +#include <linux/platform_device.h>
  7101. +#include <linux/types.h>
  7102. +
  7103. +#include "surface_sam_ssh.h"
  7104. +
  7105. +
  7106. +#define USB_VENDOR_ID_MICROSOFT 0x045e
  7107. +#define USB_DEVICE_ID_MS_VHF 0xf001
  7108. +
  7109. +#define VHF_INPUT_NAME "Microsoft Virtual HID Framework Device"
  7110. +
  7111. +/*
  7112. + * Request ID for VHF events. This value is based on the output of the Surface
  7113. + * EC and should not be changed.
  7114. + */
  7115. +#define SAM_EVENT_VHF_RQID 0x0001
  7116. +#define SAM_EVENT_VHF_TC 0x08
  7117. +
  7118. +
  7119. +struct vhf_evtctx {
  7120. + struct device *dev;
  7121. + struct hid_device *hid;
  7122. +};
  7123. +
  7124. +struct vhf_drvdata {
  7125. + struct vhf_evtctx event_ctx;
  7126. +};
  7127. +
  7128. +
  7129. +/*
  7130. + * These report descriptors have been extracted from a Surface Book 2.
  7131. + * They seems to be similar enough to be usable on the Surface Laptop.
  7132. + */
  7133. +static const u8 vhf_hid_desc[] = {
  7134. + // keyboard descriptor (event command ID 0x03)
  7135. + 0x05, 0x01, /* Usage Page (Desktop), */
  7136. + 0x09, 0x06, /* Usage (Keyboard), */
  7137. + 0xA1, 0x01, /* Collection (Application), */
  7138. + 0x85, 0x01, /* Report ID (1), */
  7139. + 0x15, 0x00, /* Logical Minimum (0), */
  7140. + 0x25, 0x01, /* Logical Maximum (1), */
  7141. + 0x75, 0x01, /* Report Size (1), */
  7142. + 0x95, 0x08, /* Report Count (8), */
  7143. + 0x05, 0x07, /* Usage Page (Keyboard), */
  7144. + 0x19, 0xE0, /* Usage Minimum (KB Leftcontrol), */
  7145. + 0x29, 0xE7, /* Usage Maximum (KB Right GUI), */
  7146. + 0x81, 0x02, /* Input (Variable), */
  7147. + 0x75, 0x08, /* Report Size (8), */
  7148. + 0x95, 0x0A, /* Report Count (10), */
  7149. + 0x19, 0x00, /* Usage Minimum (None), */
  7150. + 0x29, 0x91, /* Usage Maximum (KB LANG2), */
  7151. + 0x26, 0xFF, 0x00, /* Logical Maximum (255), */
  7152. + 0x81, 0x00, /* Input, */
  7153. + 0x05, 0x0C, /* Usage Page (Consumer), */
  7154. + 0x0A, 0xC0, 0x02, /* Usage (02C0h), */
  7155. + 0xA1, 0x02, /* Collection (Logical), */
  7156. + 0x1A, 0xC1, 0x02, /* Usage Minimum (02C1h), */
  7157. + 0x2A, 0xC6, 0x02, /* Usage Maximum (02C6h), */
  7158. + 0x95, 0x06, /* Report Count (6), */
  7159. + 0xB1, 0x03, /* Feature (Constant, Variable), */
  7160. + 0xC0, /* End Collection, */
  7161. + 0x05, 0x08, /* Usage Page (LED), */
  7162. + 0x19, 0x01, /* Usage Minimum (01h), */
  7163. + 0x29, 0x03, /* Usage Maximum (03h), */
  7164. + 0x75, 0x01, /* Report Size (1), */
  7165. + 0x95, 0x03, /* Report Count (3), */
  7166. + 0x25, 0x01, /* Logical Maximum (1), */
  7167. + 0x91, 0x02, /* Output (Variable), */
  7168. + 0x95, 0x05, /* Report Count (5), */
  7169. + 0x91, 0x01, /* Output (Constant), */
  7170. + 0xC0, /* End Collection, */
  7171. +
  7172. + // media key descriptor (event command ID 0x04)
  7173. + 0x05, 0x0C, /* Usage Page (Consumer), */
  7174. + 0x09, 0x01, /* Usage (Consumer Control), */
  7175. + 0xA1, 0x01, /* Collection (Application), */
  7176. + 0x85, 0x03, /* Report ID (3), */
  7177. + 0x75, 0x10, /* Report Size (16), */
  7178. + 0x15, 0x00, /* Logical Minimum (0), */
  7179. + 0x26, 0xFF, 0x03, /* Logical Maximum (1023), */
  7180. + 0x19, 0x00, /* Usage Minimum (00h), */
  7181. + 0x2A, 0xFF, 0x03, /* Usage Maximum (03FFh), */
  7182. + 0x81, 0x00, /* Input, */
  7183. + 0xC0, /* End Collection, */
  7184. +};
  7185. +
  7186. +
  7187. +static int vhf_hid_start(struct hid_device *hid)
  7188. +{
  7189. + hid_dbg(hid, "%s\n", __func__);
  7190. + return 0;
  7191. +}
  7192. +
  7193. +static void vhf_hid_stop(struct hid_device *hid)
  7194. +{
  7195. + hid_dbg(hid, "%s\n", __func__);
  7196. +}
  7197. +
  7198. +static int vhf_hid_open(struct hid_device *hid)
  7199. +{
  7200. + hid_dbg(hid, "%s\n", __func__);
  7201. + return 0;
  7202. +}
  7203. +
  7204. +static void vhf_hid_close(struct hid_device *hid)
  7205. +{
  7206. + hid_dbg(hid, "%s\n", __func__);
  7207. +}
  7208. +
  7209. +static int vhf_hid_parse(struct hid_device *hid)
  7210. +{
  7211. + return hid_parse_report(hid, (u8 *)vhf_hid_desc, ARRAY_SIZE(vhf_hid_desc));
  7212. +}
  7213. +
  7214. +static int vhf_hid_raw_request(struct hid_device *hid, unsigned char reportnum,
  7215. + u8 *buf, size_t len, unsigned char rtype,
  7216. + int reqtype)
  7217. +{
  7218. + hid_dbg(hid, "%s\n", __func__);
  7219. + return 0;
  7220. +}
  7221. +
  7222. +static int vhf_hid_output_report(struct hid_device *hid, u8 *buf, size_t len)
  7223. +{
  7224. + hid_dbg(hid, "%s\n", __func__);
  7225. + print_hex_dump_debug("report:", DUMP_PREFIX_OFFSET, 16, 1, buf, len, false);
  7226. +
  7227. + return len;
  7228. +}
  7229. +
  7230. +static struct hid_ll_driver vhf_hid_ll_driver = {
  7231. + .start = vhf_hid_start,
  7232. + .stop = vhf_hid_stop,
  7233. + .open = vhf_hid_open,
  7234. + .close = vhf_hid_close,
  7235. + .parse = vhf_hid_parse,
  7236. + .raw_request = vhf_hid_raw_request,
  7237. + .output_report = vhf_hid_output_report,
  7238. +};
  7239. +
  7240. +
  7241. +static struct hid_device *vhf_create_hid_device(struct platform_device *pdev)
  7242. +{
  7243. + struct hid_device *hid;
  7244. +
  7245. + hid = hid_allocate_device();
  7246. + if (IS_ERR(hid))
  7247. + return hid;
  7248. +
  7249. + hid->dev.parent = &pdev->dev;
  7250. +
  7251. + hid->bus = BUS_VIRTUAL;
  7252. + hid->vendor = USB_VENDOR_ID_MICROSOFT;
  7253. + hid->product = USB_DEVICE_ID_MS_VHF;
  7254. +
  7255. + hid->ll_driver = &vhf_hid_ll_driver;
  7256. +
  7257. + sprintf(hid->name, "%s", VHF_INPUT_NAME);
  7258. +
  7259. + return hid;
  7260. +}
  7261. +
  7262. +static int vhf_event_handler(struct surface_sam_ssh_event *event, void *data)
  7263. +{
  7264. + struct vhf_evtctx *ctx = (struct vhf_evtctx *)data;
  7265. +
  7266. + if (event->tc == 0x08 && (event->cid == 0x03 || event->cid == 0x04))
  7267. + return hid_input_report(ctx->hid, HID_INPUT_REPORT, event->pld, event->len, 1);
  7268. +
  7269. + dev_warn(ctx->dev, "unsupported event (tc = %d, cid = %d)\n", event->tc, event->cid);
  7270. + return 0;
  7271. +}
  7272. +
  7273. +static int surface_sam_vhf_probe(struct platform_device *pdev)
  7274. +{
  7275. + struct vhf_drvdata *drvdata;
  7276. + struct hid_device *hid;
  7277. + int status;
  7278. +
  7279. + // add device link to EC
  7280. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  7281. + if (status)
  7282. + return status == -ENXIO ? -EPROBE_DEFER : status;
  7283. +
  7284. + drvdata = kzalloc(sizeof(struct vhf_drvdata), GFP_KERNEL);
  7285. + if (!drvdata)
  7286. + return -ENOMEM;
  7287. +
  7288. + hid = vhf_create_hid_device(pdev);
  7289. + if (IS_ERR(hid)) {
  7290. + status = PTR_ERR(hid);
  7291. + goto err_probe_hid;
  7292. + }
  7293. +
  7294. + status = hid_add_device(hid);
  7295. + if (status)
  7296. + goto err_add_hid;
  7297. +
  7298. + drvdata->event_ctx.dev = &pdev->dev;
  7299. + drvdata->event_ctx.hid = hid;
  7300. +
  7301. + platform_set_drvdata(pdev, drvdata);
  7302. +
  7303. + status = surface_sam_ssh_set_event_handler(
  7304. + SAM_EVENT_VHF_RQID,
  7305. + vhf_event_handler,
  7306. + &drvdata->event_ctx);
  7307. + if (status)
  7308. + goto err_add_hid;
  7309. +
  7310. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_VHF_TC, 0x01, SAM_EVENT_VHF_RQID);
  7311. + if (status)
  7312. + goto err_event_source;
  7313. +
  7314. + return 0;
  7315. +
  7316. +err_event_source:
  7317. + surface_sam_ssh_remove_event_handler(SAM_EVENT_VHF_RQID);
  7318. +err_add_hid:
  7319. + hid_destroy_device(hid);
  7320. + platform_set_drvdata(pdev, NULL);
  7321. +err_probe_hid:
  7322. + kfree(drvdata);
  7323. + return status;
  7324. +}
  7325. +
  7326. +static int surface_sam_vhf_remove(struct platform_device *pdev)
  7327. +{
  7328. + struct vhf_drvdata *drvdata = platform_get_drvdata(pdev);
  7329. +
  7330. + surface_sam_ssh_disable_event_source(SAM_EVENT_VHF_TC, 0x01, SAM_EVENT_VHF_RQID);
  7331. + surface_sam_ssh_remove_event_handler(SAM_EVENT_VHF_RQID);
  7332. +
  7333. + hid_destroy_device(drvdata->event_ctx.hid);
  7334. + kfree(drvdata);
  7335. +
  7336. + platform_set_drvdata(pdev, NULL);
  7337. + return 0;
  7338. +}
  7339. +
  7340. +
  7341. +static const struct acpi_device_id surface_sam_vhf_match[] = {
  7342. + { "MSHW0096" },
  7343. + { },
  7344. +};
  7345. +MODULE_DEVICE_TABLE(acpi, surface_sam_vhf_match);
  7346. +
  7347. +static struct platform_driver surface_sam_vhf = {
  7348. + .probe = surface_sam_vhf_probe,
  7349. + .remove = surface_sam_vhf_remove,
  7350. + .driver = {
  7351. + .name = "surface_sam_vhf",
  7352. + .acpi_match_table = ACPI_PTR(surface_sam_vhf_match),
  7353. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  7354. + },
  7355. +};
  7356. +module_platform_driver(surface_sam_vhf);
  7357. +
  7358. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  7359. +MODULE_DESCRIPTION("Virtual HID Framework Driver for 5th Generation Surface Devices");
  7360. +MODULE_LICENSE("GPL v2");
  7361. --
  7362. 2.26.0