0001-surface-acpi.patch 198 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406540754085409541054115412541354145415541654175418541954205421542254235424542554265427542854295430543154325433543454355436543754385439544054415442544354445445544654475448544954505451545254535454545554565457545854595460546154625463546454655466546754685469547054715472547354745475547654775478547954805481548254835484548554865487548854895490549154925493549454955496549754985499550055015502550355045505550655075508550955105511551255135514551555165517551855195520552155225523552455255526552755285529553055315532553355345535553655375538553955405541554255435544554555465547554855495550555155525553555455555556555755585559556055615562556355645565556655675568556955705571557255735574557555765577557855795580558155825583558455855586558755885589559055915592559355945595559655975598559956005601560256035604560556065607560856095610561156125613561456155616561756185619562056215622562356245625562656275628562956305631563256335634563556365637563856395640564156425643564456455646564756485649565056515652565356545655565656575658565956605661566256635664566556665667566856695670567156725673567456755676567756785679568056815682568356845685568656875688568956905691569256935694569556965697569856995700570157025703570457055706570757085709571057115712571357145715571657175718571957205721572257235724572557265727572857295730573157325733573457355736573757385739574057415742574357445745574657475748574957505751575257535754575557565757575857595760576157625763576457655766576757685769577057715772577357745775577657775778577957805781578257835784578557865787578857895790579157925793579457955796579757985799580058015802580358045805580658075808580958105811581258135814581558165817581858195820582158225823582458255826582758285829583058315832583358345835583658375838583958405841584258435844584558465847584858495850585158525853585458555856585758585859586058615862586358645865586658675868586958705871587258735874587558765877587858795880588158825883588458855886588758885889589058915892589358945895589658975898589959005901590259035904590559065907590859095910591159125913591459155916591759185919592059215922592359245925592659275928592959305931593259335934593559365937593859395940594159425943594459455946594759485949595059515952595359545955595659575958595959605961596259635964596559665967596859695970597159725973597459755976597759785979598059815982598359845985598659875988598959905991599259935994599559965997599859996000600160026003600460056006600760086009601060116012601360146015601660176018601960206021602260236024602560266027602860296030603160326033603460356036603760386039604060416042604360446045604660476048604960506051605260536054605560566057605860596060606160626063606460656066606760686069607060716072607360746075607660776078607960806081608260836084608560866087608860896090609160926093609460956096609760986099610061016102610361046105610661076108610961106111611261136114611561166117611861196120612161226123612461256126612761286129613061316132613361346135613661376138613961406141614261436144614561466147614861496150615161526153615461556156615761586159616061616162616361646165616661676168616961706171617261736174617561766177617861796180618161826183618461856186618761886189619061916192619361946195619661976198619962006201620262036204620562066207620862096210621162126213621462156216621762186219622062216222622362246225622662276228622962306231623262336234623562366237623862396240624162426243624462456246624762486249625062516252625362546255625662576258625962606261626262636264626562666267626862696270627162726273627462756276627762786279628062816282628362846285628662876288628962906291629262936294629562966297629862996300630163026303630463056306630763086309631063116312631363146315631663176318631963206321632263236324632563266327632863296330633163326333633463356336633763386339634063416342634363446345634663476348634963506351635263536354635563566357635863596360636163626363636463656366636763686369637063716372637363746375637663776378637963806381638263836384638563866387638863896390639163926393639463956396639763986399640064016402640364046405640664076408640964106411641264136414641564166417641864196420642164226423642464256426642764286429643064316432643364346435643664376438643964406441644264436444644564466447644864496450645164526453645464556456645764586459646064616462646364646465646664676468646964706471647264736474647564766477647864796480648164826483648464856486648764886489649064916492649364946495649664976498649965006501650265036504650565066507650865096510651165126513651465156516651765186519652065216522652365246525652665276528652965306531653265336534653565366537653865396540654165426543654465456546654765486549655065516552655365546555655665576558655965606561656265636564656565666567656865696570657165726573657465756576657765786579658065816582658365846585658665876588658965906591659265936594659565966597659865996600660166026603660466056606660766086609661066116612661366146615661666176618661966206621662266236624662566266627662866296630663166326633663466356636663766386639664066416642664366446645664666476648664966506651665266536654665566566657665866596660666166626663666466656666666766686669667066716672667366746675667666776678667966806681668266836684668566866687668866896690669166926693669466956696669766986699670067016702670367046705670667076708670967106711671267136714671567166717671867196720672167226723672467256726672767286729673067316732673367346735673667376738673967406741674267436744674567466747674867496750675167526753675467556756675767586759676067616762676367646765676667676768676967706771677267736774677567766777677867796780678167826783678467856786678767886789679067916792679367946795679667976798679968006801680268036804680568066807680868096810681168126813681468156816681768186819682068216822682368246825682668276828682968306831683268336834683568366837683868396840684168426843684468456846684768486849685068516852685368546855685668576858685968606861686268636864686568666867686868696870687168726873687468756876687768786879688068816882688368846885688668876888688968906891689268936894689568966897689868996900690169026903690469056906690769086909691069116912691369146915691669176918691969206921692269236924692569266927692869296930693169326933693469356936693769386939694069416942694369446945694669476948694969506951695269536954695569566957695869596960696169626963696469656966696769686969697069716972697369746975697669776978697969806981698269836984698569866987698869896990699169926993699469956996699769986999700070017002700370047005700670077008700970107011701270137014701570167017701870197020702170227023702470257026702770287029703070317032703370347035703670377038703970407041704270437044704570467047704870497050705170527053705470557056705770587059706070617062706370647065706670677068706970707071707270737074707570767077707870797080708170827083708470857086708770887089709070917092709370947095709670977098709971007101710271037104710571067107710871097110711171127113711471157116711771187119712071217122712371247125712671277128712971307131713271337134713571367137713871397140714171427143714471457146714771487149715071517152715371547155715671577158715971607161716271637164716571667167716871697170717171727173717471757176717771787179718071817182718371847185718671877188718971907191719271937194719571967197719871997200720172027203720472057206720772087209721072117212721372147215721672177218721972207221722272237224722572267227722872297230723172327233723472357236723772387239724072417242724372447245724672477248724972507251725272537254725572567257725872597260726172627263726472657266726772687269727072717272727372747275727672777278727972807281728272837284728572867287728872897290729172927293729472957296729772987299730073017302730373047305730673077308730973107311731273137314731573167317731873197320732173227323732473257326732773287329733073317332733373347335733673377338733973407341734273437344734573467347734873497350735173527353735473557356735773587359736073617362736373647365736673677368736973707371737273737374737573767377737873797380738173827383738473857386738773887389739073917392739373947395739673977398739974007401740274037404740574067407740874097410741174127413741474157416741774187419742074217422742374247425742674277428742974307431743274337434743574367437743874397440744174427443744474457446744774487449745074517452745374547455745674577458745974607461746274637464746574667467746874697470747174727473747474757476747774787479748074817482748374847485748674877488748974907491749274937494749574967497749874997500750175027503750475057506750775087509751075117512751375147515751675177518751975207521752275237524752575267527752875297530753175327533753475357536753775387539754075417542754375447545754675477548754975507551755275537554755575567557755875597560756175627563756475657566756775687569757075717572757375747575757675777578757975807581758275837584758575867587758875897590
  1. From fa60a6d5cdd3cac447311bf2185ce31fe13942fd Mon Sep 17 00:00:00 2001
  2. From: qzed <qzed@users.noreply.github.com>
  3. Date: Mon, 26 Aug 2019 01:11:08 +0200
  4. Subject: [PATCH 01/10] surface-acpi
  5. ---
  6. drivers/acpi/acpica/dsopcode.c | 2 +-
  7. drivers/acpi/acpica/exfield.c | 12 +-
  8. drivers/platform/x86/Kconfig | 1 +
  9. drivers/platform/x86/Makefile | 1 +
  10. drivers/platform/x86/surface_sam/Kconfig | 166 ++
  11. drivers/platform/x86/surface_sam/Makefile | 10 +
  12. .../x86/surface_sam/surface_sam_dtx.c | 623 ++++++
  13. .../x86/surface_sam/surface_sam_hps.c | 1110 +++++++++++
  14. .../x86/surface_sam/surface_sam_san.c | 901 +++++++++
  15. .../x86/surface_sam/surface_sam_san.h | 29 +
  16. .../x86/surface_sam/surface_sam_sid.c | 117 ++
  17. .../x86/surface_sam/surface_sam_sid_gpelid.c | 219 ++
  18. .../surface_sam/surface_sam_sid_perfmode.c | 225 +++
  19. .../x86/surface_sam/surface_sam_sid_power.c | 1259 ++++++++++++
  20. .../x86/surface_sam/surface_sam_sid_vhf.c | 440 ++++
  21. .../x86/surface_sam/surface_sam_ssh.c | 1773 +++++++++++++++++
  22. .../x86/surface_sam/surface_sam_ssh.h | 97 +
  23. .../x86/surface_sam/surface_sam_vhf.c | 276 +++
  24. drivers/tty/serdev/core.c | 111 +-
  25. 19 files changed, 7356 insertions(+), 16 deletions(-)
  26. create mode 100644 drivers/platform/x86/surface_sam/Kconfig
  27. create mode 100644 drivers/platform/x86/surface_sam/Makefile
  28. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_dtx.c
  29. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_hps.c
  30. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_san.c
  31. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_san.h
  32. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid.c
  33. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  34. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  35. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  36. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  37. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_ssh.c
  38. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_ssh.h
  39. create mode 100644 drivers/platform/x86/surface_sam/surface_sam_vhf.c
  40. diff --git a/drivers/acpi/acpica/dsopcode.c b/drivers/acpi/acpica/dsopcode.c
  41. index 10f32b62608e..7b2a4987f050 100644
  42. --- a/drivers/acpi/acpica/dsopcode.c
  43. +++ b/drivers/acpi/acpica/dsopcode.c
  44. @@ -123,7 +123,7 @@ acpi_ds_init_buffer_field(u16 aml_opcode,
  45. /* Offset is in bits, count is in bits */
  46. - field_flags = AML_FIELD_ACCESS_BYTE;
  47. + field_flags = AML_FIELD_ACCESS_BUFFER;
  48. bit_offset = offset;
  49. bit_count = (u32) length_desc->integer.value;
  50. diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c
  51. index d3d2dbfba680..0b7f617a6e9b 100644
  52. --- a/drivers/acpi/acpica/exfield.c
  53. +++ b/drivers/acpi/acpica/exfield.c
  54. @@ -109,6 +109,7 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
  55. union acpi_operand_object *buffer_desc;
  56. void *buffer;
  57. u32 buffer_length;
  58. + u8 field_flags;
  59. ACPI_FUNCTION_TRACE_PTR(ex_read_data_from_field, obj_desc);
  60. @@ -157,11 +158,16 @@ acpi_ex_read_data_from_field(struct acpi_walk_state *walk_state,
  61. * Note: Field.length is in bits.
  62. */
  63. buffer_length =
  64. - (acpi_size)ACPI_ROUND_BITS_UP_TO_BYTES(obj_desc->field.bit_length);
  65. + (acpi_size)ACPI_ROUND_BITS_UP_TO_BYTES(obj_desc->common_field.bit_length);
  66. + field_flags = obj_desc->common_field.field_flags;
  67. - if (buffer_length > acpi_gbl_integer_byte_width) {
  68. + if (buffer_length > acpi_gbl_integer_byte_width ||
  69. + (field_flags & AML_FIELD_ACCESS_TYPE_MASK) == AML_FIELD_ACCESS_BUFFER) {
  70. - /* Field is too large for an Integer, create a Buffer instead */
  71. + /*
  72. + * Field is either too large for an Integer, or a actually of type
  73. + * buffer, so create a Buffer.
  74. + */
  75. buffer_desc = acpi_ut_create_buffer_object(buffer_length);
  76. if (!buffer_desc) {
  77. diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
  78. index 1b67bb578f9f..9dea69a1526a 100644
  79. --- a/drivers/platform/x86/Kconfig
  80. +++ b/drivers/platform/x86/Kconfig
  81. @@ -1335,6 +1335,7 @@ config PCENGINES_APU2
  82. will be called pcengines-apuv2.
  83. source "drivers/platform/x86/intel_speed_select_if/Kconfig"
  84. +source "drivers/platform/x86/surface_sam/Kconfig"
  85. endif # X86_PLATFORM_DEVICES
  86. diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
  87. index 415104033060..18f5a4ba7244 100644
  88. --- a/drivers/platform/x86/Makefile
  89. +++ b/drivers/platform/x86/Makefile
  90. @@ -100,3 +100,4 @@ obj-$(CONFIG_I2C_MULTI_INSTANTIATE) += i2c-multi-instantiate.o
  91. obj-$(CONFIG_INTEL_ATOMISP2_PM) += intel_atomisp2_pm.o
  92. obj-$(CONFIG_PCENGINES_APU2) += pcengines-apuv2.o
  93. obj-$(CONFIG_INTEL_SPEED_SELECT_INTERFACE) += intel_speed_select_if/
  94. +obj-$(CONFIG_SURFACE_SAM) += surface_sam/
  95. diff --git a/drivers/platform/x86/surface_sam/Kconfig b/drivers/platform/x86/surface_sam/Kconfig
  96. new file mode 100644
  97. index 000000000000..4eff58a121cb
  98. --- /dev/null
  99. +++ b/drivers/platform/x86/surface_sam/Kconfig
  100. @@ -0,0 +1,166 @@
  101. +menuconfig SURFACE_SAM
  102. + depends on ACPI
  103. + tristate "Microsoft Surface/System Aggregator Module and Platform Drivers"
  104. + ---help---
  105. + Drivers for the Surface/System Aggregator Module (SAM) of Microsoft
  106. + Surface devices.
  107. +
  108. + SAM is an embedded controller that provides access to various
  109. + functionalities on these devices, including battery status, keyboard
  110. + events (on the Laptops) and many more.
  111. +
  112. + Say M/Y here if you have a Microsoft Surface device with a SAM device
  113. + (i.e. 5th generation or later).
  114. +
  115. +config SURFACE_SAM_SSH
  116. + tristate "Surface Serial Hub Driver"
  117. + depends on SURFACE_SAM
  118. + depends on X86_INTEL_LPSS
  119. + depends on SERIAL_8250_DW
  120. + depends on SERIAL_8250_DMA
  121. + depends on SERIAL_DEV_CTRL_TTYPORT
  122. + select CRC_CCITT
  123. + default m
  124. + ---help---
  125. + Surface Serial Hub driver for 5th generation (or later) Microsoft
  126. + Surface devices.
  127. +
  128. + This is the base driver for the embedded serial controller found on
  129. + 5th generation (and later) Microsoft Surface devices (e.g. Book 2,
  130. + Laptop, Laptop 2, Pro 2017, Pro 6, ...). This driver itself only
  131. + provides access to the embedded controller (SAM) and subsequent
  132. + drivers are required for the respective functionalities.
  133. +
  134. + If you have a 5th generation (or later) Microsoft Surface device, say
  135. + Y or M here.
  136. +
  137. +config SURFACE_SAM_SSH_DEBUG_DEVICE
  138. + bool "Surface Serial Hub Debug Device"
  139. + depends on SURFACE_SAM_SSH
  140. + depends on SYSFS
  141. + default n
  142. + ---help---
  143. + Debug device for direct communication with the embedded controller
  144. + found on 5th generation (and later) Microsoft Surface devices (e.g.
  145. + Book 2, Laptop, Laptop 2, Pro 2017, Pro 6, ...) via sysfs.
  146. +
  147. + If you are not sure, say N here.
  148. +
  149. +config SURFACE_SAM_SAN
  150. + tristate "Surface ACPI Notify Driver"
  151. + depends on SURFACE_SAM_SSH
  152. + default m
  153. + ---help---
  154. + Surface ACPI Notify driver for 5th generation (or later) Microsoft
  155. + Surface devices.
  156. +
  157. + This driver enables basic ACPI events and requests, such as battery
  158. + status requests/events, thermal events, lid status, and possibly more,
  159. + which would otherwise not work on these devices.
  160. +
  161. + If you are not sure, say M here.
  162. +
  163. +config SURFACE_SAM_VHF
  164. + tristate "Surface Virtual HID Framework Driver"
  165. + depends on SURFACE_SAM_SSH
  166. + depends on HID
  167. + default m
  168. + ---help---
  169. + Surface Virtual HID Framework driver for 5th generation (or later)
  170. + Microsoft Surface devices.
  171. +
  172. + This driver provides support for the Microsoft Virtual HID framework,
  173. + which is required for keyboard support on the Surface Laptop 1 and 2.
  174. +
  175. + If you are not sure, say M here.
  176. +
  177. +config SURFACE_SAM_DTX
  178. + tristate "Surface Detachment System (DTX) Driver"
  179. + depends on SURFACE_SAM_SSH
  180. + depends on INPUT
  181. + default m
  182. + ---help---
  183. + Surface Detachment System (DTX) driver for the Microsoft Surface Book
  184. + 2. This driver provides support for proper detachment handling in
  185. + user-space, status-events relating to the base and support for
  186. + the safe-guard keeping the base attached when the discrete GPU
  187. + contained in it is running via the special /dev/surface-dtx device.
  188. +
  189. + Also provides a standard input device to provide SW_TABLET_MODE events
  190. + upon device mode change.
  191. +
  192. + If you are not sure, say M here.
  193. +
  194. +config SURFACE_SAM_HPS
  195. + tristate "Surface dGPU Hot-Plug System (dGPU-HPS) Driver"
  196. + depends on SURFACE_SAM_SSH
  197. + depends on SURFACE_SAM_SAN
  198. + default m
  199. + ---help---
  200. + Driver to properly handle hot-plugging and explicit power-on/power-off
  201. + of the discrete GPU (dGPU) on the Surface Book 2.
  202. +
  203. + If you are not sure, say M here.
  204. +
  205. +config SURFACE_SAM_SID
  206. + tristate "Surface Platform Integration Driver"
  207. + depends on SURFACE_SAM_SSH
  208. + default m
  209. + ---help---
  210. + Surface Platform Integration Driver for the Microsoft Surface Devices.
  211. + This driver loads various model-specific sub-drivers, including
  212. + battery and keyboard support on 7th generation Surface devices, proper
  213. + lid setup to enable device wakeup when the lid is opened on multiple
  214. + models, as well as performance mode setting support on the Surface
  215. + Book 2.
  216. +
  217. + If you are not sure, say M here.
  218. +
  219. +config SURFACE_SAM_SID_GPELID
  220. + tristate "Surface Lid Wakeup Driver"
  221. + depends on SURFACE_SAM_SID
  222. + default m
  223. + ---help---
  224. + Driver to set up device wake-up via lid on Intel-based Microsoft
  225. + Surface devices. These devices do not wake up from sleep as their GPE
  226. + interrupt is not configured automatically. This driver solves that
  227. + problem.
  228. +
  229. + If you are not sure, say M here.
  230. +
  231. +config SURFACE_SAM_SID_PERFMODE
  232. + tristate "Surface Performance Mode Driver"
  233. + depends on SURFACE_SAM_SID
  234. + depends on SYSFS
  235. + default m
  236. + ---help---
  237. + This driver provides suport for setting performance-modes on Surface
  238. + devices via the perf_mode sysfs attribute. Currently only supports the
  239. + Surface Book 2. Performance-modes directly influence the fan-profile
  240. + of the device, allowing to choose between higher performance or
  241. + quieter operation.
  242. +
  243. + If you are not sure, say M here.
  244. +
  245. +config SURFACE_SAM_SID_VHF
  246. + tristate "Surface SAM HID Driver"
  247. + depends on SURFACE_SAM_SID
  248. + depends on HID
  249. + default m
  250. + ---help---
  251. + This driver provides support for HID devices connected via the Surface
  252. + SAM embedded controller. It provides support for keyboard and touchpad
  253. + on the Surface Laptop 3 models.
  254. +
  255. + If you are not sure, say M here.
  256. +
  257. +config SURFACE_SAM_SID_POWER
  258. + tristate "Surface SAM Battery/AC Driver"
  259. + depends on SURFACE_SAM_SID
  260. + select POWER_SUPPLY
  261. + default m
  262. + ---help---
  263. + This driver provides support for the battery and AC on 7th generation
  264. + Surface devices.
  265. +
  266. + If you are not sure, say M here.
  267. diff --git a/drivers/platform/x86/surface_sam/Makefile b/drivers/platform/x86/surface_sam/Makefile
  268. new file mode 100644
  269. index 000000000000..188975ccde5c
  270. --- /dev/null
  271. +++ b/drivers/platform/x86/surface_sam/Makefile
  272. @@ -0,0 +1,10 @@
  273. +obj-$(CONFIG_SURFACE_SAM_SSH) += surface_sam_ssh.o
  274. +obj-$(CONFIG_SURFACE_SAM_SAN) += surface_sam_san.o
  275. +obj-$(CONFIG_SURFACE_SAM_DTX) += surface_sam_dtx.o
  276. +obj-$(CONFIG_SURFACE_SAM_HPS) += surface_sam_hps.o
  277. +obj-$(CONFIG_SURFACE_SAM_VHF) += surface_sam_vhf.o
  278. +obj-$(CONFIG_SURFACE_SAM_SID) += surface_sam_sid.o
  279. +obj-$(CONFIG_SURFACE_SAM_SID_GPELID) += surface_sam_sid_gpelid.o
  280. +obj-$(CONFIG_SURFACE_SAM_SID_PERFMODE) += surface_sam_sid_perfmode.o
  281. +obj-$(CONFIG_SURFACE_SAM_SID_POWER) += surface_sam_sid_power.o
  282. +obj-$(CONFIG_SURFACE_SAM_SID_VHF) += surface_sam_sid_vhf.o
  283. diff --git a/drivers/platform/x86/surface_sam/surface_sam_dtx.c b/drivers/platform/x86/surface_sam/surface_sam_dtx.c
  284. new file mode 100644
  285. index 000000000000..4b924de6ab09
  286. --- /dev/null
  287. +++ b/drivers/platform/x86/surface_sam/surface_sam_dtx.c
  288. @@ -0,0 +1,623 @@
  289. +/*
  290. + * Detachment system (DTX) driver for Microsoft Surface Book 2.
  291. + */
  292. +
  293. +#include <linux/acpi.h>
  294. +#include <linux/delay.h>
  295. +#include <linux/fs.h>
  296. +#include <linux/input.h>
  297. +#include <linux/ioctl.h>
  298. +#include <linux/kernel.h>
  299. +#include <linux/miscdevice.h>
  300. +#include <linux/module.h>
  301. +#include <linux/poll.h>
  302. +#include <linux/rculist.h>
  303. +#include <linux/slab.h>
  304. +#include <linux/spinlock.h>
  305. +#include <linux/platform_device.h>
  306. +
  307. +#include "surface_sam_ssh.h"
  308. +
  309. +
  310. +#define USB_VENDOR_ID_MICROSOFT 0x045e
  311. +#define USB_DEVICE_ID_MS_SURFACE_BASE_2_INTEGRATION 0x0922
  312. +
  313. +// name copied from MS device manager
  314. +#define DTX_INPUT_NAME "Microsoft Surface Base 2 Integration Device"
  315. +
  316. +
  317. +#define DTX_CMD_LATCH_LOCK _IO(0x11, 0x01)
  318. +#define DTX_CMD_LATCH_UNLOCK _IO(0x11, 0x02)
  319. +#define DTX_CMD_LATCH_REQUEST _IO(0x11, 0x03)
  320. +#define DTX_CMD_LATCH_OPEN _IO(0x11, 0x04)
  321. +#define DTX_CMD_GET_OPMODE _IOR(0x11, 0x05, int)
  322. +
  323. +#define SAM_RQST_DTX_TC 0x11
  324. +#define SAM_RQST_DTX_CID_LATCH_LOCK 0x06
  325. +#define SAM_RQST_DTX_CID_LATCH_UNLOCK 0x07
  326. +#define SAM_RQST_DTX_CID_LATCH_REQUEST 0x08
  327. +#define SAM_RQST_DTX_CID_LATCH_OPEN 0x09
  328. +#define SAM_RQST_DTX_CID_GET_OPMODE 0x0D
  329. +
  330. +#define SAM_EVENT_DTX_TC 0x11
  331. +#define SAM_EVENT_DTX_RQID 0x0011
  332. +#define SAM_EVENT_DTX_CID_CONNECTION 0x0c
  333. +#define SAM_EVENT_DTX_CID_BUTTON 0x0e
  334. +#define SAM_EVENT_DTX_CID_ERROR 0x0f
  335. +#define SAM_EVENT_DTX_CID_LATCH_STATUS 0x11
  336. +
  337. +#define DTX_OPMODE_TABLET 0x00
  338. +#define DTX_OPMODE_LAPTOP 0x01
  339. +#define DTX_OPMODE_STUDIO 0x02
  340. +
  341. +#define DTX_LATCH_CLOSED 0x00
  342. +#define DTX_LATCH_OPENED 0x01
  343. +
  344. +
  345. +// Warning: This must always be a power of 2!
  346. +#define DTX_CLIENT_BUF_SIZE 16
  347. +
  348. +#define DTX_CONNECT_OPMODE_DELAY 1000
  349. +
  350. +#define DTX_ERR KERN_ERR "surface_sam_dtx: "
  351. +#define DTX_WARN KERN_WARNING "surface_sam_dtx: "
  352. +
  353. +
  354. +struct surface_dtx_event {
  355. + u8 type;
  356. + u8 code;
  357. + u8 arg0;
  358. + u8 arg1;
  359. +} __packed;
  360. +
  361. +struct surface_dtx_dev {
  362. + wait_queue_head_t waitq;
  363. + struct miscdevice mdev;
  364. + spinlock_t client_lock;
  365. + struct list_head client_list;
  366. + struct mutex mutex;
  367. + bool active;
  368. + spinlock_t input_lock;
  369. + struct input_dev *input_dev;
  370. +};
  371. +
  372. +struct surface_dtx_client {
  373. + struct list_head node;
  374. + struct surface_dtx_dev *ddev;
  375. + struct fasync_struct *fasync;
  376. + spinlock_t buffer_lock;
  377. + unsigned int buffer_head;
  378. + unsigned int buffer_tail;
  379. + struct surface_dtx_event buffer[DTX_CLIENT_BUF_SIZE];
  380. +};
  381. +
  382. +
  383. +static struct surface_dtx_dev surface_dtx_dev;
  384. +
  385. +
  386. +static int surface_sam_query_opmpde(void)
  387. +{
  388. + u8 result_buf[1];
  389. + int status;
  390. +
  391. + struct surface_sam_ssh_rqst rqst = {
  392. + .tc = SAM_RQST_DTX_TC,
  393. + .cid = SAM_RQST_DTX_CID_GET_OPMODE,
  394. + .iid = 0,
  395. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  396. + .snc = 1,
  397. + .cdl = 0,
  398. + .pld = NULL,
  399. + };
  400. +
  401. + struct surface_sam_ssh_buf result = {
  402. + .cap = 1,
  403. + .len = 0,
  404. + .data = result_buf,
  405. + };
  406. +
  407. + status = surface_sam_ssh_rqst(&rqst, &result);
  408. + if (status) {
  409. + return status;
  410. + }
  411. +
  412. + if (result.len != 1) {
  413. + return -EFAULT;
  414. + }
  415. +
  416. + return result.data[0];
  417. +}
  418. +
  419. +
  420. +static int dtx_cmd_simple(u8 cid)
  421. +{
  422. + struct surface_sam_ssh_rqst rqst = {
  423. + .tc = SAM_RQST_DTX_TC,
  424. + .cid = cid,
  425. + .iid = 0,
  426. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  427. + .snc = 0,
  428. + .cdl = 0,
  429. + .pld = NULL,
  430. + };
  431. +
  432. + return surface_sam_ssh_rqst(&rqst, NULL);
  433. +}
  434. +
  435. +static int dtx_cmd_get_opmode(int __user *buf)
  436. +{
  437. + int opmode = surface_sam_query_opmpde();
  438. + if (opmode < 0) {
  439. + return opmode;
  440. + }
  441. +
  442. + if (put_user(opmode, buf)) {
  443. + return -EACCES;
  444. + }
  445. +
  446. + return 0;
  447. +}
  448. +
  449. +
  450. +static int surface_dtx_open(struct inode *inode, struct file *file)
  451. +{
  452. + struct surface_dtx_dev *ddev = container_of(file->private_data, struct surface_dtx_dev, mdev);
  453. + struct surface_dtx_client *client;
  454. +
  455. + // initialize client
  456. + client = kzalloc(sizeof(struct surface_dtx_client), GFP_KERNEL);
  457. + if (!client) {
  458. + return -ENOMEM;
  459. + }
  460. +
  461. + spin_lock_init(&client->buffer_lock);
  462. + client->buffer_head = 0;
  463. + client->buffer_tail = 0;
  464. + client->ddev = ddev;
  465. +
  466. + // attach client
  467. + spin_lock(&ddev->client_lock);
  468. + list_add_tail_rcu(&client->node, &ddev->client_list);
  469. + spin_unlock(&ddev->client_lock);
  470. +
  471. + file->private_data = client;
  472. + nonseekable_open(inode, file);
  473. +
  474. + return 0;
  475. +}
  476. +
  477. +static int surface_dtx_release(struct inode *inode, struct file *file)
  478. +{
  479. + struct surface_dtx_client *client = file->private_data;
  480. +
  481. + // detach client
  482. + spin_lock(&client->ddev->client_lock);
  483. + list_del_rcu(&client->node);
  484. + spin_unlock(&client->ddev->client_lock);
  485. + synchronize_rcu();
  486. +
  487. + kfree(client);
  488. + file->private_data = NULL;
  489. +
  490. + return 0;
  491. +}
  492. +
  493. +static ssize_t surface_dtx_read(struct file *file, char __user *buf, size_t count, loff_t *offs)
  494. +{
  495. + struct surface_dtx_client *client = file->private_data;
  496. + struct surface_dtx_dev *ddev = client->ddev;
  497. + struct surface_dtx_event event;
  498. + size_t read = 0;
  499. + int status = 0;
  500. +
  501. + if (count != 0 && count < sizeof(struct surface_dtx_event)) {
  502. + return -EINVAL;
  503. + }
  504. +
  505. + if (!ddev->active) {
  506. + return -ENODEV;
  507. + }
  508. +
  509. + // check availability
  510. + if (client->buffer_head == client->buffer_tail){
  511. + if (file->f_flags & O_NONBLOCK) {
  512. + return -EAGAIN;
  513. + }
  514. +
  515. + status = wait_event_interruptible(ddev->waitq,
  516. + client->buffer_head != client->buffer_tail ||
  517. + !ddev->active);
  518. + if (status) {
  519. + return status;
  520. + }
  521. +
  522. + if (!ddev->active) {
  523. + return -ENODEV;
  524. + }
  525. + }
  526. +
  527. + // copy events one by one
  528. + while (read + sizeof(struct surface_dtx_event) <= count) {
  529. + spin_lock_irq(&client->buffer_lock);
  530. +
  531. + if(client->buffer_head == client->buffer_tail) {
  532. + spin_unlock_irq(&client->buffer_lock);
  533. + break;
  534. + }
  535. +
  536. + // get one event
  537. + event = client->buffer[client->buffer_tail];
  538. + client->buffer_tail = (client->buffer_tail + 1) & (DTX_CLIENT_BUF_SIZE - 1);
  539. + spin_unlock_irq(&client->buffer_lock);
  540. +
  541. + // copy to userspace
  542. + if(copy_to_user(buf, &event, sizeof(struct surface_dtx_event))) {
  543. + return -EFAULT;
  544. + }
  545. +
  546. + read += sizeof(struct surface_dtx_event);
  547. + }
  548. +
  549. + return read;
  550. +}
  551. +
  552. +static __poll_t surface_dtx_poll(struct file *file, struct poll_table_struct *pt)
  553. +{
  554. + struct surface_dtx_client *client = file->private_data;
  555. + int mask;
  556. +
  557. + poll_wait(file, &client->ddev->waitq, pt);
  558. +
  559. + if (client->ddev->active) {
  560. + mask = EPOLLOUT | EPOLLWRNORM;
  561. + } else {
  562. + mask = EPOLLHUP | EPOLLERR;
  563. + }
  564. +
  565. + if (client->buffer_head != client->buffer_tail) {
  566. + mask |= EPOLLIN | EPOLLRDNORM;
  567. + }
  568. +
  569. + return mask;
  570. +}
  571. +
  572. +static int surface_dtx_fasync(int fd, struct file *file, int on)
  573. +{
  574. + struct surface_dtx_client *client = file->private_data;
  575. +
  576. + return fasync_helper(fd, file, on, &client->fasync);
  577. +}
  578. +
  579. +static long surface_dtx_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  580. +{
  581. + struct surface_dtx_client *client = file->private_data;
  582. + struct surface_dtx_dev *ddev = client->ddev;
  583. + int status;
  584. +
  585. + status = mutex_lock_interruptible(&ddev->mutex);
  586. + if (status) {
  587. + return status;
  588. + }
  589. +
  590. + if (!ddev->active) {
  591. + mutex_unlock(&ddev->mutex);
  592. + return -ENODEV;
  593. + }
  594. +
  595. + switch (cmd) {
  596. + case DTX_CMD_LATCH_LOCK:
  597. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_LOCK);
  598. + break;
  599. +
  600. + case DTX_CMD_LATCH_UNLOCK:
  601. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_UNLOCK);
  602. + break;
  603. +
  604. + case DTX_CMD_LATCH_REQUEST:
  605. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_REQUEST);
  606. + break;
  607. +
  608. + case DTX_CMD_LATCH_OPEN:
  609. + status = dtx_cmd_simple(SAM_RQST_DTX_CID_LATCH_OPEN);
  610. + break;
  611. +
  612. + case DTX_CMD_GET_OPMODE:
  613. + status = dtx_cmd_get_opmode((int __user *)arg);
  614. + break;
  615. +
  616. + default:
  617. + status = -EINVAL;
  618. + break;
  619. + }
  620. +
  621. + mutex_unlock(&ddev->mutex);
  622. + return status;
  623. +}
  624. +
  625. +static const struct file_operations surface_dtx_fops = {
  626. + .owner = THIS_MODULE,
  627. + .open = surface_dtx_open,
  628. + .release = surface_dtx_release,
  629. + .read = surface_dtx_read,
  630. + .poll = surface_dtx_poll,
  631. + .fasync = surface_dtx_fasync,
  632. + .unlocked_ioctl = surface_dtx_ioctl,
  633. + .llseek = no_llseek,
  634. +};
  635. +
  636. +static struct surface_dtx_dev surface_dtx_dev = {
  637. + .mdev = {
  638. + .minor = MISC_DYNAMIC_MINOR,
  639. + .name = "surface_dtx",
  640. + .fops = &surface_dtx_fops,
  641. + },
  642. + .client_lock = __SPIN_LOCK_UNLOCKED(),
  643. + .input_lock = __SPIN_LOCK_UNLOCKED(),
  644. + .mutex = __MUTEX_INITIALIZER(surface_dtx_dev.mutex),
  645. + .active = false,
  646. +};
  647. +
  648. +
  649. +static void surface_dtx_push_event(struct surface_dtx_dev *ddev, struct surface_dtx_event *event)
  650. +{
  651. + struct surface_dtx_client *client;
  652. +
  653. + rcu_read_lock();
  654. + list_for_each_entry_rcu(client, &ddev->client_list, node) {
  655. + spin_lock(&client->buffer_lock);
  656. +
  657. + client->buffer[client->buffer_head++] = *event;
  658. + client->buffer_head &= DTX_CLIENT_BUF_SIZE - 1;
  659. +
  660. + if (unlikely(client->buffer_head == client->buffer_tail)) {
  661. + printk(DTX_WARN "event buffer overrun\n");
  662. + client->buffer_tail = (client->buffer_tail + 1) & (DTX_CLIENT_BUF_SIZE - 1);
  663. + }
  664. +
  665. + spin_unlock(&client->buffer_lock);
  666. +
  667. + kill_fasync(&client->fasync, SIGIO, POLL_IN);
  668. + }
  669. + rcu_read_unlock();
  670. +
  671. + wake_up_interruptible(&ddev->waitq);
  672. +}
  673. +
  674. +
  675. +static void surface_dtx_update_opmpde(struct surface_dtx_dev *ddev)
  676. +{
  677. + struct surface_dtx_event event;
  678. + int opmode;
  679. +
  680. + // get operation mode
  681. + opmode = surface_sam_query_opmpde();
  682. + if (opmode < 0) {
  683. + printk(DTX_ERR "EC request failed with error %d\n", opmode);
  684. + }
  685. +
  686. + // send DTX event
  687. + event.type = 0x11;
  688. + event.code = 0x0D;
  689. + event.arg0 = opmode;
  690. + event.arg1 = 0x00;
  691. +
  692. + surface_dtx_push_event(ddev, &event);
  693. +
  694. + // send SW_TABLET_MODE event
  695. + spin_lock(&ddev->input_lock);
  696. + input_report_switch(ddev->input_dev, SW_TABLET_MODE, opmode == 0x00);
  697. + input_sync(ddev->input_dev);
  698. + spin_unlock(&ddev->input_lock);
  699. +}
  700. +
  701. +static int surface_dtx_evt_dtx(struct surface_sam_ssh_event *in_event, void *data)
  702. +{
  703. + struct surface_dtx_dev *ddev = data;
  704. + struct surface_dtx_event event;
  705. +
  706. + switch (in_event->cid) {
  707. + case SAM_EVENT_DTX_CID_CONNECTION:
  708. + case SAM_EVENT_DTX_CID_BUTTON:
  709. + case SAM_EVENT_DTX_CID_ERROR:
  710. + case SAM_EVENT_DTX_CID_LATCH_STATUS:
  711. + if (in_event->len > 2) {
  712. + printk(DTX_ERR "unexpected payload size (cid: %x, len: %u)\n",
  713. + in_event->cid, in_event->len);
  714. + return 0;
  715. + }
  716. +
  717. + event.type = in_event->tc;
  718. + event.code = in_event->cid;
  719. + event.arg0 = in_event->len >= 1 ? in_event->pld[0] : 0x00;
  720. + event.arg1 = in_event->len >= 2 ? in_event->pld[1] : 0x00;
  721. + surface_dtx_push_event(ddev, &event);
  722. + break;
  723. +
  724. + default:
  725. + printk(DTX_WARN "unhandled dtx event (cid: %x)\n", in_event->cid);
  726. + }
  727. +
  728. + // update device mode
  729. + if (in_event->cid == SAM_EVENT_DTX_CID_CONNECTION) {
  730. + if (in_event->pld[0]) {
  731. + // Note: we're already in a workqueue task
  732. + msleep(DTX_CONNECT_OPMODE_DELAY);
  733. + }
  734. +
  735. + surface_dtx_update_opmpde(ddev);
  736. + }
  737. +
  738. + return 0;
  739. +}
  740. +
  741. +static int surface_dtx_events_setup(struct surface_dtx_dev *ddev)
  742. +{
  743. + int status;
  744. +
  745. + status = surface_sam_ssh_set_event_handler(SAM_EVENT_DTX_RQID, surface_dtx_evt_dtx, ddev);
  746. + if (status) {
  747. + goto err_handler;
  748. + }
  749. +
  750. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_DTX_TC, 0x01, SAM_EVENT_DTX_RQID);
  751. + if (status) {
  752. + goto err_source;
  753. + }
  754. +
  755. + return 0;
  756. +
  757. +err_source:
  758. + surface_sam_ssh_remove_event_handler(SAM_EVENT_DTX_RQID);
  759. +err_handler:
  760. + return status;
  761. +}
  762. +
  763. +static void surface_dtx_events_disable(void)
  764. +{
  765. + surface_sam_ssh_disable_event_source(SAM_EVENT_DTX_TC, 0x01, SAM_EVENT_DTX_RQID);
  766. + surface_sam_ssh_remove_event_handler(SAM_EVENT_DTX_RQID);
  767. +}
  768. +
  769. +
  770. +static struct input_dev *surface_dtx_register_inputdev(struct platform_device *pdev)
  771. +{
  772. + struct input_dev *input_dev;
  773. + int status;
  774. +
  775. + input_dev = input_allocate_device();
  776. + if (!input_dev) {
  777. + return ERR_PTR(-ENOMEM);
  778. + }
  779. +
  780. + input_dev->name = DTX_INPUT_NAME;
  781. + input_dev->dev.parent = &pdev->dev;
  782. + input_dev->id.bustype = BUS_VIRTUAL;
  783. + input_dev->id.vendor = USB_VENDOR_ID_MICROSOFT;
  784. + input_dev->id.product = USB_DEVICE_ID_MS_SURFACE_BASE_2_INTEGRATION;
  785. +
  786. + input_set_capability(input_dev, EV_SW, SW_TABLET_MODE);
  787. +
  788. + status = surface_sam_query_opmpde();
  789. + if (status < 0) {
  790. + input_free_device(input_dev);
  791. + return ERR_PTR(status);
  792. + }
  793. +
  794. + input_report_switch(input_dev, SW_TABLET_MODE, status == 0x00);
  795. +
  796. + status = input_register_device(input_dev);
  797. + if (status) {
  798. + input_unregister_device(input_dev);
  799. + return ERR_PTR(status);
  800. + }
  801. +
  802. + return input_dev;
  803. +}
  804. +
  805. +
  806. +static int surface_sam_dtx_probe(struct platform_device *pdev)
  807. +{
  808. + struct surface_dtx_dev *ddev = &surface_dtx_dev;
  809. + struct input_dev *input_dev;
  810. + int status;
  811. +
  812. + // link to ec
  813. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  814. + if (status) {
  815. + return status == -ENXIO ? -EPROBE_DEFER : status;
  816. + }
  817. +
  818. + input_dev = surface_dtx_register_inputdev(pdev);
  819. + if (IS_ERR(input_dev)) {
  820. + return PTR_ERR(input_dev);
  821. + }
  822. +
  823. + // initialize device
  824. + mutex_lock(&ddev->mutex);
  825. + if (ddev->active) {
  826. + mutex_unlock(&ddev->mutex);
  827. + status = -ENODEV;
  828. + goto err_register;
  829. + }
  830. +
  831. + INIT_LIST_HEAD(&ddev->client_list);
  832. + init_waitqueue_head(&ddev->waitq);
  833. + ddev->active = true;
  834. + ddev->input_dev = input_dev;
  835. + mutex_unlock(&ddev->mutex);
  836. +
  837. + status = misc_register(&ddev->mdev);
  838. + if (status) {
  839. + goto err_register;
  840. + }
  841. +
  842. + // enable events
  843. + status = surface_dtx_events_setup(ddev);
  844. + if (status) {
  845. + goto err_events_setup;
  846. + }
  847. +
  848. + return 0;
  849. +
  850. +err_events_setup:
  851. + misc_deregister(&ddev->mdev);
  852. +err_register:
  853. + input_unregister_device(ddev->input_dev);
  854. + return status;
  855. +}
  856. +
  857. +static int surface_sam_dtx_remove(struct platform_device *pdev)
  858. +{
  859. + struct surface_dtx_dev *ddev = &surface_dtx_dev;
  860. + struct surface_dtx_client *client;
  861. +
  862. + mutex_lock(&ddev->mutex);
  863. + if (!ddev->active) {
  864. + mutex_unlock(&ddev->mutex);
  865. + return 0;
  866. + }
  867. +
  868. + // mark as inactive
  869. + ddev->active = false;
  870. + mutex_unlock(&ddev->mutex);
  871. +
  872. + // After this call we're guaranteed that no more input events will arive
  873. + surface_dtx_events_disable();
  874. +
  875. + // wake up clients
  876. + spin_lock(&ddev->client_lock);
  877. + list_for_each_entry(client, &ddev->client_list, node) {
  878. + kill_fasync(&client->fasync, SIGIO, POLL_HUP);
  879. + }
  880. + spin_unlock(&ddev->client_lock);
  881. +
  882. + wake_up_interruptible(&ddev->waitq);
  883. +
  884. + // unregister user-space devices
  885. + input_unregister_device(ddev->input_dev);
  886. + misc_deregister(&ddev->mdev);
  887. +
  888. + return 0;
  889. +}
  890. +
  891. +
  892. +static const struct acpi_device_id surface_sam_dtx_match[] = {
  893. + { "MSHW0133", 0 },
  894. + { },
  895. +};
  896. +MODULE_DEVICE_TABLE(acpi, surface_sam_dtx_match);
  897. +
  898. +static struct platform_driver surface_sam_dtx = {
  899. + .probe = surface_sam_dtx_probe,
  900. + .remove = surface_sam_dtx_remove,
  901. + .driver = {
  902. + .name = "surface_sam_dtx",
  903. + .acpi_match_table = ACPI_PTR(surface_sam_dtx_match),
  904. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  905. + },
  906. +};
  907. +module_platform_driver(surface_sam_dtx);
  908. +
  909. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  910. +MODULE_DESCRIPTION("Surface Detachment System (DTX) Driver for 5th Generation Surface Devices");
  911. +MODULE_LICENSE("GPL v2");
  912. diff --git a/drivers/platform/x86/surface_sam/surface_sam_hps.c b/drivers/platform/x86/surface_sam/surface_sam_hps.c
  913. new file mode 100644
  914. index 000000000000..3b123bd3dcfe
  915. --- /dev/null
  916. +++ b/drivers/platform/x86/surface_sam/surface_sam_hps.c
  917. @@ -0,0 +1,1110 @@
  918. +/*
  919. + * Surface dGPU hot-plug system driver.
  920. + * Supports explicit setting of the dGPU power-state on the Surface Book 2 and
  921. + * properly handles hot-plugging by detaching the base.
  922. + */
  923. +
  924. +#include <linux/acpi.h>
  925. +#include <linux/delay.h>
  926. +#include <linux/gpio.h>
  927. +#include <linux/kernel.h>
  928. +#include <linux/module.h>
  929. +#include <linux/mutex.h>
  930. +#include <linux/pci.h>
  931. +#include <linux/platform_device.h>
  932. +#include <linux/sysfs.h>
  933. +
  934. +#include "surface_sam_ssh.h"
  935. +#include "surface_sam_san.h"
  936. +
  937. +
  938. +// TODO: vgaswitcheroo integration
  939. +
  940. +
  941. +static void dbg_dump_drvsta(struct platform_device *pdev, const char *prefix);
  942. +
  943. +
  944. +#define SHPS_DSM_REVISION 1
  945. +#define SHPS_DSM_GPU_ADDRS 0x02
  946. +#define SHPS_DSM_GPU_POWER 0x05
  947. +static const guid_t SHPS_DSM_UUID =
  948. + GUID_INIT(0x5515a847, 0xed55, 0x4b27, 0x83, 0x52, 0xcd,
  949. + 0x32, 0x0e, 0x10, 0x36, 0x0a);
  950. +
  951. +
  952. +#define SAM_DGPU_TC 0x13
  953. +#define SAM_DGPU_CID_POWERON 0x02
  954. +
  955. +#define SAM_DTX_TC 0x11
  956. +#define SAM_DTX_CID_LATCH_LOCK 0x06
  957. +#define SAM_DTX_CID_LATCH_UNLOCK 0x07
  958. +
  959. +#define SHPS_DSM_GPU_ADDRS_RP "RP5_PCIE"
  960. +#define SHPS_DSM_GPU_ADDRS_DGPU "DGPU_PCIE"
  961. +
  962. +
  963. +static const struct acpi_gpio_params gpio_base_presence_int = { 0, 0, false };
  964. +static const struct acpi_gpio_params gpio_base_presence = { 1, 0, false };
  965. +static const struct acpi_gpio_params gpio_dgpu_power_int = { 2, 0, false };
  966. +static const struct acpi_gpio_params gpio_dgpu_power = { 3, 0, false };
  967. +static const struct acpi_gpio_params gpio_dgpu_presence_int = { 4, 0, false };
  968. +static const struct acpi_gpio_params gpio_dgpu_presence = { 5, 0, false };
  969. +
  970. +static const struct acpi_gpio_mapping shps_acpi_gpios[] = {
  971. + { "base_presence-int-gpio", &gpio_base_presence_int, 1 },
  972. + { "base_presence-gpio", &gpio_base_presence, 1 },
  973. + { "dgpu_power-int-gpio", &gpio_dgpu_power_int, 1 },
  974. + { "dgpu_power-gpio", &gpio_dgpu_power, 1 },
  975. + { "dgpu_presence-int-gpio", &gpio_dgpu_presence_int, 1 },
  976. + { "dgpu_presence-gpio", &gpio_dgpu_presence, 1 },
  977. + { },
  978. +};
  979. +
  980. +
  981. +enum shps_dgpu_power {
  982. + SHPS_DGPU_POWER_OFF = 0,
  983. + SHPS_DGPU_POWER_ON = 1,
  984. + SHPS_DGPU_POWER_UNKNOWN = 2,
  985. +};
  986. +
  987. +static const char* shps_dgpu_power_str(enum shps_dgpu_power power) {
  988. + if (power == SHPS_DGPU_POWER_OFF)
  989. + return "off";
  990. + else if (power == SHPS_DGPU_POWER_ON)
  991. + return "on";
  992. + else if (power == SHPS_DGPU_POWER_UNKNOWN)
  993. + return "unknown";
  994. + else
  995. + return "<invalid>";
  996. +}
  997. +
  998. +
  999. +struct shps_driver_data {
  1000. + struct mutex lock;
  1001. + struct pci_dev *dgpu_root_port;
  1002. + struct pci_saved_state *dgpu_root_port_state;
  1003. + struct gpio_desc *gpio_dgpu_power;
  1004. + struct gpio_desc *gpio_dgpu_presence;
  1005. + struct gpio_desc *gpio_base_presence;
  1006. + unsigned int irq_dgpu_presence;
  1007. + unsigned int irq_base_presence;
  1008. + unsigned long state;
  1009. +};
  1010. +
  1011. +#define SHPS_STATE_BIT_PWRTGT 0 /* desired power state: 1 for on, 0 for off */
  1012. +#define SHPS_STATE_BIT_RPPWRON_SYNC 1 /* synchronous/requested power-up in progress */
  1013. +#define SHPS_STATE_BIT_WAKE_ENABLED 2 /* wakeup via base-presence GPIO enabled */
  1014. +
  1015. +
  1016. +#define SHPS_DGPU_PARAM_PERM (S_IRUGO | S_IWUSR)
  1017. +
  1018. +enum shps_dgpu_power_mp {
  1019. + SHPS_DGPU_MP_POWER_OFF = SHPS_DGPU_POWER_OFF,
  1020. + SHPS_DGPU_MP_POWER_ON = SHPS_DGPU_POWER_ON,
  1021. + SHPS_DGPU_MP_POWER_ASIS = -1,
  1022. +
  1023. + __SHPS_DGPU_MP_POWER_START = -1,
  1024. + __SHPS_DGPU_MP_POWER_END = 1,
  1025. +};
  1026. +
  1027. +static int param_dgpu_power_set(const char *val, const struct kernel_param *kp)
  1028. +{
  1029. + int power = SHPS_DGPU_MP_POWER_OFF;
  1030. + int status;
  1031. +
  1032. + status = kstrtoint(val, 0, &power);
  1033. + if (status) {
  1034. + return status;
  1035. + }
  1036. +
  1037. + if (power < __SHPS_DGPU_MP_POWER_START || power > __SHPS_DGPU_MP_POWER_END) {
  1038. + return -EINVAL;
  1039. + }
  1040. +
  1041. + return param_set_int(val, kp);
  1042. +}
  1043. +
  1044. +static const struct kernel_param_ops param_dgpu_power_ops = {
  1045. + .set = param_dgpu_power_set,
  1046. + .get = param_get_int,
  1047. +};
  1048. +
  1049. +static int param_dgpu_power_init = SHPS_DGPU_MP_POWER_OFF;
  1050. +static int param_dgpu_power_exit = SHPS_DGPU_MP_POWER_ON;
  1051. +static int param_dgpu_power_susp = SHPS_DGPU_MP_POWER_ASIS;
  1052. +static bool param_dtx_latch = true;
  1053. +
  1054. +module_param_cb(dgpu_power_init, &param_dgpu_power_ops, &param_dgpu_power_init, SHPS_DGPU_PARAM_PERM);
  1055. +module_param_cb(dgpu_power_exit, &param_dgpu_power_ops, &param_dgpu_power_exit, SHPS_DGPU_PARAM_PERM);
  1056. +module_param_cb(dgpu_power_susp, &param_dgpu_power_ops, &param_dgpu_power_susp, SHPS_DGPU_PARAM_PERM);
  1057. +module_param_named(dtx_latch, param_dtx_latch, bool, SHPS_DGPU_PARAM_PERM);
  1058. +
  1059. +MODULE_PARM_DESC(dgpu_power_init, "dGPU power state to be set on init (0: off / 1: on / 2: as-is, default: off)");
  1060. +MODULE_PARM_DESC(dgpu_power_exit, "dGPU power state to be set on exit (0: off / 1: on / 2: as-is, default: on)");
  1061. +MODULE_PARM_DESC(dgpu_power_susp, "dGPU power state to be set on exit (0: off / 1: on / 2: as-is, default: as-is)");
  1062. +MODULE_PARM_DESC(dtx_latch, "lock/unlock DTX base latch in accordance to power-state (Y/n)");
  1063. +
  1064. +
  1065. +static int dtx_cmd_simple(u8 cid)
  1066. +{
  1067. + struct surface_sam_ssh_rqst rqst = {
  1068. + .tc = SAM_DTX_TC,
  1069. + .cid = cid,
  1070. + .iid = 0,
  1071. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  1072. + .snc = 0,
  1073. + .cdl = 0,
  1074. + .pld = NULL,
  1075. + };
  1076. +
  1077. + return surface_sam_ssh_rqst(&rqst, NULL);
  1078. +}
  1079. +
  1080. +inline static int shps_dtx_latch_lock(void)
  1081. +{
  1082. + return dtx_cmd_simple(SAM_DTX_CID_LATCH_LOCK);
  1083. +}
  1084. +
  1085. +inline static int shps_dtx_latch_unlock(void)
  1086. +{
  1087. + return dtx_cmd_simple(SAM_DTX_CID_LATCH_UNLOCK);
  1088. +}
  1089. +
  1090. +
  1091. +static int shps_dgpu_dsm_get_pci_addr(struct platform_device *pdev, const char* entry)
  1092. +{
  1093. + acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  1094. + union acpi_object *result;
  1095. + union acpi_object *e0;
  1096. + union acpi_object *e1;
  1097. + union acpi_object *e2;
  1098. + u64 device_addr = 0;
  1099. + u8 bus, dev, fun;
  1100. + int i;
  1101. +
  1102. + result = acpi_evaluate_dsm_typed(handle, &SHPS_DSM_UUID, SHPS_DSM_REVISION,
  1103. + SHPS_DSM_GPU_ADDRS, NULL, ACPI_TYPE_PACKAGE);
  1104. +
  1105. + if (IS_ERR_OR_NULL(result))
  1106. + return result ? PTR_ERR(result) : -EIO;
  1107. +
  1108. + // three entries per device: name, address, <integer>
  1109. + for (i = 0; i + 2 < result->package.count; i += 3) {
  1110. + e0 = &result->package.elements[i];
  1111. + e1 = &result->package.elements[i + 1];
  1112. + e2 = &result->package.elements[i + 2];
  1113. +
  1114. + if (e0->type != ACPI_TYPE_STRING) {
  1115. + ACPI_FREE(result);
  1116. + return -EIO;
  1117. + }
  1118. +
  1119. + if (e1->type != ACPI_TYPE_INTEGER) {
  1120. + ACPI_FREE(result);
  1121. + return -EIO;
  1122. + }
  1123. +
  1124. + if (e2->type != ACPI_TYPE_INTEGER) {
  1125. + ACPI_FREE(result);
  1126. + return -EIO;
  1127. + }
  1128. +
  1129. + if (strncmp(e0->string.pointer, entry, 64) == 0)
  1130. + device_addr = e1->integer.value;
  1131. + }
  1132. +
  1133. + ACPI_FREE(result);
  1134. + if (device_addr == 0)
  1135. + return -ENODEV;
  1136. +
  1137. + // convert address
  1138. + bus = (device_addr & 0x0FF00000) >> 20;
  1139. + dev = (device_addr & 0x000F8000) >> 15;
  1140. + fun = (device_addr & 0x00007000) >> 12;
  1141. +
  1142. + return bus << 8 | PCI_DEVFN(dev, fun);
  1143. +}
  1144. +
  1145. +static struct pci_dev *shps_dgpu_dsm_get_pci_dev(struct platform_device *pdev, const char* entry)
  1146. +{
  1147. + struct pci_dev *dev;
  1148. + int addr;
  1149. +
  1150. + addr = shps_dgpu_dsm_get_pci_addr(pdev, entry);
  1151. + if (addr < 0)
  1152. + return ERR_PTR(addr);
  1153. +
  1154. + dev = pci_get_domain_bus_and_slot(0, (addr & 0xFF00) >> 8, addr & 0xFF);
  1155. + return dev ? dev : ERR_PTR(-ENODEV);
  1156. +}
  1157. +
  1158. +
  1159. +static int shps_dgpu_dsm_get_power_unlocked(struct platform_device *pdev)
  1160. +{
  1161. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1162. + struct gpio_desc *gpio = drvdata->gpio_dgpu_power;
  1163. + int status;
  1164. +
  1165. + status = gpiod_get_value_cansleep(gpio);
  1166. + if (status < 0)
  1167. + return status;
  1168. +
  1169. + return status == 0 ? SHPS_DGPU_POWER_OFF : SHPS_DGPU_POWER_ON;
  1170. +}
  1171. +
  1172. +static int shps_dgpu_dsm_get_power(struct platform_device *pdev)
  1173. +{
  1174. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1175. + int status;
  1176. +
  1177. + mutex_lock(&drvdata->lock);
  1178. + status = shps_dgpu_dsm_get_power_unlocked(pdev);
  1179. + mutex_unlock(&drvdata->lock);
  1180. +
  1181. + return status;
  1182. +}
  1183. +
  1184. +static int __shps_dgpu_dsm_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1185. +{
  1186. + acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  1187. + union acpi_object *result;
  1188. + union acpi_object param;
  1189. +
  1190. + dev_info(&pdev->dev, "setting dGPU direct power to \'%s\'\n", shps_dgpu_power_str(power));
  1191. +
  1192. + param.type = ACPI_TYPE_INTEGER;
  1193. + param.integer.value = power == SHPS_DGPU_POWER_ON;
  1194. +
  1195. + result = acpi_evaluate_dsm_typed(handle, &SHPS_DSM_UUID, SHPS_DSM_REVISION,
  1196. + SHPS_DSM_GPU_POWER, &param, ACPI_TYPE_BUFFER);
  1197. +
  1198. + if (IS_ERR_OR_NULL(result))
  1199. + return result ? PTR_ERR(result) : -EIO;
  1200. +
  1201. + // check for the expected result
  1202. + if (result->buffer.length != 1 || result->buffer.pointer[0] != 0) {
  1203. + ACPI_FREE(result);
  1204. + return -EIO;
  1205. + }
  1206. +
  1207. + ACPI_FREE(result);
  1208. + return 0;
  1209. +}
  1210. +
  1211. +static int shps_dgpu_dsm_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1212. +{
  1213. + int status;
  1214. +
  1215. + if (power != SHPS_DGPU_POWER_ON && power != SHPS_DGPU_POWER_OFF)
  1216. + return -EINVAL;
  1217. +
  1218. + status = shps_dgpu_dsm_get_power_unlocked(pdev);
  1219. + if (status < 0)
  1220. + return status;
  1221. + if (status == power)
  1222. + return 0;
  1223. +
  1224. + return __shps_dgpu_dsm_set_power_unlocked(pdev, power);
  1225. +}
  1226. +
  1227. +static int shps_dgpu_dsm_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1228. +{
  1229. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1230. + int status;
  1231. +
  1232. + mutex_lock(&drvdata->lock);
  1233. + status = shps_dgpu_dsm_set_power_unlocked(pdev, power);
  1234. + mutex_unlock(&drvdata->lock);
  1235. +
  1236. + return status;
  1237. +}
  1238. +
  1239. +
  1240. +static bool shps_rp_link_up(struct pci_dev *rp)
  1241. +{
  1242. + u16 lnksta = 0, sltsta = 0;
  1243. +
  1244. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA, &lnksta);
  1245. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA, &sltsta);
  1246. +
  1247. + return (lnksta & PCI_EXP_LNKSTA_DLLLA) || (sltsta & PCI_EXP_SLTSTA_PDS);
  1248. +}
  1249. +
  1250. +
  1251. +static int shps_dgpu_rp_get_power_unlocked(struct platform_device *pdev)
  1252. +{
  1253. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1254. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1255. +
  1256. + if (rp->current_state == PCI_D3hot || rp->current_state == PCI_D3cold)
  1257. + return SHPS_DGPU_POWER_OFF;
  1258. + else if (rp->current_state == PCI_UNKNOWN || rp->current_state == PCI_POWER_ERROR)
  1259. + return SHPS_DGPU_POWER_UNKNOWN;
  1260. + else
  1261. + return SHPS_DGPU_POWER_ON;
  1262. +}
  1263. +
  1264. +static int shps_dgpu_rp_get_power(struct platform_device *pdev)
  1265. +{
  1266. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1267. + int status;
  1268. +
  1269. + mutex_lock(&drvdata->lock);
  1270. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1271. + mutex_unlock(&drvdata->lock);
  1272. +
  1273. + return status;
  1274. +}
  1275. +
  1276. +static int __shps_dgpu_rp_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1277. +{
  1278. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1279. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1280. + int status, i;
  1281. +
  1282. + dev_info(&pdev->dev, "setting dGPU power state to \'%s\'\n", shps_dgpu_power_str(power));
  1283. +
  1284. + dbg_dump_drvsta(pdev, "__shps_dgpu_rp_set_power_unlocked.1");
  1285. + if (power == SHPS_DGPU_POWER_ON) {
  1286. + set_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state);
  1287. + pci_set_power_state(rp, PCI_D0);
  1288. +
  1289. + if (drvdata->dgpu_root_port_state)
  1290. + pci_load_and_free_saved_state(rp, &drvdata->dgpu_root_port_state);
  1291. +
  1292. + pci_restore_state(rp);
  1293. +
  1294. + if (!pci_is_enabled(rp))
  1295. + pci_enable_device(rp);
  1296. +
  1297. + pci_set_master(rp);
  1298. + clear_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state);
  1299. +
  1300. + set_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1301. + } else {
  1302. + if (!drvdata->dgpu_root_port_state) {
  1303. + pci_save_state(rp);
  1304. + drvdata->dgpu_root_port_state = pci_store_saved_state(rp);
  1305. + }
  1306. +
  1307. + /*
  1308. + * To properly update the hot-plug system we need to "remove" the dGPU
  1309. + * before disabling it and sending it to D3cold. Following this, we
  1310. + * need to wait for the link and slot status to actually change.
  1311. + */
  1312. + status = shps_dgpu_dsm_set_power_unlocked(pdev, SHPS_DGPU_POWER_OFF);
  1313. + if (status)
  1314. + return status;
  1315. +
  1316. + for (i = 0; i < 20 && shps_rp_link_up(rp); i++)
  1317. + msleep(50);
  1318. +
  1319. + if (shps_rp_link_up(rp))
  1320. + dev_err(&pdev->dev, "dGPU removal via DSM timed out\n");
  1321. +
  1322. + pci_clear_master(rp);
  1323. +
  1324. + if (pci_is_enabled(rp))
  1325. + pci_disable_device(rp);
  1326. +
  1327. + pci_set_power_state(rp, PCI_D3cold);
  1328. +
  1329. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1330. + }
  1331. + dbg_dump_drvsta(pdev, "__shps_dgpu_rp_set_power_unlocked.2");
  1332. +
  1333. + return 0;
  1334. +}
  1335. +
  1336. +static int shps_dgpu_rp_set_power_unlocked(struct platform_device *pdev, enum shps_dgpu_power power)
  1337. +{
  1338. + int status;
  1339. +
  1340. + if (power != SHPS_DGPU_POWER_ON && power != SHPS_DGPU_POWER_OFF)
  1341. + return -EINVAL;
  1342. +
  1343. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1344. + if (status < 0)
  1345. + return status;
  1346. + if (status == power)
  1347. + return 0;
  1348. +
  1349. + return __shps_dgpu_rp_set_power_unlocked(pdev, power);
  1350. +}
  1351. +
  1352. +static int shps_dgpu_rp_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1353. +{
  1354. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1355. + int status;
  1356. +
  1357. + mutex_lock(&drvdata->lock);
  1358. + status = shps_dgpu_rp_set_power_unlocked(pdev, power);
  1359. + mutex_unlock(&drvdata->lock);
  1360. +
  1361. + return status;
  1362. +}
  1363. +
  1364. +
  1365. +static int shps_dgpu_set_power(struct platform_device *pdev, enum shps_dgpu_power power)
  1366. +{
  1367. + int status;
  1368. +
  1369. + if (!param_dtx_latch)
  1370. + return shps_dgpu_rp_set_power(pdev, power);
  1371. +
  1372. + if (power == SHPS_DGPU_POWER_ON) {
  1373. + status = shps_dtx_latch_lock();
  1374. + if (status)
  1375. + return status;
  1376. +
  1377. + status = shps_dgpu_rp_set_power(pdev, power);
  1378. + if (status)
  1379. + shps_dtx_latch_unlock();
  1380. +
  1381. + return status;
  1382. + } else {
  1383. + status = shps_dgpu_rp_set_power(pdev, power);
  1384. + if (status)
  1385. + return status;
  1386. +
  1387. + return shps_dtx_latch_unlock();
  1388. + }
  1389. +}
  1390. +
  1391. +
  1392. +static int shps_dgpu_is_present(struct platform_device *pdev)
  1393. +{
  1394. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1395. + return gpiod_get_value_cansleep(drvdata->gpio_dgpu_presence);
  1396. +}
  1397. +
  1398. +
  1399. +static ssize_t dgpu_power_show(struct device *dev, struct device_attribute *attr, char *data)
  1400. +{
  1401. + struct platform_device *pdev = to_platform_device(dev);
  1402. + int power = shps_dgpu_rp_get_power(pdev);
  1403. +
  1404. + if (power < 0)
  1405. + return power;
  1406. +
  1407. + return sprintf(data, "%s\n", shps_dgpu_power_str(power));
  1408. +}
  1409. +
  1410. +static ssize_t dgpu_power_store(struct device *dev, struct device_attribute *attr,
  1411. + const char *data, size_t count)
  1412. +{
  1413. + struct platform_device *pdev = to_platform_device(dev);
  1414. + enum shps_dgpu_power power;
  1415. + bool b = false;
  1416. + int status;
  1417. +
  1418. + status = kstrtobool(data, &b);
  1419. + if (status)
  1420. + return status;
  1421. +
  1422. + status = shps_dgpu_is_present(pdev);
  1423. + if (status <= 0)
  1424. + return status < 0 ? status : -EPERM;
  1425. +
  1426. + power = b ? SHPS_DGPU_POWER_ON : SHPS_DGPU_POWER_OFF;
  1427. + status = shps_dgpu_set_power(pdev, power);
  1428. +
  1429. + return status < 0 ? status : count;
  1430. +}
  1431. +
  1432. +static ssize_t dgpu_power_dsm_show(struct device *dev, struct device_attribute *attr, char *data)
  1433. +{
  1434. + struct platform_device *pdev = to_platform_device(dev);
  1435. + int power = shps_dgpu_dsm_get_power(pdev);
  1436. +
  1437. + if (power < 0)
  1438. + return power;
  1439. +
  1440. + return sprintf(data, "%s\n", shps_dgpu_power_str(power));
  1441. +}
  1442. +
  1443. +static ssize_t dgpu_power_dsm_store(struct device *dev, struct device_attribute *attr,
  1444. + const char *data, size_t count)
  1445. +{
  1446. + struct platform_device *pdev = to_platform_device(dev);
  1447. + enum shps_dgpu_power power;
  1448. + bool b = false;
  1449. + int status;
  1450. +
  1451. + status = kstrtobool(data, &b);
  1452. + if (status)
  1453. + return status;
  1454. +
  1455. + status = shps_dgpu_is_present(pdev);
  1456. + if (status <= 0)
  1457. + return status < 0 ? status : -EPERM;
  1458. +
  1459. + power = b ? SHPS_DGPU_POWER_ON : SHPS_DGPU_POWER_OFF;
  1460. + status = shps_dgpu_dsm_set_power(pdev, power);
  1461. +
  1462. + return status < 0 ? status : count;
  1463. +}
  1464. +
  1465. +static DEVICE_ATTR_RW(dgpu_power);
  1466. +static DEVICE_ATTR_RW(dgpu_power_dsm);
  1467. +
  1468. +static struct attribute *shps_power_attrs[] = {
  1469. + &dev_attr_dgpu_power.attr,
  1470. + &dev_attr_dgpu_power_dsm.attr,
  1471. + NULL,
  1472. +};
  1473. +ATTRIBUTE_GROUPS(shps_power);
  1474. +
  1475. +
  1476. +static void dbg_dump_power_states(struct platform_device *pdev, const char *prefix)
  1477. +{
  1478. + enum shps_dgpu_power power_dsm;
  1479. + enum shps_dgpu_power power_rp;
  1480. + int status;
  1481. +
  1482. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1483. + if (status < 0)
  1484. + dev_err(&pdev->dev, "%s: failed to get root-port power state: %d\n", prefix, status);
  1485. + power_rp = status;
  1486. +
  1487. + status = shps_dgpu_rp_get_power_unlocked(pdev);
  1488. + if (status < 0)
  1489. + dev_err(&pdev->dev, "%s: failed to get direct power state: %d\n", prefix, status);
  1490. + power_dsm = status;
  1491. +
  1492. + dev_dbg(&pdev->dev, "%s: root-port power state: %d\n", prefix, power_rp);
  1493. + dev_dbg(&pdev->dev, "%s: direct power state: %d\n", prefix, power_dsm);
  1494. +}
  1495. +
  1496. +static void dbg_dump_pciesta(struct platform_device *pdev, const char *prefix)
  1497. +{
  1498. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1499. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1500. + u16 lnksta, lnksta2, sltsta, sltsta2;
  1501. +
  1502. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA, &lnksta);
  1503. + pcie_capability_read_word(rp, PCI_EXP_LNKSTA2, &lnksta2);
  1504. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA, &sltsta);
  1505. + pcie_capability_read_word(rp, PCI_EXP_SLTSTA2, &sltsta2);
  1506. +
  1507. + dev_dbg(&pdev->dev, "%s: LNKSTA: 0x%04x", prefix, lnksta);
  1508. + dev_dbg(&pdev->dev, "%s: LNKSTA2: 0x%04x", prefix, lnksta2);
  1509. + dev_dbg(&pdev->dev, "%s: SLTSTA: 0x%04x", prefix, sltsta);
  1510. + dev_dbg(&pdev->dev, "%s: SLTSTA2: 0x%04x", prefix, sltsta2);
  1511. +}
  1512. +
  1513. +static void dbg_dump_drvsta(struct platform_device *pdev, const char *prefix)
  1514. +{
  1515. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1516. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1517. +
  1518. + dev_dbg(&pdev->dev, "%s: RP power: %d", prefix, rp->current_state);
  1519. + dev_dbg(&pdev->dev, "%s: RP state saved: %d", prefix, rp->state_saved);
  1520. + dev_dbg(&pdev->dev, "%s: RP state stored: %d", prefix, !!drvdata->dgpu_root_port_state);
  1521. + dev_dbg(&pdev->dev, "%s: RP enabled: %d", prefix, atomic_read(&rp->enable_cnt));
  1522. + dev_dbg(&pdev->dev, "%s: RP mastered: %d", prefix, rp->is_busmaster);
  1523. +}
  1524. +
  1525. +
  1526. +static int shps_pm_prepare(struct device *dev)
  1527. +{
  1528. + struct platform_device *pdev = to_platform_device(dev);
  1529. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1530. + bool pwrtgt;
  1531. + int status = 0;
  1532. +
  1533. + dbg_dump_power_states(pdev, "shps_pm_prepare");
  1534. +
  1535. + if (param_dgpu_power_susp != SHPS_DGPU_MP_POWER_ASIS) {
  1536. + pwrtgt = test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1537. +
  1538. + status = shps_dgpu_set_power(pdev, param_dgpu_power_susp);
  1539. + if (status) {
  1540. + dev_err(&pdev->dev, "failed to power %s dGPU: %d\n",
  1541. + param_dgpu_power_susp == SHPS_DGPU_MP_POWER_OFF ? "off" : "on",
  1542. + status);
  1543. + return status;
  1544. + }
  1545. +
  1546. + if (pwrtgt)
  1547. + set_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1548. + else
  1549. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1550. + }
  1551. +
  1552. + return 0;
  1553. +}
  1554. +
  1555. +static void shps_pm_complete(struct device *dev)
  1556. +{
  1557. + struct platform_device *pdev = to_platform_device(dev);
  1558. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1559. + int status;
  1560. +
  1561. + dbg_dump_power_states(pdev, "shps_pm_complete");
  1562. + dbg_dump_pciesta(pdev, "shps_pm_complete");
  1563. + dbg_dump_drvsta(pdev, "shps_pm_complete.1");
  1564. +
  1565. + // update power target, dGPU may have been detached while suspended
  1566. + status = shps_dgpu_is_present(pdev);
  1567. + if (status < 0) {
  1568. + dev_err(&pdev->dev, "failed to get dGPU presence: %d\n", status);
  1569. + return;
  1570. + } else if (status == 0) {
  1571. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1572. + }
  1573. +
  1574. + /*
  1575. + * During resume, the PCIe core will power on the root-port, which in turn
  1576. + * will power on the dGPU. Most of the state synchronization is already
  1577. + * handled via the SAN RQSG handler, so it is in a fully consistent
  1578. + * on-state here. If requested, turn it off here.
  1579. + *
  1580. + * As there seem to be some synchronization issues turning off the dGPU
  1581. + * directly after the power-on SAN RQSG notification during the resume
  1582. + * process, let's do this here.
  1583. + *
  1584. + * TODO/FIXME:
  1585. + * This does not combat unhandled power-ons when the device is not fully
  1586. + * resumed, i.e. re-suspended before shps_pm_complete is called. Those
  1587. + * should normally not be an issue, but the dGPU does get hot even though
  1588. + * it is suspended, so ideally we want to keep it off.
  1589. + */
  1590. + if (!test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state)) {
  1591. + status = shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_OFF);
  1592. + if (status)
  1593. + dev_err(&pdev->dev, "failed to power-off dGPU: %d\n", status);
  1594. + }
  1595. +
  1596. + dbg_dump_drvsta(pdev, "shps_pm_complete.2");
  1597. +}
  1598. +
  1599. +static int shps_pm_suspend(struct device *dev)
  1600. +{
  1601. + struct platform_device *pdev = to_platform_device(dev);
  1602. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1603. + int status;
  1604. +
  1605. + if (device_may_wakeup(dev)) {
  1606. + status = enable_irq_wake(drvdata->irq_base_presence);
  1607. + if (status)
  1608. + return status;
  1609. +
  1610. + set_bit(SHPS_STATE_BIT_WAKE_ENABLED, &drvdata->state);
  1611. + }
  1612. +
  1613. + return 0;
  1614. +}
  1615. +
  1616. +static int shps_pm_resume(struct device *dev)
  1617. +{
  1618. + struct platform_device *pdev = to_platform_device(dev);
  1619. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1620. + int status = 0;
  1621. +
  1622. + if (test_and_clear_bit(SHPS_STATE_BIT_WAKE_ENABLED, &drvdata->state)) {
  1623. + status = disable_irq_wake(drvdata->irq_base_presence);
  1624. + }
  1625. +
  1626. + return status;
  1627. +}
  1628. +
  1629. +static void shps_shutdown(struct platform_device *pdev)
  1630. +{
  1631. + int status;
  1632. +
  1633. + /*
  1634. + * Turn on dGPU before shutting down. This allows the core drivers to
  1635. + * properly shut down the device. If we don't do this, the pcieport driver
  1636. + * will complain that the device has already been disabled.
  1637. + */
  1638. + status = shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_ON);
  1639. + if (status)
  1640. + dev_err(&pdev->dev, "failed to turn on dGPU: %d\n", status);
  1641. +}
  1642. +
  1643. +static int shps_dgpu_detached(struct platform_device *pdev)
  1644. +{
  1645. + dbg_dump_power_states(pdev, "shps_dgpu_detached");
  1646. + return shps_dgpu_set_power(pdev, SHPS_DGPU_POWER_OFF);
  1647. +}
  1648. +
  1649. +static int shps_dgpu_attached(struct platform_device *pdev)
  1650. +{
  1651. + dbg_dump_power_states(pdev, "shps_dgpu_attached");
  1652. + return 0;
  1653. +}
  1654. +
  1655. +static int shps_dgpu_powered_on(struct platform_device *pdev)
  1656. +{
  1657. + /*
  1658. + * This function gets called directly after a power-state transition of
  1659. + * the dGPU root port out of D3cold state, indicating a power-on of the
  1660. + * dGPU. Specifically, this function is called from the RQSG handler of
  1661. + * SAN, invoked by the ACPI _ON method of the dGPU root port. This means
  1662. + * that this function is run inside `pci_set_power_state(rp, ...)`
  1663. + * syncrhonously and thus returns before the `pci_set_power_state` call
  1664. + * does.
  1665. + *
  1666. + * `pci_set_power_state` may either be called by us or when the PCI
  1667. + * subsystem decides to power up the root port (e.g. during resume). Thus
  1668. + * we should use this function to ensure that the dGPU and root port
  1669. + * states are consistent when an unexpected power-up is encountered.
  1670. + */
  1671. +
  1672. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1673. + struct pci_dev *rp = drvdata->dgpu_root_port;
  1674. + int status;
  1675. +
  1676. + dbg_dump_drvsta(pdev, "shps_dgpu_powered_on.1");
  1677. +
  1678. + // if we caused the root port to power-on, return
  1679. + if (test_bit(SHPS_STATE_BIT_RPPWRON_SYNC, &drvdata->state))
  1680. + return 0;
  1681. +
  1682. + // if dGPU is not present, force power-target to off and return
  1683. + status = shps_dgpu_is_present(pdev);
  1684. + if (status == 0)
  1685. + clear_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state);
  1686. + if (status <= 0)
  1687. + return status;
  1688. +
  1689. + mutex_lock(&drvdata->lock);
  1690. +
  1691. + dbg_dump_power_states(pdev, "shps_dgpu_powered_on.1");
  1692. + dbg_dump_pciesta(pdev, "shps_dgpu_powered_on.1");
  1693. + if (drvdata->dgpu_root_port_state)
  1694. + pci_load_and_free_saved_state(rp, &drvdata->dgpu_root_port_state);
  1695. + pci_restore_state(rp);
  1696. + if (!pci_is_enabled(rp))
  1697. + pci_enable_device(rp);
  1698. + pci_set_master(rp);
  1699. + dbg_dump_drvsta(pdev, "shps_dgpu_powered_on.2");
  1700. + dbg_dump_power_states(pdev, "shps_dgpu_powered_on.2");
  1701. + dbg_dump_pciesta(pdev, "shps_dgpu_powered_on.2");
  1702. +
  1703. + mutex_unlock(&drvdata->lock);
  1704. +
  1705. + if (!test_bit(SHPS_STATE_BIT_PWRTGT, &drvdata->state)) {
  1706. + dev_warn(&pdev->dev, "unexpected dGPU power-on detected");
  1707. + // TODO: schedule state re-check and update
  1708. + }
  1709. +
  1710. + return 0;
  1711. +}
  1712. +
  1713. +
  1714. +static int shps_dgpu_handle_rqsg(struct surface_sam_san_rqsg *rqsg, void *data)
  1715. +{
  1716. + struct platform_device *pdev = data;
  1717. +
  1718. + if (rqsg->tc == SAM_DGPU_TC && rqsg->cid == SAM_DGPU_CID_POWERON)
  1719. + return shps_dgpu_powered_on(pdev);
  1720. +
  1721. + dev_warn(&pdev->dev, "unimplemented dGPU request: RQSG(0x%02x, 0x%02x, 0x%02x)",
  1722. + rqsg->tc, rqsg->cid, rqsg->iid);
  1723. + return 0;
  1724. +}
  1725. +
  1726. +static irqreturn_t shps_dgpu_presence_irq(int irq, void *data)
  1727. +{
  1728. + struct platform_device *pdev = data;
  1729. + bool dgpu_present;
  1730. + int status;
  1731. +
  1732. + status = shps_dgpu_is_present(pdev);
  1733. + if (status < 0) {
  1734. + dev_err(&pdev->dev, "failed to check physical dGPU presence: %d\n", status);
  1735. + return IRQ_HANDLED;
  1736. + }
  1737. +
  1738. + dgpu_present = status != 0;
  1739. + dev_info(&pdev->dev, "dGPU physically %s\n", dgpu_present ? "attached" : "detached");
  1740. +
  1741. + if (dgpu_present)
  1742. + status = shps_dgpu_attached(pdev);
  1743. + else
  1744. + status = shps_dgpu_detached(pdev);
  1745. +
  1746. + if (status)
  1747. + dev_err(&pdev->dev, "error handling dGPU interrupt: %d\n", status);
  1748. +
  1749. + return IRQ_HANDLED;
  1750. +}
  1751. +
  1752. +static irqreturn_t shps_base_presence_irq(int irq, void *data)
  1753. +{
  1754. + return IRQ_HANDLED; // nothing to do, just wake
  1755. +}
  1756. +
  1757. +
  1758. +static int shps_gpios_setup(struct platform_device *pdev)
  1759. +{
  1760. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1761. + struct gpio_desc *gpio_dgpu_power;
  1762. + struct gpio_desc *gpio_dgpu_presence;
  1763. + struct gpio_desc *gpio_base_presence;
  1764. + int status;
  1765. +
  1766. + // get GPIOs
  1767. + gpio_dgpu_power = devm_gpiod_get(&pdev->dev, "dgpu_power", GPIOD_IN);
  1768. + if (IS_ERR(gpio_dgpu_power)) {
  1769. + status = PTR_ERR(gpio_dgpu_power);
  1770. + goto err_out;
  1771. + }
  1772. +
  1773. + gpio_dgpu_presence = devm_gpiod_get(&pdev->dev, "dgpu_presence", GPIOD_IN);
  1774. + if (IS_ERR(gpio_dgpu_presence)) {
  1775. + status = PTR_ERR(gpio_dgpu_presence);
  1776. + goto err_out;
  1777. + }
  1778. +
  1779. + gpio_base_presence = devm_gpiod_get(&pdev->dev, "base_presence", GPIOD_IN);
  1780. + if (IS_ERR(gpio_base_presence)) {
  1781. + status = PTR_ERR(gpio_base_presence);
  1782. + goto err_out;
  1783. + }
  1784. +
  1785. + // export GPIOs
  1786. + status = gpiod_export(gpio_dgpu_power, false);
  1787. + if (status)
  1788. + goto err_out;
  1789. +
  1790. + status = gpiod_export(gpio_dgpu_presence, false);
  1791. + if (status)
  1792. + goto err_export_dgpu_presence;
  1793. +
  1794. + status = gpiod_export(gpio_base_presence, false);
  1795. + if (status)
  1796. + goto err_export_base_presence;
  1797. +
  1798. + // create sysfs links
  1799. + status = gpiod_export_link(&pdev->dev, "gpio-dgpu_power", gpio_dgpu_power);
  1800. + if (status)
  1801. + goto err_link_dgpu_power;
  1802. +
  1803. + status = gpiod_export_link(&pdev->dev, "gpio-dgpu_presence", gpio_dgpu_presence);
  1804. + if (status)
  1805. + goto err_link_dgpu_presence;
  1806. +
  1807. + status = gpiod_export_link(&pdev->dev, "gpio-base_presence", gpio_base_presence);
  1808. + if (status)
  1809. + goto err_link_base_presence;
  1810. +
  1811. + drvdata->gpio_dgpu_power = gpio_dgpu_power;
  1812. + drvdata->gpio_dgpu_presence = gpio_dgpu_presence;
  1813. + drvdata->gpio_base_presence = gpio_base_presence;
  1814. + return 0;
  1815. +
  1816. +err_link_base_presence:
  1817. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_presence");
  1818. +err_link_dgpu_presence:
  1819. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_power");
  1820. +err_link_dgpu_power:
  1821. + gpiod_unexport(gpio_base_presence);
  1822. +err_export_base_presence:
  1823. + gpiod_unexport(gpio_dgpu_presence);
  1824. +err_export_dgpu_presence:
  1825. + gpiod_unexport(gpio_dgpu_power);
  1826. +err_out:
  1827. + return status;
  1828. +}
  1829. +
  1830. +static void shps_gpios_remove(struct platform_device *pdev)
  1831. +{
  1832. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1833. +
  1834. + sysfs_remove_link(&pdev->dev.kobj, "gpio-base_presence");
  1835. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_presence");
  1836. + sysfs_remove_link(&pdev->dev.kobj, "gpio-dgpu_power");
  1837. + gpiod_unexport(drvdata->gpio_base_presence);
  1838. + gpiod_unexport(drvdata->gpio_dgpu_presence);
  1839. + gpiod_unexport(drvdata->gpio_dgpu_power);
  1840. +}
  1841. +
  1842. +static int shps_gpios_setup_irq(struct platform_device *pdev)
  1843. +{
  1844. + const int irqf_dgpu = IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
  1845. + const int irqf_base = IRQF_SHARED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING;
  1846. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1847. + int status;
  1848. +
  1849. + status = gpiod_to_irq(drvdata->gpio_base_presence);
  1850. + if (status < 0)
  1851. + return status;
  1852. + drvdata->irq_base_presence = status;
  1853. +
  1854. + status = gpiod_to_irq(drvdata->gpio_dgpu_presence);
  1855. + if (status < 0)
  1856. + return status;
  1857. + drvdata->irq_dgpu_presence = status;
  1858. +
  1859. + status = request_irq(drvdata->irq_base_presence,
  1860. + shps_base_presence_irq, irqf_base,
  1861. + "shps_base_presence_irq", pdev);
  1862. + if (status)
  1863. + return status;
  1864. +
  1865. + status = request_threaded_irq(drvdata->irq_dgpu_presence,
  1866. + NULL, shps_dgpu_presence_irq, irqf_dgpu,
  1867. + "shps_dgpu_presence_irq", pdev);
  1868. + if (status) {
  1869. + free_irq(drvdata->irq_base_presence, pdev);
  1870. + return status;
  1871. + }
  1872. +
  1873. + return 0;
  1874. +}
  1875. +
  1876. +static void shps_gpios_remove_irq(struct platform_device *pdev)
  1877. +{
  1878. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1879. +
  1880. + free_irq(drvdata->irq_base_presence, pdev);
  1881. + free_irq(drvdata->irq_dgpu_presence, pdev);
  1882. +}
  1883. +
  1884. +static int shps_probe(struct platform_device *pdev)
  1885. +{
  1886. + struct acpi_device *shps_dev = ACPI_COMPANION(&pdev->dev);
  1887. + struct shps_driver_data *drvdata;
  1888. + struct device_link *link;
  1889. + int power, status;
  1890. +
  1891. + if (gpiod_count(&pdev->dev, NULL) < 0)
  1892. + return -ENODEV;
  1893. +
  1894. + // link to SSH
  1895. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  1896. + if (status) {
  1897. + return status == -ENXIO ? -EPROBE_DEFER : status;
  1898. + }
  1899. +
  1900. + // link to SAN
  1901. + status = surface_sam_san_consumer_register(&pdev->dev, 0);
  1902. + if (status) {
  1903. + return status == -ENXIO ? -EPROBE_DEFER : status;
  1904. + }
  1905. +
  1906. + status = acpi_dev_add_driver_gpios(shps_dev, shps_acpi_gpios);
  1907. + if (status)
  1908. + return status;
  1909. +
  1910. + drvdata = kzalloc(sizeof(struct shps_driver_data), GFP_KERNEL);
  1911. + if (!drvdata) {
  1912. + status = -ENOMEM;
  1913. + goto err_drvdata;
  1914. + }
  1915. + mutex_init(&drvdata->lock);
  1916. + platform_set_drvdata(pdev, drvdata);
  1917. +
  1918. + drvdata->dgpu_root_port = shps_dgpu_dsm_get_pci_dev(pdev, SHPS_DSM_GPU_ADDRS_RP);
  1919. + if (IS_ERR(drvdata->dgpu_root_port)) {
  1920. + status = PTR_ERR(drvdata->dgpu_root_port);
  1921. + goto err_rp_lookup;
  1922. + }
  1923. +
  1924. + status = shps_gpios_setup(pdev);
  1925. + if (status)
  1926. + goto err_gpio;
  1927. +
  1928. + status = shps_gpios_setup_irq(pdev);
  1929. + if (status)
  1930. + goto err_gpio_irqs;
  1931. +
  1932. + status = device_add_groups(&pdev->dev, shps_power_groups);
  1933. + if (status)
  1934. + goto err_devattr;
  1935. +
  1936. + link = device_link_add(&pdev->dev, &drvdata->dgpu_root_port->dev,
  1937. + DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER);
  1938. + if (!link)
  1939. + goto err_devlink;
  1940. +
  1941. + surface_sam_san_set_rqsg_handler(shps_dgpu_handle_rqsg, pdev);
  1942. +
  1943. + // if dGPU is not present turn-off root-port, else obey module param
  1944. + status = shps_dgpu_is_present(pdev);
  1945. + if (status < 0)
  1946. + goto err_devlink;
  1947. +
  1948. + power = status == 0 ? SHPS_DGPU_POWER_OFF : param_dgpu_power_init;
  1949. + if (power != SHPS_DGPU_MP_POWER_ASIS) {
  1950. + status = shps_dgpu_set_power(pdev, power);
  1951. + if (status)
  1952. + goto err_devlink;
  1953. + }
  1954. +
  1955. + device_init_wakeup(&pdev->dev, true);
  1956. + return 0;
  1957. +
  1958. +err_devlink:
  1959. + device_remove_groups(&pdev->dev, shps_power_groups);
  1960. +err_devattr:
  1961. + shps_gpios_remove_irq(pdev);
  1962. +err_gpio_irqs:
  1963. + shps_gpios_remove(pdev);
  1964. +err_gpio:
  1965. + pci_dev_put(drvdata->dgpu_root_port);
  1966. +err_rp_lookup:
  1967. + platform_set_drvdata(pdev, NULL);
  1968. + kfree(drvdata);
  1969. +err_drvdata:
  1970. + acpi_dev_remove_driver_gpios(shps_dev);
  1971. + return status;
  1972. +}
  1973. +
  1974. +static int shps_remove(struct platform_device *pdev)
  1975. +{
  1976. + struct acpi_device *shps_dev = ACPI_COMPANION(&pdev->dev);
  1977. + struct shps_driver_data *drvdata = platform_get_drvdata(pdev);
  1978. + int status;
  1979. +
  1980. + if (param_dgpu_power_exit != SHPS_DGPU_MP_POWER_ASIS) {
  1981. + status = shps_dgpu_set_power(pdev, param_dgpu_power_exit);
  1982. + if (status)
  1983. + dev_err(&pdev->dev, "failed to set dGPU power state: %d\n", status);
  1984. + }
  1985. +
  1986. + device_set_wakeup_capable(&pdev->dev, false);
  1987. + surface_sam_san_set_rqsg_handler(NULL, NULL);
  1988. + device_remove_groups(&pdev->dev, shps_power_groups);
  1989. + shps_gpios_remove_irq(pdev);
  1990. + shps_gpios_remove(pdev);
  1991. + pci_dev_put(drvdata->dgpu_root_port);
  1992. + platform_set_drvdata(pdev, NULL);
  1993. + kfree(drvdata);
  1994. +
  1995. + acpi_dev_remove_driver_gpios(shps_dev);
  1996. + return 0;
  1997. +}
  1998. +
  1999. +
  2000. +static const struct dev_pm_ops shps_pm_ops = {
  2001. + .prepare = shps_pm_prepare,
  2002. + .complete = shps_pm_complete,
  2003. + .suspend = shps_pm_suspend,
  2004. + .resume = shps_pm_resume,
  2005. +};
  2006. +
  2007. +static const struct acpi_device_id shps_acpi_match[] = {
  2008. + { "MSHW0153", 0 },
  2009. + { },
  2010. +};
  2011. +MODULE_DEVICE_TABLE(acpi, shps_acpi_match);
  2012. +
  2013. +struct platform_driver surface_sam_hps = {
  2014. + .probe = shps_probe,
  2015. + .remove = shps_remove,
  2016. + .shutdown = shps_shutdown,
  2017. + .driver = {
  2018. + .name = "surface_dgpu_hps",
  2019. + .acpi_match_table = ACPI_PTR(shps_acpi_match),
  2020. + .pm = &shps_pm_ops,
  2021. + },
  2022. +};
  2023. +module_platform_driver(surface_sam_hps);
  2024. +
  2025. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  2026. +MODULE_DESCRIPTION("Surface Hot-Plug System (HPS) and dGPU power-state Driver for Surface Book 2");
  2027. +MODULE_LICENSE("GPL v2");
  2028. diff --git a/drivers/platform/x86/surface_sam/surface_sam_san.c b/drivers/platform/x86/surface_sam/surface_sam_san.c
  2029. new file mode 100644
  2030. index 000000000000..aa0cfc4262be
  2031. --- /dev/null
  2032. +++ b/drivers/platform/x86/surface_sam/surface_sam_san.c
  2033. @@ -0,0 +1,901 @@
  2034. +/*
  2035. + * Surface ACPI Notify (SAN) and ACPI integration driver for SAM.
  2036. + * Translates communication from ACPI to SSH and back.
  2037. + */
  2038. +
  2039. +#include <linux/acpi.h>
  2040. +#include <linux/delay.h>
  2041. +#include <linux/jiffies.h>
  2042. +#include <linux/kernel.h>
  2043. +#include <linux/platform_device.h>
  2044. +
  2045. +#include "surface_sam_ssh.h"
  2046. +#include "surface_sam_san.h"
  2047. +
  2048. +
  2049. +#define SAN_RQST_RETRY 5
  2050. +
  2051. +#define SAN_DSM_REVISION 0
  2052. +#define SAN_DSM_FN_NOTIFY_SENSOR_TRIP_POINT 0x09
  2053. +
  2054. +static const guid_t SAN_DSM_UUID =
  2055. + GUID_INIT(0x93b666c5, 0x70c6, 0x469f, 0xa2, 0x15, 0x3d,
  2056. + 0x48, 0x7c, 0x91, 0xab, 0x3c);
  2057. +
  2058. +#define SAM_EVENT_DELAY_PWR_ADAPTER msecs_to_jiffies(5000)
  2059. +#define SAM_EVENT_DELAY_PWR_BST msecs_to_jiffies(2500)
  2060. +
  2061. +#define SAM_EVENT_PWR_TC 0x02
  2062. +#define SAM_EVENT_PWR_RQID 0x0002
  2063. +#define SAM_EVENT_PWR_CID_BIX 0x15
  2064. +#define SAM_EVENT_PWR_CID_BST 0x16
  2065. +#define SAM_EVENT_PWR_CID_ADAPTER 0x17
  2066. +#define SAM_EVENT_PWR_CID_DPTF 0x4f
  2067. +
  2068. +#define SAM_EVENT_TEMP_TC 0x03
  2069. +#define SAM_EVENT_TEMP_RQID 0x0003
  2070. +#define SAM_EVENT_TEMP_CID_NOTIFY_SENSOR_TRIP_POINT 0x0b
  2071. +
  2072. +#define SAN_RQST_TAG "surface_sam_san: rqst: "
  2073. +#define SAN_RQSG_TAG "surface_sam_san: rqsg: "
  2074. +
  2075. +#define SAN_QUIRK_BASE_STATE_DELAY 1000
  2076. +
  2077. +
  2078. +struct san_acpi_consumer {
  2079. + char *path;
  2080. + bool required;
  2081. + u32 flags;
  2082. +};
  2083. +
  2084. +struct san_opreg_context {
  2085. + struct acpi_connection_info connection;
  2086. + struct device *dev;
  2087. +};
  2088. +
  2089. +struct san_consumer_link {
  2090. + const struct san_acpi_consumer *properties;
  2091. + struct device_link *link;
  2092. +};
  2093. +
  2094. +struct san_consumers {
  2095. + u32 num;
  2096. + struct san_consumer_link *links;
  2097. +};
  2098. +
  2099. +struct san_drvdata {
  2100. + struct san_opreg_context opreg_ctx;
  2101. + struct san_consumers consumers;
  2102. + bool has_power_events;
  2103. +};
  2104. +
  2105. +struct gsb_data_in {
  2106. + u8 cv;
  2107. +} __packed;
  2108. +
  2109. +struct gsb_data_rqsx {
  2110. + u8 cv; // command value (should be 0x01 or 0x03)
  2111. + u8 tc; // target controller
  2112. + u8 tid; // expected to be 0x01, could be revision
  2113. + u8 iid; // target sub-controller (e.g. primary vs. secondary battery)
  2114. + u8 snc; // expect-response-flag
  2115. + u8 cid; // command ID
  2116. + u8 cdl; // payload length
  2117. + u8 _pad; // padding
  2118. + u8 pld[0]; // payload
  2119. +} __packed;
  2120. +
  2121. +struct gsb_data_etwl {
  2122. + u8 cv; // command value (should be 0x02)
  2123. + u8 etw3; // ?
  2124. + u8 etw4; // ?
  2125. + u8 msg[0]; // error message (ASCIIZ)
  2126. +} __packed;
  2127. +
  2128. +struct gsb_data_out {
  2129. + u8 status; // _SSH communication status
  2130. + u8 len; // _SSH payload length
  2131. + u8 pld[0]; // _SSH payload
  2132. +} __packed;
  2133. +
  2134. +union gsb_buffer_data {
  2135. + struct gsb_data_in in; // common input
  2136. + struct gsb_data_rqsx rqsx; // RQSX input
  2137. + struct gsb_data_etwl etwl; // ETWL input
  2138. + struct gsb_data_out out; // output
  2139. +};
  2140. +
  2141. +struct gsb_buffer {
  2142. + u8 status; // GSB AttribRawProcess status
  2143. + u8 len; // GSB AttribRawProcess length
  2144. + union gsb_buffer_data data;
  2145. +} __packed;
  2146. +
  2147. +
  2148. +enum san_pwr_event {
  2149. + SAN_PWR_EVENT_BAT1_STAT = 0x03,
  2150. + SAN_PWR_EVENT_BAT1_INFO = 0x04,
  2151. + SAN_PWR_EVENT_ADP1_STAT = 0x05,
  2152. + SAN_PWR_EVENT_ADP1_INFO = 0x06,
  2153. + SAN_PWR_EVENT_BAT2_STAT = 0x07,
  2154. + SAN_PWR_EVENT_BAT2_INFO = 0x08,
  2155. +};
  2156. +
  2157. +
  2158. +static int sam_san_default_rqsg_handler(struct surface_sam_san_rqsg *rqsg, void *data);
  2159. +
  2160. +struct sam_san_rqsg_if {
  2161. + struct mutex lock;
  2162. + struct device *san_dev;
  2163. + surface_sam_san_rqsg_handler_fn handler;
  2164. + void *handler_data;
  2165. +};
  2166. +
  2167. +static struct sam_san_rqsg_if rqsg_if = {
  2168. + .lock = __MUTEX_INITIALIZER(rqsg_if.lock),
  2169. + .san_dev = NULL,
  2170. + .handler = sam_san_default_rqsg_handler,
  2171. + .handler_data = NULL,
  2172. +};
  2173. +
  2174. +int surface_sam_san_consumer_register(struct device *consumer, u32 flags)
  2175. +{
  2176. + const u32 valid = DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE;
  2177. + int status;
  2178. +
  2179. + if ((flags | valid) != valid)
  2180. + return -EINVAL;
  2181. +
  2182. + flags |= DL_FLAG_AUTOREMOVE_CONSUMER;
  2183. +
  2184. + mutex_lock(&rqsg_if.lock);
  2185. + if (rqsg_if.san_dev)
  2186. + status = device_link_add(consumer, rqsg_if.san_dev, flags) ? 0 : -EINVAL;
  2187. + else
  2188. + status = -ENXIO;
  2189. + mutex_unlock(&rqsg_if.lock);
  2190. + return status;
  2191. +}
  2192. +EXPORT_SYMBOL_GPL(surface_sam_san_consumer_register);
  2193. +
  2194. +int surface_sam_san_set_rqsg_handler(surface_sam_san_rqsg_handler_fn fn, void *data)
  2195. +{
  2196. + int status = -EBUSY;
  2197. +
  2198. + mutex_lock(&rqsg_if.lock);
  2199. +
  2200. + if (rqsg_if.handler == sam_san_default_rqsg_handler || !fn) {
  2201. + rqsg_if.handler = fn ? fn : sam_san_default_rqsg_handler;
  2202. + rqsg_if.handler_data = data;
  2203. + status = 0;
  2204. + }
  2205. +
  2206. + mutex_unlock(&rqsg_if.lock);
  2207. + return status;
  2208. +}
  2209. +EXPORT_SYMBOL_GPL(surface_sam_san_set_rqsg_handler);
  2210. +
  2211. +int san_call_rqsg_handler(struct surface_sam_san_rqsg *rqsg)
  2212. +{
  2213. + int status;
  2214. +
  2215. + mutex_lock(&rqsg_if.lock);
  2216. + status = rqsg_if.handler(rqsg, rqsg_if.handler_data);
  2217. + mutex_unlock(&rqsg_if.lock);
  2218. +
  2219. + return status;
  2220. +}
  2221. +
  2222. +static int sam_san_default_rqsg_handler(struct surface_sam_san_rqsg *rqsg, void *data)
  2223. +{
  2224. + pr_warn(SAN_RQSG_TAG "unhandled request: RQSG(0x%02x, 0x%02x, 0x%02x)\n",
  2225. + rqsg->tc, rqsg->cid, rqsg->iid);
  2226. +
  2227. + return 0;
  2228. +}
  2229. +
  2230. +
  2231. +static int san_acpi_notify_power_event(struct device *dev, enum san_pwr_event event)
  2232. +{
  2233. + acpi_handle san = ACPI_HANDLE(dev);
  2234. + union acpi_object *obj;
  2235. +
  2236. + dev_dbg(dev, "notify power event 0x%02x\n", event);
  2237. + obj = acpi_evaluate_dsm_typed(san, &SAN_DSM_UUID, SAN_DSM_REVISION,
  2238. + (u8) event, NULL, ACPI_TYPE_BUFFER);
  2239. +
  2240. + if (IS_ERR_OR_NULL(obj)) {
  2241. + return obj ? PTR_ERR(obj) : -ENXIO;
  2242. + }
  2243. +
  2244. + if (obj->buffer.length != 1 || obj->buffer.pointer[0] != 0) {
  2245. + dev_err(dev, "got unexpected result from _DSM\n");
  2246. + return -EFAULT;
  2247. + }
  2248. +
  2249. + ACPI_FREE(obj);
  2250. + return 0;
  2251. +}
  2252. +
  2253. +static int san_acpi_notify_sensor_trip_point(struct device *dev, u8 iid)
  2254. +{
  2255. + acpi_handle san = ACPI_HANDLE(dev);
  2256. + union acpi_object *obj;
  2257. + union acpi_object param;
  2258. +
  2259. + param.type = ACPI_TYPE_INTEGER;
  2260. + param.integer.value = iid;
  2261. +
  2262. + obj = acpi_evaluate_dsm_typed(san, &SAN_DSM_UUID, SAN_DSM_REVISION,
  2263. + SAN_DSM_FN_NOTIFY_SENSOR_TRIP_POINT,
  2264. + &param, ACPI_TYPE_BUFFER);
  2265. +
  2266. + if (IS_ERR_OR_NULL(obj)) {
  2267. + return obj ? PTR_ERR(obj) : -ENXIO;
  2268. + }
  2269. +
  2270. + if (obj->buffer.length != 1 || obj->buffer.pointer[0] != 0) {
  2271. + dev_err(dev, "got unexpected result from _DSM\n");
  2272. + return -EFAULT;
  2273. + }
  2274. +
  2275. + ACPI_FREE(obj);
  2276. + return 0;
  2277. +}
  2278. +
  2279. +
  2280. +inline static int san_evt_power_adapter(struct device *dev, struct surface_sam_ssh_event *event)
  2281. +{
  2282. + int status;
  2283. +
  2284. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_ADP1_STAT);
  2285. + if (status) {
  2286. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2287. + return status;
  2288. + }
  2289. +
  2290. + /*
  2291. + * Enusre that the battery states get updated correctly.
  2292. + * When the battery is fully charged and an adapter is plugged in, it
  2293. + * sometimes is not updated correctly, instead showing it as charging.
  2294. + * Explicitly trigger battery updates to fix this.
  2295. + */
  2296. +
  2297. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_BAT1_STAT);
  2298. + if (status) {
  2299. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2300. + return status;
  2301. + }
  2302. +
  2303. + status = san_acpi_notify_power_event(dev, SAN_PWR_EVENT_BAT2_STAT);
  2304. + if (status) {
  2305. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2306. + return status;
  2307. + }
  2308. +
  2309. + return 0;
  2310. +}
  2311. +
  2312. +inline static int san_evt_power_bix(struct device *dev, struct surface_sam_ssh_event *event)
  2313. +{
  2314. + enum san_pwr_event evcode;
  2315. + int status;
  2316. +
  2317. + if (event->iid == 0x02) {
  2318. + evcode = SAN_PWR_EVENT_BAT2_INFO;
  2319. + } else {
  2320. + evcode = SAN_PWR_EVENT_BAT1_INFO;
  2321. + }
  2322. +
  2323. + status = san_acpi_notify_power_event(dev, evcode);
  2324. + if (status) {
  2325. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2326. + return status;
  2327. + }
  2328. +
  2329. + return 0;
  2330. +}
  2331. +
  2332. +inline static int san_evt_power_bst(struct device *dev, struct surface_sam_ssh_event *event)
  2333. +{
  2334. + enum san_pwr_event evcode;
  2335. + int status;
  2336. +
  2337. + if (event->iid == 0x02) {
  2338. + evcode = SAN_PWR_EVENT_BAT2_STAT;
  2339. + } else {
  2340. + evcode = SAN_PWR_EVENT_BAT1_STAT;
  2341. + }
  2342. +
  2343. + status = san_acpi_notify_power_event(dev, evcode);
  2344. + if (status) {
  2345. + dev_err(dev, "error handling power event (cid = %x)\n", event->cid);
  2346. + return status;
  2347. + }
  2348. +
  2349. + return 0;
  2350. +}
  2351. +
  2352. +static unsigned long san_evt_power_delay(struct surface_sam_ssh_event *event, void *data)
  2353. +{
  2354. + switch (event->cid) {
  2355. + case SAM_EVENT_PWR_CID_ADAPTER:
  2356. + /*
  2357. + * Wait for battery state to update before signalling adapter change.
  2358. + */
  2359. + return SAM_EVENT_DELAY_PWR_ADAPTER;
  2360. +
  2361. + case SAM_EVENT_PWR_CID_BST:
  2362. + /*
  2363. + * Ensure we do not miss anything important due to caching.
  2364. + */
  2365. + return SAM_EVENT_DELAY_PWR_BST;
  2366. +
  2367. + case SAM_EVENT_PWR_CID_BIX:
  2368. + case SAM_EVENT_PWR_CID_DPTF:
  2369. + default:
  2370. + return 0;
  2371. + }
  2372. +}
  2373. +
  2374. +static int san_evt_power(struct surface_sam_ssh_event *event, void *data)
  2375. +{
  2376. + struct device *dev = (struct device *)data;
  2377. +
  2378. + switch (event->cid) {
  2379. + case SAM_EVENT_PWR_CID_BIX:
  2380. + return san_evt_power_bix(dev, event);
  2381. +
  2382. + case SAM_EVENT_PWR_CID_BST:
  2383. + return san_evt_power_bst(dev, event);
  2384. +
  2385. + case SAM_EVENT_PWR_CID_ADAPTER:
  2386. + return san_evt_power_adapter(dev, event);
  2387. +
  2388. + case SAM_EVENT_PWR_CID_DPTF:
  2389. + /*
  2390. + * Ignored for now.
  2391. + * This signals a change in Intel DPTF PMAX, and possibly other
  2392. + * fields. Ignore for now as there is no corresponding _DSM call and
  2393. + * DPTF is implemented via a separate INT3407 device.
  2394. + *
  2395. + * The payload of this event is: [u32 PMAX, unknown...].
  2396. + */
  2397. + return 0;
  2398. +
  2399. + default:
  2400. + dev_warn(dev, "unhandled power event (cid = %x)\n", event->cid);
  2401. + }
  2402. +
  2403. + return 0;
  2404. +}
  2405. +
  2406. +
  2407. +inline static int san_evt_thermal_notify(struct device *dev, struct surface_sam_ssh_event *event)
  2408. +{
  2409. + int status;
  2410. +
  2411. + status = san_acpi_notify_sensor_trip_point(dev, event->iid);
  2412. + if (status) {
  2413. + dev_err(dev, "error handling thermal event (cid = %x)\n", event->cid);
  2414. + return status;
  2415. + }
  2416. +
  2417. + return 0;
  2418. +}
  2419. +
  2420. +static int san_evt_thermal(struct surface_sam_ssh_event *event, void *data)
  2421. +{
  2422. + struct device *dev = (struct device *)data;
  2423. +
  2424. + switch (event->cid) {
  2425. + case SAM_EVENT_TEMP_CID_NOTIFY_SENSOR_TRIP_POINT:
  2426. + return san_evt_thermal_notify(dev, event);
  2427. +
  2428. + default:
  2429. + dev_warn(dev, "unhandled thermal event (cid = %x)\n", event->cid);
  2430. + }
  2431. +
  2432. + return 0;
  2433. +}
  2434. +
  2435. +
  2436. +static struct gsb_data_rqsx
  2437. +*san_validate_rqsx(struct device *dev, const char *type, struct gsb_buffer *buffer)
  2438. +{
  2439. + struct gsb_data_rqsx *rqsx = &buffer->data.rqsx;
  2440. +
  2441. + if (buffer->len < 8) {
  2442. + dev_err(dev, "invalid %s package (len = %d)\n",
  2443. + type, buffer->len);
  2444. + return NULL;
  2445. + }
  2446. +
  2447. + if (rqsx->cdl != buffer->len - 8) {
  2448. + dev_err(dev, "bogus %s package (len = %d, cdl = %d)\n",
  2449. + type, buffer->len, rqsx->cdl);
  2450. + return NULL;
  2451. + }
  2452. +
  2453. + if (rqsx->tid != 0x01) {
  2454. + dev_warn(dev, "unsupported %s package (tid = 0x%02x)\n",
  2455. + type, rqsx->tid);
  2456. + return NULL;
  2457. + }
  2458. +
  2459. + return rqsx;
  2460. +}
  2461. +
  2462. +static acpi_status
  2463. +san_etwl(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2464. +{
  2465. + struct gsb_data_etwl *etwl = &buffer->data.etwl;
  2466. +
  2467. + if (buffer->len < 3) {
  2468. + dev_err(ctx->dev, "invalid ETWL package (len = %d)\n", buffer->len);
  2469. + return AE_OK;
  2470. + }
  2471. +
  2472. + dev_err(ctx->dev, "ETWL(0x%02x, 0x%02x): %.*s\n",
  2473. + etwl->etw3, etwl->etw4,
  2474. + buffer->len - 3, (char *)etwl->msg);
  2475. +
  2476. + // indicate success
  2477. + buffer->status = 0x00;
  2478. + buffer->len = 0x00;
  2479. +
  2480. + return AE_OK;
  2481. +}
  2482. +
  2483. +static acpi_status
  2484. +san_rqst(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2485. +{
  2486. + struct gsb_data_rqsx *gsb_rqst = san_validate_rqsx(ctx->dev, "RQST", buffer);
  2487. + struct surface_sam_ssh_rqst rqst = {};
  2488. + struct surface_sam_ssh_buf result = {};
  2489. + int status = 0;
  2490. + int try;
  2491. +
  2492. + if (!gsb_rqst) {
  2493. + return AE_OK;
  2494. + }
  2495. +
  2496. + rqst.tc = gsb_rqst->tc;
  2497. + rqst.cid = gsb_rqst->cid;
  2498. + rqst.iid = gsb_rqst->iid;
  2499. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  2500. + rqst.snc = gsb_rqst->snc;
  2501. + rqst.cdl = gsb_rqst->cdl;
  2502. + rqst.pld = &gsb_rqst->pld[0];
  2503. +
  2504. + result.cap = SURFACE_SAM_SSH_MAX_RQST_RESPONSE;
  2505. + result.len = 0;
  2506. + result.data = kzalloc(result.cap, GFP_KERNEL);
  2507. +
  2508. + if (!result.data) {
  2509. + return AE_NO_MEMORY;
  2510. + }
  2511. +
  2512. + for (try = 0; try < SAN_RQST_RETRY; try++) {
  2513. + if (try) {
  2514. + dev_warn(ctx->dev, SAN_RQST_TAG "IO error occured, trying again\n");
  2515. + }
  2516. +
  2517. + status = surface_sam_ssh_rqst(&rqst, &result);
  2518. + if (status != -EIO) break;
  2519. + }
  2520. +
  2521. + if (rqst.tc == 0x11 && rqst.cid == 0x0D && status == -EPERM) {
  2522. + /* Base state quirk:
  2523. + * The base state may be queried from ACPI when the EC is still
  2524. + * suspended. In this case it will return '-EPERM'. This query
  2525. + * will only be triggered from the ACPI lid GPE interrupt, thus
  2526. + * we are either in laptop or studio mode (base status 0x01 or
  2527. + * 0x02). Furthermore, we will only get here if the device (and
  2528. + * EC) have been suspended.
  2529. + *
  2530. + * We now assume that the device is in laptop mode (0x01). This
  2531. + * has the drawback that it will wake the device when unfolding
  2532. + * it in studio mode, but it also allows us to avoid actively
  2533. + * waiting for the EC to wake up, which may incur a notable
  2534. + * delay.
  2535. + */
  2536. +
  2537. + buffer->status = 0x00;
  2538. + buffer->len = 0x03;
  2539. + buffer->data.out.status = 0x00;
  2540. + buffer->data.out.len = 0x01;
  2541. + buffer->data.out.pld[0] = 0x01;
  2542. +
  2543. + } else if (!status) { // success
  2544. + buffer->status = 0x00;
  2545. + buffer->len = result.len + 2;
  2546. + buffer->data.out.status = 0x00;
  2547. + buffer->data.out.len = result.len;
  2548. + memcpy(&buffer->data.out.pld[0], result.data, result.len);
  2549. +
  2550. + } else { // failure
  2551. + dev_err(ctx->dev, SAN_RQST_TAG "failed with error %d\n", status);
  2552. + buffer->status = 0x00;
  2553. + buffer->len = 0x02;
  2554. + buffer->data.out.status = 0x01; // indicate _SSH error
  2555. + buffer->data.out.len = 0x00;
  2556. + }
  2557. +
  2558. + kfree(result.data);
  2559. +
  2560. + return AE_OK;
  2561. +}
  2562. +
  2563. +static acpi_status
  2564. +san_rqsg(struct san_opreg_context *ctx, struct gsb_buffer *buffer)
  2565. +{
  2566. + struct gsb_data_rqsx *gsb_rqsg = san_validate_rqsx(ctx->dev, "RQSG", buffer);
  2567. + struct surface_sam_san_rqsg rqsg = {};
  2568. + int status;
  2569. +
  2570. + if (!gsb_rqsg) {
  2571. + return AE_OK;
  2572. + }
  2573. +
  2574. + rqsg.tc = gsb_rqsg->tc;
  2575. + rqsg.cid = gsb_rqsg->cid;
  2576. + rqsg.iid = gsb_rqsg->iid;
  2577. + rqsg.cdl = gsb_rqsg->cdl;
  2578. + rqsg.pld = &gsb_rqsg->pld[0];
  2579. +
  2580. + status = san_call_rqsg_handler(&rqsg);
  2581. + if (!status) {
  2582. + buffer->status = 0x00;
  2583. + buffer->len = 0x02;
  2584. + buffer->data.out.status = 0x00;
  2585. + buffer->data.out.len = 0x00;
  2586. + } else {
  2587. + dev_err(ctx->dev, SAN_RQSG_TAG "failed with error %d\n", status);
  2588. + buffer->status = 0x00;
  2589. + buffer->len = 0x02;
  2590. + buffer->data.out.status = 0x01; // indicate _SSH error
  2591. + buffer->data.out.len = 0x00;
  2592. + }
  2593. +
  2594. + return AE_OK;
  2595. +}
  2596. +
  2597. +
  2598. +static acpi_status
  2599. +san_opreg_handler(u32 function, acpi_physical_address command,
  2600. + u32 bits, u64 *value64,
  2601. + void *opreg_context, void *region_context)
  2602. +{
  2603. + struct san_opreg_context *context = opreg_context;
  2604. + struct gsb_buffer *buffer = (struct gsb_buffer *)value64;
  2605. + int accessor_type = (0xFFFF0000 & function) >> 16;
  2606. +
  2607. + if (command != 0) {
  2608. + dev_warn(context->dev, "unsupported command: 0x%02llx\n", command);
  2609. + return AE_OK;
  2610. + }
  2611. +
  2612. + if (accessor_type != ACPI_GSB_ACCESS_ATTRIB_RAW_PROCESS) {
  2613. + dev_err(context->dev, "invalid access type: 0x%02x\n", accessor_type);
  2614. + return AE_OK;
  2615. + }
  2616. +
  2617. + // buffer must have at least contain the command-value
  2618. + if (buffer->len == 0) {
  2619. + dev_err(context->dev, "request-package too small\n");
  2620. + return AE_OK;
  2621. + }
  2622. +
  2623. + switch (buffer->data.in.cv) {
  2624. + case 0x01: return san_rqst(context, buffer);
  2625. + case 0x02: return san_etwl(context, buffer);
  2626. + case 0x03: return san_rqsg(context, buffer);
  2627. + }
  2628. +
  2629. + dev_warn(context->dev, "unsupported SAN0 request (cv: 0x%02x)\n", buffer->data.in.cv);
  2630. + return AE_OK;
  2631. +}
  2632. +
  2633. +static int san_enable_power_events(struct platform_device *pdev)
  2634. +{
  2635. + int status;
  2636. +
  2637. + status = surface_sam_ssh_set_delayed_event_handler(
  2638. + SAM_EVENT_PWR_RQID, san_evt_power,
  2639. + san_evt_power_delay, &pdev->dev);
  2640. + if (status)
  2641. + return status;
  2642. +
  2643. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_PWR_TC, 0x01, SAM_EVENT_PWR_RQID);
  2644. + if (status) {
  2645. + surface_sam_ssh_remove_event_handler(SAM_EVENT_PWR_RQID);
  2646. + return status;
  2647. + }
  2648. +
  2649. + return 0;
  2650. +}
  2651. +
  2652. +static int san_enable_thermal_events(struct platform_device *pdev)
  2653. +{
  2654. + int status;
  2655. +
  2656. + status = surface_sam_ssh_set_event_handler(
  2657. + SAM_EVENT_TEMP_RQID, san_evt_thermal,
  2658. + &pdev->dev);
  2659. + if (status)
  2660. + return status;
  2661. +
  2662. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_TEMP_TC, 0x01, SAM_EVENT_TEMP_RQID);
  2663. + if (status) {
  2664. + surface_sam_ssh_remove_event_handler(SAM_EVENT_TEMP_RQID);
  2665. + return status;
  2666. + }
  2667. +
  2668. + return 0;
  2669. +}
  2670. +
  2671. +static void san_disable_power_events(void)
  2672. +{
  2673. + surface_sam_ssh_disable_event_source(SAM_EVENT_PWR_TC, 0x01, SAM_EVENT_PWR_RQID);
  2674. + surface_sam_ssh_remove_event_handler(SAM_EVENT_PWR_RQID);
  2675. +}
  2676. +
  2677. +static void san_disable_thermal_events(void)
  2678. +{
  2679. + surface_sam_ssh_disable_event_source(SAM_EVENT_TEMP_TC, 0x01, SAM_EVENT_TEMP_RQID);
  2680. + surface_sam_ssh_remove_event_handler(SAM_EVENT_TEMP_RQID);
  2681. +}
  2682. +
  2683. +
  2684. +static int san_enable_events(struct platform_device *pdev)
  2685. +{
  2686. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2687. + int status;
  2688. +
  2689. + status = san_enable_thermal_events(pdev);
  2690. + if (status)
  2691. + return status;
  2692. +
  2693. + /*
  2694. + * We have to figure out if this device uses SAN or requires a separate
  2695. + * driver for the battery. If it uses the separate driver, that driver
  2696. + * will enable and handle power events.
  2697. + */
  2698. + drvdata->has_power_events = acpi_has_method(NULL, "\\_SB.BAT1._BST");
  2699. + if (drvdata->has_power_events) {
  2700. + status = san_enable_power_events(pdev);
  2701. + if (status)
  2702. + goto err;
  2703. + }
  2704. +
  2705. + return 0;
  2706. +
  2707. +err:
  2708. + san_disable_thermal_events();
  2709. + return status;
  2710. +}
  2711. +
  2712. +static void san_disable_events(struct platform_device *pdev)
  2713. +{
  2714. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2715. +
  2716. + san_disable_thermal_events();
  2717. + if (drvdata->has_power_events)
  2718. + san_disable_power_events();
  2719. +}
  2720. +
  2721. +
  2722. +static int san_consumers_link(struct platform_device *pdev,
  2723. + const struct san_acpi_consumer *cons,
  2724. + struct san_consumers *out)
  2725. +{
  2726. + const struct san_acpi_consumer *con;
  2727. + struct san_consumer_link *links, *link;
  2728. + struct acpi_device *adev;
  2729. + acpi_handle handle;
  2730. + u32 max_links = 0;
  2731. + int status;
  2732. +
  2733. + if (!cons) {
  2734. + return 0;
  2735. + }
  2736. +
  2737. + // count links
  2738. + for (con = cons; con->path; ++con) {
  2739. + max_links += 1;
  2740. + }
  2741. +
  2742. + // allocate
  2743. + links = kzalloc(max_links * sizeof(struct san_consumer_link), GFP_KERNEL);
  2744. + link = &links[0];
  2745. +
  2746. + if (!links) {
  2747. + return -ENOMEM;
  2748. + }
  2749. +
  2750. + // create links
  2751. + for (con = cons; con->path; ++con) {
  2752. + status = acpi_get_handle(NULL, con->path, &handle);
  2753. + if (status) {
  2754. + if (con->required || status != AE_NOT_FOUND) {
  2755. + status = -ENXIO;
  2756. + goto cleanup;
  2757. + } else {
  2758. + continue;
  2759. + }
  2760. + }
  2761. +
  2762. + status = acpi_bus_get_device(handle, &adev);
  2763. + if (status) {
  2764. + goto cleanup;
  2765. + }
  2766. +
  2767. + link->link = device_link_add(&adev->dev, &pdev->dev, con->flags);
  2768. + if (!(link->link)) {
  2769. + status = -EFAULT;
  2770. + goto cleanup;
  2771. + }
  2772. + link->properties = con;
  2773. +
  2774. + link += 1;
  2775. + }
  2776. +
  2777. + out->num = link - links;
  2778. + out->links = links;
  2779. +
  2780. + return 0;
  2781. +
  2782. +cleanup:
  2783. + for (link = link - 1; link >= links; --link) {
  2784. + if (link->properties->flags & DL_FLAG_STATELESS) {
  2785. + device_link_del(link->link);
  2786. + }
  2787. + }
  2788. +
  2789. + return status;
  2790. +}
  2791. +
  2792. +static void san_consumers_unlink(struct san_consumers *consumers) {
  2793. + u32 i;
  2794. +
  2795. + if (!consumers) {
  2796. + return;
  2797. + }
  2798. +
  2799. + for (i = 0; i < consumers->num; ++i) {
  2800. + if (consumers->links[i].properties->flags & DL_FLAG_STATELESS) {
  2801. + device_link_del(consumers->links[i].link);
  2802. + }
  2803. + }
  2804. +
  2805. + kfree(consumers->links);
  2806. +
  2807. + consumers->num = 0;
  2808. + consumers->links = NULL;
  2809. +}
  2810. +
  2811. +static int surface_sam_san_probe(struct platform_device *pdev)
  2812. +{
  2813. + const struct san_acpi_consumer *cons;
  2814. + struct san_drvdata *drvdata;
  2815. + acpi_handle san = ACPI_HANDLE(&pdev->dev); // _SAN device node
  2816. + int status;
  2817. +
  2818. + /*
  2819. + * Defer probe if the _SSH driver has not set up the controller yet. This
  2820. + * makes sure we do not fail any initial requests (e.g. _STA request without
  2821. + * which the battery does not get set up correctly). Otherwise register as
  2822. + * consumer to set up a device_link.
  2823. + */
  2824. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  2825. + if (status) {
  2826. + return status == -ENXIO ? -EPROBE_DEFER : status;
  2827. + }
  2828. +
  2829. + drvdata = kzalloc(sizeof(struct san_drvdata), GFP_KERNEL);
  2830. + if (!drvdata) {
  2831. + return -ENOMEM;
  2832. + }
  2833. +
  2834. + drvdata->opreg_ctx.dev = &pdev->dev;
  2835. +
  2836. + cons = acpi_device_get_match_data(&pdev->dev);
  2837. + status = san_consumers_link(pdev, cons, &drvdata->consumers);
  2838. + if (status) {
  2839. + goto err_consumers;
  2840. + }
  2841. +
  2842. + platform_set_drvdata(pdev, drvdata);
  2843. +
  2844. + status = acpi_install_address_space_handler(san,
  2845. + ACPI_ADR_SPACE_GSBUS,
  2846. + &san_opreg_handler,
  2847. + NULL, &drvdata->opreg_ctx);
  2848. +
  2849. + if (ACPI_FAILURE(status)) {
  2850. + status = -ENODEV;
  2851. + goto err_install_handler;
  2852. + }
  2853. +
  2854. + status = san_enable_events(pdev);
  2855. + if (status) {
  2856. + goto err_enable_events;
  2857. + }
  2858. +
  2859. + mutex_lock(&rqsg_if.lock);
  2860. + if (!rqsg_if.san_dev) {
  2861. + rqsg_if.san_dev = &pdev->dev;
  2862. + } else {
  2863. + status = -EBUSY;
  2864. + }
  2865. + mutex_unlock(&rqsg_if.lock);
  2866. +
  2867. + if (status) {
  2868. + goto err_install_dev;
  2869. + }
  2870. +
  2871. + acpi_walk_dep_device_list(san);
  2872. + return 0;
  2873. +
  2874. +err_install_dev:
  2875. + san_disable_events(pdev);
  2876. +err_enable_events:
  2877. + acpi_remove_address_space_handler(san, ACPI_ADR_SPACE_GSBUS, &san_opreg_handler);
  2878. +err_install_handler:
  2879. + platform_set_drvdata(san, NULL);
  2880. + san_consumers_unlink(&drvdata->consumers);
  2881. +err_consumers:
  2882. + kfree(drvdata);
  2883. + return status;
  2884. +}
  2885. +
  2886. +static int surface_sam_san_remove(struct platform_device *pdev)
  2887. +{
  2888. + struct san_drvdata *drvdata = platform_get_drvdata(pdev);
  2889. + acpi_handle san = ACPI_HANDLE(&pdev->dev); // _SAN device node
  2890. + acpi_status status = AE_OK;
  2891. +
  2892. + mutex_lock(&rqsg_if.lock);
  2893. + rqsg_if.san_dev = NULL;
  2894. + mutex_unlock(&rqsg_if.lock);
  2895. +
  2896. + acpi_remove_address_space_handler(san, ACPI_ADR_SPACE_GSBUS, &san_opreg_handler);
  2897. + san_disable_events(pdev);
  2898. +
  2899. + san_consumers_unlink(&drvdata->consumers);
  2900. + kfree(drvdata);
  2901. +
  2902. + platform_set_drvdata(pdev, NULL);
  2903. + return status;
  2904. +}
  2905. +
  2906. +
  2907. +static const struct san_acpi_consumer san_mshw0091_consumers[] = {
  2908. + { "\\_SB.SRTC", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2909. + { "\\ADP1", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2910. + { "\\_SB.BAT1", true, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2911. + { "\\_SB.BAT2", false, DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS },
  2912. + { },
  2913. +};
  2914. +
  2915. +static const struct acpi_device_id surface_sam_san_match[] = {
  2916. + { "MSHW0091", (long unsigned int) san_mshw0091_consumers },
  2917. + { },
  2918. +};
  2919. +MODULE_DEVICE_TABLE(acpi, surface_sam_san_match);
  2920. +
  2921. +static struct platform_driver surface_sam_san = {
  2922. + .probe = surface_sam_san_probe,
  2923. + .remove = surface_sam_san_remove,
  2924. + .driver = {
  2925. + .name = "surface_sam_san",
  2926. + .acpi_match_table = ACPI_PTR(surface_sam_san_match),
  2927. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  2928. + },
  2929. +};
  2930. +module_platform_driver(surface_sam_san);
  2931. +
  2932. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  2933. +MODULE_DESCRIPTION("Surface ACPI Notify Driver for 5th Generation Surface Devices");
  2934. +MODULE_LICENSE("GPL v2");
  2935. diff --git a/drivers/platform/x86/surface_sam/surface_sam_san.h b/drivers/platform/x86/surface_sam/surface_sam_san.h
  2936. new file mode 100644
  2937. index 000000000000..1ea8713db367
  2938. --- /dev/null
  2939. +++ b/drivers/platform/x86/surface_sam/surface_sam_san.h
  2940. @@ -0,0 +1,29 @@
  2941. +/*
  2942. + * Interface for Surface ACPI/Notify (SAN).
  2943. + *
  2944. + * The SAN is the main interface between the Surface Serial Hub (SSH) and the
  2945. + * Surface/System Aggregator Module (SAM). It allows requests to be translated
  2946. + * from ACPI to SSH/SAM. It also interfaces with the discrete GPU hot-plug
  2947. + * driver.
  2948. + */
  2949. +
  2950. +#ifndef _SURFACE_SAM_SAN_H
  2951. +#define _SURFACE_SAM_SAN_H
  2952. +
  2953. +#include <linux/types.h>
  2954. +
  2955. +
  2956. +struct surface_sam_san_rqsg {
  2957. + u8 tc; // target category
  2958. + u8 cid; // command ID
  2959. + u8 iid; // instance ID
  2960. + u8 cdl; // command data length (lenght of payload)
  2961. + u8 *pld; // pointer to payload of length cdl
  2962. +};
  2963. +
  2964. +typedef int (*surface_sam_san_rqsg_handler_fn)(struct surface_sam_san_rqsg *rqsg, void *data);
  2965. +
  2966. +int surface_sam_san_consumer_register(struct device *consumer, u32 flags);
  2967. +int surface_sam_san_set_rqsg_handler(surface_sam_san_rqsg_handler_fn fn, void *data);
  2968. +
  2969. +#endif /* _SURFACE_SAM_SAN_H */
  2970. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid.c b/drivers/platform/x86/surface_sam/surface_sam_sid.c
  2971. new file mode 100644
  2972. index 000000000000..f64dcd590494
  2973. --- /dev/null
  2974. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid.c
  2975. @@ -0,0 +1,117 @@
  2976. +/*
  2977. + * Surface Integration Driver.
  2978. + * MFD driver to provide device/model dependent functionality.
  2979. + */
  2980. +
  2981. +#include <linux/acpi.h>
  2982. +#include <linux/kernel.h>
  2983. +#include <linux/module.h>
  2984. +#include <linux/platform_device.h>
  2985. +#include <linux/mfd/core.h>
  2986. +
  2987. +
  2988. +static const struct mfd_cell sid_devs_sp4[] = {
  2989. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2990. + { },
  2991. +};
  2992. +
  2993. +static const struct mfd_cell sid_devs_sp7[] = {
  2994. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  2995. + { .name = "surface_sam_sid_ac", .id = -1 },
  2996. + { .name = "surface_sam_sid_battery", .id = -1 },
  2997. + { },
  2998. +};
  2999. +
  3000. +static const struct mfd_cell sid_devs_sb1[] = {
  3001. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3002. + { },
  3003. +};
  3004. +
  3005. +static const struct mfd_cell sid_devs_sb2[] = {
  3006. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3007. + { .name = "surface_sam_sid_perfmode", .id = -1 },
  3008. + { },
  3009. +};
  3010. +
  3011. +static const struct mfd_cell sid_devs_sl1[] = {
  3012. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3013. + { },
  3014. +};
  3015. +
  3016. +static const struct mfd_cell sid_devs_sl2[] = {
  3017. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3018. + { },
  3019. +};
  3020. +
  3021. +static const struct mfd_cell sid_devs_sl3_13[] = {
  3022. + { .name = "surface_sam_sid_gpelid", .id = -1 },
  3023. + { .name = "surface_sam_sid_vhf", .id = -1 },
  3024. + { .name = "surface_sam_sid_ac", .id = -1 },
  3025. + { .name = "surface_sam_sid_battery", .id = -1 },
  3026. + { },
  3027. +};
  3028. +
  3029. +static const struct mfd_cell sid_devs_sl3_15[] = {
  3030. + { .name = "surface_sam_sid_vhf", .id = -1 },
  3031. + { .name = "surface_sam_sid_ac", .id = -1 },
  3032. + { .name = "surface_sam_sid_battery", .id = -1 },
  3033. + { },
  3034. +};
  3035. +
  3036. +static const struct acpi_device_id surface_sam_sid_match[] = {
  3037. + { "MSHW0081", (unsigned long)sid_devs_sp4 }, /* Surface Pro 4, 5, and 6 */
  3038. + { "MSHW0116", (unsigned long)sid_devs_sp7 }, /* Surface Pro 7 */
  3039. + { "MSHW0080", (unsigned long)sid_devs_sb1 }, /* Surface Book 1 */
  3040. + { "MSHW0107", (unsigned long)sid_devs_sb2 }, /* Surface Book 2 */
  3041. + { "MSHW0086", (unsigned long)sid_devs_sl1 }, /* Surface Laptop 1 */
  3042. + { "MSHW0112", (unsigned long)sid_devs_sl2 }, /* Surface Laptop 2 */
  3043. + { "MSHW0114", (unsigned long)sid_devs_sl3_13 }, /* Surface Laptop 3 (13") */
  3044. + { "MSHW0110", (unsigned long)sid_devs_sl3_15 }, /* Surface Laptop 3 (15") */
  3045. + { },
  3046. +};
  3047. +MODULE_DEVICE_TABLE(acpi, surface_sam_sid_match);
  3048. +
  3049. +
  3050. +static int surface_sam_sid_probe(struct platform_device *pdev)
  3051. +{
  3052. + const struct acpi_device_id *match;
  3053. + const struct mfd_cell *cells, *p;
  3054. +
  3055. + match = acpi_match_device(surface_sam_sid_match, &pdev->dev);
  3056. + if (!match)
  3057. + return -ENODEV;
  3058. +
  3059. + cells = (struct mfd_cell *)match->driver_data;
  3060. + if (!cells)
  3061. + return -ENODEV;
  3062. +
  3063. + for (p = cells; p->name; ++p) {
  3064. + /* just count */
  3065. + }
  3066. +
  3067. + if (p == cells)
  3068. + return -ENODEV;
  3069. +
  3070. + return mfd_add_devices(&pdev->dev, 0, cells, p - cells, NULL, 0, NULL);
  3071. +}
  3072. +
  3073. +static int surface_sam_sid_remove(struct platform_device *pdev)
  3074. +{
  3075. + mfd_remove_devices(&pdev->dev);
  3076. + return 0;
  3077. +}
  3078. +
  3079. +static struct platform_driver surface_sam_sid = {
  3080. + .probe = surface_sam_sid_probe,
  3081. + .remove = surface_sam_sid_remove,
  3082. + .driver = {
  3083. + .name = "surface_sam_sid",
  3084. + .acpi_match_table = ACPI_PTR(surface_sam_sid_match),
  3085. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3086. + },
  3087. +};
  3088. +module_platform_driver(surface_sam_sid);
  3089. +
  3090. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3091. +MODULE_DESCRIPTION("Surface Integration Driver for 5th Generation Surface Devices");
  3092. +MODULE_LICENSE("GPL v2");
  3093. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c b/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  3094. new file mode 100644
  3095. index 000000000000..ce32ebf4d94d
  3096. --- /dev/null
  3097. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_gpelid.c
  3098. @@ -0,0 +1,219 @@
  3099. +/*
  3100. + * Surface Lid driver to enable wakeup from suspend via the lid.
  3101. + */
  3102. +
  3103. +#include <linux/acpi.h>
  3104. +#include <linux/dmi.h>
  3105. +#include <linux/kernel.h>
  3106. +#include <linux/module.h>
  3107. +#include <linux/platform_device.h>
  3108. +
  3109. +
  3110. +struct sid_lid_device {
  3111. + const char *acpi_path;
  3112. + const u32 gpe_number;
  3113. +};
  3114. +
  3115. +
  3116. +static const struct sid_lid_device lid_device_l17 = {
  3117. + .acpi_path = "\\_SB.LID0",
  3118. + .gpe_number = 0x17,
  3119. +};
  3120. +
  3121. +static const struct sid_lid_device lid_device_l4D = {
  3122. + .acpi_path = "\\_SB.LID0",
  3123. + .gpe_number = 0x4D,
  3124. +};
  3125. +
  3126. +static const struct sid_lid_device lid_device_l4F = {
  3127. + .acpi_path = "\\_SB.LID0",
  3128. + .gpe_number = 0x4F,
  3129. +};
  3130. +
  3131. +static const struct sid_lid_device lid_device_l57 = {
  3132. + .acpi_path = "\\_SB.LID0",
  3133. + .gpe_number = 0x57,
  3134. +};
  3135. +
  3136. +
  3137. +static const struct dmi_system_id dmi_lid_device_table[] = {
  3138. + {
  3139. + .ident = "Surface Pro 4",
  3140. + .matches = {
  3141. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3142. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 4"),
  3143. + },
  3144. + .driver_data = (void *)&lid_device_l17,
  3145. + },
  3146. + {
  3147. + .ident = "Surface Pro 5",
  3148. + .matches = {
  3149. + /* match for SKU here due to generic product name "Surface Pro" */
  3150. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3151. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1796"),
  3152. + },
  3153. + .driver_data = (void *)&lid_device_l4F,
  3154. + },
  3155. + {
  3156. + .ident = "Surface Pro 5 (LTE)",
  3157. + .matches = {
  3158. + /* match for SKU here due to generic product name "Surface Pro" */
  3159. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3160. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Pro_1807"),
  3161. + },
  3162. + .driver_data = (void *)&lid_device_l4F,
  3163. + },
  3164. + {
  3165. + .ident = "Surface Pro 6",
  3166. + .matches = {
  3167. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3168. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 6"),
  3169. + },
  3170. + .driver_data = (void *)&lid_device_l4F,
  3171. + },
  3172. + {
  3173. + .ident = "Surface Pro 7",
  3174. + .matches = {
  3175. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3176. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Pro 7"),
  3177. + },
  3178. + .driver_data = (void *)&lid_device_l4D,
  3179. + },
  3180. + {
  3181. + .ident = "Surface Book 1",
  3182. + .matches = {
  3183. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3184. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book"),
  3185. + },
  3186. + .driver_data = (void *)&lid_device_l17,
  3187. + },
  3188. + {
  3189. + .ident = "Surface Book 2",
  3190. + .matches = {
  3191. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3192. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Book 2"),
  3193. + },
  3194. + .driver_data = (void *)&lid_device_l17,
  3195. + },
  3196. + {
  3197. + .ident = "Surface Laptop 1",
  3198. + .matches = {
  3199. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3200. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop"),
  3201. + },
  3202. + .driver_data = (void *)&lid_device_l57,
  3203. + },
  3204. + {
  3205. + .ident = "Surface Laptop 2",
  3206. + .matches = {
  3207. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3208. + DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Surface Laptop 2"),
  3209. + },
  3210. + .driver_data = (void *)&lid_device_l57,
  3211. + },
  3212. + {
  3213. + .ident = "Surface Laptop 3 (13\")",
  3214. + .matches = {
  3215. + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"),
  3216. + DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "Surface_Laptop_3_1867:1868"),
  3217. + },
  3218. + .driver_data = (void *)&lid_device_l4D,
  3219. + },
  3220. + { }
  3221. +};
  3222. +
  3223. +
  3224. +static int sid_lid_enable_wakeup(const struct sid_lid_device *dev, bool enable)
  3225. +{
  3226. + int action = enable ? ACPI_GPE_ENABLE : ACPI_GPE_DISABLE;
  3227. + int status;
  3228. +
  3229. + status = acpi_set_gpe_wake_mask(NULL, dev->gpe_number, action);
  3230. + if (status)
  3231. + return -EFAULT;
  3232. +
  3233. + return 0;
  3234. +}
  3235. +
  3236. +
  3237. +static int surface_sam_sid_gpelid_suspend(struct device *dev)
  3238. +{
  3239. + const struct sid_lid_device *ldev = dev_get_drvdata(dev);
  3240. + return sid_lid_enable_wakeup(ldev, true);
  3241. +}
  3242. +
  3243. +static int surface_sam_sid_gpelid_resume(struct device *dev)
  3244. +{
  3245. + const struct sid_lid_device *ldev = dev_get_drvdata(dev);
  3246. + return sid_lid_enable_wakeup(ldev, false);
  3247. +}
  3248. +
  3249. +static SIMPLE_DEV_PM_OPS(surface_sam_sid_gpelid_pm,
  3250. + surface_sam_sid_gpelid_suspend,
  3251. + surface_sam_sid_gpelid_resume);
  3252. +
  3253. +
  3254. +static int surface_sam_sid_gpelid_probe(struct platform_device *pdev)
  3255. +{
  3256. + const struct dmi_system_id *match;
  3257. + struct sid_lid_device *dev;
  3258. + acpi_handle lid_handle;
  3259. + int status;
  3260. +
  3261. + match = dmi_first_match(dmi_lid_device_table);
  3262. + if (!match)
  3263. + return -ENODEV;
  3264. +
  3265. + dev = match->driver_data;
  3266. + if (!dev)
  3267. + return -ENODEV;
  3268. +
  3269. + status = acpi_get_handle(NULL, (acpi_string)dev->acpi_path, &lid_handle);
  3270. + if (status)
  3271. + return -EFAULT;
  3272. +
  3273. + status = acpi_setup_gpe_for_wake(lid_handle, NULL, dev->gpe_number);
  3274. + if (status)
  3275. + return -EFAULT;
  3276. +
  3277. + status = acpi_enable_gpe(NULL, dev->gpe_number);
  3278. + if (status)
  3279. + return -EFAULT;
  3280. +
  3281. + status = sid_lid_enable_wakeup(dev, false);
  3282. + if (status) {
  3283. + acpi_disable_gpe(NULL, dev->gpe_number);
  3284. + return status;
  3285. + }
  3286. +
  3287. + platform_set_drvdata(pdev, dev);
  3288. + return 0;
  3289. +}
  3290. +
  3291. +static int surface_sam_sid_gpelid_remove(struct platform_device *pdev)
  3292. +{
  3293. + struct sid_lid_device *dev = platform_get_drvdata(pdev);
  3294. +
  3295. + /* restore default behavior without this module */
  3296. + sid_lid_enable_wakeup(dev, false);
  3297. + acpi_disable_gpe(NULL, dev->gpe_number);
  3298. +
  3299. + platform_set_drvdata(pdev, NULL);
  3300. + return 0;
  3301. +}
  3302. +
  3303. +static struct platform_driver surface_sam_sid_gpelid = {
  3304. + .probe = surface_sam_sid_gpelid_probe,
  3305. + .remove = surface_sam_sid_gpelid_remove,
  3306. + .driver = {
  3307. + .name = "surface_sam_sid_gpelid",
  3308. + .pm = &surface_sam_sid_gpelid_pm,
  3309. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3310. + },
  3311. +};
  3312. +module_platform_driver(surface_sam_sid_gpelid);
  3313. +
  3314. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3315. +MODULE_DESCRIPTION("Surface Lid Driver for 5th Generation Surface Devices");
  3316. +MODULE_LICENSE("GPL v2");
  3317. +MODULE_ALIAS("platform:surface_sam_sid_gpelid");
  3318. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c b/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  3319. new file mode 100644
  3320. index 000000000000..880a2567cf1b
  3321. --- /dev/null
  3322. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_perfmode.c
  3323. @@ -0,0 +1,225 @@
  3324. +/*
  3325. + * Surface Performance Mode Driver.
  3326. + * Allows to change cooling capabilities based on user preference.
  3327. + */
  3328. +
  3329. +#include <asm/unaligned.h>
  3330. +#include <linux/kernel.h>
  3331. +#include <linux/module.h>
  3332. +#include <linux/platform_device.h>
  3333. +
  3334. +#include "surface_sam_ssh.h"
  3335. +
  3336. +
  3337. +#define SID_PARAM_PERM (S_IRUGO | S_IWUSR)
  3338. +
  3339. +enum sam_perf_mode {
  3340. + SAM_PERF_MODE_NORMAL = 1,
  3341. + SAM_PERF_MODE_BATTERY = 2,
  3342. + SAM_PERF_MODE_PERF1 = 3,
  3343. + SAM_PERF_MODE_PERF2 = 4,
  3344. +
  3345. + __SAM_PERF_MODE__START = 1,
  3346. + __SAM_PERF_MODE__END = 4,
  3347. +};
  3348. +
  3349. +enum sid_param_perf_mode {
  3350. + SID_PARAM_PERF_MODE_AS_IS = 0,
  3351. + SID_PARAM_PERF_MODE_NORMAL = SAM_PERF_MODE_NORMAL,
  3352. + SID_PARAM_PERF_MODE_BATTERY = SAM_PERF_MODE_BATTERY,
  3353. + SID_PARAM_PERF_MODE_PERF1 = SAM_PERF_MODE_PERF1,
  3354. + SID_PARAM_PERF_MODE_PERF2 = SAM_PERF_MODE_PERF2,
  3355. +
  3356. + __SID_PARAM_PERF_MODE__START = 0,
  3357. + __SID_PARAM_PERF_MODE__END = 4,
  3358. +};
  3359. +
  3360. +
  3361. +static int surface_sam_perf_mode_get(void)
  3362. +{
  3363. + u8 result_buf[8] = { 0 };
  3364. + int status;
  3365. +
  3366. + struct surface_sam_ssh_rqst rqst = {
  3367. + .tc = 0x03,
  3368. + .cid = 0x02,
  3369. + .iid = 0x00,
  3370. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  3371. + .snc = 0x01,
  3372. + .cdl = 0x00,
  3373. + .pld = NULL,
  3374. + };
  3375. +
  3376. + struct surface_sam_ssh_buf result = {
  3377. + .cap = ARRAY_SIZE(result_buf),
  3378. + .len = 0,
  3379. + .data = result_buf,
  3380. + };
  3381. +
  3382. + status = surface_sam_ssh_rqst(&rqst, &result);
  3383. + if (status) {
  3384. + return status;
  3385. + }
  3386. +
  3387. + if (result.len != 8) {
  3388. + return -EFAULT;
  3389. + }
  3390. +
  3391. + return get_unaligned_le32(&result.data[0]);
  3392. +}
  3393. +
  3394. +static int surface_sam_perf_mode_set(int perf_mode)
  3395. +{
  3396. + u8 payload[4] = { 0 };
  3397. +
  3398. + struct surface_sam_ssh_rqst rqst = {
  3399. + .tc = 0x03,
  3400. + .cid = 0x03,
  3401. + .iid = 0x00,
  3402. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  3403. + .snc = 0x00,
  3404. + .cdl = ARRAY_SIZE(payload),
  3405. + .pld = payload,
  3406. + };
  3407. +
  3408. + if (perf_mode < __SAM_PERF_MODE__START || perf_mode > __SAM_PERF_MODE__END) {
  3409. + return -EINVAL;
  3410. + }
  3411. +
  3412. + put_unaligned_le32(perf_mode, &rqst.pld[0]);
  3413. + return surface_sam_ssh_rqst(&rqst, NULL);
  3414. +}
  3415. +
  3416. +
  3417. +static int param_perf_mode_set(const char *val, const struct kernel_param *kp)
  3418. +{
  3419. + int perf_mode;
  3420. + int status;
  3421. +
  3422. + status = kstrtoint(val, 0, &perf_mode);
  3423. + if (status) {
  3424. + return status;
  3425. + }
  3426. +
  3427. + if (perf_mode < __SID_PARAM_PERF_MODE__START || perf_mode > __SID_PARAM_PERF_MODE__END) {
  3428. + return -EINVAL;
  3429. + }
  3430. +
  3431. + return param_set_int(val, kp);
  3432. +}
  3433. +
  3434. +static const struct kernel_param_ops param_perf_mode_ops = {
  3435. + .set = param_perf_mode_set,
  3436. + .get = param_get_int,
  3437. +};
  3438. +
  3439. +static int param_perf_mode_init = SID_PARAM_PERF_MODE_AS_IS;
  3440. +static int param_perf_mode_exit = SID_PARAM_PERF_MODE_AS_IS;
  3441. +
  3442. +module_param_cb(perf_mode_init, &param_perf_mode_ops, &param_perf_mode_init, SID_PARAM_PERM);
  3443. +module_param_cb(perf_mode_exit, &param_perf_mode_ops, &param_perf_mode_exit, SID_PARAM_PERM);
  3444. +
  3445. +MODULE_PARM_DESC(perf_mode_init, "Performance-mode to be set on module initialization");
  3446. +MODULE_PARM_DESC(perf_mode_exit, "Performance-mode to be set on module exit");
  3447. +
  3448. +
  3449. +static ssize_t perf_mode_show(struct device *dev, struct device_attribute *attr, char *data)
  3450. +{
  3451. + int perf_mode;
  3452. +
  3453. + perf_mode = surface_sam_perf_mode_get();
  3454. + if (perf_mode < 0) {
  3455. + dev_err(dev, "failed to get current performance mode: %d", perf_mode);
  3456. + return -EIO;
  3457. + }
  3458. +
  3459. + return sprintf(data, "%d\n", perf_mode);
  3460. +}
  3461. +
  3462. +static ssize_t perf_mode_store(struct device *dev, struct device_attribute *attr,
  3463. + const char *data, size_t count)
  3464. +{
  3465. + int perf_mode;
  3466. + int status;
  3467. +
  3468. + status = kstrtoint(data, 0, &perf_mode);
  3469. + if (status) {
  3470. + return status;
  3471. + }
  3472. +
  3473. + status = surface_sam_perf_mode_set(perf_mode);
  3474. + if (status) {
  3475. + return status;
  3476. + }
  3477. +
  3478. + // TODO: Should we notify ACPI here?
  3479. + //
  3480. + // There is a _DSM call described as
  3481. + // WSID._DSM: Notify DPTF on Slider State change
  3482. + // which calls
  3483. + // ODV3 = ToInteger (Arg3)
  3484. + // Notify(IETM, 0x88)
  3485. + // IETM is an INT3400 Intel Dynamic Power Performance Management
  3486. + // device, part of the DPTF framework. From the corresponding
  3487. + // kernel driver, it looks like event 0x88 is being ignored. Also
  3488. + // it is currently unknown what the consequecnes of setting ODV3
  3489. + // are.
  3490. +
  3491. + return count;
  3492. +}
  3493. +
  3494. +const static DEVICE_ATTR_RW(perf_mode);
  3495. +
  3496. +
  3497. +static int surface_sam_sid_perfmode_probe(struct platform_device *pdev)
  3498. +{
  3499. + int status;
  3500. +
  3501. + // link to ec
  3502. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  3503. + if (status) {
  3504. + return status == -ENXIO ? -EPROBE_DEFER : status;
  3505. + }
  3506. +
  3507. + // set initial perf_mode
  3508. + if (param_perf_mode_init != SID_PARAM_PERF_MODE_AS_IS) {
  3509. + status = surface_sam_perf_mode_set(param_perf_mode_init);
  3510. + if (status) {
  3511. + return status;
  3512. + }
  3513. + }
  3514. +
  3515. + // register perf_mode attribute
  3516. + status = sysfs_create_file(&pdev->dev.kobj, &dev_attr_perf_mode.attr);
  3517. + if (status) {
  3518. + goto err_sysfs;
  3519. + }
  3520. +
  3521. + return 0;
  3522. +
  3523. +err_sysfs:
  3524. + surface_sam_perf_mode_set(param_perf_mode_exit);
  3525. + return status;
  3526. +}
  3527. +
  3528. +static int surface_sam_sid_perfmode_remove(struct platform_device *pdev)
  3529. +{
  3530. + sysfs_remove_file(&pdev->dev.kobj, &dev_attr_perf_mode.attr);
  3531. + surface_sam_perf_mode_set(param_perf_mode_exit);
  3532. + return 0;
  3533. +}
  3534. +
  3535. +static struct platform_driver surface_sam_sid_perfmode = {
  3536. + .probe = surface_sam_sid_perfmode_probe,
  3537. + .remove = surface_sam_sid_perfmode_remove,
  3538. + .driver = {
  3539. + .name = "surface_sam_sid_perfmode",
  3540. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  3541. + },
  3542. +};
  3543. +module_platform_driver(surface_sam_sid_perfmode);
  3544. +
  3545. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  3546. +MODULE_DESCRIPTION("Surface Performance Mode Driver for 5th Generation Surface Devices");
  3547. +MODULE_LICENSE("GPL v2");
  3548. +MODULE_ALIAS("platform:surface_sam_sid_perfmode");
  3549. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_power.c b/drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  3550. new file mode 100644
  3551. index 000000000000..1f2c88eda394
  3552. --- /dev/null
  3553. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_power.c
  3554. @@ -0,0 +1,1259 @@
  3555. +/*
  3556. + * Surface SID Battery/AC Driver.
  3557. + * Provides support for the battery and AC on 7th generation Surface devices.
  3558. + */
  3559. +
  3560. +#include <linux/kernel.h>
  3561. +#include <linux/delay.h>
  3562. +#include <linux/jiffies.h>
  3563. +#include <linux/module.h>
  3564. +#include <linux/platform_device.h>
  3565. +#include <linux/power_supply.h>
  3566. +#include <linux/workqueue.h>
  3567. +
  3568. +#include "surface_sam_ssh.h"
  3569. +
  3570. +#define SPWR_WARN KERN_WARNING KBUILD_MODNAME ": "
  3571. +#define SPWR_DEBUG KERN_DEBUG KBUILD_MODNAME ": "
  3572. +
  3573. +
  3574. +// TODO: check BIX/BST for unknown/unsupported 0xffffffff entries
  3575. +// TODO: DPTF (/SAN notifications)?
  3576. +// TODO: other properties?
  3577. +
  3578. +
  3579. +static unsigned int cache_time = 1000;
  3580. +module_param(cache_time, uint, 0644);
  3581. +MODULE_PARM_DESC(cache_time, "battery state chaching time in milliseconds [default: 1000]");
  3582. +
  3583. +#define SPWR_AC_BAT_UPDATE_DELAY msecs_to_jiffies(5000)
  3584. +
  3585. +
  3586. +/*
  3587. + * SAM Interface.
  3588. + */
  3589. +
  3590. +#define SAM_PWR_TC 0x02
  3591. +#define SAM_PWR_RQID 0x0002
  3592. +
  3593. +#define SAM_RQST_PWR_CID_STA 0x01
  3594. +#define SAM_RQST_PWR_CID_BIX 0x02
  3595. +#define SAM_RQST_PWR_CID_BST 0x03
  3596. +#define SAM_RQST_PWR_CID_BTP 0x04
  3597. +
  3598. +#define SAM_RQST_PWR_CID_PMAX 0x0b
  3599. +#define SAM_RQST_PWR_CID_PSOC 0x0c
  3600. +#define SAM_RQST_PWR_CID_PSRC 0x0d
  3601. +#define SAM_RQST_PWR_CID_CHGI 0x0e
  3602. +#define SAM_RQST_PWR_CID_ARTG 0x0f
  3603. +
  3604. +#define SAM_EVENT_PWR_CID_BIX 0x15
  3605. +#define SAM_EVENT_PWR_CID_BST 0x16
  3606. +#define SAM_EVENT_PWR_CID_ADAPTER 0x17
  3607. +#define SAM_EVENT_PWR_CID_DPTF 0x4f
  3608. +
  3609. +#define SAM_BATTERY_STA_OK 0x0f
  3610. +#define SAM_BATTERY_STA_PRESENT 0x10
  3611. +
  3612. +#define SAM_BATTERY_STATE_DISCHARGING 0x01
  3613. +#define SAM_BATTERY_STATE_CHARGING 0x02
  3614. +#define SAM_BATTERY_STATE_CRITICAL 0x04
  3615. +
  3616. +#define SAM_BATTERY_POWER_UNIT_MA 1
  3617. +
  3618. +
  3619. +/* Equivalent to data returned in ACPI _BIX method */
  3620. +struct spwr_bix {
  3621. + u8 revision;
  3622. + u32 power_unit;
  3623. + u32 design_cap;
  3624. + u32 last_full_charge_cap;
  3625. + u32 technology;
  3626. + u32 design_voltage;
  3627. + u32 design_cap_warn;
  3628. + u32 design_cap_low;
  3629. + u32 cycle_count;
  3630. + u32 measurement_accuracy;
  3631. + u32 max_sampling_time;
  3632. + u32 min_sampling_time;
  3633. + u32 max_avg_interval;
  3634. + u32 min_avg_interval;
  3635. + u32 bat_cap_granularity_1;
  3636. + u32 bat_cap_granularity_2;
  3637. + u8 model[21];
  3638. + u8 serial[11];
  3639. + u8 type[5];
  3640. + u8 oem_info[21];
  3641. +} __packed;
  3642. +
  3643. +/* Equivalent to data returned in ACPI _BST method */
  3644. +struct spwr_bst {
  3645. + u32 state;
  3646. + u32 present_rate;
  3647. + u32 remaining_cap;
  3648. + u32 present_voltage;
  3649. +} __packed;
  3650. +
  3651. +/* DPTF event payload */
  3652. +struct spwr_event_dptf {
  3653. + u32 pmax;
  3654. + u32 _1; /* currently unknown */
  3655. + u32 _2; /* currently unknown */
  3656. +} __packed;
  3657. +
  3658. +
  3659. +/* Get battery status (_STA) */
  3660. +static int sam_psy_get_sta(u8 iid, u32 *sta)
  3661. +{
  3662. + struct surface_sam_ssh_rqst rqst;
  3663. + struct surface_sam_ssh_buf result;
  3664. +
  3665. + rqst.tc = SAM_PWR_TC;
  3666. + rqst.cid = SAM_RQST_PWR_CID_STA;
  3667. + rqst.iid = iid;
  3668. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3669. + rqst.snc = 0x01;
  3670. + rqst.cdl = 0x00;
  3671. + rqst.pld = NULL;
  3672. +
  3673. + result.cap = sizeof(u32);
  3674. + result.len = 0;
  3675. + result.data = (u8 *)sta;
  3676. +
  3677. + return surface_sam_ssh_rqst(&rqst, &result);
  3678. +}
  3679. +
  3680. +/* Get battery static information (_BIX) */
  3681. +static int sam_psy_get_bix(u8 iid, struct spwr_bix *bix)
  3682. +{
  3683. + struct surface_sam_ssh_rqst rqst;
  3684. + struct surface_sam_ssh_buf result;
  3685. +
  3686. + rqst.tc = SAM_PWR_TC;
  3687. + rqst.cid = SAM_RQST_PWR_CID_BIX;
  3688. + rqst.iid = iid;
  3689. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3690. + rqst.snc = 0x01;
  3691. + rqst.cdl = 0x00;
  3692. + rqst.pld = NULL;
  3693. +
  3694. + result.cap = sizeof(struct spwr_bix);
  3695. + result.len = 0;
  3696. + result.data = (u8 *)bix;
  3697. +
  3698. + return surface_sam_ssh_rqst(&rqst, &result);
  3699. +}
  3700. +
  3701. +/* Get battery dynamic information (_BST) */
  3702. +static int sam_psy_get_bst(u8 iid, struct spwr_bst *bst)
  3703. +{
  3704. + struct surface_sam_ssh_rqst rqst;
  3705. + struct surface_sam_ssh_buf result;
  3706. +
  3707. + rqst.tc = SAM_PWR_TC;
  3708. + rqst.cid = SAM_RQST_PWR_CID_BST;
  3709. + rqst.iid = iid;
  3710. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3711. + rqst.snc = 0x01;
  3712. + rqst.cdl = 0x00;
  3713. + rqst.pld = NULL;
  3714. +
  3715. + result.cap = sizeof(struct spwr_bst);
  3716. + result.len = 0;
  3717. + result.data = (u8 *)bst;
  3718. +
  3719. + return surface_sam_ssh_rqst(&rqst, &result);
  3720. +}
  3721. +
  3722. +/* Set battery trip point (_BTP) */
  3723. +static int sam_psy_set_btp(u8 iid, u32 btp)
  3724. +{
  3725. + struct surface_sam_ssh_rqst rqst;
  3726. +
  3727. + rqst.tc = SAM_PWR_TC;
  3728. + rqst.cid = SAM_RQST_PWR_CID_BTP;
  3729. + rqst.iid = iid;
  3730. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3731. + rqst.snc = 0x00;
  3732. + rqst.cdl = sizeof(u32);
  3733. + rqst.pld = (u8 *)&btp;
  3734. +
  3735. + return surface_sam_ssh_rqst(&rqst, NULL);
  3736. +}
  3737. +
  3738. +/* Get platform power soruce for battery (DPTF PSRC) */
  3739. +static int sam_psy_get_psrc(u8 iid, u32 *psrc)
  3740. +{
  3741. + struct surface_sam_ssh_rqst rqst;
  3742. + struct surface_sam_ssh_buf result;
  3743. +
  3744. + rqst.tc = SAM_PWR_TC;
  3745. + rqst.cid = SAM_RQST_PWR_CID_PSRC;
  3746. + rqst.iid = iid;
  3747. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3748. + rqst.snc = 0x01;
  3749. + rqst.cdl = 0x00;
  3750. + rqst.pld = NULL;
  3751. +
  3752. + result.cap = sizeof(u32);
  3753. + result.len = 0;
  3754. + result.data = (u8 *)psrc;
  3755. +
  3756. + return surface_sam_ssh_rqst(&rqst, &result);
  3757. +}
  3758. +
  3759. +/* Get maximum platform power for battery (DPTF PMAX) */
  3760. +__always_unused
  3761. +static int sam_psy_get_pmax(u8 iid, u32 *pmax)
  3762. +{
  3763. + struct surface_sam_ssh_rqst rqst;
  3764. + struct surface_sam_ssh_buf result;
  3765. +
  3766. + rqst.tc = SAM_PWR_TC;
  3767. + rqst.cid = SAM_RQST_PWR_CID_PMAX;
  3768. + rqst.iid = iid;
  3769. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3770. + rqst.snc = 0x01;
  3771. + rqst.cdl = 0x00;
  3772. + rqst.pld = NULL;
  3773. +
  3774. + result.cap = sizeof(u32);
  3775. + result.len = 0;
  3776. + result.data = (u8 *)pmax;
  3777. +
  3778. + return surface_sam_ssh_rqst(&rqst, &result);
  3779. +}
  3780. +
  3781. +/* Get adapter rating (DPTF ARTG) */
  3782. +__always_unused
  3783. +static int sam_psy_get_artg(u8 iid, u32 *artg)
  3784. +{
  3785. + struct surface_sam_ssh_rqst rqst;
  3786. + struct surface_sam_ssh_buf result;
  3787. +
  3788. + rqst.tc = SAM_PWR_TC;
  3789. + rqst.cid = SAM_RQST_PWR_CID_ARTG;
  3790. + rqst.iid = iid;
  3791. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3792. + rqst.snc = 0x01;
  3793. + rqst.cdl = 0x00;
  3794. + rqst.pld = NULL;
  3795. +
  3796. + result.cap = sizeof(u32);
  3797. + result.len = 0;
  3798. + result.data = (u8 *)artg;
  3799. +
  3800. + return surface_sam_ssh_rqst(&rqst, &result);
  3801. +}
  3802. +
  3803. +/* Unknown (DPTF PSOC) */
  3804. +__always_unused
  3805. +static int sam_psy_get_psoc(u8 iid, u32 *psoc)
  3806. +{
  3807. + struct surface_sam_ssh_rqst rqst;
  3808. + struct surface_sam_ssh_buf result;
  3809. +
  3810. + rqst.tc = SAM_PWR_TC;
  3811. + rqst.cid = SAM_RQST_PWR_CID_PSOC;
  3812. + rqst.iid = iid;
  3813. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3814. + rqst.snc = 0x01;
  3815. + rqst.cdl = 0x00;
  3816. + rqst.pld = NULL;
  3817. +
  3818. + result.cap = sizeof(u32);
  3819. + result.len = 0;
  3820. + result.data = (u8 *)psoc;
  3821. +
  3822. + return surface_sam_ssh_rqst(&rqst, &result);
  3823. +}
  3824. +
  3825. +/* Unknown (DPTF CHGI/ INT3403 SPPC) */
  3826. +__always_unused
  3827. +static int sam_psy_set_chgi(u8 iid, u32 chgi)
  3828. +{
  3829. + struct surface_sam_ssh_rqst rqst;
  3830. +
  3831. + rqst.tc = SAM_PWR_TC;
  3832. + rqst.cid = SAM_RQST_PWR_CID_CHGI;
  3833. + rqst.iid = iid;
  3834. + rqst.pri = SURFACE_SAM_PRIORITY_NORMAL;
  3835. + rqst.snc = 0x00;
  3836. + rqst.cdl = sizeof(u32);
  3837. + rqst.pld = (u8 *)&chgi;
  3838. +
  3839. + return surface_sam_ssh_rqst(&rqst, NULL);
  3840. +}
  3841. +
  3842. +
  3843. +/*
  3844. + * Common Power-Subsystem Interface.
  3845. + */
  3846. +
  3847. +enum spwr_battery_id {
  3848. + SPWR_BAT1,
  3849. + SPWR_BAT2,
  3850. + __SPWR_NUM_BAT,
  3851. +};
  3852. +#define SPWR_BAT_SINGLE PLATFORM_DEVID_NONE
  3853. +
  3854. +struct spwr_battery_device {
  3855. + struct platform_device *pdev;
  3856. + enum spwr_battery_id id;
  3857. +
  3858. + char name[32];
  3859. + struct power_supply *psy;
  3860. + struct power_supply_desc psy_desc;
  3861. +
  3862. + struct delayed_work update_work;
  3863. +
  3864. + struct mutex lock;
  3865. + unsigned long timestamp;
  3866. +
  3867. + u32 sta;
  3868. + struct spwr_bix bix;
  3869. + struct spwr_bst bst;
  3870. + u32 alarm;
  3871. +};
  3872. +
  3873. +struct spwr_ac_device {
  3874. + struct platform_device *pdev;
  3875. +
  3876. + char name[32];
  3877. + struct power_supply *psy;
  3878. + struct power_supply_desc psy_desc;
  3879. +
  3880. + struct mutex lock;
  3881. +
  3882. + u32 state;
  3883. +};
  3884. +
  3885. +struct spwr_subsystem {
  3886. + struct mutex lock;
  3887. +
  3888. + unsigned refcount;
  3889. + struct spwr_ac_device *ac;
  3890. + struct spwr_battery_device *battery[__SPWR_NUM_BAT];
  3891. +};
  3892. +
  3893. +static struct spwr_subsystem spwr_subsystem = {
  3894. + .lock = __MUTEX_INITIALIZER(spwr_subsystem.lock),
  3895. +};
  3896. +
  3897. +static enum power_supply_property spwr_ac_props[] = {
  3898. + POWER_SUPPLY_PROP_ONLINE,
  3899. +};
  3900. +
  3901. +static enum power_supply_property spwr_battery_props_chg[] = {
  3902. + POWER_SUPPLY_PROP_STATUS,
  3903. + POWER_SUPPLY_PROP_PRESENT,
  3904. + POWER_SUPPLY_PROP_TECHNOLOGY,
  3905. + POWER_SUPPLY_PROP_CYCLE_COUNT,
  3906. + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  3907. + POWER_SUPPLY_PROP_VOLTAGE_NOW,
  3908. + POWER_SUPPLY_PROP_CURRENT_NOW,
  3909. + POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
  3910. + POWER_SUPPLY_PROP_CHARGE_FULL,
  3911. + POWER_SUPPLY_PROP_CHARGE_NOW,
  3912. + POWER_SUPPLY_PROP_CAPACITY,
  3913. + POWER_SUPPLY_PROP_CAPACITY_LEVEL,
  3914. + POWER_SUPPLY_PROP_MODEL_NAME,
  3915. + POWER_SUPPLY_PROP_MANUFACTURER,
  3916. + POWER_SUPPLY_PROP_SERIAL_NUMBER,
  3917. +};
  3918. +
  3919. +static enum power_supply_property spwr_battery_props_eng[] = {
  3920. + POWER_SUPPLY_PROP_STATUS,
  3921. + POWER_SUPPLY_PROP_PRESENT,
  3922. + POWER_SUPPLY_PROP_TECHNOLOGY,
  3923. + POWER_SUPPLY_PROP_CYCLE_COUNT,
  3924. + POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  3925. + POWER_SUPPLY_PROP_VOLTAGE_NOW,
  3926. + POWER_SUPPLY_PROP_POWER_NOW,
  3927. + POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN,
  3928. + POWER_SUPPLY_PROP_ENERGY_FULL,
  3929. + POWER_SUPPLY_PROP_ENERGY_NOW,
  3930. + POWER_SUPPLY_PROP_CAPACITY,
  3931. + POWER_SUPPLY_PROP_CAPACITY_LEVEL,
  3932. + POWER_SUPPLY_PROP_MODEL_NAME,
  3933. + POWER_SUPPLY_PROP_MANUFACTURER,
  3934. + POWER_SUPPLY_PROP_SERIAL_NUMBER,
  3935. +};
  3936. +
  3937. +
  3938. +static int spwr_battery_register(struct spwr_battery_device *bat, struct platform_device *pdev,
  3939. + enum spwr_battery_id id);
  3940. +
  3941. +static int spwr_battery_unregister(struct spwr_battery_device *bat);
  3942. +
  3943. +
  3944. +inline static bool spwr_battery_present(struct spwr_battery_device *bat)
  3945. +{
  3946. + return bat->sta & SAM_BATTERY_STA_PRESENT;
  3947. +}
  3948. +
  3949. +
  3950. +inline static int spwr_battery_load_sta(struct spwr_battery_device *bat)
  3951. +{
  3952. + return sam_psy_get_sta(bat->id + 1, &bat->sta);
  3953. +}
  3954. +
  3955. +inline static int spwr_battery_load_bix(struct spwr_battery_device *bat)
  3956. +{
  3957. + if (!spwr_battery_present(bat))
  3958. + return 0;
  3959. +
  3960. + return sam_psy_get_bix(bat->id + 1, &bat->bix);
  3961. +}
  3962. +
  3963. +inline static int spwr_battery_load_bst(struct spwr_battery_device *bat)
  3964. +{
  3965. + if (!spwr_battery_present(bat))
  3966. + return 0;
  3967. +
  3968. + return sam_psy_get_bst(bat->id + 1, &bat->bst);
  3969. +}
  3970. +
  3971. +
  3972. +inline static int spwr_battery_set_alarm_unlocked(struct spwr_battery_device *bat, u32 value)
  3973. +{
  3974. + bat->alarm = value;
  3975. + return sam_psy_set_btp(bat->id + 1, bat->alarm);
  3976. +}
  3977. +
  3978. +inline static int spwr_battery_set_alarm(struct spwr_battery_device *bat, u32 value)
  3979. +{
  3980. + int status;
  3981. +
  3982. + mutex_lock(&bat->lock);
  3983. + status = spwr_battery_set_alarm_unlocked(bat, value);
  3984. + mutex_unlock(&bat->lock);
  3985. +
  3986. + return status;
  3987. +}
  3988. +
  3989. +inline static int spwr_battery_update_bst_unlocked(struct spwr_battery_device *bat, bool cached)
  3990. +{
  3991. + unsigned long cache_deadline = bat->timestamp + msecs_to_jiffies(cache_time);
  3992. + int status;
  3993. +
  3994. + if (cached && bat->timestamp && time_is_after_jiffies(cache_deadline))
  3995. + return 0;
  3996. +
  3997. + status = spwr_battery_load_sta(bat);
  3998. + if (status)
  3999. + return status;
  4000. +
  4001. + status = spwr_battery_load_bst(bat);
  4002. + if (status)
  4003. + return status;
  4004. +
  4005. + bat->timestamp = jiffies;
  4006. + return 0;
  4007. +}
  4008. +
  4009. +static int spwr_battery_update_bst(struct spwr_battery_device *bat, bool cached)
  4010. +{
  4011. + int status;
  4012. +
  4013. + mutex_lock(&bat->lock);
  4014. + status = spwr_battery_update_bst_unlocked(bat, cached);
  4015. + mutex_unlock(&bat->lock);
  4016. +
  4017. + return status;
  4018. +}
  4019. +
  4020. +inline static int spwr_battery_update_bix_unlocked(struct spwr_battery_device *bat)
  4021. +{
  4022. + int status;
  4023. +
  4024. + status = spwr_battery_load_sta(bat);
  4025. + if (status)
  4026. + return status;
  4027. +
  4028. + status = spwr_battery_load_bix(bat);
  4029. + if (status)
  4030. + return status;
  4031. +
  4032. + status = spwr_battery_load_bst(bat);
  4033. + if (status)
  4034. + return status;
  4035. +
  4036. + bat->timestamp = jiffies;
  4037. + return 0;
  4038. +}
  4039. +
  4040. +static int spwr_battery_update_bix(struct spwr_battery_device *bat)
  4041. +{
  4042. + int status;
  4043. +
  4044. + mutex_lock(&bat->lock);
  4045. + status = spwr_battery_update_bix_unlocked(bat);
  4046. + mutex_unlock(&bat->lock);
  4047. +
  4048. + return status;
  4049. +}
  4050. +
  4051. +inline static int spwr_ac_update_unlocked(struct spwr_ac_device *ac)
  4052. +{
  4053. + return sam_psy_get_psrc(0x00, &ac->state);
  4054. +}
  4055. +
  4056. +static int spwr_ac_update(struct spwr_ac_device *ac)
  4057. +{
  4058. + int status;
  4059. +
  4060. + mutex_lock(&ac->lock);
  4061. + status = spwr_ac_update_unlocked(ac);
  4062. + mutex_unlock(&ac->lock);
  4063. +
  4064. + return status;
  4065. +}
  4066. +
  4067. +
  4068. +static int spwr_battery_recheck(struct spwr_battery_device *bat)
  4069. +{
  4070. + bool present = spwr_battery_present(bat);
  4071. + u32 unit = bat->bix.power_unit;
  4072. + int status;
  4073. +
  4074. + status = spwr_battery_update_bix(bat);
  4075. + if (status)
  4076. + return status;
  4077. +
  4078. + // if battery has been attached, (re-)initialize alarm
  4079. + if (!present && spwr_battery_present(bat)) {
  4080. + status = spwr_battery_set_alarm(bat, bat->bix.design_cap_warn);
  4081. + if (status)
  4082. + return status;
  4083. + }
  4084. +
  4085. + // if the unit has changed, re-add the battery
  4086. + if (unit != bat->bix.power_unit) {
  4087. + mutex_unlock(&spwr_subsystem.lock);
  4088. +
  4089. + status = spwr_battery_unregister(bat);
  4090. + if (status)
  4091. + return status;
  4092. +
  4093. + status = spwr_battery_register(bat, bat->pdev, bat->id);
  4094. + }
  4095. +
  4096. + return status;
  4097. +}
  4098. +
  4099. +
  4100. +static int spwr_handle_event_bix(struct surface_sam_ssh_event *event)
  4101. +{
  4102. + struct spwr_battery_device *bat;
  4103. + enum spwr_battery_id bat_id = event->iid - 1;
  4104. + int status = 0;
  4105. +
  4106. + if (bat_id < 0 || bat_id >= __SPWR_NUM_BAT) {
  4107. + printk(SPWR_WARN "invalid BIX event iid 0x%02x\n", event->iid);
  4108. + bat_id = SPWR_BAT1;
  4109. + }
  4110. +
  4111. + mutex_lock(&spwr_subsystem.lock);
  4112. + bat = spwr_subsystem.battery[bat_id];
  4113. + if (bat) {
  4114. + status = spwr_battery_recheck(bat);
  4115. + if (!status)
  4116. + power_supply_changed(bat->psy);
  4117. + }
  4118. +
  4119. + mutex_unlock(&spwr_subsystem.lock);
  4120. + return status;
  4121. +}
  4122. +
  4123. +static int spwr_handle_event_bst(struct surface_sam_ssh_event *event)
  4124. +{
  4125. + struct spwr_battery_device *bat;
  4126. + enum spwr_battery_id bat_id = event->iid - 1;
  4127. + int status = 0;
  4128. +
  4129. + if (bat_id < 0 || bat_id >= __SPWR_NUM_BAT) {
  4130. + printk(SPWR_WARN "invalid BST event iid 0x%02x\n", event->iid);
  4131. + bat_id = SPWR_BAT1;
  4132. + }
  4133. +
  4134. + mutex_lock(&spwr_subsystem.lock);
  4135. +
  4136. + bat = spwr_subsystem.battery[bat_id];
  4137. + if (bat) {
  4138. + status = spwr_battery_update_bst(bat, false);
  4139. + if (!status)
  4140. + power_supply_changed(bat->psy);
  4141. + }
  4142. +
  4143. + mutex_unlock(&spwr_subsystem.lock);
  4144. + return status;
  4145. +}
  4146. +
  4147. +static int spwr_handle_event_adapter(struct surface_sam_ssh_event *event)
  4148. +{
  4149. + struct spwr_battery_device *bat1 = NULL;
  4150. + struct spwr_battery_device *bat2 = NULL;
  4151. + struct spwr_ac_device *ac;
  4152. + int status = 0;
  4153. +
  4154. + mutex_lock(&spwr_subsystem.lock);
  4155. +
  4156. + ac = spwr_subsystem.ac;
  4157. + if (ac) {
  4158. + status = spwr_ac_update(ac);
  4159. + if (status)
  4160. + goto out;
  4161. +
  4162. + power_supply_changed(ac->psy);
  4163. + }
  4164. +
  4165. + /*
  4166. + * Handle battery update quirk:
  4167. + * When the battery is fully charged and the adapter is plugged in or
  4168. + * removed, the EC does not send a separate event for the state
  4169. + * (charging/discharging) change. Furthermore it may take some time until
  4170. + * the state is updated on the battery. Schedule an update to solve this.
  4171. + */
  4172. +
  4173. + bat1 = spwr_subsystem.battery[SPWR_BAT1];
  4174. + if (bat1 && bat1->bst.remaining_cap >= bat1->bix.last_full_charge_cap)
  4175. + schedule_delayed_work(&bat1->update_work, SPWR_AC_BAT_UPDATE_DELAY);
  4176. +
  4177. + bat2 = spwr_subsystem.battery[SPWR_BAT2];
  4178. + if (bat2 && bat2->bst.remaining_cap >= bat2->bix.last_full_charge_cap)
  4179. + schedule_delayed_work(&bat2->update_work, SPWR_AC_BAT_UPDATE_DELAY);
  4180. +
  4181. +out:
  4182. + mutex_unlock(&spwr_subsystem.lock);
  4183. + return status;
  4184. +}
  4185. +
  4186. +static int spwr_handle_event_dptf(struct surface_sam_ssh_event *event)
  4187. +{
  4188. + return 0; // TODO: spwr_handle_event_dptf
  4189. +}
  4190. +
  4191. +static int spwr_handle_event(struct surface_sam_ssh_event *event, void *data)
  4192. +{
  4193. + printk(SPWR_DEBUG "power event (cid = 0x%02x)\n", event->cid);
  4194. +
  4195. + switch (event->cid) {
  4196. + case SAM_EVENT_PWR_CID_BIX:
  4197. + return spwr_handle_event_bix(event);
  4198. +
  4199. + case SAM_EVENT_PWR_CID_BST:
  4200. + return spwr_handle_event_bst(event);
  4201. +
  4202. + case SAM_EVENT_PWR_CID_ADAPTER:
  4203. + return spwr_handle_event_adapter(event);
  4204. +
  4205. + case SAM_EVENT_PWR_CID_DPTF:
  4206. + return spwr_handle_event_dptf(event);
  4207. +
  4208. + default:
  4209. + printk(SPWR_WARN "unhandled power event (cid = 0x%02x)\n", event->cid);
  4210. + return 0;
  4211. + }
  4212. +}
  4213. +
  4214. +static void spwr_battery_update_bst_workfn(struct work_struct *work)
  4215. +{
  4216. + struct delayed_work *dwork = to_delayed_work(work);
  4217. + struct spwr_battery_device *bat = container_of(dwork, struct spwr_battery_device, update_work);
  4218. + int status;
  4219. +
  4220. + status = spwr_battery_update_bst(bat, false);
  4221. + if (!status)
  4222. + power_supply_changed(bat->psy);
  4223. +
  4224. + if (status)
  4225. + dev_err(&bat->pdev->dev, "failed to update battery state: %d\n", status);
  4226. +}
  4227. +
  4228. +
  4229. +inline static int spwr_battery_prop_status(struct spwr_battery_device *bat)
  4230. +{
  4231. + if (bat->bst.state & SAM_BATTERY_STATE_DISCHARGING)
  4232. + return POWER_SUPPLY_STATUS_DISCHARGING;
  4233. +
  4234. + if (bat->bst.state & SAM_BATTERY_STATE_CHARGING)
  4235. + return POWER_SUPPLY_STATUS_CHARGING;
  4236. +
  4237. + if (bat->bix.last_full_charge_cap == bat->bst.remaining_cap)
  4238. + return POWER_SUPPLY_STATUS_FULL;
  4239. +
  4240. + if (bat->bst.present_rate == 0)
  4241. + return POWER_SUPPLY_STATUS_NOT_CHARGING;
  4242. +
  4243. + return POWER_SUPPLY_STATUS_UNKNOWN;
  4244. +}
  4245. +
  4246. +inline static int spwr_battery_prop_technology(struct spwr_battery_device *bat)
  4247. +{
  4248. + if (!strcasecmp("NiCd", bat->bix.type))
  4249. + return POWER_SUPPLY_TECHNOLOGY_NiCd;
  4250. +
  4251. + if (!strcasecmp("NiMH", bat->bix.type))
  4252. + return POWER_SUPPLY_TECHNOLOGY_NiMH;
  4253. +
  4254. + if (!strcasecmp("LION", bat->bix.type))
  4255. + return POWER_SUPPLY_TECHNOLOGY_LION;
  4256. +
  4257. + if (!strncasecmp("LI-ION", bat->bix.type, 6))
  4258. + return POWER_SUPPLY_TECHNOLOGY_LION;
  4259. +
  4260. + if (!strcasecmp("LiP", bat->bix.type))
  4261. + return POWER_SUPPLY_TECHNOLOGY_LIPO;
  4262. +
  4263. + return POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
  4264. +}
  4265. +
  4266. +inline static int spwr_battery_prop_capacity(struct spwr_battery_device *bat)
  4267. +{
  4268. + if (bat->bst.remaining_cap && bat->bix.last_full_charge_cap)
  4269. + return bat->bst.remaining_cap * 100 / bat->bix.last_full_charge_cap;
  4270. + else
  4271. + return 0;
  4272. +}
  4273. +
  4274. +inline static int spwr_battery_prop_capacity_level(struct spwr_battery_device *bat)
  4275. +{
  4276. + if (bat->bst.state & SAM_BATTERY_STATE_CRITICAL)
  4277. + return POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
  4278. +
  4279. + if (bat->bst.remaining_cap >= bat->bix.last_full_charge_cap)
  4280. + return POWER_SUPPLY_CAPACITY_LEVEL_FULL;
  4281. +
  4282. + if (bat->bst.remaining_cap <= bat->alarm)
  4283. + return POWER_SUPPLY_CAPACITY_LEVEL_LOW;
  4284. +
  4285. + return POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
  4286. +}
  4287. +
  4288. +static int spwr_ac_get_property(struct power_supply *psy,
  4289. + enum power_supply_property psp,
  4290. + union power_supply_propval *val)
  4291. +{
  4292. + struct spwr_ac_device *ac = power_supply_get_drvdata(psy);
  4293. + int status;
  4294. +
  4295. + mutex_lock(&ac->lock);
  4296. +
  4297. + status = spwr_ac_update_unlocked(ac);
  4298. + if (status)
  4299. + goto out;
  4300. +
  4301. + switch (psp) {
  4302. + case POWER_SUPPLY_PROP_ONLINE:
  4303. + val->intval = ac->state == 1;
  4304. + break;
  4305. +
  4306. + default:
  4307. + status = -EINVAL;
  4308. + goto out;
  4309. + }
  4310. +
  4311. +out:
  4312. + mutex_unlock(&ac->lock);
  4313. + return status;
  4314. +}
  4315. +
  4316. +static int spwr_battery_get_property(struct power_supply *psy,
  4317. + enum power_supply_property psp,
  4318. + union power_supply_propval *val)
  4319. +{
  4320. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4321. + int status;
  4322. +
  4323. + mutex_lock(&bat->lock);
  4324. +
  4325. + status = spwr_battery_update_bst_unlocked(bat, true);
  4326. + if (status)
  4327. + goto out;
  4328. +
  4329. + // abort if battery is not present
  4330. + if (!spwr_battery_present(bat) && psp != POWER_SUPPLY_PROP_PRESENT) {
  4331. + status = -ENODEV;
  4332. + goto out;
  4333. + }
  4334. +
  4335. + switch (psp) {
  4336. + case POWER_SUPPLY_PROP_STATUS:
  4337. + val->intval = spwr_battery_prop_status(bat);
  4338. + break;
  4339. +
  4340. + case POWER_SUPPLY_PROP_PRESENT:
  4341. + val->intval = spwr_battery_present(bat);
  4342. + break;
  4343. +
  4344. + case POWER_SUPPLY_PROP_TECHNOLOGY:
  4345. + val->intval = spwr_battery_prop_technology(bat);
  4346. + break;
  4347. +
  4348. + case POWER_SUPPLY_PROP_CYCLE_COUNT:
  4349. + val->intval = bat->bix.cycle_count;
  4350. + break;
  4351. +
  4352. + case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
  4353. + val->intval = bat->bix.design_voltage * 1000;
  4354. + break;
  4355. +
  4356. + case POWER_SUPPLY_PROP_VOLTAGE_NOW:
  4357. + val->intval = bat->bst.present_voltage * 1000;
  4358. + break;
  4359. +
  4360. + case POWER_SUPPLY_PROP_CURRENT_NOW:
  4361. + case POWER_SUPPLY_PROP_POWER_NOW:
  4362. + val->intval = bat->bst.present_rate * 1000;
  4363. + break;
  4364. +
  4365. + case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
  4366. + case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
  4367. + val->intval = bat->bix.design_cap * 1000;
  4368. + break;
  4369. +
  4370. + case POWER_SUPPLY_PROP_CHARGE_FULL:
  4371. + case POWER_SUPPLY_PROP_ENERGY_FULL:
  4372. + val->intval = bat->bix.last_full_charge_cap * 1000;
  4373. + break;
  4374. +
  4375. + case POWER_SUPPLY_PROP_CHARGE_NOW:
  4376. + case POWER_SUPPLY_PROP_ENERGY_NOW:
  4377. + val->intval = bat->bst.remaining_cap * 1000;
  4378. + break;
  4379. +
  4380. + case POWER_SUPPLY_PROP_CAPACITY:
  4381. + val->intval = spwr_battery_prop_capacity(bat);
  4382. + break;
  4383. +
  4384. + case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
  4385. + val->intval = spwr_battery_prop_capacity_level(bat);
  4386. + break;
  4387. +
  4388. + case POWER_SUPPLY_PROP_MODEL_NAME:
  4389. + val->strval = bat->bix.model;
  4390. + break;
  4391. +
  4392. + case POWER_SUPPLY_PROP_MANUFACTURER:
  4393. + val->strval = bat->bix.oem_info;
  4394. + break;
  4395. +
  4396. + case POWER_SUPPLY_PROP_SERIAL_NUMBER:
  4397. + val->strval = bat->bix.serial;
  4398. + break;
  4399. +
  4400. + default:
  4401. + status = -EINVAL;
  4402. + goto out;
  4403. + }
  4404. +
  4405. +out:
  4406. + mutex_unlock(&bat->lock);
  4407. + return status;
  4408. +}
  4409. +
  4410. +
  4411. +static ssize_t spwr_battery_alarm_show(struct device *dev,
  4412. + struct device_attribute *attr,
  4413. + char *buf)
  4414. +{
  4415. + struct power_supply *psy = dev_get_drvdata(dev);
  4416. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4417. +
  4418. + return sprintf(buf, "%d\n", bat->alarm * 1000);
  4419. +}
  4420. +
  4421. +static ssize_t spwr_battery_alarm_store(struct device *dev,
  4422. + struct device_attribute *attr,
  4423. + const char *buf, size_t count)
  4424. +{
  4425. + struct power_supply *psy = dev_get_drvdata(dev);
  4426. + struct spwr_battery_device *bat = power_supply_get_drvdata(psy);
  4427. + unsigned long value;
  4428. + int status;
  4429. +
  4430. + status = kstrtoul(buf, 0, &value);
  4431. + if (status)
  4432. + return status;
  4433. +
  4434. + if (!spwr_battery_present(bat))
  4435. + return -ENODEV;
  4436. +
  4437. + status = spwr_battery_set_alarm(bat, value / 1000);
  4438. + if (status)
  4439. + return status;
  4440. +
  4441. + return count;
  4442. +}
  4443. +
  4444. +static const struct device_attribute alarm_attr = {
  4445. + .attr = {.name = "alarm", .mode = 0644},
  4446. + .show = spwr_battery_alarm_show,
  4447. + .store = spwr_battery_alarm_store,
  4448. +};
  4449. +
  4450. +
  4451. +static int spwr_subsys_init_unlocked(void)
  4452. +{
  4453. + int status;
  4454. +
  4455. + status = surface_sam_ssh_set_event_handler(SAM_PWR_RQID, spwr_handle_event, NULL);
  4456. + if (status) {
  4457. + goto err_handler;
  4458. + }
  4459. +
  4460. + status = surface_sam_ssh_enable_event_source(SAM_PWR_TC, 0x01, SAM_PWR_RQID);
  4461. + if (status) {
  4462. + goto err_source;
  4463. + }
  4464. +
  4465. + return 0;
  4466. +
  4467. +err_source:
  4468. + surface_sam_ssh_remove_event_handler(SAM_PWR_RQID);
  4469. +err_handler:
  4470. + return status;
  4471. +}
  4472. +
  4473. +static int spwr_subsys_deinit_unlocked(void)
  4474. +{
  4475. + surface_sam_ssh_disable_event_source(SAM_PWR_TC, 0x01, SAM_PWR_RQID);
  4476. + surface_sam_ssh_remove_event_handler(SAM_PWR_RQID);
  4477. + return 0;
  4478. +}
  4479. +
  4480. +static inline int spwr_subsys_ref_unlocked(void)
  4481. +{
  4482. + int status = 0;
  4483. +
  4484. + if (!spwr_subsystem.refcount)
  4485. + status = spwr_subsys_init_unlocked();
  4486. +
  4487. + spwr_subsystem.refcount += 1;
  4488. + return status;
  4489. +}
  4490. +
  4491. +static inline int spwr_subsys_unref_unlocked(void)
  4492. +{
  4493. + int status = 0;
  4494. +
  4495. + if (spwr_subsystem.refcount)
  4496. + spwr_subsystem.refcount -= 1;
  4497. +
  4498. + if (!spwr_subsystem.refcount)
  4499. + status = spwr_subsys_deinit_unlocked();
  4500. +
  4501. + return status;
  4502. +}
  4503. +
  4504. +
  4505. +static int spwr_ac_register(struct spwr_ac_device *ac, struct platform_device *pdev)
  4506. +{
  4507. + struct power_supply_config psy_cfg = {};
  4508. + u32 sta;
  4509. + int status;
  4510. +
  4511. + // make sure the device is there and functioning properly
  4512. + status = sam_psy_get_sta(0x00, &sta);
  4513. + if (status)
  4514. + return status;
  4515. +
  4516. + if ((sta & SAM_BATTERY_STA_OK) != SAM_BATTERY_STA_OK)
  4517. + return -ENODEV;
  4518. +
  4519. + psy_cfg.drv_data = ac;
  4520. +
  4521. + ac->pdev = pdev;
  4522. + mutex_init(&ac->lock);
  4523. +
  4524. + snprintf(ac->name, ARRAY_SIZE(ac->name), "ADP0");
  4525. +
  4526. + ac->psy_desc.name = ac->name;
  4527. + ac->psy_desc.type = POWER_SUPPLY_TYPE_MAINS;
  4528. + ac->psy_desc.properties = spwr_ac_props;
  4529. + ac->psy_desc.num_properties = ARRAY_SIZE(spwr_ac_props);
  4530. + ac->psy_desc.get_property = spwr_ac_get_property;
  4531. +
  4532. + mutex_lock(&spwr_subsystem.lock);
  4533. + if (spwr_subsystem.ac) {
  4534. + status = -EEXIST;
  4535. + goto err;
  4536. + }
  4537. +
  4538. + status = spwr_subsys_ref_unlocked();
  4539. + if (status)
  4540. + goto err;
  4541. +
  4542. + ac->psy = power_supply_register(&ac->pdev->dev, &ac->psy_desc, &psy_cfg);
  4543. + if (IS_ERR(ac->psy)) {
  4544. + status = PTR_ERR(ac->psy);
  4545. + goto err_unref;
  4546. + }
  4547. +
  4548. + spwr_subsystem.ac = ac;
  4549. + mutex_unlock(&spwr_subsystem.lock);
  4550. + return 0;
  4551. +
  4552. +err_unref:
  4553. + spwr_subsys_unref_unlocked();
  4554. +err:
  4555. + mutex_unlock(&spwr_subsystem.lock);
  4556. + mutex_destroy(&ac->lock);
  4557. + return status;
  4558. +}
  4559. +
  4560. +static int spwr_ac_unregister(struct spwr_ac_device *ac)
  4561. +{
  4562. + int status;
  4563. +
  4564. + mutex_lock(&spwr_subsystem.lock);
  4565. + if (spwr_subsystem.ac != ac) {
  4566. + mutex_unlock(&spwr_subsystem.lock);
  4567. + return -EINVAL;
  4568. + }
  4569. +
  4570. + spwr_subsystem.ac = NULL;
  4571. + power_supply_unregister(ac->psy);
  4572. +
  4573. + status = spwr_subsys_unref_unlocked();
  4574. + mutex_unlock(&spwr_subsystem.lock);
  4575. +
  4576. + mutex_destroy(&ac->lock);
  4577. + return status;
  4578. +}
  4579. +
  4580. +static int spwr_battery_register(struct spwr_battery_device *bat, struct platform_device *pdev,
  4581. + enum spwr_battery_id id)
  4582. +{
  4583. + struct power_supply_config psy_cfg = {};
  4584. + u32 sta;
  4585. + int status;
  4586. +
  4587. + if ((id < 0 || id >= __SPWR_NUM_BAT) && id != SPWR_BAT_SINGLE)
  4588. + return -EINVAL;
  4589. +
  4590. + bat->pdev = pdev;
  4591. + bat->id = id != SPWR_BAT_SINGLE ? id : SPWR_BAT1;
  4592. +
  4593. + // make sure the device is there and functioning properly
  4594. + status = sam_psy_get_sta(bat->id + 1, &sta);
  4595. + if (status)
  4596. + return status;
  4597. +
  4598. + if ((sta & SAM_BATTERY_STA_OK) != SAM_BATTERY_STA_OK)
  4599. + return -ENODEV;
  4600. +
  4601. + status = spwr_battery_update_bix_unlocked(bat);
  4602. + if (status)
  4603. + return status;
  4604. +
  4605. + if (spwr_battery_present(bat)) {
  4606. + status = spwr_battery_set_alarm_unlocked(bat, bat->bix.design_cap_warn);
  4607. + if (status)
  4608. + return status;
  4609. + }
  4610. +
  4611. + snprintf(bat->name, ARRAY_SIZE(bat->name), "BAT%d", bat->id);
  4612. + bat->psy_desc.name = bat->name;
  4613. + bat->psy_desc.type = POWER_SUPPLY_TYPE_BATTERY;
  4614. +
  4615. + if (bat->bix.power_unit == SAM_BATTERY_POWER_UNIT_MA) {
  4616. + bat->psy_desc.properties = spwr_battery_props_chg;
  4617. + bat->psy_desc.num_properties = ARRAY_SIZE(spwr_battery_props_chg);
  4618. + } else {
  4619. + bat->psy_desc.properties = spwr_battery_props_eng;
  4620. + bat->psy_desc.num_properties = ARRAY_SIZE(spwr_battery_props_eng);
  4621. + }
  4622. +
  4623. + bat->psy_desc.get_property = spwr_battery_get_property;
  4624. +
  4625. + mutex_init(&bat->lock);
  4626. + psy_cfg.drv_data = bat;
  4627. +
  4628. + INIT_DELAYED_WORK(&bat->update_work, spwr_battery_update_bst_workfn);
  4629. +
  4630. + mutex_lock(&spwr_subsystem.lock);
  4631. + if (spwr_subsystem.battery[bat->id]) {
  4632. + status = -EEXIST;
  4633. + goto err;
  4634. + }
  4635. +
  4636. + status = spwr_subsys_ref_unlocked();
  4637. + if (status)
  4638. + goto err;
  4639. +
  4640. + bat->psy = power_supply_register(&bat->pdev->dev, &bat->psy_desc, &psy_cfg);
  4641. + if (IS_ERR(bat->psy)) {
  4642. + status = PTR_ERR(bat->psy);
  4643. + goto err_unref;
  4644. + }
  4645. +
  4646. + status = device_create_file(&bat->psy->dev, &alarm_attr);
  4647. + if (status)
  4648. + goto err_dereg;
  4649. +
  4650. + spwr_subsystem.battery[bat->id] = bat;
  4651. + mutex_unlock(&spwr_subsystem.lock);
  4652. + return 0;
  4653. +
  4654. +err_dereg:
  4655. + power_supply_unregister(bat->psy);
  4656. +err_unref:
  4657. + spwr_subsys_unref_unlocked();
  4658. +err:
  4659. + mutex_unlock(&spwr_subsystem.lock);
  4660. + return status;
  4661. +}
  4662. +
  4663. +static int spwr_battery_unregister(struct spwr_battery_device *bat)
  4664. +{
  4665. + int status;
  4666. +
  4667. + if (bat->id < 0 || bat->id >= __SPWR_NUM_BAT)
  4668. + return -EINVAL ;
  4669. +
  4670. + mutex_lock(&spwr_subsystem.lock);
  4671. + if (spwr_subsystem.battery[bat->id] != bat) {
  4672. + mutex_unlock(&spwr_subsystem.lock);
  4673. + return -EINVAL;
  4674. + }
  4675. +
  4676. + spwr_subsystem.battery[bat->id] = NULL;
  4677. +
  4678. + status = spwr_subsys_unref_unlocked();
  4679. + mutex_unlock(&spwr_subsystem.lock);
  4680. +
  4681. + cancel_delayed_work_sync(&bat->update_work);
  4682. + device_remove_file(&bat->psy->dev, &alarm_attr);
  4683. + power_supply_unregister(bat->psy);
  4684. +
  4685. + mutex_destroy(&bat->lock);
  4686. + return status;
  4687. +}
  4688. +
  4689. +
  4690. +/*
  4691. + * Battery Driver.
  4692. + */
  4693. +
  4694. +#ifdef CONFIG_PM_SLEEP
  4695. +static int surface_sam_sid_battery_resume(struct device *dev)
  4696. +{
  4697. + struct spwr_battery_device *bat = dev_get_drvdata(dev);
  4698. + return spwr_battery_recheck(bat);
  4699. +}
  4700. +#else
  4701. +#define surface_sam_sid_battery_resume NULL
  4702. +#endif
  4703. +
  4704. +SIMPLE_DEV_PM_OPS(surface_sam_sid_battery_pm, NULL, surface_sam_sid_battery_resume);
  4705. +
  4706. +static int surface_sam_sid_battery_probe(struct platform_device *pdev)
  4707. +{
  4708. + int status;
  4709. + struct spwr_battery_device *bat;
  4710. +
  4711. + // link to ec
  4712. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  4713. + if (status)
  4714. + return status == -ENXIO ? -EPROBE_DEFER : status;
  4715. +
  4716. + bat = devm_kzalloc(&pdev->dev, sizeof(struct spwr_battery_device), GFP_KERNEL);
  4717. + if (!bat)
  4718. + return -ENOMEM;
  4719. +
  4720. + platform_set_drvdata(pdev, bat);
  4721. + return spwr_battery_register(bat, pdev, pdev->id);
  4722. +}
  4723. +
  4724. +static int surface_sam_sid_battery_remove(struct platform_device *pdev)
  4725. +{
  4726. + struct spwr_battery_device *bat = platform_get_drvdata(pdev);
  4727. + return spwr_battery_unregister(bat);
  4728. +}
  4729. +
  4730. +static struct platform_driver surface_sam_sid_battery = {
  4731. + .probe = surface_sam_sid_battery_probe,
  4732. + .remove = surface_sam_sid_battery_remove,
  4733. + .driver = {
  4734. + .name = "surface_sam_sid_battery",
  4735. + .pm = &surface_sam_sid_battery_pm,
  4736. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4737. + },
  4738. +};
  4739. +
  4740. +
  4741. +/*
  4742. + * AC Driver.
  4743. + */
  4744. +
  4745. +static int surface_sam_sid_ac_probe(struct platform_device *pdev)
  4746. +{
  4747. + int status;
  4748. + struct spwr_ac_device *ac;
  4749. +
  4750. + // link to ec
  4751. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  4752. + if (status)
  4753. + return status == -ENXIO ? -EPROBE_DEFER : status;
  4754. +
  4755. + ac = devm_kzalloc(&pdev->dev, sizeof(struct spwr_ac_device), GFP_KERNEL);
  4756. + if (!ac)
  4757. + return -ENOMEM;
  4758. +
  4759. + status = spwr_ac_register(ac, pdev);
  4760. + if (status)
  4761. + return status;
  4762. +
  4763. + platform_set_drvdata(pdev, ac);
  4764. + return 0;
  4765. +}
  4766. +
  4767. +static int surface_sam_sid_ac_remove(struct platform_device *pdev)
  4768. +{
  4769. + struct spwr_ac_device *ac = platform_get_drvdata(pdev);
  4770. + return spwr_ac_unregister(ac);
  4771. +}
  4772. +
  4773. +static struct platform_driver surface_sam_sid_ac = {
  4774. + .probe = surface_sam_sid_ac_probe,
  4775. + .remove = surface_sam_sid_ac_remove,
  4776. + .driver = {
  4777. + .name = "surface_sam_sid_ac",
  4778. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4779. + },
  4780. +};
  4781. +
  4782. +
  4783. +static int __init surface_sam_sid_power_init(void)
  4784. +{
  4785. + int status;
  4786. +
  4787. + status = platform_driver_register(&surface_sam_sid_battery);
  4788. + if (status)
  4789. + return status;
  4790. +
  4791. + status = platform_driver_register(&surface_sam_sid_ac);
  4792. + if (status) {
  4793. + platform_driver_unregister(&surface_sam_sid_battery);
  4794. + return status;
  4795. + }
  4796. +
  4797. + return 0;
  4798. +}
  4799. +
  4800. +static void __exit surface_sam_sid_power_exit(void)
  4801. +{
  4802. + platform_driver_unregister(&surface_sam_sid_battery);
  4803. + platform_driver_unregister(&surface_sam_sid_ac);
  4804. +}
  4805. +
  4806. +module_init(surface_sam_sid_power_init);
  4807. +module_exit(surface_sam_sid_power_exit);
  4808. +
  4809. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  4810. +MODULE_DESCRIPTION("Surface Battery/AC Driver for 7th Generation Surface Devices");
  4811. +MODULE_LICENSE("GPL v2");
  4812. +MODULE_ALIAS("platform:surface_sam_sid_ac");
  4813. +MODULE_ALIAS("platform:surface_sam_sid_battery");
  4814. diff --git a/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c b/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  4815. new file mode 100644
  4816. index 000000000000..dc5be3a14a8c
  4817. --- /dev/null
  4818. +++ b/drivers/platform/x86/surface_sam/surface_sam_sid_vhf.c
  4819. @@ -0,0 +1,440 @@
  4820. +/*
  4821. + * Microsofs Surface HID (VHF) driver for HID input events via SAM.
  4822. + * Used for keyboard input events on the 7th generation Surface Laptops.
  4823. + */
  4824. +
  4825. +#include <linux/acpi.h>
  4826. +#include <linux/hid.h>
  4827. +#include <linux/input.h>
  4828. +#include <linux/platform_device.h>
  4829. +#include <linux/types.h>
  4830. +
  4831. +#include "surface_sam_ssh.h"
  4832. +
  4833. +#define SID_VHF_INPUT_NAME "Microsoft Surface HID"
  4834. +
  4835. +/*
  4836. + * Request ID for VHF events. This value is based on the output of the Surface
  4837. + * EC and should not be changed.
  4838. + */
  4839. +#define SAM_EVENT_SID_VHF_RQID 0x0015
  4840. +#define SAM_EVENT_SID_VHF_TC 0x15
  4841. +
  4842. +#define VHF_HID_STARTED 0
  4843. +
  4844. +struct sid_vhf_evtctx {
  4845. + struct device *dev;
  4846. + struct hid_device *hid;
  4847. + unsigned long flags;
  4848. +};
  4849. +
  4850. +struct sid_vhf_drvdata {
  4851. + struct sid_vhf_evtctx event_ctx;
  4852. +};
  4853. +
  4854. +
  4855. +static int sid_vhf_hid_start(struct hid_device *hid)
  4856. +{
  4857. + hid_dbg(hid, "%s\n", __func__);
  4858. + return 0;
  4859. +}
  4860. +
  4861. +static void sid_vhf_hid_stop(struct hid_device *hid)
  4862. +{
  4863. + hid_dbg(hid, "%s\n", __func__);
  4864. +}
  4865. +
  4866. +static int sid_vhf_hid_open(struct hid_device *hid)
  4867. +{
  4868. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(to_platform_device(hid->dev.parent));
  4869. +
  4870. + hid_dbg(hid, "%s\n", __func__);
  4871. +
  4872. + set_bit(VHF_HID_STARTED, &drvdata->event_ctx.flags);
  4873. + return 0;
  4874. +}
  4875. +
  4876. +static void sid_vhf_hid_close(struct hid_device *hid)
  4877. +{
  4878. +
  4879. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(to_platform_device(hid->dev.parent));
  4880. +
  4881. + hid_dbg(hid, "%s\n", __func__);
  4882. +
  4883. + clear_bit(VHF_HID_STARTED, &drvdata->event_ctx.flags);
  4884. +}
  4885. +
  4886. +struct surface_sam_sid_vhf_meta_rqst {
  4887. + u8 id;
  4888. + u32 offset;
  4889. + u32 length; // buffer limit on send, length of data received on receive
  4890. + u8 end; // 0x01 if end was reached
  4891. +} __packed;
  4892. +
  4893. +struct vhf_device_metadata_info {
  4894. + u8 len;
  4895. + u8 _2;
  4896. + u8 _3;
  4897. + u8 _4;
  4898. + u8 _5;
  4899. + u8 _6;
  4900. + u8 _7;
  4901. + u16 hid_len; // hid descriptor length
  4902. +} __packed;
  4903. +
  4904. +struct vhf_device_metadata {
  4905. + u32 len;
  4906. + u16 vendor_id;
  4907. + u16 product_id;
  4908. + u8 _1[24];
  4909. +} __packed;
  4910. +
  4911. +union vhf_buffer_data {
  4912. + struct vhf_device_metadata_info info;
  4913. + u8 pld[0x76];
  4914. + struct vhf_device_metadata meta;
  4915. +};
  4916. +
  4917. +struct surface_sam_sid_vhf_meta_resp {
  4918. + struct surface_sam_sid_vhf_meta_rqst rqst;
  4919. + union vhf_buffer_data data;
  4920. +} __packed;
  4921. +
  4922. +
  4923. +static int vhf_get_metadata(u8 iid, struct vhf_device_metadata *meta)
  4924. +{
  4925. + int status;
  4926. +
  4927. + struct surface_sam_sid_vhf_meta_resp resp = {
  4928. + .rqst = {
  4929. + .id = 2,
  4930. + .offset = 0,
  4931. + .length = 0x76,
  4932. + .end = 0
  4933. + }
  4934. + };
  4935. +
  4936. + struct surface_sam_ssh_rqst rqst = {
  4937. + .tc = 0x15,
  4938. + .cid = 0x04,
  4939. + .iid = iid,
  4940. + .pri = 0x02,
  4941. + .snc = 0x01,
  4942. + .cdl = sizeof(struct surface_sam_sid_vhf_meta_rqst),
  4943. + .pld = (u8*)&resp.rqst,
  4944. + };
  4945. +
  4946. + struct surface_sam_ssh_buf result = {
  4947. + .cap = sizeof(struct surface_sam_sid_vhf_meta_resp),
  4948. + .len = 0,
  4949. + .data = (u8*)&resp,
  4950. + };
  4951. +
  4952. + status = surface_sam_ssh_rqst(&rqst, &result);
  4953. + if (status) {
  4954. + return status;
  4955. + }
  4956. +
  4957. + *meta = resp.data.meta;
  4958. +
  4959. + return 0;
  4960. +}
  4961. +
  4962. +static int vhf_get_hid_descriptor(struct hid_device *hid, u8 iid, u8 **desc, int *size)
  4963. +{
  4964. + int status, len;
  4965. + u8 *buf;
  4966. +
  4967. + struct surface_sam_sid_vhf_meta_resp resp = {
  4968. + .rqst = {
  4969. + .id = 0,
  4970. + .offset = 0,
  4971. + .length = 0x76,
  4972. + .end = 0,
  4973. + }
  4974. + };
  4975. +
  4976. + struct surface_sam_ssh_rqst rqst = {
  4977. + .tc = 0x15,
  4978. + .cid = 0x04,
  4979. + .iid = iid,
  4980. + .pri = 0x02,
  4981. + .snc = 0x01,
  4982. + .cdl = sizeof(struct surface_sam_sid_vhf_meta_rqst),
  4983. + .pld = (u8*)&resp.rqst,
  4984. + };
  4985. +
  4986. + struct surface_sam_ssh_buf result = {
  4987. + .cap = sizeof(struct surface_sam_sid_vhf_meta_resp),
  4988. + .len = 0,
  4989. + .data = (u8*)&resp,
  4990. + };
  4991. +
  4992. + // first fetch 00 to get the total length
  4993. + status = surface_sam_ssh_rqst(&rqst, &result);
  4994. + if (status) {
  4995. + return status;
  4996. + }
  4997. +
  4998. + len = resp.data.info.hid_len;
  4999. +
  5000. + // allocate a buffer for the descriptor
  5001. + buf = kzalloc(len, GFP_KERNEL);
  5002. +
  5003. + // then, iterate and write into buffer, copying out bytes
  5004. + resp.rqst.id = 1;
  5005. + resp.rqst.offset = 0;
  5006. + resp.rqst.length = 0x76;
  5007. + resp.rqst.end = 0;
  5008. +
  5009. + while (!resp.rqst.end && resp.rqst.offset < len) {
  5010. + status = surface_sam_ssh_rqst(&rqst, &result);
  5011. + if (status) {
  5012. + kfree(buf);
  5013. + return status;
  5014. + }
  5015. + memcpy(buf + resp.rqst.offset, resp.data.pld, resp.rqst.length);
  5016. +
  5017. + resp.rqst.offset += resp.rqst.length;
  5018. + }
  5019. +
  5020. + *desc = buf;
  5021. + *size = len;
  5022. +
  5023. + return 0;
  5024. +}
  5025. +
  5026. +static int sid_vhf_hid_parse(struct hid_device *hid)
  5027. +{
  5028. + int ret = 0, size;
  5029. + u8 *buf;
  5030. +
  5031. + ret = vhf_get_hid_descriptor(hid, 0x00, &buf, &size);
  5032. + if (ret != 0) {
  5033. + hid_err(hid, "Failed to read HID descriptor from device: %d\n", ret);
  5034. + return -EIO;
  5035. + }
  5036. + hid_dbg(hid, "HID descriptor of device:");
  5037. + print_hex_dump_debug("descriptor:", DUMP_PREFIX_OFFSET, 16, 1, buf, size, false);
  5038. +
  5039. + ret = hid_parse_report(hid, buf, size);
  5040. + kfree(buf);
  5041. + return ret;
  5042. +
  5043. +}
  5044. +
  5045. +static int sid_vhf_hid_raw_request(struct hid_device *hid, unsigned char
  5046. + reportnum, u8 *buf, size_t len, unsigned char rtype, int
  5047. + reqtype)
  5048. +{
  5049. + int status;
  5050. + u8 cid;
  5051. + struct surface_sam_ssh_rqst rqst = {};
  5052. + struct surface_sam_ssh_buf result = {};
  5053. +
  5054. + hid_dbg(hid, "%s: reportnum=%#04x rtype=%i reqtype=%i\n", __func__, reportnum, rtype, reqtype);
  5055. + print_hex_dump_debug("report:", DUMP_PREFIX_OFFSET, 16, 1, buf, len, false);
  5056. +
  5057. + // Byte 0 is the report number. Report data starts at byte 1.
  5058. + buf[0] = reportnum;
  5059. +
  5060. + switch (rtype) {
  5061. + case HID_OUTPUT_REPORT:
  5062. + cid = 0x01;
  5063. + break;
  5064. + case HID_FEATURE_REPORT:
  5065. + switch (reqtype) {
  5066. + case HID_REQ_GET_REPORT:
  5067. + // The EC doesn't respond to GET FEATURE for these touchpad reports
  5068. + // we immediately discard to avoid waiting for a timeout.
  5069. + if (reportnum == 6 || reportnum == 7 || reportnum == 8 || reportnum == 9 || reportnum == 0x0b) {
  5070. + hid_dbg(hid, "%s: skipping get feature report for 0x%02x\n", __func__, reportnum);
  5071. + return 0;
  5072. + }
  5073. +
  5074. + cid = 0x02;
  5075. + break;
  5076. + case HID_REQ_SET_REPORT:
  5077. + cid = 0x03;
  5078. + break;
  5079. + default:
  5080. + hid_err(hid, "%s: unknown req type 0x%02x\n", __func__, rtype);
  5081. + return -EIO;
  5082. + }
  5083. + break;
  5084. + default:
  5085. + hid_err(hid, "%s: unknown report type 0x%02x\n", __func__, reportnum);
  5086. + return -EIO;
  5087. + }
  5088. +
  5089. + rqst.tc = SAM_EVENT_SID_VHF_TC;
  5090. + rqst.pri = SURFACE_SAM_PRIORITY_HIGH;
  5091. + rqst.iid = 0x00; // windows tends to distinguish iids, but EC will take it
  5092. + rqst.cid = cid;
  5093. + rqst.snc = HID_REQ_GET_REPORT == reqtype ? 0x01 : 0x00;
  5094. + rqst.cdl = HID_REQ_GET_REPORT == reqtype ? 0x01 : len;
  5095. + rqst.pld = buf;
  5096. +
  5097. + result.cap = len;
  5098. + result.len = 0;
  5099. + result.data = buf;
  5100. +
  5101. + hid_dbg(hid, "%s: sending to cid=%#04x snc=%#04x\n", __func__, cid, HID_REQ_GET_REPORT == reqtype);
  5102. +
  5103. + status = surface_sam_ssh_rqst(&rqst, &result);
  5104. + hid_dbg(hid, "%s: status %i\n", __func__, status);
  5105. +
  5106. + if (status) {
  5107. + return status;
  5108. + }
  5109. +
  5110. + if (result.len > 0) {
  5111. + print_hex_dump_debug("response:", DUMP_PREFIX_OFFSET, 16, 1, result.data, result.len, false);
  5112. + }
  5113. +
  5114. + return result.len;
  5115. +}
  5116. +
  5117. +static struct hid_ll_driver sid_vhf_hid_ll_driver = {
  5118. + .start = sid_vhf_hid_start,
  5119. + .stop = sid_vhf_hid_stop,
  5120. + .open = sid_vhf_hid_open,
  5121. + .close = sid_vhf_hid_close,
  5122. + .parse = sid_vhf_hid_parse,
  5123. + .raw_request = sid_vhf_hid_raw_request,
  5124. +};
  5125. +
  5126. +
  5127. +static struct hid_device *sid_vhf_create_hid_device(struct platform_device *pdev, struct vhf_device_metadata *meta)
  5128. +{
  5129. + struct hid_device *hid;
  5130. +
  5131. + hid = hid_allocate_device();
  5132. + if (IS_ERR(hid)) {
  5133. + return hid;
  5134. + }
  5135. +
  5136. + hid->dev.parent = &pdev->dev;
  5137. +
  5138. + hid->bus = BUS_VIRTUAL;
  5139. + hid->vendor = meta->vendor_id;
  5140. + hid->product = meta->product_id;
  5141. +
  5142. + hid->ll_driver = &sid_vhf_hid_ll_driver;
  5143. +
  5144. + sprintf(hid->name, "%s", SID_VHF_INPUT_NAME);
  5145. +
  5146. + return hid;
  5147. +}
  5148. +
  5149. +static int sid_vhf_event_handler(struct surface_sam_ssh_event *event, void *data)
  5150. +{
  5151. + struct sid_vhf_evtctx *ctx = (struct sid_vhf_evtctx *)data;
  5152. +
  5153. + // skip if HID hasn't started yet
  5154. + if (!test_bit(VHF_HID_STARTED, &ctx->flags)) {
  5155. + return 0;
  5156. + }
  5157. +
  5158. + if (event->tc == SAM_EVENT_SID_VHF_TC && (event->cid == 0x00 || event->cid == 0x03 || event->cid == 0x04)) {
  5159. + return hid_input_report(ctx->hid, HID_INPUT_REPORT, event->pld, event->len, 1);
  5160. + }
  5161. +
  5162. + dev_warn(ctx->dev, "unsupported event (tc = %d, cid = %d)\n", event->tc, event->cid);
  5163. + return 0;
  5164. +}
  5165. +
  5166. +static int surface_sam_sid_vhf_probe(struct platform_device *pdev)
  5167. +{
  5168. + struct sid_vhf_drvdata *drvdata;
  5169. + struct vhf_device_metadata meta = {};
  5170. + struct hid_device *hid;
  5171. + int status;
  5172. +
  5173. + // add device link to EC
  5174. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  5175. + if (status) {
  5176. + return status == -ENXIO ? -EPROBE_DEFER : status;
  5177. + }
  5178. +
  5179. + drvdata = kzalloc(sizeof(struct sid_vhf_drvdata), GFP_KERNEL);
  5180. + if (!drvdata) {
  5181. + return -ENOMEM;
  5182. + }
  5183. +
  5184. + status = vhf_get_metadata(0x00, &meta);
  5185. + if (status) {
  5186. + goto err_create_hid;
  5187. + }
  5188. +
  5189. + hid = sid_vhf_create_hid_device(pdev, &meta);
  5190. + if (IS_ERR(hid)) {
  5191. + status = PTR_ERR(hid);
  5192. + goto err_create_hid;
  5193. + }
  5194. +
  5195. + drvdata->event_ctx.dev = &pdev->dev;
  5196. + drvdata->event_ctx.hid = hid;
  5197. +
  5198. + platform_set_drvdata(pdev, drvdata);
  5199. +
  5200. + status = surface_sam_ssh_set_event_handler(
  5201. + SAM_EVENT_SID_VHF_RQID,
  5202. + sid_vhf_event_handler,
  5203. + &drvdata->event_ctx);
  5204. + if (status) {
  5205. + goto err_event_handler;
  5206. + }
  5207. +
  5208. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5209. + if (status) {
  5210. + goto err_event_source;
  5211. + }
  5212. +
  5213. + status = hid_add_device(hid);
  5214. + if (status) {
  5215. + goto err_add_hid;
  5216. + }
  5217. +
  5218. + return 0;
  5219. +
  5220. +err_add_hid:
  5221. + surface_sam_ssh_disable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5222. +err_event_source:
  5223. + surface_sam_ssh_remove_event_handler(SAM_EVENT_SID_VHF_RQID);
  5224. +err_event_handler:
  5225. + hid_destroy_device(hid);
  5226. + platform_set_drvdata(pdev, NULL);
  5227. +err_create_hid:
  5228. + kfree(drvdata);
  5229. + return status;
  5230. +}
  5231. +
  5232. +static int surface_sam_sid_vhf_remove(struct platform_device *pdev)
  5233. +{
  5234. + struct sid_vhf_drvdata *drvdata = platform_get_drvdata(pdev);
  5235. +
  5236. + surface_sam_ssh_disable_event_source(SAM_EVENT_SID_VHF_TC, 0x01, SAM_EVENT_SID_VHF_RQID);
  5237. + surface_sam_ssh_remove_event_handler(SAM_EVENT_SID_VHF_RQID);
  5238. +
  5239. + hid_destroy_device(drvdata->event_ctx.hid);
  5240. + kfree(drvdata);
  5241. +
  5242. + platform_set_drvdata(pdev, NULL);
  5243. + return 0;
  5244. +}
  5245. +
  5246. +static struct platform_driver surface_sam_sid_vhf = {
  5247. + .probe = surface_sam_sid_vhf_probe,
  5248. + .remove = surface_sam_sid_vhf_remove,
  5249. + .driver = {
  5250. + .name = "surface_sam_sid_vhf",
  5251. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  5252. + },
  5253. +};
  5254. +module_platform_driver(surface_sam_sid_vhf);
  5255. +
  5256. +MODULE_AUTHOR("Blaž Hrastnik <blaz@mxxn.io>");
  5257. +MODULE_DESCRIPTION("Driver for HID devices connected via Surface SAM");
  5258. +MODULE_LICENSE("GPL v2");
  5259. +MODULE_ALIAS("platform:surface_sam_sid_vhf");
  5260. diff --git a/drivers/platform/x86/surface_sam/surface_sam_ssh.c b/drivers/platform/x86/surface_sam/surface_sam_ssh.c
  5261. new file mode 100644
  5262. index 000000000000..34905cf29a51
  5263. --- /dev/null
  5264. +++ b/drivers/platform/x86/surface_sam/surface_sam_ssh.c
  5265. @@ -0,0 +1,1773 @@
  5266. +/*
  5267. + * Surface Serial Hub (SSH) driver for communication with the Surface/System
  5268. + * Aggregator Module.
  5269. + */
  5270. +
  5271. +#include <asm/unaligned.h>
  5272. +#include <linux/acpi.h>
  5273. +#include <linux/completion.h>
  5274. +#include <linux/crc-ccitt.h>
  5275. +#include <linux/dmaengine.h>
  5276. +#include <linux/gpio/consumer.h>
  5277. +#include <linux/interrupt.h>
  5278. +#include <linux/jiffies.h>
  5279. +#include <linux/kernel.h>
  5280. +#include <linux/kfifo.h>
  5281. +#include <linux/mutex.h>
  5282. +#include <linux/pm.h>
  5283. +#include <linux/refcount.h>
  5284. +#include <linux/serdev.h>
  5285. +#include <linux/spinlock.h>
  5286. +#include <linux/workqueue.h>
  5287. +
  5288. +#include "surface_sam_ssh.h"
  5289. +
  5290. +
  5291. +#define SSH_RQST_TAG_FULL "surface_sam_ssh_rqst: "
  5292. +#define SSH_RQST_TAG "rqst: "
  5293. +#define SSH_EVENT_TAG "event: "
  5294. +#define SSH_RECV_TAG "recv: "
  5295. +
  5296. +#define SSH_SUPPORTED_FLOW_CONTROL_MASK (~((u8) ACPI_UART_FLOW_CONTROL_HW))
  5297. +
  5298. +#define SSH_BYTELEN_SYNC 2
  5299. +#define SSH_BYTELEN_TERM 2
  5300. +#define SSH_BYTELEN_CRC 2
  5301. +#define SSH_BYTELEN_CTRL 4 // command-header, ACK, or RETRY
  5302. +#define SSH_BYTELEN_CMDFRAME 8 // without payload
  5303. +
  5304. +#define SSH_MAX_WRITE ( \
  5305. + SSH_BYTELEN_SYNC \
  5306. + + SSH_BYTELEN_CTRL \
  5307. + + SSH_BYTELEN_CRC \
  5308. + + SSH_BYTELEN_CMDFRAME \
  5309. + + SURFACE_SAM_SSH_MAX_RQST_PAYLOAD \
  5310. + + SSH_BYTELEN_CRC \
  5311. +)
  5312. +
  5313. +#define SSH_MSG_LEN_CTRL ( \
  5314. + SSH_BYTELEN_SYNC \
  5315. + + SSH_BYTELEN_CTRL \
  5316. + + SSH_BYTELEN_CRC \
  5317. + + SSH_BYTELEN_TERM \
  5318. +)
  5319. +
  5320. +#define SSH_MSG_LEN_CMD_BASE ( \
  5321. + SSH_BYTELEN_SYNC \
  5322. + + SSH_BYTELEN_CTRL \
  5323. + + SSH_BYTELEN_CRC \
  5324. + + SSH_BYTELEN_CRC \
  5325. +) // without payload and command-frame
  5326. +
  5327. +#define SSH_WRITE_TIMEOUT msecs_to_jiffies(1000)
  5328. +#define SSH_READ_TIMEOUT msecs_to_jiffies(1000)
  5329. +#define SSH_NUM_RETRY 3
  5330. +
  5331. +#define SSH_WRITE_BUF_LEN SSH_MAX_WRITE
  5332. +#define SSH_READ_BUF_LEN 512 // must be power of 2
  5333. +#define SSH_EVAL_BUF_LEN SSH_MAX_WRITE // also works for reading
  5334. +
  5335. +#define SSH_FRAME_TYPE_CMD_NOACK 0x00 // request/event that does not to be ACKed
  5336. +#define SSH_FRAME_TYPE_CMD 0x80 // request/event
  5337. +#define SSH_FRAME_TYPE_ACK 0x40 // ACK for request/event
  5338. +#define SSH_FRAME_TYPE_RETRY 0x04 // error or retry indicator
  5339. +
  5340. +#define SSH_FRAME_OFFS_CTRL SSH_BYTELEN_SYNC
  5341. +#define SSH_FRAME_OFFS_CTRL_CRC (SSH_FRAME_OFFS_CTRL + SSH_BYTELEN_CTRL)
  5342. +#define SSH_FRAME_OFFS_TERM (SSH_FRAME_OFFS_CTRL_CRC + SSH_BYTELEN_CRC)
  5343. +#define SSH_FRAME_OFFS_CMD SSH_FRAME_OFFS_TERM // either TERM or CMD
  5344. +#define SSH_FRAME_OFFS_CMD_PLD (SSH_FRAME_OFFS_CMD + SSH_BYTELEN_CMDFRAME)
  5345. +
  5346. +/*
  5347. + * A note on Request IDs (RQIDs):
  5348. + * 0x0000 is not a valid RQID
  5349. + * 0x0001 is valid, but reserved for Surface Laptop keyboard events
  5350. + */
  5351. +#define SAM_NUM_EVENT_TYPES ((1 << SURFACE_SAM_SSH_RQID_EVENT_BITS) - 1)
  5352. +
  5353. +/*
  5354. + * Sync: aa 55
  5355. + * Terminate: ff ff
  5356. + *
  5357. + * Request Message: sync cmd-hdr crc(cmd-hdr) cmd-rqst-frame crc(cmd-rqst-frame)
  5358. + * Ack Message: sync ack crc(ack) terminate
  5359. + * Retry Message: sync retry crc(retry) terminate
  5360. + * Response Message: sync cmd-hdr crc(cmd-hdr) cmd-resp-frame crc(cmd-resp-frame)
  5361. + *
  5362. + * Command Header: 80 LEN 00 SEQ
  5363. + * Ack: 40 00 00 SEQ
  5364. + * Retry: 04 00 00 00
  5365. + * Command Request Frame: 80 RTC 01 00 RIID RQID RCID PLD
  5366. + * Command Response Frame: 80 RTC 00 01 RIID RQID RCID PLD
  5367. + */
  5368. +
  5369. +struct ssh_frame_ctrl {
  5370. + u8 type;
  5371. + u8 len; // without crc
  5372. + u8 pad;
  5373. + u8 seq;
  5374. +} __packed;
  5375. +
  5376. +struct ssh_frame_cmd {
  5377. + u8 type;
  5378. + u8 tc;
  5379. + u8 pri_out;
  5380. + u8 pri_in;
  5381. + u8 iid;
  5382. + u8 rqid_lo; // id for request/response matching (low byte)
  5383. + u8 rqid_hi; // id for request/response matching (high byte)
  5384. + u8 cid;
  5385. +} __packed;
  5386. +
  5387. +
  5388. +enum ssh_ec_state {
  5389. + SSH_EC_UNINITIALIZED,
  5390. + SSH_EC_INITIALIZED,
  5391. + SSH_EC_SUSPENDED,
  5392. +};
  5393. +
  5394. +struct ssh_counters {
  5395. + u8 seq; // control sequence id
  5396. + u16 rqid; // id for request/response matching
  5397. +};
  5398. +
  5399. +struct ssh_writer {
  5400. + u8 *data;
  5401. + u8 *ptr;
  5402. +} __packed;
  5403. +
  5404. +enum ssh_receiver_state {
  5405. + SSH_RCV_DISCARD,
  5406. + SSH_RCV_CONTROL,
  5407. + SSH_RCV_COMMAND,
  5408. +};
  5409. +
  5410. +struct ssh_receiver {
  5411. + spinlock_t lock;
  5412. + enum ssh_receiver_state state;
  5413. + struct completion signal;
  5414. + struct kfifo fifo;
  5415. + struct {
  5416. + bool pld;
  5417. + u8 seq;
  5418. + u16 rqid;
  5419. + } expect;
  5420. + struct {
  5421. + u16 cap;
  5422. + u16 len;
  5423. + u8 *ptr;
  5424. + } eval_buf;
  5425. +};
  5426. +
  5427. +struct ssh_event_handler {
  5428. + surface_sam_ssh_event_handler_fn handler;
  5429. + surface_sam_ssh_event_handler_delay delay;
  5430. + void *data;
  5431. +};
  5432. +
  5433. +struct ssh_events {
  5434. + spinlock_t lock;
  5435. + struct workqueue_struct *queue_ack;
  5436. + struct workqueue_struct *queue_evt;
  5437. + struct ssh_event_handler handler[SAM_NUM_EVENT_TYPES];
  5438. +};
  5439. +
  5440. +struct sam_ssh_ec {
  5441. + struct mutex lock;
  5442. + enum ssh_ec_state state;
  5443. + struct serdev_device *serdev;
  5444. + struct ssh_counters counter;
  5445. + struct ssh_writer writer;
  5446. + struct ssh_receiver receiver;
  5447. + struct ssh_events events;
  5448. + int irq;
  5449. + bool irq_wakeup_enabled;
  5450. +};
  5451. +
  5452. +struct ssh_fifo_packet {
  5453. + u8 type; // packet type (ACK/RETRY/CMD)
  5454. + u8 seq;
  5455. + u8 len;
  5456. +};
  5457. +
  5458. +struct ssh_event_work {
  5459. + refcount_t refcount;
  5460. + struct sam_ssh_ec *ec;
  5461. + struct work_struct work_ack;
  5462. + struct delayed_work work_evt;
  5463. + struct surface_sam_ssh_event event;
  5464. + u8 seq;
  5465. +};
  5466. +
  5467. +
  5468. +static struct sam_ssh_ec ssh_ec = {
  5469. + .lock = __MUTEX_INITIALIZER(ssh_ec.lock),
  5470. + .state = SSH_EC_UNINITIALIZED,
  5471. + .serdev = NULL,
  5472. + .counter = {
  5473. + .seq = 0,
  5474. + .rqid = 0,
  5475. + },
  5476. + .writer = {
  5477. + .data = NULL,
  5478. + .ptr = NULL,
  5479. + },
  5480. + .receiver = {
  5481. + .lock = __SPIN_LOCK_UNLOCKED(),
  5482. + .state = SSH_RCV_DISCARD,
  5483. + .expect = {},
  5484. + },
  5485. + .events = {
  5486. + .lock = __SPIN_LOCK_UNLOCKED(),
  5487. + .handler = {},
  5488. + },
  5489. + .irq = -1,
  5490. +};
  5491. +
  5492. +
  5493. +inline static struct sam_ssh_ec *surface_sam_ssh_acquire(void)
  5494. +{
  5495. + struct sam_ssh_ec *ec = &ssh_ec;
  5496. +
  5497. + mutex_lock(&ec->lock);
  5498. + return ec;
  5499. +}
  5500. +
  5501. +inline static void surface_sam_ssh_release(struct sam_ssh_ec *ec)
  5502. +{
  5503. + mutex_unlock(&ec->lock);
  5504. +}
  5505. +
  5506. +inline static struct sam_ssh_ec *surface_sam_ssh_acquire_init(void)
  5507. +{
  5508. + struct sam_ssh_ec *ec = surface_sam_ssh_acquire();
  5509. +
  5510. + if (ec->state == SSH_EC_UNINITIALIZED) {
  5511. + surface_sam_ssh_release(ec);
  5512. + return NULL;
  5513. + }
  5514. +
  5515. + return ec;
  5516. +}
  5517. +
  5518. +int surface_sam_ssh_consumer_register(struct device *consumer)
  5519. +{
  5520. + u32 flags = DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER;
  5521. + struct sam_ssh_ec *ec;
  5522. + struct device_link *link;
  5523. +
  5524. + ec = surface_sam_ssh_acquire_init();
  5525. + if (!ec) {
  5526. + return -ENXIO;
  5527. + }
  5528. +
  5529. + link = device_link_add(consumer, &ec->serdev->dev, flags);
  5530. + if (!link) {
  5531. + return -EFAULT;
  5532. + }
  5533. +
  5534. + surface_sam_ssh_release(ec);
  5535. + return 0;
  5536. +}
  5537. +EXPORT_SYMBOL_GPL(surface_sam_ssh_consumer_register);
  5538. +
  5539. +
  5540. +inline static u16 sam_rqid_to_rqst(u16 rqid) {
  5541. + return rqid << SURFACE_SAM_SSH_RQID_EVENT_BITS;
  5542. +}
  5543. +
  5544. +inline static bool sam_rqid_is_event(u16 rqid) {
  5545. + const u16 mask = (1 << SURFACE_SAM_SSH_RQID_EVENT_BITS) - 1;
  5546. + return rqid != 0 && (rqid | mask) == mask;
  5547. +}
  5548. +
  5549. +int surface_sam_ssh_enable_event_source(u8 tc, u8 unknown, u16 rqid)
  5550. +{
  5551. + u8 pld[4] = { tc, unknown, rqid & 0xff, rqid >> 8 };
  5552. + u8 buf[1] = { 0x00 };
  5553. +
  5554. + struct surface_sam_ssh_rqst rqst = {
  5555. + .tc = 0x01,
  5556. + .cid = 0x0b,
  5557. + .iid = 0x00,
  5558. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5559. + .snc = 0x01,
  5560. + .cdl = 0x04,
  5561. + .pld = pld,
  5562. + };
  5563. +
  5564. + struct surface_sam_ssh_buf result = {
  5565. + result.cap = ARRAY_SIZE(buf),
  5566. + result.len = 0,
  5567. + result.data = buf,
  5568. + };
  5569. +
  5570. + int status;
  5571. +
  5572. + // only allow RQIDs that lie within event spectrum
  5573. + if (!sam_rqid_is_event(rqid)) {
  5574. + return -EINVAL;
  5575. + }
  5576. +
  5577. + status = surface_sam_ssh_rqst(&rqst, &result);
  5578. +
  5579. + if (buf[0] != 0x00) {
  5580. + printk(KERN_WARNING SSH_RQST_TAG_FULL
  5581. + "unexpected result while enabling event source: 0x%02x\n",
  5582. + buf[0]);
  5583. + }
  5584. +
  5585. + return status;
  5586. +
  5587. +}
  5588. +EXPORT_SYMBOL_GPL(surface_sam_ssh_enable_event_source);
  5589. +
  5590. +int surface_sam_ssh_disable_event_source(u8 tc, u8 unknown, u16 rqid)
  5591. +{
  5592. + u8 pld[4] = { tc, unknown, rqid & 0xff, rqid >> 8 };
  5593. + u8 buf[1] = { 0x00 };
  5594. +
  5595. + struct surface_sam_ssh_rqst rqst = {
  5596. + .tc = 0x01,
  5597. + .cid = 0x0c,
  5598. + .iid = 0x00,
  5599. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5600. + .snc = 0x01,
  5601. + .cdl = 0x04,
  5602. + .pld = pld,
  5603. + };
  5604. +
  5605. + struct surface_sam_ssh_buf result = {
  5606. + result.cap = ARRAY_SIZE(buf),
  5607. + result.len = 0,
  5608. + result.data = buf,
  5609. + };
  5610. +
  5611. + int status;
  5612. +
  5613. + // only allow RQIDs that lie within event spectrum
  5614. + if (!sam_rqid_is_event(rqid)) {
  5615. + return -EINVAL;
  5616. + }
  5617. +
  5618. + status = surface_sam_ssh_rqst(&rqst, &result);
  5619. +
  5620. + if (buf[0] != 0x00) {
  5621. + printk(KERN_WARNING SSH_RQST_TAG_FULL
  5622. + "unexpected result while disabling event source: 0x%02x\n",
  5623. + buf[0]);
  5624. + }
  5625. +
  5626. + return status;
  5627. +}
  5628. +EXPORT_SYMBOL_GPL(surface_sam_ssh_disable_event_source);
  5629. +
  5630. +static unsigned long sam_event_default_delay(struct surface_sam_ssh_event *event, void *data)
  5631. +{
  5632. + return event->pri == SURFACE_SAM_PRIORITY_HIGH ? SURFACE_SAM_SSH_EVENT_IMMEDIATE : 0;
  5633. +}
  5634. +
  5635. +int surface_sam_ssh_set_delayed_event_handler(
  5636. + u16 rqid, surface_sam_ssh_event_handler_fn fn,
  5637. + surface_sam_ssh_event_handler_delay delay,
  5638. + void *data)
  5639. +{
  5640. + struct sam_ssh_ec *ec;
  5641. + unsigned long flags;
  5642. +
  5643. + if (!sam_rqid_is_event(rqid)) {
  5644. + return -EINVAL;
  5645. + }
  5646. +
  5647. + ec = surface_sam_ssh_acquire_init();
  5648. + if (!ec) {
  5649. + return -ENXIO;
  5650. + }
  5651. +
  5652. + if (!delay) {
  5653. + delay = sam_event_default_delay;
  5654. + }
  5655. +
  5656. + spin_lock_irqsave(&ec->events.lock, flags);
  5657. + // check if we already have a handler
  5658. + if (ec->events.handler[rqid - 1].handler) {
  5659. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5660. + return -EINVAL;
  5661. + }
  5662. +
  5663. + // 0 is not a valid event RQID
  5664. + ec->events.handler[rqid - 1].handler = fn;
  5665. + ec->events.handler[rqid - 1].delay = delay;
  5666. + ec->events.handler[rqid - 1].data = data;
  5667. +
  5668. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5669. + surface_sam_ssh_release(ec);
  5670. +
  5671. + return 0;
  5672. +}
  5673. +EXPORT_SYMBOL_GPL(surface_sam_ssh_set_delayed_event_handler);
  5674. +
  5675. +int surface_sam_ssh_remove_event_handler(u16 rqid)
  5676. +{
  5677. + struct sam_ssh_ec *ec;
  5678. + unsigned long flags;
  5679. +
  5680. + if (!sam_rqid_is_event(rqid)) {
  5681. + return -EINVAL;
  5682. + }
  5683. +
  5684. + ec = surface_sam_ssh_acquire_init();
  5685. + if (!ec) {
  5686. + return -ENXIO;
  5687. + }
  5688. +
  5689. + spin_lock_irqsave(&ec->events.lock, flags);
  5690. +
  5691. + // 0 is not a valid event RQID
  5692. + ec->events.handler[rqid - 1].handler = NULL;
  5693. + ec->events.handler[rqid - 1].delay = NULL;
  5694. + ec->events.handler[rqid - 1].data = NULL;
  5695. +
  5696. + spin_unlock_irqrestore(&ec->events.lock, flags);
  5697. + surface_sam_ssh_release(ec);
  5698. +
  5699. + /*
  5700. + * Make sure that the handler is not in use any more after we've
  5701. + * removed it.
  5702. + */
  5703. + flush_workqueue(ec->events.queue_evt);
  5704. +
  5705. + return 0;
  5706. +}
  5707. +EXPORT_SYMBOL_GPL(surface_sam_ssh_remove_event_handler);
  5708. +
  5709. +
  5710. +inline static u16 ssh_crc(const u8 *buf, size_t size)
  5711. +{
  5712. + return crc_ccitt_false(0xffff, buf, size);
  5713. +}
  5714. +
  5715. +inline static void ssh_write_u16(struct ssh_writer *writer, u16 in)
  5716. +{
  5717. + put_unaligned_le16(in, writer->ptr);
  5718. + writer->ptr += 2;
  5719. +}
  5720. +
  5721. +inline static void ssh_write_crc(struct ssh_writer *writer,
  5722. + const u8 *buf, size_t size)
  5723. +{
  5724. + ssh_write_u16(writer, ssh_crc(buf, size));
  5725. +}
  5726. +
  5727. +inline static void ssh_write_syn(struct ssh_writer *writer)
  5728. +{
  5729. + u8 *w = writer->ptr;
  5730. +
  5731. + *w++ = 0xaa;
  5732. + *w++ = 0x55;
  5733. +
  5734. + writer->ptr = w;
  5735. +}
  5736. +
  5737. +inline static void ssh_write_ter(struct ssh_writer *writer)
  5738. +{
  5739. + u8 *w = writer->ptr;
  5740. +
  5741. + *w++ = 0xff;
  5742. + *w++ = 0xff;
  5743. +
  5744. + writer->ptr = w;
  5745. +}
  5746. +
  5747. +inline static void ssh_write_buf(struct ssh_writer *writer,
  5748. + u8 *in, size_t len)
  5749. +{
  5750. + writer->ptr = memcpy(writer->ptr, in, len) + len;
  5751. +}
  5752. +
  5753. +inline static void ssh_write_hdr(struct ssh_writer *writer,
  5754. + const struct surface_sam_ssh_rqst *rqst,
  5755. + struct sam_ssh_ec *ec)
  5756. +{
  5757. + struct ssh_frame_ctrl *hdr = (struct ssh_frame_ctrl *)writer->ptr;
  5758. + u8 *begin = writer->ptr;
  5759. +
  5760. + hdr->type = SSH_FRAME_TYPE_CMD;
  5761. + hdr->len = SSH_BYTELEN_CMDFRAME + rqst->cdl; // without CRC
  5762. + hdr->pad = 0x00;
  5763. + hdr->seq = ec->counter.seq;
  5764. +
  5765. + writer->ptr += sizeof(*hdr);
  5766. +
  5767. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5768. +}
  5769. +
  5770. +inline static void ssh_write_cmd(struct ssh_writer *writer,
  5771. + const struct surface_sam_ssh_rqst *rqst,
  5772. + struct sam_ssh_ec *ec)
  5773. +{
  5774. + struct ssh_frame_cmd *cmd = (struct ssh_frame_cmd *)writer->ptr;
  5775. + u8 *begin = writer->ptr;
  5776. +
  5777. + u16 rqid = sam_rqid_to_rqst(ec->counter.rqid);
  5778. + u8 rqid_lo = rqid & 0xFF;
  5779. + u8 rqid_hi = rqid >> 8;
  5780. +
  5781. + cmd->type = SSH_FRAME_TYPE_CMD;
  5782. + cmd->tc = rqst->tc;
  5783. + cmd->pri_out = rqst->pri;
  5784. + cmd->pri_in = 0x00;
  5785. + cmd->iid = rqst->iid;
  5786. + cmd->rqid_lo = rqid_lo;
  5787. + cmd->rqid_hi = rqid_hi;
  5788. + cmd->cid = rqst->cid;
  5789. +
  5790. + writer->ptr += sizeof(*cmd);
  5791. +
  5792. + ssh_write_buf(writer, rqst->pld, rqst->cdl);
  5793. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5794. +}
  5795. +
  5796. +inline static void ssh_write_ack(struct ssh_writer *writer, u8 seq)
  5797. +{
  5798. + struct ssh_frame_ctrl *ack = (struct ssh_frame_ctrl *)writer->ptr;
  5799. + u8 *begin = writer->ptr;
  5800. +
  5801. + ack->type = SSH_FRAME_TYPE_ACK;
  5802. + ack->len = 0x00;
  5803. + ack->pad = 0x00;
  5804. + ack->seq = seq;
  5805. +
  5806. + writer->ptr += sizeof(*ack);
  5807. +
  5808. + ssh_write_crc(writer, begin, writer->ptr - begin);
  5809. +}
  5810. +
  5811. +inline static void ssh_writer_reset(struct ssh_writer *writer)
  5812. +{
  5813. + writer->ptr = writer->data;
  5814. +}
  5815. +
  5816. +inline static int ssh_writer_flush(struct sam_ssh_ec *ec)
  5817. +{
  5818. + struct ssh_writer *writer = &ec->writer;
  5819. + struct serdev_device *serdev = ec->serdev;
  5820. + int status;
  5821. +
  5822. + size_t len = writer->ptr - writer->data;
  5823. +
  5824. + dev_dbg(&ec->serdev->dev, "sending message\n");
  5825. + print_hex_dump_debug("send: ", DUMP_PREFIX_OFFSET, 16, 1,
  5826. + writer->data, writer->ptr - writer->data, false);
  5827. +
  5828. + status = serdev_device_write(serdev, writer->data, len, SSH_WRITE_TIMEOUT);
  5829. + return status >= 0 ? 0 : status;
  5830. +}
  5831. +
  5832. +inline static void ssh_write_msg_cmd(struct sam_ssh_ec *ec,
  5833. + const struct surface_sam_ssh_rqst *rqst)
  5834. +{
  5835. + ssh_writer_reset(&ec->writer);
  5836. + ssh_write_syn(&ec->writer);
  5837. + ssh_write_hdr(&ec->writer, rqst, ec);
  5838. + ssh_write_cmd(&ec->writer, rqst, ec);
  5839. +}
  5840. +
  5841. +inline static void ssh_write_msg_ack(struct sam_ssh_ec *ec, u8 seq)
  5842. +{
  5843. + ssh_writer_reset(&ec->writer);
  5844. + ssh_write_syn(&ec->writer);
  5845. + ssh_write_ack(&ec->writer, seq);
  5846. + ssh_write_ter(&ec->writer);
  5847. +}
  5848. +
  5849. +inline static void ssh_receiver_restart(struct sam_ssh_ec *ec,
  5850. + const struct surface_sam_ssh_rqst *rqst)
  5851. +{
  5852. + unsigned long flags;
  5853. +
  5854. + spin_lock_irqsave(&ec->receiver.lock, flags);
  5855. + reinit_completion(&ec->receiver.signal);
  5856. + ec->receiver.state = SSH_RCV_CONTROL;
  5857. + ec->receiver.expect.pld = rqst->snc;
  5858. + ec->receiver.expect.seq = ec->counter.seq;
  5859. + ec->receiver.expect.rqid = sam_rqid_to_rqst(ec->counter.rqid);
  5860. + ec->receiver.eval_buf.len = 0;
  5861. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  5862. +}
  5863. +
  5864. +inline static void ssh_receiver_discard(struct sam_ssh_ec *ec)
  5865. +{
  5866. + unsigned long flags;
  5867. +
  5868. + spin_lock_irqsave(&ec->receiver.lock, flags);
  5869. + ec->receiver.state = SSH_RCV_DISCARD;
  5870. + ec->receiver.eval_buf.len = 0;
  5871. + kfifo_reset(&ec->receiver.fifo);
  5872. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  5873. +}
  5874. +
  5875. +static int surface_sam_ssh_rqst_unlocked(struct sam_ssh_ec *ec,
  5876. + const struct surface_sam_ssh_rqst *rqst,
  5877. + struct surface_sam_ssh_buf *result)
  5878. +{
  5879. + struct device *dev = &ec->serdev->dev;
  5880. + struct ssh_fifo_packet packet = {};
  5881. + int status;
  5882. + int try;
  5883. + unsigned int rem;
  5884. +
  5885. + if (rqst->cdl > SURFACE_SAM_SSH_MAX_RQST_PAYLOAD) {
  5886. + dev_err(dev, SSH_RQST_TAG "request payload too large\n");
  5887. + return -EINVAL;
  5888. + }
  5889. +
  5890. + // write command in buffer, we may need it multiple times
  5891. + ssh_write_msg_cmd(ec, rqst);
  5892. + ssh_receiver_restart(ec, rqst);
  5893. +
  5894. + // send command, try to get an ack response
  5895. + for (try = 0; try < SSH_NUM_RETRY; try++) {
  5896. + status = ssh_writer_flush(ec);
  5897. + if (status) {
  5898. + goto out;
  5899. + }
  5900. +
  5901. + rem = wait_for_completion_timeout(&ec->receiver.signal, SSH_READ_TIMEOUT);
  5902. + if (rem) {
  5903. + // completion assures valid packet, thus ignore returned length
  5904. + (void) !kfifo_out(&ec->receiver.fifo, &packet, sizeof(packet));
  5905. +
  5906. + if (packet.type == SSH_FRAME_TYPE_ACK) {
  5907. + break;
  5908. + }
  5909. + }
  5910. + }
  5911. +
  5912. + // check if we ran out of tries?
  5913. + if (try >= SSH_NUM_RETRY) {
  5914. + dev_err(dev, SSH_RQST_TAG "communication failed %d times, giving up\n", try);
  5915. + status = -EIO;
  5916. + goto out;
  5917. + }
  5918. +
  5919. + ec->counter.seq += 1;
  5920. + ec->counter.rqid += 1;
  5921. +
  5922. + // get command response/payload
  5923. + if (rqst->snc && result) {
  5924. + rem = wait_for_completion_timeout(&ec->receiver.signal, SSH_READ_TIMEOUT);
  5925. + if (rem) {
  5926. + // completion assures valid packet, thus ignore returned length
  5927. + (void) !kfifo_out(&ec->receiver.fifo, &packet, sizeof(packet));
  5928. +
  5929. + if (result->cap < packet.len) {
  5930. + status = -EINVAL;
  5931. + goto out;
  5932. + }
  5933. +
  5934. + // completion assures valid packet, thus ignore returned length
  5935. + (void) !kfifo_out(&ec->receiver.fifo, result->data, packet.len);
  5936. + result->len = packet.len;
  5937. + } else {
  5938. + dev_err(dev, SSH_RQST_TAG "communication timed out\n");
  5939. + status = -EIO;
  5940. + goto out;
  5941. + }
  5942. +
  5943. + // send ACK
  5944. + if (packet.type == SSH_FRAME_TYPE_CMD) {
  5945. + ssh_write_msg_ack(ec, packet.seq);
  5946. + status = ssh_writer_flush(ec);
  5947. + if (status) {
  5948. + goto out;
  5949. + }
  5950. + }
  5951. + }
  5952. +
  5953. +out:
  5954. + ssh_receiver_discard(ec);
  5955. + return status;
  5956. +}
  5957. +
  5958. +int surface_sam_ssh_rqst(const struct surface_sam_ssh_rqst *rqst, struct surface_sam_ssh_buf *result)
  5959. +{
  5960. + struct sam_ssh_ec *ec;
  5961. + int status;
  5962. +
  5963. + ec = surface_sam_ssh_acquire_init();
  5964. + if (!ec) {
  5965. + printk(KERN_WARNING SSH_RQST_TAG_FULL "embedded controller is uninitialized\n");
  5966. + return -ENXIO;
  5967. + }
  5968. +
  5969. + if (ec->state == SSH_EC_SUSPENDED) {
  5970. + dev_warn(&ec->serdev->dev, SSH_RQST_TAG "embedded controller is suspended\n");
  5971. +
  5972. + surface_sam_ssh_release(ec);
  5973. + return -EPERM;
  5974. + }
  5975. +
  5976. + status = surface_sam_ssh_rqst_unlocked(ec, rqst, result);
  5977. +
  5978. + surface_sam_ssh_release(ec);
  5979. + return status;
  5980. +}
  5981. +EXPORT_SYMBOL_GPL(surface_sam_ssh_rqst);
  5982. +
  5983. +
  5984. +static int surface_sam_ssh_ec_resume(struct sam_ssh_ec *ec)
  5985. +{
  5986. + u8 buf[1] = { 0x00 };
  5987. +
  5988. + struct surface_sam_ssh_rqst rqst = {
  5989. + .tc = 0x01,
  5990. + .cid = 0x16,
  5991. + .iid = 0x00,
  5992. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  5993. + .snc = 0x01,
  5994. + .cdl = 0x00,
  5995. + .pld = NULL,
  5996. + };
  5997. +
  5998. + struct surface_sam_ssh_buf result = {
  5999. + result.cap = ARRAY_SIZE(buf),
  6000. + result.len = 0,
  6001. + result.data = buf,
  6002. + };
  6003. +
  6004. + int status = surface_sam_ssh_rqst_unlocked(ec, &rqst, &result);
  6005. + if (status) {
  6006. + return status;
  6007. + }
  6008. +
  6009. + if (buf[0] != 0x00) {
  6010. + dev_warn(&ec->serdev->dev,
  6011. + "unexpected result while trying to resume EC: 0x%02x\n",
  6012. + buf[0]);
  6013. + }
  6014. +
  6015. + return 0;
  6016. +}
  6017. +
  6018. +static int surface_sam_ssh_ec_suspend(struct sam_ssh_ec *ec)
  6019. +{
  6020. + u8 buf[1] = { 0x00 };
  6021. +
  6022. + struct surface_sam_ssh_rqst rqst = {
  6023. + .tc = 0x01,
  6024. + .cid = 0x15,
  6025. + .iid = 0x00,
  6026. + .pri = SURFACE_SAM_PRIORITY_NORMAL,
  6027. + .snc = 0x01,
  6028. + .cdl = 0x00,
  6029. + .pld = NULL,
  6030. + };
  6031. +
  6032. + struct surface_sam_ssh_buf result = {
  6033. + result.cap = ARRAY_SIZE(buf),
  6034. + result.len = 0,
  6035. + result.data = buf,
  6036. + };
  6037. +
  6038. + int status = surface_sam_ssh_rqst_unlocked(ec, &rqst, &result);
  6039. + if (status) {
  6040. + return status;
  6041. + }
  6042. +
  6043. + if (buf[0] != 0x00) {
  6044. + dev_warn(&ec->serdev->dev,
  6045. + "unexpected result while trying to suspend EC: 0x%02x\n",
  6046. + buf[0]);
  6047. + }
  6048. +
  6049. + return 0;
  6050. +}
  6051. +
  6052. +
  6053. +inline static bool ssh_is_valid_syn(const u8 *ptr)
  6054. +{
  6055. + return ptr[0] == 0xaa && ptr[1] == 0x55;
  6056. +}
  6057. +
  6058. +inline static bool ssh_is_valid_ter(const u8 *ptr)
  6059. +{
  6060. + return ptr[0] == 0xff && ptr[1] == 0xff;
  6061. +}
  6062. +
  6063. +inline static bool ssh_is_valid_crc(const u8 *begin, const u8 *end)
  6064. +{
  6065. + u16 crc = ssh_crc(begin, end - begin);
  6066. + return (end[0] == (crc & 0xff)) && (end[1] == (crc >> 8));
  6067. +}
  6068. +
  6069. +
  6070. +static int surface_sam_ssh_send_ack(struct sam_ssh_ec *ec, u8 seq)
  6071. +{
  6072. + int status;
  6073. + u8 buf[SSH_MSG_LEN_CTRL];
  6074. + u16 crc;
  6075. +
  6076. + buf[0] = 0xaa;
  6077. + buf[1] = 0x55;
  6078. + buf[2] = 0x40;
  6079. + buf[3] = 0x00;
  6080. + buf[4] = 0x00;
  6081. + buf[5] = seq;
  6082. +
  6083. + crc = ssh_crc(buf + SSH_FRAME_OFFS_CTRL, SSH_BYTELEN_CTRL);
  6084. + buf[6] = crc & 0xff;
  6085. + buf[7] = crc >> 8;
  6086. +
  6087. + buf[8] = 0xff;
  6088. + buf[9] = 0xff;
  6089. +
  6090. + dev_dbg(&ec->serdev->dev, "sending message\n");
  6091. + print_hex_dump_debug("send: ", DUMP_PREFIX_OFFSET, 16, 1,
  6092. + buf, SSH_MSG_LEN_CTRL, false);
  6093. +
  6094. + status = serdev_device_write(ec->serdev, buf, SSH_MSG_LEN_CTRL, SSH_WRITE_TIMEOUT);
  6095. + return status >= 0 ? 0 : status;
  6096. +}
  6097. +
  6098. +static void surface_sam_ssh_event_work_ack_handler(struct work_struct *_work)
  6099. +{
  6100. + struct surface_sam_ssh_event *event;
  6101. + struct ssh_event_work *work;
  6102. + struct sam_ssh_ec *ec;
  6103. + struct device *dev;
  6104. + int status;
  6105. +
  6106. + work = container_of(_work, struct ssh_event_work, work_ack);
  6107. + event = &work->event;
  6108. + ec = work->ec;
  6109. + dev = &ec->serdev->dev;
  6110. +
  6111. + // make sure we load a fresh ec state
  6112. + smp_mb();
  6113. +
  6114. + if (ec->state == SSH_EC_INITIALIZED) {
  6115. + status = surface_sam_ssh_send_ack(ec, work->seq);
  6116. + if (status) {
  6117. + dev_err(dev, SSH_EVENT_TAG "failed to send ACK: %d\n", status);
  6118. + }
  6119. + }
  6120. +
  6121. + if (refcount_dec_and_test(&work->refcount)) {
  6122. + kfree(work);
  6123. + }
  6124. +}
  6125. +
  6126. +static void surface_sam_ssh_event_work_evt_handler(struct work_struct *_work)
  6127. +{
  6128. + struct delayed_work *dwork = (struct delayed_work *)_work;
  6129. + struct ssh_event_work *work;
  6130. + struct surface_sam_ssh_event *event;
  6131. + struct sam_ssh_ec *ec;
  6132. + struct device *dev;
  6133. + unsigned long flags;
  6134. +
  6135. + surface_sam_ssh_event_handler_fn handler;
  6136. + void *handler_data;
  6137. +
  6138. + int status = 0;
  6139. +
  6140. + work = container_of(dwork, struct ssh_event_work, work_evt);
  6141. + event = &work->event;
  6142. + ec = work->ec;
  6143. + dev = &ec->serdev->dev;
  6144. +
  6145. + spin_lock_irqsave(&ec->events.lock, flags);
  6146. + handler = ec->events.handler[event->rqid - 1].handler;
  6147. + handler_data = ec->events.handler[event->rqid - 1].data;
  6148. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6149. +
  6150. + /*
  6151. + * During handler removal or driver release, we ensure every event gets
  6152. + * handled before return of that function. Thus a handler obtained here is
  6153. + * guaranteed to be valid at least until this function returns.
  6154. + */
  6155. +
  6156. + if (handler) {
  6157. + status = handler(event, handler_data);
  6158. + } else {
  6159. + dev_warn(dev, SSH_EVENT_TAG "unhandled event (rqid: %04x)\n", event->rqid);
  6160. + }
  6161. +
  6162. + if (status) {
  6163. + dev_err(dev, SSH_EVENT_TAG "error handling event: %d\n", status);
  6164. + }
  6165. +
  6166. + if (refcount_dec_and_test(&work->refcount)) {
  6167. + kfree(work);
  6168. + }
  6169. +}
  6170. +
  6171. +static void ssh_handle_event(struct sam_ssh_ec *ec, const u8 *buf)
  6172. +{
  6173. + struct device *dev = &ec->serdev->dev;
  6174. + const struct ssh_frame_ctrl *ctrl;
  6175. + const struct ssh_frame_cmd *cmd;
  6176. + struct ssh_event_work *work;
  6177. + unsigned long flags;
  6178. + u16 pld_len;
  6179. +
  6180. + surface_sam_ssh_event_handler_delay delay_fn;
  6181. + void *handler_data;
  6182. + unsigned long delay;
  6183. +
  6184. + ctrl = (const struct ssh_frame_ctrl *)(buf + SSH_FRAME_OFFS_CTRL);
  6185. + cmd = (const struct ssh_frame_cmd *)(buf + SSH_FRAME_OFFS_CMD);
  6186. +
  6187. + pld_len = ctrl->len - SSH_BYTELEN_CMDFRAME;
  6188. +
  6189. + work = kzalloc(sizeof(struct ssh_event_work) + pld_len, GFP_ATOMIC);
  6190. + if (!work) {
  6191. + dev_warn(dev, SSH_EVENT_TAG "failed to allocate memory, dropping event\n");
  6192. + return;
  6193. + }
  6194. +
  6195. + refcount_set(&work->refcount, 1);
  6196. + work->ec = ec;
  6197. + work->seq = ctrl->seq;
  6198. + work->event.rqid = (cmd->rqid_hi << 8) | cmd->rqid_lo;
  6199. + work->event.tc = cmd->tc;
  6200. + work->event.cid = cmd->cid;
  6201. + work->event.iid = cmd->iid;
  6202. + work->event.pri = cmd->pri_in;
  6203. + work->event.len = pld_len;
  6204. + work->event.pld = ((u8*) work) + sizeof(struct ssh_event_work);
  6205. +
  6206. + memcpy(work->event.pld, buf + SSH_FRAME_OFFS_CMD_PLD, pld_len);
  6207. +
  6208. + // queue ACK for if required
  6209. + if (ctrl->type == SSH_FRAME_TYPE_CMD) {
  6210. + refcount_set(&work->refcount, 2);
  6211. + INIT_WORK(&work->work_ack, surface_sam_ssh_event_work_ack_handler);
  6212. + queue_work(ec->events.queue_ack, &work->work_ack);
  6213. + }
  6214. +
  6215. + spin_lock_irqsave(&ec->events.lock, flags);
  6216. + handler_data = ec->events.handler[work->event.rqid - 1].data;
  6217. + delay_fn = ec->events.handler[work->event.rqid - 1].delay;
  6218. +
  6219. + /* Note:
  6220. + * We need to check delay_fn here: This may have never been set as we
  6221. + * can't guarantee that events only occur when they have been enabled.
  6222. + */
  6223. + delay = delay_fn ? delay_fn(&work->event, handler_data) : 0;
  6224. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6225. +
  6226. + // immediate execution for high priority events (e.g. keyboard)
  6227. + if (delay == SURFACE_SAM_SSH_EVENT_IMMEDIATE) {
  6228. + surface_sam_ssh_event_work_evt_handler(&work->work_evt.work);
  6229. + } else {
  6230. + INIT_DELAYED_WORK(&work->work_evt, surface_sam_ssh_event_work_evt_handler);
  6231. + queue_delayed_work(ec->events.queue_evt, &work->work_evt, delay);
  6232. + }
  6233. +}
  6234. +
  6235. +static int ssh_receive_msg_ctrl(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6236. +{
  6237. + struct device *dev = &ec->serdev->dev;
  6238. + struct ssh_receiver *rcv = &ec->receiver;
  6239. + const struct ssh_frame_ctrl *ctrl;
  6240. + struct ssh_fifo_packet packet;
  6241. +
  6242. + const u8 *ctrl_begin = buf + SSH_FRAME_OFFS_CTRL;
  6243. + const u8 *ctrl_end = buf + SSH_FRAME_OFFS_CTRL_CRC;
  6244. +
  6245. + ctrl = (const struct ssh_frame_ctrl *)(ctrl_begin);
  6246. +
  6247. + // actual length check
  6248. + if (size < SSH_MSG_LEN_CTRL) {
  6249. + return 0; // need more bytes
  6250. + }
  6251. +
  6252. + // validate TERM
  6253. + if (!ssh_is_valid_ter(buf + SSH_FRAME_OFFS_TERM)) {
  6254. + dev_err(dev, SSH_RECV_TAG "invalid end of message\n");
  6255. + return size; // discard everything
  6256. + }
  6257. +
  6258. + // validate CRC
  6259. + if (!ssh_is_valid_crc(ctrl_begin, ctrl_end)) {
  6260. + dev_err(dev, SSH_RECV_TAG "invalid checksum (ctrl)\n");
  6261. + return SSH_MSG_LEN_CTRL; // only discard message
  6262. + }
  6263. +
  6264. + // check if we expect the message
  6265. + if (rcv->state != SSH_RCV_CONTROL) {
  6266. + dev_err(dev, SSH_RECV_TAG "discarding message: ctrl not expected\n");
  6267. + return SSH_MSG_LEN_CTRL; // discard message
  6268. + }
  6269. +
  6270. + // check if it is for our request
  6271. + if (ctrl->type == SSH_FRAME_TYPE_ACK && ctrl->seq != rcv->expect.seq) {
  6272. + dev_err(dev, SSH_RECV_TAG "discarding message: ack does not match\n");
  6273. + return SSH_MSG_LEN_CTRL; // discard message
  6274. + }
  6275. +
  6276. + // we now have a valid & expected ACK/RETRY message
  6277. + dev_dbg(dev, SSH_RECV_TAG "valid control message received (type: 0x%02x)\n", ctrl->type);
  6278. +
  6279. + packet.type = ctrl->type;
  6280. + packet.seq = ctrl->seq;
  6281. + packet.len = 0;
  6282. +
  6283. + if (kfifo_avail(&rcv->fifo) >= sizeof(packet)) {
  6284. + kfifo_in(&rcv->fifo, (u8 *) &packet, sizeof(packet));
  6285. +
  6286. + } else {
  6287. + dev_warn(dev, SSH_RECV_TAG
  6288. + "dropping frame: not enough space in fifo (type = %d)\n",
  6289. + ctrl->type);
  6290. +
  6291. + return SSH_MSG_LEN_CTRL; // discard message
  6292. + }
  6293. +
  6294. + // update decoder state
  6295. + if (ctrl->type == SSH_FRAME_TYPE_ACK) {
  6296. + rcv->state = rcv->expect.pld
  6297. + ? SSH_RCV_COMMAND
  6298. + : SSH_RCV_DISCARD;
  6299. + }
  6300. +
  6301. + complete(&rcv->signal);
  6302. + return SSH_MSG_LEN_CTRL; // handled message
  6303. +}
  6304. +
  6305. +static int ssh_receive_msg_cmd(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6306. +{
  6307. + struct device *dev = &ec->serdev->dev;
  6308. + struct ssh_receiver *rcv = &ec->receiver;
  6309. + const struct ssh_frame_ctrl *ctrl;
  6310. + const struct ssh_frame_cmd *cmd;
  6311. + struct ssh_fifo_packet packet;
  6312. +
  6313. + const u8 *ctrl_begin = buf + SSH_FRAME_OFFS_CTRL;
  6314. + const u8 *ctrl_end = buf + SSH_FRAME_OFFS_CTRL_CRC;
  6315. + const u8 *cmd_begin = buf + SSH_FRAME_OFFS_CMD;
  6316. + const u8 *cmd_begin_pld = buf + SSH_FRAME_OFFS_CMD_PLD;
  6317. + const u8 *cmd_end;
  6318. +
  6319. + size_t msg_len;
  6320. +
  6321. + ctrl = (const struct ssh_frame_ctrl *)(ctrl_begin);
  6322. + cmd = (const struct ssh_frame_cmd *)(cmd_begin);
  6323. +
  6324. + // we need at least a full control frame
  6325. + if (size < (SSH_BYTELEN_SYNC + SSH_BYTELEN_CTRL + SSH_BYTELEN_CRC)) {
  6326. + return 0; // need more bytes
  6327. + }
  6328. +
  6329. + // validate control-frame CRC
  6330. + if (!ssh_is_valid_crc(ctrl_begin, ctrl_end)) {
  6331. + dev_err(dev, SSH_RECV_TAG "invalid checksum (cmd-ctrl)\n");
  6332. + /*
  6333. + * We can't be sure here if length is valid, thus
  6334. + * discard everything.
  6335. + */
  6336. + return size;
  6337. + }
  6338. +
  6339. + // actual length check (ctrl->len contains command-frame but not crc)
  6340. + msg_len = SSH_MSG_LEN_CMD_BASE + ctrl->len;
  6341. + if (size < msg_len) {
  6342. + return 0; // need more bytes
  6343. + }
  6344. +
  6345. + cmd_end = cmd_begin + ctrl->len;
  6346. +
  6347. + // validate command-frame type
  6348. + if (cmd->type != SSH_FRAME_TYPE_CMD) {
  6349. + dev_err(dev, SSH_RECV_TAG "expected command frame type but got 0x%02x\n", cmd->type);
  6350. + return size; // discard everything
  6351. + }
  6352. +
  6353. + // validate command-frame CRC
  6354. + if (!ssh_is_valid_crc(cmd_begin, cmd_end)) {
  6355. + dev_err(dev, SSH_RECV_TAG "invalid checksum (cmd-pld)\n");
  6356. +
  6357. + /*
  6358. + * The message length is provided in the control frame. As we
  6359. + * already validated that, we can be sure here that it's
  6360. + * correct, so we only need to discard the message.
  6361. + */
  6362. + return msg_len;
  6363. + }
  6364. +
  6365. + // check if we received an event notification
  6366. + if (sam_rqid_is_event((cmd->rqid_hi << 8) | cmd->rqid_lo)) {
  6367. + ssh_handle_event(ec, buf);
  6368. + return msg_len; // handled message
  6369. + }
  6370. +
  6371. + // check if we expect the message
  6372. + if (rcv->state != SSH_RCV_COMMAND) {
  6373. + dev_dbg(dev, SSH_RECV_TAG "discarding message: command not expected\n");
  6374. + return msg_len; // discard message
  6375. + }
  6376. +
  6377. + // check if response is for our request
  6378. + if (rcv->expect.rqid != (cmd->rqid_lo | (cmd->rqid_hi << 8))) {
  6379. + dev_dbg(dev, SSH_RECV_TAG "discarding message: command not a match\n");
  6380. + return msg_len; // discard message
  6381. + }
  6382. +
  6383. + // we now have a valid & expected command message
  6384. + dev_dbg(dev, SSH_RECV_TAG "valid command message received\n");
  6385. +
  6386. + packet.type = ctrl->type;
  6387. + packet.seq = ctrl->seq;
  6388. + packet.len = cmd_end - cmd_begin_pld;
  6389. +
  6390. + if (kfifo_avail(&rcv->fifo) >= sizeof(packet) + packet.len) {
  6391. + kfifo_in(&rcv->fifo, &packet, sizeof(packet));
  6392. + kfifo_in(&rcv->fifo, cmd_begin_pld, packet.len);
  6393. +
  6394. + } else {
  6395. + dev_warn(dev, SSH_RECV_TAG
  6396. + "dropping frame: not enough space in fifo (type = %d)\n",
  6397. + ctrl->type);
  6398. +
  6399. + return SSH_MSG_LEN_CTRL; // discard message
  6400. + }
  6401. +
  6402. + rcv->state = SSH_RCV_DISCARD;
  6403. +
  6404. + complete(&rcv->signal);
  6405. + return msg_len; // handled message
  6406. +}
  6407. +
  6408. +static int ssh_eval_buf(struct sam_ssh_ec *ec, const u8 *buf, size_t size)
  6409. +{
  6410. + struct device *dev = &ec->serdev->dev;
  6411. + struct ssh_frame_ctrl *ctrl;
  6412. +
  6413. + // we need at least a control frame to check what to do
  6414. + if (size < (SSH_BYTELEN_SYNC + SSH_BYTELEN_CTRL)) {
  6415. + return 0; // need more bytes
  6416. + }
  6417. +
  6418. + // make sure we're actually at the start of a new message
  6419. + if (!ssh_is_valid_syn(buf)) {
  6420. + dev_err(dev, SSH_RECV_TAG "invalid start of message\n");
  6421. + return size; // discard everything
  6422. + }
  6423. +
  6424. + // handle individual message types seperately
  6425. + ctrl = (struct ssh_frame_ctrl *)(buf + SSH_FRAME_OFFS_CTRL);
  6426. +
  6427. + switch (ctrl->type) {
  6428. + case SSH_FRAME_TYPE_ACK:
  6429. + case SSH_FRAME_TYPE_RETRY:
  6430. + return ssh_receive_msg_ctrl(ec, buf, size);
  6431. +
  6432. + case SSH_FRAME_TYPE_CMD:
  6433. + case SSH_FRAME_TYPE_CMD_NOACK:
  6434. + return ssh_receive_msg_cmd(ec, buf, size);
  6435. +
  6436. + default:
  6437. + dev_err(dev, SSH_RECV_TAG "unknown frame type 0x%02x\n", ctrl->type);
  6438. + return size; // discard everything
  6439. + }
  6440. +}
  6441. +
  6442. +static int ssh_receive_buf(struct serdev_device *serdev,
  6443. + const unsigned char *buf, size_t size)
  6444. +{
  6445. + struct sam_ssh_ec *ec = serdev_device_get_drvdata(serdev);
  6446. + struct ssh_receiver *rcv = &ec->receiver;
  6447. + unsigned long flags;
  6448. + int offs = 0;
  6449. + int used, n;
  6450. +
  6451. + dev_dbg(&serdev->dev, SSH_RECV_TAG "received buffer (size: %zu)\n", size);
  6452. + print_hex_dump_debug(SSH_RECV_TAG, DUMP_PREFIX_OFFSET, 16, 1, buf, size, false);
  6453. +
  6454. + /*
  6455. + * The battery _BIX message gets a bit long, thus we have to add some
  6456. + * additional buffering here.
  6457. + */
  6458. +
  6459. + spin_lock_irqsave(&rcv->lock, flags);
  6460. +
  6461. + // copy to eval-buffer
  6462. + used = min(size, (size_t)(rcv->eval_buf.cap - rcv->eval_buf.len));
  6463. + memcpy(rcv->eval_buf.ptr + rcv->eval_buf.len, buf, used);
  6464. + rcv->eval_buf.len += used;
  6465. +
  6466. + // evaluate buffer until we need more bytes or eval-buf is empty
  6467. + while (offs < rcv->eval_buf.len) {
  6468. + n = rcv->eval_buf.len - offs;
  6469. + n = ssh_eval_buf(ec, rcv->eval_buf.ptr + offs, n);
  6470. + if (n <= 0) break; // need more bytes
  6471. +
  6472. + offs += n;
  6473. + }
  6474. +
  6475. + // throw away the evaluated parts
  6476. + rcv->eval_buf.len -= offs;
  6477. + memmove(rcv->eval_buf.ptr, rcv->eval_buf.ptr + offs, rcv->eval_buf.len);
  6478. +
  6479. + spin_unlock_irqrestore(&rcv->lock, flags);
  6480. +
  6481. + return used;
  6482. +}
  6483. +
  6484. +
  6485. +#ifdef CONFIG_SURFACE_SAM_SSH_DEBUG_DEVICE
  6486. +
  6487. +#include <linux/sysfs.h>
  6488. +
  6489. +static char sam_ssh_debug_rqst_buf_sysfs[SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1] = { 0 };
  6490. +static char sam_ssh_debug_rqst_buf_pld[SURFACE_SAM_SSH_MAX_RQST_PAYLOAD] = { 0 };
  6491. +static char sam_ssh_debug_rqst_buf_res[SURFACE_SAM_SSH_MAX_RQST_RESPONSE] = { 0 };
  6492. +
  6493. +struct sysfs_rqst {
  6494. + u8 tc;
  6495. + u8 cid;
  6496. + u8 iid;
  6497. + u8 pri;
  6498. + u8 snc;
  6499. + u8 cdl;
  6500. + u8 pld[0];
  6501. +} __packed;
  6502. +
  6503. +static ssize_t rqst_read(struct file *f, struct kobject *kobj, struct bin_attribute *attr,
  6504. + char *buf, loff_t offs, size_t count)
  6505. +{
  6506. + if (offs < 0 || count + offs > SURFACE_SAM_SSH_MAX_RQST_RESPONSE) {
  6507. + return -EINVAL;
  6508. + }
  6509. +
  6510. + memcpy(buf, sam_ssh_debug_rqst_buf_sysfs + offs, count);
  6511. + return count;
  6512. +}
  6513. +
  6514. +static ssize_t rqst_write(struct file *f, struct kobject *kobj, struct bin_attribute *attr,
  6515. + char *buf, loff_t offs, size_t count)
  6516. +{
  6517. + struct sysfs_rqst *input;
  6518. + struct surface_sam_ssh_rqst rqst = {};
  6519. + struct surface_sam_ssh_buf result = {};
  6520. + int status;
  6521. +
  6522. + // check basic write constriants
  6523. + if (offs != 0 || count > SURFACE_SAM_SSH_MAX_RQST_PAYLOAD + sizeof(struct sysfs_rqst)) {
  6524. + return -EINVAL;
  6525. + }
  6526. +
  6527. + if (count < sizeof(struct sysfs_rqst)) {
  6528. + return -EINVAL;
  6529. + }
  6530. +
  6531. + input = (struct sysfs_rqst *)buf;
  6532. +
  6533. + // payload length should be consistent with data provided
  6534. + if (input->cdl + sizeof(struct sysfs_rqst) != count) {
  6535. + return -EINVAL;
  6536. + }
  6537. +
  6538. + rqst.tc = input->tc;
  6539. + rqst.cid = input->cid;
  6540. + rqst.iid = input->iid;
  6541. + rqst.pri = input->pri;
  6542. + rqst.snc = input->snc;
  6543. + rqst.cdl = input->cdl;
  6544. + rqst.pld = sam_ssh_debug_rqst_buf_pld;
  6545. + memcpy(sam_ssh_debug_rqst_buf_pld, &input->pld[0], input->cdl);
  6546. +
  6547. + result.cap = SURFACE_SAM_SSH_MAX_RQST_RESPONSE;
  6548. + result.len = 0;
  6549. + result.data = sam_ssh_debug_rqst_buf_res;
  6550. +
  6551. + status = surface_sam_ssh_rqst(&rqst, &result);
  6552. + if (status) {
  6553. + return status;
  6554. + }
  6555. +
  6556. + sam_ssh_debug_rqst_buf_sysfs[0] = result.len;
  6557. + memcpy(sam_ssh_debug_rqst_buf_sysfs + 1, result.data, result.len);
  6558. + memset(sam_ssh_debug_rqst_buf_sysfs + result.len + 1, 0,
  6559. + SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1 - result.len);
  6560. +
  6561. + return count;
  6562. +}
  6563. +
  6564. +static const BIN_ATTR_RW(rqst, SURFACE_SAM_SSH_MAX_RQST_RESPONSE + 1);
  6565. +
  6566. +
  6567. +int surface_sam_ssh_sysfs_register(struct device *dev)
  6568. +{
  6569. + return sysfs_create_bin_file(&dev->kobj, &bin_attr_rqst);
  6570. +}
  6571. +
  6572. +void surface_sam_ssh_sysfs_unregister(struct device *dev)
  6573. +{
  6574. + sysfs_remove_bin_file(&dev->kobj, &bin_attr_rqst);
  6575. +}
  6576. +
  6577. +#else /* CONFIG_SURFACE_ACPI_SSH_DEBUG_DEVICE */
  6578. +
  6579. +int surface_sam_ssh_sysfs_register(struct device *dev)
  6580. +{
  6581. + return 0;
  6582. +}
  6583. +
  6584. +void surface_sam_ssh_sysfs_unregister(struct device *dev)
  6585. +{
  6586. +}
  6587. +
  6588. +#endif /* CONFIG_SURFACE_SAM_SSH_DEBUG_DEVICE */
  6589. +
  6590. +
  6591. +static const struct acpi_gpio_params gpio_sam_wakeup_int = { 0, 0, false };
  6592. +static const struct acpi_gpio_params gpio_sam_wakeup = { 1, 0, false };
  6593. +
  6594. +static const struct acpi_gpio_mapping surface_sam_acpi_gpios[] = {
  6595. + { "sam_wakeup-int-gpio", &gpio_sam_wakeup_int, 1 },
  6596. + { "sam_wakeup-gpio", &gpio_sam_wakeup, 1 },
  6597. + { },
  6598. +};
  6599. +
  6600. +static irqreturn_t surface_sam_irq_handler(int irq, void *dev_id)
  6601. +{
  6602. + struct serdev_device *serdev = dev_id;
  6603. +
  6604. + dev_info(&serdev->dev, "wake irq triggered\n");
  6605. + return IRQ_HANDLED;
  6606. +}
  6607. +
  6608. +static int surface_sam_setup_irq(struct serdev_device *serdev)
  6609. +{
  6610. + const int irqf = IRQF_SHARED | IRQF_ONESHOT | IRQF_TRIGGER_RISING;
  6611. + struct gpio_desc *gpiod;
  6612. + int irq;
  6613. + int status;
  6614. +
  6615. + gpiod = gpiod_get(&serdev->dev, "sam_wakeup-int", GPIOD_ASIS);
  6616. + if (IS_ERR(gpiod))
  6617. + return PTR_ERR(gpiod);
  6618. +
  6619. + irq = gpiod_to_irq(gpiod);
  6620. + gpiod_put(gpiod);
  6621. +
  6622. + if (irq < 0)
  6623. + return irq;
  6624. +
  6625. + status = request_threaded_irq(irq, NULL, surface_sam_irq_handler,
  6626. + irqf, "surface_sam_wakeup", serdev);
  6627. + if (status)
  6628. + return status;
  6629. +
  6630. + return irq;
  6631. +}
  6632. +
  6633. +
  6634. +static acpi_status
  6635. +ssh_setup_from_resource(struct acpi_resource *resource, void *context)
  6636. +{
  6637. + struct serdev_device *serdev = context;
  6638. + struct acpi_resource_common_serialbus *serial;
  6639. + struct acpi_resource_uart_serialbus *uart;
  6640. + int status = 0;
  6641. +
  6642. + if (resource->type != ACPI_RESOURCE_TYPE_SERIAL_BUS) {
  6643. + return AE_OK;
  6644. + }
  6645. +
  6646. + serial = &resource->data.common_serial_bus;
  6647. + if (serial->type != ACPI_RESOURCE_SERIAL_TYPE_UART) {
  6648. + return AE_OK;
  6649. + }
  6650. +
  6651. + uart = &resource->data.uart_serial_bus;
  6652. +
  6653. + // set up serdev device
  6654. + serdev_device_set_baudrate(serdev, uart->default_baud_rate);
  6655. +
  6656. + // serdev currently only supports RTSCTS flow control
  6657. + if (uart->flow_control & SSH_SUPPORTED_FLOW_CONTROL_MASK) {
  6658. + dev_warn(&serdev->dev, "unsupported flow control (value: 0x%02x)\n", uart->flow_control);
  6659. + }
  6660. +
  6661. + // set RTSCTS flow control
  6662. + serdev_device_set_flow_control(serdev, uart->flow_control & ACPI_UART_FLOW_CONTROL_HW);
  6663. +
  6664. + // serdev currently only supports EVEN/ODD parity
  6665. + switch (uart->parity) {
  6666. + case ACPI_UART_PARITY_NONE:
  6667. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE);
  6668. + break;
  6669. + case ACPI_UART_PARITY_EVEN:
  6670. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_EVEN);
  6671. + break;
  6672. + case ACPI_UART_PARITY_ODD:
  6673. + status = serdev_device_set_parity(serdev, SERDEV_PARITY_ODD);
  6674. + break;
  6675. + default:
  6676. + dev_warn(&serdev->dev, "unsupported parity (value: 0x%02x)\n", uart->parity);
  6677. + break;
  6678. + }
  6679. +
  6680. + if (status) {
  6681. + dev_err(&serdev->dev, "failed to set parity (value: 0x%02x)\n", uart->parity);
  6682. + return status;
  6683. + }
  6684. +
  6685. + return AE_CTRL_TERMINATE; // we've found the resource and are done
  6686. +}
  6687. +
  6688. +
  6689. +static int surface_sam_ssh_suspend(struct device *dev)
  6690. +{
  6691. + struct sam_ssh_ec *ec;
  6692. + int status;
  6693. +
  6694. + dev_dbg(dev, "suspending\n");
  6695. +
  6696. + ec = surface_sam_ssh_acquire_init();
  6697. + if (ec) {
  6698. + status = surface_sam_ssh_ec_suspend(ec);
  6699. + if (status) {
  6700. + surface_sam_ssh_release(ec);
  6701. + return status;
  6702. + }
  6703. +
  6704. + if (device_may_wakeup(dev)) {
  6705. + status = enable_irq_wake(ec->irq);
  6706. + if (status) {
  6707. + surface_sam_ssh_release(ec);
  6708. + return status;
  6709. + }
  6710. +
  6711. + ec->irq_wakeup_enabled = true;
  6712. + } else {
  6713. + ec->irq_wakeup_enabled = false;
  6714. + }
  6715. +
  6716. + ec->state = SSH_EC_SUSPENDED;
  6717. + surface_sam_ssh_release(ec);
  6718. + }
  6719. +
  6720. + return 0;
  6721. +}
  6722. +
  6723. +static int surface_sam_ssh_resume(struct device *dev)
  6724. +{
  6725. + struct sam_ssh_ec *ec;
  6726. + int status;
  6727. +
  6728. + dev_dbg(dev, "resuming\n");
  6729. +
  6730. + ec = surface_sam_ssh_acquire_init();
  6731. + if (ec) {
  6732. + ec->state = SSH_EC_INITIALIZED;
  6733. +
  6734. + if (ec->irq_wakeup_enabled) {
  6735. + status = disable_irq_wake(ec->irq);
  6736. + if (status) {
  6737. + surface_sam_ssh_release(ec);
  6738. + return status;
  6739. + }
  6740. +
  6741. + ec->irq_wakeup_enabled = false;
  6742. + }
  6743. +
  6744. + status = surface_sam_ssh_ec_resume(ec);
  6745. + if (status) {
  6746. + surface_sam_ssh_release(ec);
  6747. + return status;
  6748. + }
  6749. +
  6750. + surface_sam_ssh_release(ec);
  6751. + }
  6752. +
  6753. + return 0;
  6754. +}
  6755. +
  6756. +static SIMPLE_DEV_PM_OPS(surface_sam_ssh_pm_ops, surface_sam_ssh_suspend, surface_sam_ssh_resume);
  6757. +
  6758. +
  6759. +static const struct serdev_device_ops ssh_device_ops = {
  6760. + .receive_buf = ssh_receive_buf,
  6761. + .write_wakeup = serdev_device_write_wakeup,
  6762. +};
  6763. +
  6764. +
  6765. +int surface_sam_ssh_sysfs_register(struct device *dev);
  6766. +void surface_sam_ssh_sysfs_unregister(struct device *dev);
  6767. +
  6768. +static int surface_sam_ssh_probe(struct serdev_device *serdev)
  6769. +{
  6770. + struct sam_ssh_ec *ec;
  6771. + struct workqueue_struct *event_queue_ack;
  6772. + struct workqueue_struct *event_queue_evt;
  6773. + u8 *write_buf;
  6774. + u8 *read_buf;
  6775. + u8 *eval_buf;
  6776. + acpi_handle *ssh = ACPI_HANDLE(&serdev->dev);
  6777. + acpi_status status;
  6778. + int irq;
  6779. +
  6780. + dev_dbg(&serdev->dev, "probing\n");
  6781. +
  6782. + if (gpiod_count(&serdev->dev, NULL) < 0)
  6783. + return -ENODEV;
  6784. +
  6785. + status = devm_acpi_dev_add_driver_gpios(&serdev->dev, surface_sam_acpi_gpios);
  6786. + if (status)
  6787. + return status;
  6788. +
  6789. + // allocate buffers
  6790. + write_buf = kzalloc(SSH_WRITE_BUF_LEN, GFP_KERNEL);
  6791. + if (!write_buf) {
  6792. + status = -ENOMEM;
  6793. + goto err_write_buf;
  6794. + }
  6795. +
  6796. + read_buf = kzalloc(SSH_READ_BUF_LEN, GFP_KERNEL);
  6797. + if (!read_buf) {
  6798. + status = -ENOMEM;
  6799. + goto err_read_buf;
  6800. + }
  6801. +
  6802. + eval_buf = kzalloc(SSH_EVAL_BUF_LEN, GFP_KERNEL);
  6803. + if (!eval_buf) {
  6804. + status = -ENOMEM;
  6805. + goto err_eval_buf;
  6806. + }
  6807. +
  6808. + event_queue_ack = create_singlethread_workqueue("surface_sh_ackq");
  6809. + if (!event_queue_ack) {
  6810. + status = -ENOMEM;
  6811. + goto err_ackq;
  6812. + }
  6813. +
  6814. + event_queue_evt = create_workqueue("surface_sh_evtq");
  6815. + if (!event_queue_evt) {
  6816. + status = -ENOMEM;
  6817. + goto err_evtq;
  6818. + }
  6819. +
  6820. + irq = surface_sam_setup_irq(serdev);
  6821. + if (irq < 0) {
  6822. + status = irq;
  6823. + goto err_irq;
  6824. + }
  6825. +
  6826. + // set up EC
  6827. + ec = surface_sam_ssh_acquire();
  6828. + if (ec->state != SSH_EC_UNINITIALIZED) {
  6829. + dev_err(&serdev->dev, "embedded controller already initialized\n");
  6830. + surface_sam_ssh_release(ec);
  6831. +
  6832. + status = -EBUSY;
  6833. + goto err_busy;
  6834. + }
  6835. +
  6836. + ec->serdev = serdev;
  6837. + ec->irq = irq;
  6838. + ec->writer.data = write_buf;
  6839. + ec->writer.ptr = write_buf;
  6840. +
  6841. + // initialize receiver
  6842. + init_completion(&ec->receiver.signal);
  6843. + kfifo_init(&ec->receiver.fifo, read_buf, SSH_READ_BUF_LEN);
  6844. + ec->receiver.eval_buf.ptr = eval_buf;
  6845. + ec->receiver.eval_buf.cap = SSH_EVAL_BUF_LEN;
  6846. + ec->receiver.eval_buf.len = 0;
  6847. +
  6848. + // initialize event handling
  6849. + ec->events.queue_ack = event_queue_ack;
  6850. + ec->events.queue_evt = event_queue_evt;
  6851. +
  6852. + ec->state = SSH_EC_INITIALIZED;
  6853. +
  6854. + serdev_device_set_drvdata(serdev, ec);
  6855. +
  6856. + // ensure everything is properly set-up before we open the device
  6857. + smp_mb();
  6858. +
  6859. + serdev_device_set_client_ops(serdev, &ssh_device_ops);
  6860. + status = serdev_device_open(serdev);
  6861. + if (status) {
  6862. + goto err_open;
  6863. + }
  6864. +
  6865. + status = acpi_walk_resources(ssh, METHOD_NAME__CRS,
  6866. + ssh_setup_from_resource, serdev);
  6867. + if (ACPI_FAILURE(status)) {
  6868. + goto err_devinit;
  6869. + }
  6870. +
  6871. + status = surface_sam_ssh_ec_resume(ec);
  6872. + if (status) {
  6873. + goto err_devinit;
  6874. + }
  6875. +
  6876. + status = surface_sam_ssh_sysfs_register(&serdev->dev);
  6877. + if (status) {
  6878. + goto err_devinit;
  6879. + }
  6880. +
  6881. + surface_sam_ssh_release(ec);
  6882. +
  6883. + // TODO: The EC can wake up the system via the associated GPIO interrupt in
  6884. + // multiple situations. One of which is the remaining battery capacity
  6885. + // falling below a certain threshold. Normally, we should use the
  6886. + // device_init_wakeup function, however, the EC also seems to have other
  6887. + // reasons for waking up the system and it seems that Windows has
  6888. + // additional checks whether the system should be resumed. In short, this
  6889. + // causes some spourious unwanted wake-ups. For now let's thus default
  6890. + // power/wakeup to false.
  6891. + device_set_wakeup_capable(&serdev->dev, true);
  6892. + acpi_walk_dep_device_list(ssh);
  6893. +
  6894. + return 0;
  6895. +
  6896. +err_devinit:
  6897. + serdev_device_close(serdev);
  6898. +err_open:
  6899. + ec->state = SSH_EC_UNINITIALIZED;
  6900. + serdev_device_set_drvdata(serdev, NULL);
  6901. + surface_sam_ssh_release(ec);
  6902. +err_busy:
  6903. + free_irq(irq, serdev);
  6904. +err_irq:
  6905. + destroy_workqueue(event_queue_evt);
  6906. +err_evtq:
  6907. + destroy_workqueue(event_queue_ack);
  6908. +err_ackq:
  6909. + kfree(eval_buf);
  6910. +err_eval_buf:
  6911. + kfree(read_buf);
  6912. +err_read_buf:
  6913. + kfree(write_buf);
  6914. +err_write_buf:
  6915. + return status;
  6916. +}
  6917. +
  6918. +static void surface_sam_ssh_remove(struct serdev_device *serdev)
  6919. +{
  6920. + struct sam_ssh_ec *ec;
  6921. + unsigned long flags;
  6922. + int status;
  6923. +
  6924. + ec = surface_sam_ssh_acquire_init();
  6925. + if (!ec) {
  6926. + return;
  6927. + }
  6928. +
  6929. + free_irq(ec->irq, serdev);
  6930. + surface_sam_ssh_sysfs_unregister(&serdev->dev);
  6931. +
  6932. + // suspend EC and disable events
  6933. + status = surface_sam_ssh_ec_suspend(ec);
  6934. + if (status) {
  6935. + dev_err(&serdev->dev, "failed to suspend EC: %d\n", status);
  6936. + }
  6937. +
  6938. + // make sure all events (received up to now) have been properly handled
  6939. + flush_workqueue(ec->events.queue_ack);
  6940. + flush_workqueue(ec->events.queue_evt);
  6941. +
  6942. + // remove event handlers
  6943. + spin_lock_irqsave(&ec->events.lock, flags);
  6944. + memset(ec->events.handler, 0,
  6945. + sizeof(struct ssh_event_handler)
  6946. + * SAM_NUM_EVENT_TYPES);
  6947. + spin_unlock_irqrestore(&ec->events.lock, flags);
  6948. +
  6949. + // set device to deinitialized state
  6950. + ec->state = SSH_EC_UNINITIALIZED;
  6951. + ec->serdev = NULL;
  6952. +
  6953. + // ensure state and serdev get set before continuing
  6954. + smp_mb();
  6955. +
  6956. + /*
  6957. + * Flush any event that has not been processed yet to ensure we're not going to
  6958. + * use the serial device any more (e.g. for ACKing).
  6959. + */
  6960. + flush_workqueue(ec->events.queue_ack);
  6961. + flush_workqueue(ec->events.queue_evt);
  6962. +
  6963. + serdev_device_close(serdev);
  6964. +
  6965. + /*
  6966. + * Only at this point, no new events can be received. Destroying the
  6967. + * workqueue here flushes all remaining events. Those events will be
  6968. + * silently ignored and neither ACKed nor any handler gets called.
  6969. + */
  6970. + destroy_workqueue(ec->events.queue_ack);
  6971. + destroy_workqueue(ec->events.queue_evt);
  6972. +
  6973. + // free writer
  6974. + kfree(ec->writer.data);
  6975. + ec->writer.data = NULL;
  6976. + ec->writer.ptr = NULL;
  6977. +
  6978. + // free receiver
  6979. + spin_lock_irqsave(&ec->receiver.lock, flags);
  6980. + ec->receiver.state = SSH_RCV_DISCARD;
  6981. + kfifo_free(&ec->receiver.fifo);
  6982. +
  6983. + kfree(ec->receiver.eval_buf.ptr);
  6984. + ec->receiver.eval_buf.ptr = NULL;
  6985. + ec->receiver.eval_buf.cap = 0;
  6986. + ec->receiver.eval_buf.len = 0;
  6987. + spin_unlock_irqrestore(&ec->receiver.lock, flags);
  6988. +
  6989. + device_set_wakeup_capable(&serdev->dev, false);
  6990. + serdev_device_set_drvdata(serdev, NULL);
  6991. + surface_sam_ssh_release(ec);
  6992. +}
  6993. +
  6994. +
  6995. +static const struct acpi_device_id surface_sam_ssh_match[] = {
  6996. + { "MSHW0084", 0 },
  6997. + { },
  6998. +};
  6999. +MODULE_DEVICE_TABLE(acpi, surface_sam_ssh_match);
  7000. +
  7001. +static struct serdev_device_driver surface_sam_ssh = {
  7002. + .probe = surface_sam_ssh_probe,
  7003. + .remove = surface_sam_ssh_remove,
  7004. + .driver = {
  7005. + .name = "surface_sam_ssh",
  7006. + .acpi_match_table = ACPI_PTR(surface_sam_ssh_match),
  7007. + .pm = &surface_sam_ssh_pm_ops,
  7008. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  7009. + },
  7010. +};
  7011. +
  7012. +
  7013. +static int __init surface_sam_ssh_init(void)
  7014. +{
  7015. + return serdev_device_driver_register(&surface_sam_ssh);
  7016. +}
  7017. +
  7018. +static void __exit surface_sam_ssh_exit(void)
  7019. +{
  7020. + serdev_device_driver_unregister(&surface_sam_ssh);
  7021. +}
  7022. +
  7023. +/*
  7024. + * Ensure that the driver is loaded late due to some issues with the UART
  7025. + * communication. Specifically, we want to ensure that DMA is ready and being
  7026. + * used. Not using DMA can result in spurious communication failures,
  7027. + * especially during boot, which among other things will result in wrong
  7028. + * battery information (via ACPI _BIX) being displayed. Using a late init_call
  7029. + * instead of the normal module_init gives the DMA subsystem time to
  7030. + * initialize and via that results in a more stable communication, avoiding
  7031. + * such failures.
  7032. + */
  7033. +late_initcall(surface_sam_ssh_init);
  7034. +module_exit(surface_sam_ssh_exit);
  7035. +
  7036. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  7037. +MODULE_DESCRIPTION("Surface Serial Hub Driver for 5th Generation Surface Devices");
  7038. +MODULE_LICENSE("GPL v2");
  7039. diff --git a/drivers/platform/x86/surface_sam/surface_sam_ssh.h b/drivers/platform/x86/surface_sam/surface_sam_ssh.h
  7040. new file mode 100644
  7041. index 000000000000..714bba6a9457
  7042. --- /dev/null
  7043. +++ b/drivers/platform/x86/surface_sam/surface_sam_ssh.h
  7044. @@ -0,0 +1,97 @@
  7045. +/*
  7046. + * Interface for Surface Serial Hub (SSH).
  7047. + *
  7048. + * The SSH is the main communication hub for communication between host and
  7049. + * the Surface/System Aggregator Module (SAM) on newer Microsoft Surface
  7050. + * devices (Book 2, Pro 5, Laptops, ...). Also referred to as SAM-over-SSH.
  7051. + * Older devices (Book 1, Pro 4) use SAM-over-I2C.
  7052. + */
  7053. +
  7054. +#ifndef _SURFACE_SAM_SSH_H
  7055. +#define _SURFACE_SAM_SSH_H
  7056. +
  7057. +#include <linux/types.h>
  7058. +#include <linux/device.h>
  7059. +
  7060. +
  7061. +/*
  7062. + * Maximum request payload size in bytes.
  7063. + * Value based on ACPI (255 bytes minus header/status bytes).
  7064. + */
  7065. +#define SURFACE_SAM_SSH_MAX_RQST_PAYLOAD (255 - 10)
  7066. +
  7067. +/*
  7068. + * Maximum response payload size in bytes.
  7069. + * Value based on ACPI (255 bytes minus header/status bytes).
  7070. + */
  7071. +#define SURFACE_SAM_SSH_MAX_RQST_RESPONSE (255 - 4)
  7072. +
  7073. +/*
  7074. + * The number of (lower) bits of the request ID (RQID) reserved for events.
  7075. + * These bits may only be used exclusively for events sent from the EC to the
  7076. + * host.
  7077. + */
  7078. +#define SURFACE_SAM_SSH_RQID_EVENT_BITS 5
  7079. +
  7080. +/*
  7081. + * Special event-handler delay value indicating that the corresponding event
  7082. + * should be handled immediately in the interrupt and not be relayed through
  7083. + * the workqueue. Intended for low-latency events, such as keyboard events.
  7084. + */
  7085. +#define SURFACE_SAM_SSH_EVENT_IMMEDIATE ((unsigned long) -1)
  7086. +
  7087. +
  7088. +#define SURFACE_SAM_PRIORITY_NORMAL 1
  7089. +#define SURFACE_SAM_PRIORITY_HIGH 2
  7090. +
  7091. +
  7092. +struct surface_sam_ssh_buf {
  7093. + u8 cap;
  7094. + u8 len;
  7095. + u8 *data;
  7096. +};
  7097. +
  7098. +struct surface_sam_ssh_rqst {
  7099. + u8 tc; // target category
  7100. + u8 cid; // command ID
  7101. + u8 iid; // instance ID
  7102. + u8 pri; // priority
  7103. + u8 snc; // expect response flag
  7104. + u8 cdl; // command data length (lenght of payload)
  7105. + u8 *pld; // pointer to payload of length cdl
  7106. +};
  7107. +
  7108. +struct surface_sam_ssh_event {
  7109. + u16 rqid; // event type/source ID
  7110. + u8 tc; // target category
  7111. + u8 cid; // command ID
  7112. + u8 iid; // instance ID
  7113. + u8 pri; // priority
  7114. + u8 len; // length of payload
  7115. + u8 *pld; // payload of length len
  7116. +};
  7117. +
  7118. +
  7119. +typedef int (*surface_sam_ssh_event_handler_fn)(struct surface_sam_ssh_event *event, void *data);
  7120. +typedef unsigned long (*surface_sam_ssh_event_handler_delay)(struct surface_sam_ssh_event *event, void *data);
  7121. +
  7122. +int surface_sam_ssh_consumer_register(struct device *consumer);
  7123. +
  7124. +int surface_sam_ssh_rqst(const struct surface_sam_ssh_rqst *rqst, struct surface_sam_ssh_buf *result);
  7125. +
  7126. +int surface_sam_ssh_enable_event_source(u8 tc, u8 unknown, u16 rqid);
  7127. +int surface_sam_ssh_disable_event_source(u8 tc, u8 unknown, u16 rqid);
  7128. +int surface_sam_ssh_remove_event_handler(u16 rqid);
  7129. +
  7130. +int surface_sam_ssh_set_delayed_event_handler(u16 rqid,
  7131. + surface_sam_ssh_event_handler_fn fn,
  7132. + surface_sam_ssh_event_handler_delay delay,
  7133. + void *data);
  7134. +
  7135. +static inline int surface_sam_ssh_set_event_handler(u16 rqid, surface_sam_ssh_event_handler_fn fn, void *data)
  7136. +{
  7137. + return surface_sam_ssh_set_delayed_event_handler(rqid, fn, NULL, data);
  7138. +}
  7139. +
  7140. +
  7141. +#endif /* _SURFACE_SAM_SSH_H */
  7142. diff --git a/drivers/platform/x86/surface_sam/surface_sam_vhf.c b/drivers/platform/x86/surface_sam/surface_sam_vhf.c
  7143. new file mode 100644
  7144. index 000000000000..0ed0ebbdb3cb
  7145. --- /dev/null
  7146. +++ b/drivers/platform/x86/surface_sam/surface_sam_vhf.c
  7147. @@ -0,0 +1,276 @@
  7148. +/*
  7149. + * Virtual HID Framwork (VHF) driver for input events via SAM.
  7150. + * Used for keyboard input events on the Surface Laptops.
  7151. + */
  7152. +
  7153. +#include <linux/acpi.h>
  7154. +#include <linux/hid.h>
  7155. +#include <linux/input.h>
  7156. +#include <linux/platform_device.h>
  7157. +#include <linux/types.h>
  7158. +
  7159. +#include "surface_sam_ssh.h"
  7160. +
  7161. +
  7162. +#define USB_VENDOR_ID_MICROSOFT 0x045e
  7163. +#define USB_DEVICE_ID_MS_VHF 0xf001
  7164. +
  7165. +#define VHF_INPUT_NAME "Microsoft Virtual HID Framework Device"
  7166. +
  7167. +/*
  7168. + * Request ID for VHF events. This value is based on the output of the Surface
  7169. + * EC and should not be changed.
  7170. + */
  7171. +#define SAM_EVENT_VHF_RQID 0x0001
  7172. +#define SAM_EVENT_VHF_TC 0x08
  7173. +
  7174. +
  7175. +struct vhf_evtctx {
  7176. + struct device *dev;
  7177. + struct hid_device *hid;
  7178. +};
  7179. +
  7180. +struct vhf_drvdata {
  7181. + struct vhf_evtctx event_ctx;
  7182. +};
  7183. +
  7184. +
  7185. +/*
  7186. + * These report descriptors have been extracted from a Surface Book 2.
  7187. + * They seems to be similar enough to be usable on the Surface Laptop.
  7188. + */
  7189. +static const u8 vhf_hid_desc[] = {
  7190. + // keyboard descriptor (event command ID 0x03)
  7191. + 0x05, 0x01, /* Usage Page (Desktop), */
  7192. + 0x09, 0x06, /* Usage (Keyboard), */
  7193. + 0xA1, 0x01, /* Collection (Application), */
  7194. + 0x85, 0x01, /* Report ID (1), */
  7195. + 0x15, 0x00, /* Logical Minimum (0), */
  7196. + 0x25, 0x01, /* Logical Maximum (1), */
  7197. + 0x75, 0x01, /* Report Size (1), */
  7198. + 0x95, 0x08, /* Report Count (8), */
  7199. + 0x05, 0x07, /* Usage Page (Keyboard), */
  7200. + 0x19, 0xE0, /* Usage Minimum (KB Leftcontrol), */
  7201. + 0x29, 0xE7, /* Usage Maximum (KB Right GUI), */
  7202. + 0x81, 0x02, /* Input (Variable), */
  7203. + 0x75, 0x08, /* Report Size (8), */
  7204. + 0x95, 0x0A, /* Report Count (10), */
  7205. + 0x19, 0x00, /* Usage Minimum (None), */
  7206. + 0x29, 0x91, /* Usage Maximum (KB LANG2), */
  7207. + 0x26, 0xFF, 0x00, /* Logical Maximum (255), */
  7208. + 0x81, 0x00, /* Input, */
  7209. + 0x05, 0x0C, /* Usage Page (Consumer), */
  7210. + 0x0A, 0xC0, 0x02, /* Usage (02C0h), */
  7211. + 0xA1, 0x02, /* Collection (Logical), */
  7212. + 0x1A, 0xC1, 0x02, /* Usage Minimum (02C1h), */
  7213. + 0x2A, 0xC6, 0x02, /* Usage Maximum (02C6h), */
  7214. + 0x95, 0x06, /* Report Count (6), */
  7215. + 0xB1, 0x03, /* Feature (Constant, Variable), */
  7216. + 0xC0, /* End Collection, */
  7217. + 0x05, 0x08, /* Usage Page (LED), */
  7218. + 0x19, 0x01, /* Usage Minimum (01h), */
  7219. + 0x29, 0x03, /* Usage Maximum (03h), */
  7220. + 0x75, 0x01, /* Report Size (1), */
  7221. + 0x95, 0x03, /* Report Count (3), */
  7222. + 0x25, 0x01, /* Logical Maximum (1), */
  7223. + 0x91, 0x02, /* Output (Variable), */
  7224. + 0x95, 0x05, /* Report Count (5), */
  7225. + 0x91, 0x01, /* Output (Constant), */
  7226. + 0xC0, /* End Collection, */
  7227. +
  7228. + // media key descriptor (event command ID 0x04)
  7229. + 0x05, 0x0C, /* Usage Page (Consumer), */
  7230. + 0x09, 0x01, /* Usage (Consumer Control), */
  7231. + 0xA1, 0x01, /* Collection (Application), */
  7232. + 0x85, 0x03, /* Report ID (3), */
  7233. + 0x75, 0x10, /* Report Size (16), */
  7234. + 0x15, 0x00, /* Logical Minimum (0), */
  7235. + 0x26, 0xFF, 0x03, /* Logical Maximum (1023), */
  7236. + 0x19, 0x00, /* Usage Minimum (00h), */
  7237. + 0x2A, 0xFF, 0x03, /* Usage Maximum (03FFh), */
  7238. + 0x81, 0x00, /* Input, */
  7239. + 0xC0, /* End Collection, */
  7240. +};
  7241. +
  7242. +
  7243. +static int vhf_hid_start(struct hid_device *hid)
  7244. +{
  7245. + hid_dbg(hid, "%s\n", __func__);
  7246. + return 0;
  7247. +}
  7248. +
  7249. +static void vhf_hid_stop(struct hid_device *hid)
  7250. +{
  7251. + hid_dbg(hid, "%s\n", __func__);
  7252. +}
  7253. +
  7254. +static int vhf_hid_open(struct hid_device *hid)
  7255. +{
  7256. + hid_dbg(hid, "%s\n", __func__);
  7257. + return 0;
  7258. +}
  7259. +
  7260. +static void vhf_hid_close(struct hid_device *hid)
  7261. +{
  7262. + hid_dbg(hid, "%s\n", __func__);
  7263. +}
  7264. +
  7265. +static int vhf_hid_parse(struct hid_device *hid)
  7266. +{
  7267. + return hid_parse_report(hid, (u8 *)vhf_hid_desc, ARRAY_SIZE(vhf_hid_desc));
  7268. +}
  7269. +
  7270. +static int vhf_hid_raw_request(struct hid_device *hid, unsigned char reportnum,
  7271. + u8 *buf, size_t len, unsigned char rtype,
  7272. + int reqtype)
  7273. +{
  7274. + hid_dbg(hid, "%s\n", __func__);
  7275. + return 0;
  7276. +}
  7277. +
  7278. +static int vhf_hid_output_report(struct hid_device *hid, u8 *buf, size_t len)
  7279. +{
  7280. + hid_dbg(hid, "%s\n", __func__);
  7281. + print_hex_dump_debug("report:", DUMP_PREFIX_OFFSET, 16, 1, buf, len, false);
  7282. +
  7283. + return len;
  7284. +}
  7285. +
  7286. +static struct hid_ll_driver vhf_hid_ll_driver = {
  7287. + .start = vhf_hid_start,
  7288. + .stop = vhf_hid_stop,
  7289. + .open = vhf_hid_open,
  7290. + .close = vhf_hid_close,
  7291. + .parse = vhf_hid_parse,
  7292. + .raw_request = vhf_hid_raw_request,
  7293. + .output_report = vhf_hid_output_report,
  7294. +};
  7295. +
  7296. +
  7297. +static struct hid_device *vhf_create_hid_device(struct platform_device *pdev)
  7298. +{
  7299. + struct hid_device *hid;
  7300. +
  7301. + hid = hid_allocate_device();
  7302. + if (IS_ERR(hid)) {
  7303. + return hid;
  7304. + }
  7305. +
  7306. + hid->dev.parent = &pdev->dev;
  7307. +
  7308. + hid->bus = BUS_VIRTUAL;
  7309. + hid->vendor = USB_VENDOR_ID_MICROSOFT;
  7310. + hid->product = USB_DEVICE_ID_MS_VHF;
  7311. +
  7312. + hid->ll_driver = &vhf_hid_ll_driver;
  7313. +
  7314. + sprintf(hid->name, "%s", VHF_INPUT_NAME);
  7315. +
  7316. + return hid;
  7317. +}
  7318. +
  7319. +static int vhf_event_handler(struct surface_sam_ssh_event *event, void *data)
  7320. +{
  7321. + struct vhf_evtctx *ctx = (struct vhf_evtctx *)data;
  7322. +
  7323. + if (event->tc == 0x08 && (event->cid == 0x03 || event->cid == 0x04)) {
  7324. + return hid_input_report(ctx->hid, HID_INPUT_REPORT, event->pld, event->len, 1);
  7325. + }
  7326. +
  7327. + dev_warn(ctx->dev, "unsupported event (tc = %d, cid = %d)\n", event->tc, event->cid);
  7328. + return 0;
  7329. +}
  7330. +
  7331. +static int surface_sam_vhf_probe(struct platform_device *pdev)
  7332. +{
  7333. + struct vhf_drvdata *drvdata;
  7334. + struct hid_device *hid;
  7335. + int status;
  7336. +
  7337. + // add device link to EC
  7338. + status = surface_sam_ssh_consumer_register(&pdev->dev);
  7339. + if (status) {
  7340. + return status == -ENXIO ? -EPROBE_DEFER : status;
  7341. + }
  7342. +
  7343. + drvdata = kzalloc(sizeof(struct vhf_drvdata), GFP_KERNEL);
  7344. + if (!drvdata) {
  7345. + return -ENOMEM;
  7346. + }
  7347. +
  7348. + hid = vhf_create_hid_device(pdev);
  7349. + if (IS_ERR(hid)) {
  7350. + status = PTR_ERR(hid);
  7351. + goto err_probe_hid;
  7352. + }
  7353. +
  7354. + status = hid_add_device(hid);
  7355. + if (status) {
  7356. + goto err_add_hid;
  7357. + }
  7358. +
  7359. + drvdata->event_ctx.dev = &pdev->dev;
  7360. + drvdata->event_ctx.hid = hid;
  7361. +
  7362. + platform_set_drvdata(pdev, drvdata);
  7363. +
  7364. + status = surface_sam_ssh_set_event_handler(
  7365. + SAM_EVENT_VHF_RQID,
  7366. + vhf_event_handler,
  7367. + &drvdata->event_ctx);
  7368. + if (status) {
  7369. + goto err_add_hid;
  7370. + }
  7371. +
  7372. + status = surface_sam_ssh_enable_event_source(SAM_EVENT_VHF_TC, 0x01, SAM_EVENT_VHF_RQID);
  7373. + if (status) {
  7374. + goto err_event_source;
  7375. + }
  7376. +
  7377. + return 0;
  7378. +
  7379. +err_event_source:
  7380. + surface_sam_ssh_remove_event_handler(SAM_EVENT_VHF_RQID);
  7381. +err_add_hid:
  7382. + hid_destroy_device(hid);
  7383. + platform_set_drvdata(pdev, NULL);
  7384. +err_probe_hid:
  7385. + kfree(drvdata);
  7386. + return status;
  7387. +}
  7388. +
  7389. +static int surface_sam_vhf_remove(struct platform_device *pdev)
  7390. +{
  7391. + struct vhf_drvdata *drvdata = platform_get_drvdata(pdev);
  7392. +
  7393. + surface_sam_ssh_disable_event_source(SAM_EVENT_VHF_TC, 0x01, SAM_EVENT_VHF_RQID);
  7394. + surface_sam_ssh_remove_event_handler(SAM_EVENT_VHF_RQID);
  7395. +
  7396. + hid_destroy_device(drvdata->event_ctx.hid);
  7397. + kfree(drvdata);
  7398. +
  7399. + platform_set_drvdata(pdev, NULL);
  7400. + return 0;
  7401. +}
  7402. +
  7403. +
  7404. +static const struct acpi_device_id surface_sam_vhf_match[] = {
  7405. + { "MSHW0096" },
  7406. + { },
  7407. +};
  7408. +MODULE_DEVICE_TABLE(acpi, surface_sam_vhf_match);
  7409. +
  7410. +static struct platform_driver surface_sam_vhf = {
  7411. + .probe = surface_sam_vhf_probe,
  7412. + .remove = surface_sam_vhf_remove,
  7413. + .driver = {
  7414. + .name = "surface_sam_vhf",
  7415. + .acpi_match_table = ACPI_PTR(surface_sam_vhf_match),
  7416. + .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  7417. + },
  7418. +};
  7419. +module_platform_driver(surface_sam_vhf);
  7420. +
  7421. +MODULE_AUTHOR("Maximilian Luz <luzmaximilian@gmail.com>");
  7422. +MODULE_DESCRIPTION("Virtual HID Framework Driver for 5th Generation Surface Devices");
  7423. +MODULE_LICENSE("GPL v2");
  7424. diff --git a/drivers/tty/serdev/core.c b/drivers/tty/serdev/core.c
  7425. index a0ac16ee6575..226adeec2aed 100644
  7426. --- a/drivers/tty/serdev/core.c
  7427. +++ b/drivers/tty/serdev/core.c
  7428. @@ -552,16 +552,97 @@ static int of_serdev_register_devices(struct serdev_controller *ctrl)
  7429. }
  7430. #ifdef CONFIG_ACPI
  7431. +
  7432. +#define SERDEV_ACPI_MAX_SCAN_DEPTH 32
  7433. +
  7434. +struct acpi_serdev_lookup {
  7435. + acpi_handle device_handle;
  7436. + acpi_handle controller_handle;
  7437. + int n;
  7438. + int index;
  7439. +};
  7440. +
  7441. +static int acpi_serdev_parse_resource(struct acpi_resource *ares, void *data)
  7442. +{
  7443. + struct acpi_serdev_lookup *lookup = data;
  7444. + struct acpi_resource_uart_serialbus *sb;
  7445. + acpi_status status;
  7446. +
  7447. + if (ares->type != ACPI_RESOURCE_TYPE_SERIAL_BUS)
  7448. + return 1;
  7449. +
  7450. + if (ares->data.common_serial_bus.type != ACPI_RESOURCE_SERIAL_TYPE_UART)
  7451. + return 1;
  7452. +
  7453. + if (lookup->index != -1 && lookup->n++ != lookup->index)
  7454. + return 1;
  7455. +
  7456. + sb = &ares->data.uart_serial_bus;
  7457. +
  7458. + status = acpi_get_handle(lookup->device_handle,
  7459. + sb->resource_source.string_ptr,
  7460. + &lookup->controller_handle);
  7461. + if (ACPI_FAILURE(status))
  7462. + return 1;
  7463. +
  7464. + /*
  7465. + * NOTE: Ideally, we would also want to retreive other properties here,
  7466. + * once setting them before opening the device is supported by serdev.
  7467. + */
  7468. +
  7469. + return 1;
  7470. +}
  7471. +
  7472. +static int acpi_serdev_do_lookup(struct acpi_device *adev,
  7473. + struct acpi_serdev_lookup *lookup)
  7474. +{
  7475. + struct list_head resource_list;
  7476. + int ret;
  7477. +
  7478. + lookup->device_handle = acpi_device_handle(adev);
  7479. + lookup->controller_handle = NULL;
  7480. + lookup->n = 0;
  7481. +
  7482. + INIT_LIST_HEAD(&resource_list);
  7483. + ret = acpi_dev_get_resources(adev, &resource_list,
  7484. + acpi_serdev_parse_resource, lookup);
  7485. + acpi_dev_free_resource_list(&resource_list);
  7486. +
  7487. + if (ret < 0)
  7488. + return -EINVAL;
  7489. +
  7490. + return 0;
  7491. +}
  7492. +
  7493. +static int acpi_serdev_check_resources(struct serdev_controller *ctrl,
  7494. + struct acpi_device *adev)
  7495. +{
  7496. + struct acpi_serdev_lookup lookup;
  7497. + int ret;
  7498. +
  7499. + if (acpi_bus_get_status(adev) || !adev->status.present)
  7500. + return -EINVAL;
  7501. +
  7502. + /* Look for UARTSerialBusV2 resource */
  7503. + lookup.index = -1; // we only care for the last device
  7504. +
  7505. + ret = acpi_serdev_do_lookup(adev, &lookup);
  7506. + if (ret)
  7507. + return ret;
  7508. +
  7509. + /* Make sure controller and ResourceSource handle match */
  7510. + if (ACPI_HANDLE(ctrl->dev.parent) != lookup.controller_handle)
  7511. + return -ENODEV;
  7512. +
  7513. + return 0;
  7514. +}
  7515. +
  7516. static acpi_status acpi_serdev_register_device(struct serdev_controller *ctrl,
  7517. - struct acpi_device *adev)
  7518. + struct acpi_device *adev)
  7519. {
  7520. - struct serdev_device *serdev = NULL;
  7521. + struct serdev_device *serdev;
  7522. int err;
  7523. - if (acpi_bus_get_status(adev) || !adev->status.present ||
  7524. - acpi_device_enumerated(adev))
  7525. - return AE_OK;
  7526. -
  7527. serdev = serdev_device_alloc(ctrl);
  7528. if (!serdev) {
  7529. dev_err(&ctrl->dev, "failed to allocate serdev device for %s\n",
  7530. @@ -583,7 +664,7 @@ static acpi_status acpi_serdev_register_device(struct serdev_controller *ctrl,
  7531. }
  7532. static acpi_status acpi_serdev_add_device(acpi_handle handle, u32 level,
  7533. - void *data, void **return_value)
  7534. + void *data, void **return_value)
  7535. {
  7536. struct serdev_controller *ctrl = data;
  7537. struct acpi_device *adev;
  7538. @@ -591,22 +672,28 @@ static acpi_status acpi_serdev_add_device(acpi_handle handle, u32 level,
  7539. if (acpi_bus_get_device(handle, &adev))
  7540. return AE_OK;
  7541. + if (acpi_device_enumerated(adev))
  7542. + return AE_OK;
  7543. +
  7544. + if (acpi_serdev_check_resources(ctrl, adev))
  7545. + return AE_OK;
  7546. +
  7547. return acpi_serdev_register_device(ctrl, adev);
  7548. }
  7549. +
  7550. static int acpi_serdev_register_devices(struct serdev_controller *ctrl)
  7551. {
  7552. acpi_status status;
  7553. - acpi_handle handle;
  7554. - handle = ACPI_HANDLE(ctrl->dev.parent);
  7555. - if (!handle)
  7556. + if (!has_acpi_companion(ctrl->dev.parent))
  7557. return -ENODEV;
  7558. - status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1,
  7559. + status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
  7560. + SERDEV_ACPI_MAX_SCAN_DEPTH,
  7561. acpi_serdev_add_device, NULL, ctrl, NULL);
  7562. if (ACPI_FAILURE(status))
  7563. - dev_dbg(&ctrl->dev, "failed to enumerate serdev slaves\n");
  7564. + dev_warn(&ctrl->dev, "failed to enumerate serdev slaves\n");
  7565. if (!ctrl->serdev)
  7566. return -ENODEV;
  7567. --
  7568. 2.24.1