0007-ipts.patch 199 KB

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  1. From f75f69ab7c9af49ceedabfdd5fedc3bb44375f01 Mon Sep 17 00:00:00 2001
  2. From: Maximilian Luz <luzmaximilian@gmail.com>
  3. Date: Sat, 28 Sep 2019 17:58:17 +0200
  4. Subject: [PATCH 07/10] ipts
  5. ---
  6. drivers/gpu/drm/i915/Makefile | 3 +
  7. drivers/gpu/drm/i915/i915_debugfs.c | 63 +-
  8. drivers/gpu/drm/i915/i915_drv.c | 9 +-
  9. drivers/gpu/drm/i915/i915_drv.h | 3 +
  10. drivers/gpu/drm/i915/i915_gem_context.c | 12 +
  11. drivers/gpu/drm/i915/i915_irq.c | 7 +-
  12. drivers/gpu/drm/i915/i915_params.c | 5 +-
  13. drivers/gpu/drm/i915/i915_params.h | 5 +-
  14. drivers/gpu/drm/i915/intel_guc.h | 1 +
  15. drivers/gpu/drm/i915/intel_guc_submission.c | 89 +-
  16. drivers/gpu/drm/i915/intel_guc_submission.h | 4 +
  17. drivers/gpu/drm/i915/intel_ipts.c | 650 ++++++++++++
  18. drivers/gpu/drm/i915/intel_ipts.h | 34 +
  19. drivers/gpu/drm/i915/intel_lrc.c | 12 +-
  20. drivers/gpu/drm/i915/intel_lrc.h | 8 +
  21. drivers/gpu/drm/i915/intel_panel.c | 7 +
  22. drivers/hid/hid-core.c | 5 +-
  23. drivers/misc/Kconfig | 1 +
  24. drivers/misc/Makefile | 1 +
  25. drivers/misc/ipts/Kconfig | 12 +
  26. drivers/misc/ipts/Makefile | 19 +
  27. drivers/misc/ipts/companion.c | 230 ++++
  28. drivers/misc/ipts/companion.h | 26 +
  29. drivers/misc/ipts/companion/Kconfig | 8 +
  30. drivers/misc/ipts/companion/Makefile | 2 +
  31. drivers/misc/ipts/companion/ipts-surface.c | 224 ++++
  32. drivers/misc/ipts/dbgfs.c | 277 +++++
  33. drivers/misc/ipts/gfx.c | 180 ++++
  34. drivers/misc/ipts/gfx.h | 25 +
  35. drivers/misc/ipts/hid.c | 499 +++++++++
  36. drivers/misc/ipts/hid.h | 21 +
  37. drivers/misc/ipts/ipts.c | 62 ++
  38. drivers/misc/ipts/ipts.h | 172 +++
  39. drivers/misc/ipts/kernel.c | 1047 +++++++++++++++++++
  40. drivers/misc/ipts/kernel.h | 17 +
  41. drivers/misc/ipts/mei-msgs.h | 901 ++++++++++++++++
  42. drivers/misc/ipts/mei.c | 238 +++++
  43. drivers/misc/ipts/msg-handler.c | 396 +++++++
  44. drivers/misc/ipts/msg-handler.h | 28 +
  45. drivers/misc/ipts/params.c | 46 +
  46. drivers/misc/ipts/params.h | 26 +
  47. drivers/misc/ipts/resource.c | 291 ++++++
  48. drivers/misc/ipts/resource.h | 26 +
  49. drivers/misc/ipts/sensor-regs.h | 834 +++++++++++++++
  50. drivers/misc/ipts/state.h | 22 +
  51. drivers/misc/mei/hw-me-regs.h | 1 +
  52. drivers/misc/mei/pci-me.c | 1 +
  53. include/linux/ipts-binary.h | 140 +++
  54. include/linux/ipts-companion.h | 30 +
  55. include/linux/ipts-gfx.h | 86 ++
  56. include/linux/ipts.h | 20 +
  57. 51 files changed, 6802 insertions(+), 24 deletions(-)
  58. create mode 100644 drivers/gpu/drm/i915/intel_ipts.c
  59. create mode 100644 drivers/gpu/drm/i915/intel_ipts.h
  60. create mode 100644 drivers/misc/ipts/Kconfig
  61. create mode 100644 drivers/misc/ipts/Makefile
  62. create mode 100644 drivers/misc/ipts/companion.c
  63. create mode 100644 drivers/misc/ipts/companion.h
  64. create mode 100644 drivers/misc/ipts/companion/Kconfig
  65. create mode 100644 drivers/misc/ipts/companion/Makefile
  66. create mode 100644 drivers/misc/ipts/companion/ipts-surface.c
  67. create mode 100644 drivers/misc/ipts/dbgfs.c
  68. create mode 100644 drivers/misc/ipts/gfx.c
  69. create mode 100644 drivers/misc/ipts/gfx.h
  70. create mode 100644 drivers/misc/ipts/hid.c
  71. create mode 100644 drivers/misc/ipts/hid.h
  72. create mode 100644 drivers/misc/ipts/ipts.c
  73. create mode 100644 drivers/misc/ipts/ipts.h
  74. create mode 100644 drivers/misc/ipts/kernel.c
  75. create mode 100644 drivers/misc/ipts/kernel.h
  76. create mode 100644 drivers/misc/ipts/mei-msgs.h
  77. create mode 100644 drivers/misc/ipts/mei.c
  78. create mode 100644 drivers/misc/ipts/msg-handler.c
  79. create mode 100644 drivers/misc/ipts/msg-handler.h
  80. create mode 100644 drivers/misc/ipts/params.c
  81. create mode 100644 drivers/misc/ipts/params.h
  82. create mode 100644 drivers/misc/ipts/resource.c
  83. create mode 100644 drivers/misc/ipts/resource.h
  84. create mode 100644 drivers/misc/ipts/sensor-regs.h
  85. create mode 100644 drivers/misc/ipts/state.h
  86. create mode 100644 include/linux/ipts-binary.h
  87. create mode 100644 include/linux/ipts-companion.h
  88. create mode 100644 include/linux/ipts-gfx.h
  89. create mode 100644 include/linux/ipts.h
  90. diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
  91. index 5794f102f9b8..6ae0e91a213a 100644
  92. --- a/drivers/gpu/drm/i915/Makefile
  93. +++ b/drivers/gpu/drm/i915/Makefile
  94. @@ -155,6 +155,9 @@ i915-y += dvo_ch7017.o \
  95. vlv_dsi.o \
  96. vlv_dsi_pll.o
  97. +# intel precise touch & stylus
  98. +i915-y += intel_ipts.o
  99. +
  100. # Post-mortem debug and GPU hang state capture
  101. i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
  102. i915-$(CONFIG_DRM_I915_SELFTEST) += \
  103. diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
  104. index e063e98d1e82..99becb6aed68 100644
  105. --- a/drivers/gpu/drm/i915/i915_debugfs.c
  106. +++ b/drivers/gpu/drm/i915/i915_debugfs.c
  107. @@ -31,6 +31,7 @@
  108. #include <linux/sched/mm.h>
  109. #include "intel_drv.h"
  110. #include "intel_guc_submission.h"
  111. +#include "intel_ipts.h"
  112. static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
  113. {
  114. @@ -4695,6 +4696,64 @@ static const struct file_operations i915_fifo_underrun_reset_ops = {
  115. .llseek = default_llseek,
  116. };
  117. +static ssize_t
  118. +i915_ipts_cleanup_write(struct file *filp,
  119. + const char __user *ubuf,
  120. + size_t cnt, loff_t *ppos)
  121. +{
  122. + struct drm_i915_private *dev_priv = filp->private_data;
  123. + struct drm_device *dev = &dev_priv->drm;
  124. + int ret;
  125. + bool flag;
  126. +
  127. + ret = kstrtobool_from_user(ubuf, cnt, &flag);
  128. + if (ret)
  129. + return ret;
  130. +
  131. + if (!flag)
  132. + return cnt;
  133. +
  134. + ipts_cleanup(dev);
  135. +
  136. + return cnt;
  137. +}
  138. +
  139. +static const struct file_operations i915_ipts_cleanup_ops = {
  140. + .owner = THIS_MODULE,
  141. + .open = simple_open,
  142. + .write = i915_ipts_cleanup_write,
  143. + .llseek = default_llseek,
  144. +};
  145. +
  146. +static ssize_t
  147. +i915_ipts_init_write(struct file *filp,
  148. + const char __user *ubuf,
  149. + size_t cnt, loff_t *ppos)
  150. +{
  151. + struct drm_i915_private *dev_priv = filp->private_data;
  152. + struct drm_device *dev = &dev_priv->drm;
  153. + int ret;
  154. + bool flag;
  155. +
  156. + ret = kstrtobool_from_user(ubuf, cnt, &flag);
  157. + if (ret)
  158. + return ret;
  159. +
  160. + if (!flag)
  161. + return cnt;
  162. +
  163. + ipts_init(dev);
  164. +
  165. + return cnt;
  166. +}
  167. +
  168. +static const struct file_operations i915_ipts_init_ops = {
  169. + .owner = THIS_MODULE,
  170. + .open = simple_open,
  171. + .write = i915_ipts_init_write,
  172. + .llseek = default_llseek,
  173. +};
  174. +
  175. static const struct drm_info_list i915_debugfs_list[] = {
  176. {"i915_capabilities", i915_capabilities, 0},
  177. {"i915_gem_objects", i915_gem_object_info, 0},
  178. @@ -4773,7 +4832,9 @@ static const struct i915_debugfs_files {
  179. {"i915_hpd_storm_ctl", &i915_hpd_storm_ctl_fops},
  180. {"i915_ipc_status", &i915_ipc_status_fops},
  181. {"i915_drrs_ctl", &i915_drrs_ctl_fops},
  182. - {"i915_edp_psr_debug", &i915_edp_psr_debug_fops}
  183. + {"i915_edp_psr_debug", &i915_edp_psr_debug_fops},
  184. + {"i915_ipts_cleanup", &i915_ipts_cleanup_ops},
  185. + {"i915_ipts_init", &i915_ipts_init_ops},
  186. };
  187. int i915_debugfs_register(struct drm_i915_private *dev_priv)
  188. diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
  189. index b0d76a7a0946..81fba8e5ab05 100644
  190. --- a/drivers/gpu/drm/i915/i915_drv.c
  191. +++ b/drivers/gpu/drm/i915/i915_drv.c
  192. @@ -47,11 +47,12 @@
  193. #include <drm/i915_drm.h>
  194. #include "i915_drv.h"
  195. -#include "i915_trace.h"
  196. #include "i915_pmu.h"
  197. #include "i915_query.h"
  198. +#include "i915_trace.h"
  199. #include "i915_vgpu.h"
  200. #include "intel_drv.h"
  201. +#include "intel_ipts.h"
  202. #include "intel_uc.h"
  203. static struct drm_driver driver;
  204. @@ -696,6 +697,9 @@ static int i915_load_modeset_init(struct drm_device *dev)
  205. /* Only enable hotplug handling once the fbdev is fully set up. */
  206. intel_hpd_init(dev_priv);
  207. + if (INTEL_GEN(dev_priv) >= 9 && i915_modparams.enable_guc && i915_modparams.enable_ipts)
  208. + ipts_init(dev);
  209. +
  210. return 0;
  211. cleanup_gem:
  212. @@ -1438,6 +1442,9 @@ void i915_driver_unload(struct drm_device *dev)
  213. struct drm_i915_private *dev_priv = to_i915(dev);
  214. struct pci_dev *pdev = dev_priv->drm.pdev;
  215. + if (INTEL_GEN(dev_priv) >= 9 && i915_modparams.enable_guc && i915_modparams.enable_ipts)
  216. + ipts_cleanup(dev);
  217. +
  218. i915_driver_unregister(dev_priv);
  219. if (i915_gem_suspend(dev_priv))
  220. diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
  221. index db2e9af49ae6..99bc0c92c411 100644
  222. --- a/drivers/gpu/drm/i915/i915_drv.h
  223. +++ b/drivers/gpu/drm/i915/i915_drv.h
  224. @@ -3232,6 +3232,9 @@ void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj,
  225. void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
  226. struct sg_table *pages);
  227. +struct i915_gem_context *
  228. +i915_gem_context_create_ipts(struct drm_device *dev);
  229. +
  230. static inline struct i915_gem_context *
  231. __i915_gem_context_lookup_rcu(struct drm_i915_file_private *file_priv, u32 id)
  232. {
  233. diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
  234. index ef383fd42988..89da4ff09431 100644
  235. --- a/drivers/gpu/drm/i915/i915_gem_context.c
  236. +++ b/drivers/gpu/drm/i915/i915_gem_context.c
  237. @@ -472,6 +472,18 @@ static bool needs_preempt_context(struct drm_i915_private *i915)
  238. return HAS_LOGICAL_RING_PREEMPTION(i915);
  239. }
  240. +struct i915_gem_context *i915_gem_context_create_ipts(struct drm_device *dev)
  241. +{
  242. + struct drm_i915_private *dev_priv = to_i915(dev);
  243. + struct i915_gem_context *ctx;
  244. +
  245. + BUG_ON(!mutex_is_locked(&dev->struct_mutex));
  246. +
  247. + ctx = i915_gem_create_context(dev_priv, NULL);
  248. +
  249. + return ctx;
  250. +}
  251. +
  252. int i915_gem_contexts_init(struct drm_i915_private *dev_priv)
  253. {
  254. struct i915_gem_context *ctx;
  255. diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
  256. index 29877969310d..37a58b19ec3f 100644
  257. --- a/drivers/gpu/drm/i915/i915_irq.c
  258. +++ b/drivers/gpu/drm/i915/i915_irq.c
  259. @@ -36,6 +36,7 @@
  260. #include "i915_drv.h"
  261. #include "i915_trace.h"
  262. #include "intel_drv.h"
  263. +#include "intel_ipts.h"
  264. /**
  265. * DOC: interrupt handling
  266. @@ -1503,6 +1504,9 @@ gen8_cs_irq_handler(struct intel_engine_cs *engine, u32 iir)
  267. tasklet |= USES_GUC_SUBMISSION(engine->i915);
  268. }
  269. + if (iir & GT_RENDER_PIPECTL_NOTIFY_INTERRUPT && i915_modparams.enable_ipts)
  270. + ipts_notify_complete();
  271. +
  272. if (tasklet)
  273. tasklet_hi_schedule(&engine->execlists.tasklet);
  274. }
  275. @@ -4122,7 +4126,8 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv)
  276. {
  277. /* These are interrupts we'll toggle with the ring mask register */
  278. uint32_t gt_interrupts[] = {
  279. - GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
  280. + GT_RENDER_PIPECTL_NOTIFY_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
  281. + GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
  282. GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
  283. GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT |
  284. GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT,
  285. diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
  286. index 295e981e4a39..84415814c007 100644
  287. --- a/drivers/gpu/drm/i915/i915_params.c
  288. +++ b/drivers/gpu/drm/i915/i915_params.c
  289. @@ -145,7 +145,10 @@ i915_param_named_unsafe(edp_vswing, int, 0400,
  290. i915_param_named_unsafe(enable_guc, int, 0400,
  291. "Enable GuC load for GuC submission and/or HuC load. "
  292. "Required functionality can be selected using bitmask values. "
  293. - "(-1=auto, 0=disable [default], 1=GuC submission, 2=HuC load)");
  294. + "(-1=auto [default], 0=disable, 1=GuC submission, 2=HuC load)");
  295. +
  296. +i915_param_named_unsafe(enable_ipts, int, 0400,
  297. + "Enable IPTS Touchscreen and Pen support (default: 1)");
  298. i915_param_named(guc_log_level, int, 0400,
  299. "GuC firmware logging level. Requires GuC to be loaded. "
  300. diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
  301. index 6c4d4a21474b..4ab800c3de6d 100644
  302. --- a/drivers/gpu/drm/i915/i915_params.h
  303. +++ b/drivers/gpu/drm/i915/i915_params.h
  304. @@ -46,7 +46,7 @@ struct drm_printer;
  305. param(int, disable_power_well, -1) \
  306. param(int, enable_ips, 1) \
  307. param(int, invert_brightness, 0) \
  308. - param(int, enable_guc, 0) \
  309. + param(int, enable_guc, -1) \
  310. param(int, guc_log_level, -1) \
  311. param(char *, guc_firmware_path, NULL) \
  312. param(char *, huc_firmware_path, NULL) \
  313. @@ -68,7 +68,8 @@ struct drm_printer;
  314. param(bool, nuclear_pageflip, false) \
  315. param(bool, enable_dp_mst, true) \
  316. param(bool, enable_dpcd_backlight, false) \
  317. - param(bool, enable_gvt, false)
  318. + param(bool, enable_gvt, false) \
  319. + param(int, enable_ipts, 1)
  320. #define MEMBER(T, member, ...) T member;
  321. struct i915_params {
  322. diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
  323. index 4121928a495e..8967376accf3 100644
  324. --- a/drivers/gpu/drm/i915/intel_guc.h
  325. +++ b/drivers/gpu/drm/i915/intel_guc.h
  326. @@ -69,6 +69,7 @@ struct intel_guc {
  327. struct intel_guc_client *execbuf_client;
  328. struct intel_guc_client *preempt_client;
  329. + struct intel_guc_client *ipts_client;
  330. struct guc_preempt_work preempt_work[I915_NUM_ENGINES];
  331. struct workqueue_struct *preempt_wq;
  332. diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
  333. index 4aa5e6463e7b..da80c5f17fee 100644
  334. --- a/drivers/gpu/drm/i915/intel_guc_submission.c
  335. +++ b/drivers/gpu/drm/i915/intel_guc_submission.c
  336. @@ -88,12 +88,17 @@ static inline struct i915_priolist *to_priolist(struct rb_node *rb)
  337. static inline bool is_high_priority(struct intel_guc_client *client)
  338. {
  339. - return (client->priority == GUC_CLIENT_PRIORITY_KMD_HIGH ||
  340. - client->priority == GUC_CLIENT_PRIORITY_HIGH);
  341. + return (client->priority == GUC_CLIENT_PRIORITY_HIGH);
  342. +}
  343. +
  344. +static inline bool is_high_priority_kmd(struct intel_guc_client *client)
  345. +{
  346. + return (client->priority == GUC_CLIENT_PRIORITY_KMD_HIGH);
  347. }
  348. static int reserve_doorbell(struct intel_guc_client *client)
  349. {
  350. + struct drm_i915_private *dev_priv = guc_to_i915(client->guc);
  351. unsigned long offset;
  352. unsigned long end;
  353. u16 id;
  354. @@ -106,10 +111,14 @@ static int reserve_doorbell(struct intel_guc_client *client)
  355. * priority contexts, the second half for high-priority ones.
  356. */
  357. offset = 0;
  358. - end = GUC_NUM_DOORBELLS / 2;
  359. - if (is_high_priority(client)) {
  360. - offset = end;
  361. - end += offset;
  362. + if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
  363. + end = GUC_NUM_DOORBELLS;
  364. + } else {
  365. + end = GUC_NUM_DOORBELLS/2;
  366. + if (is_high_priority(client)) {
  367. + offset = end;
  368. + end += offset;
  369. + }
  370. }
  371. id = find_next_zero_bit(client->guc->doorbell_bitmap, end, offset);
  372. @@ -355,9 +364,15 @@ static void guc_stage_desc_init(struct intel_guc *guc,
  373. desc = __get_stage_desc(client);
  374. memset(desc, 0, sizeof(*desc));
  375. - desc->attribute = GUC_STAGE_DESC_ATTR_ACTIVE |
  376. - GUC_STAGE_DESC_ATTR_KERNEL;
  377. - if (is_high_priority(client))
  378. + desc->attribute = GUC_STAGE_DESC_ATTR_ACTIVE;
  379. + if ((client->priority == GUC_CLIENT_PRIORITY_KMD_NORMAL) ||
  380. + (client->priority == GUC_CLIENT_PRIORITY_KMD_HIGH)) {
  381. + desc->attribute |= GUC_STAGE_DESC_ATTR_KERNEL;
  382. + } else {
  383. + desc->attribute |= GUC_STAGE_DESC_ATTR_PCH;
  384. + }
  385. +
  386. + if (is_high_priority_kmd(client))
  387. desc->attribute |= GUC_STAGE_DESC_ATTR_PREEMPT;
  388. desc->stage_id = client->stage_id;
  389. desc->priority = client->priority;
  390. @@ -1204,7 +1219,8 @@ static void guc_interrupts_capture(struct drm_i915_private *dev_priv)
  391. I915_WRITE(RING_MODE_GEN7(engine), irqs);
  392. /* route USER_INTERRUPT to Host, all others are sent to GuC. */
  393. - irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT |
  394. + irqs = (GT_RENDER_USER_INTERRUPT | GT_RENDER_PIPECTL_NOTIFY_INTERRUPT)
  395. + << GEN8_RCS_IRQ_SHIFT |
  396. GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT;
  397. /* These three registers have the same bit definitions */
  398. I915_WRITE(GUC_BCS_RCS_IER, ~irqs);
  399. @@ -1349,6 +1365,59 @@ void intel_guc_submission_disable(struct intel_guc *guc)
  400. guc_clients_doorbell_fini(guc);
  401. }
  402. +int i915_guc_ipts_submission_enable(struct drm_i915_private *dev_priv,
  403. + struct i915_gem_context *ctx)
  404. +{
  405. + struct intel_guc *guc = &dev_priv->guc;
  406. + struct intel_guc_client *client;
  407. + int err;
  408. + int ret;
  409. +
  410. + /* client for execbuf submission */
  411. + client = guc_client_alloc(dev_priv,
  412. + INTEL_INFO(dev_priv)->ring_mask,
  413. + IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv) ? GUC_CLIENT_PRIORITY_HIGH : GUC_CLIENT_PRIORITY_NORMAL,
  414. + ctx);
  415. + if (IS_ERR(client)) {
  416. + DRM_ERROR("Failed to create normal GuC client!\n");
  417. + return -ENOMEM;
  418. + }
  419. +
  420. + guc->ipts_client = client;
  421. +
  422. + err = intel_guc_sample_forcewake(guc);
  423. + if (err)
  424. + return err;
  425. +
  426. + ret = create_doorbell(guc->ipts_client);
  427. + if (ret)
  428. + return ret;
  429. +
  430. + return 0;
  431. +}
  432. +
  433. +void i915_guc_ipts_submission_disable(struct drm_i915_private *dev_priv)
  434. +{
  435. + struct intel_guc *guc = &dev_priv->guc;
  436. +
  437. + if (!guc->ipts_client)
  438. + return;
  439. +
  440. + destroy_doorbell(guc->ipts_client);
  441. + guc_client_free(guc->ipts_client);
  442. + guc->ipts_client = NULL;
  443. +}
  444. +
  445. +void i915_guc_ipts_reacquire_doorbell(struct drm_i915_private *dev_priv)
  446. +{
  447. + struct intel_guc *guc = &dev_priv->guc;
  448. +
  449. + int err = __guc_allocate_doorbell(guc, guc->ipts_client->stage_id);
  450. +
  451. + if (err)
  452. + DRM_ERROR("Not able to reacquire IPTS doorbell\n");
  453. +}
  454. +
  455. #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
  456. #include "selftests/intel_guc.c"
  457. #endif
  458. diff --git a/drivers/gpu/drm/i915/intel_guc_submission.h b/drivers/gpu/drm/i915/intel_guc_submission.h
  459. index fb081cefef93..71fc7986585a 100644
  460. --- a/drivers/gpu/drm/i915/intel_guc_submission.h
  461. +++ b/drivers/gpu/drm/i915/intel_guc_submission.h
  462. @@ -79,5 +79,9 @@ void intel_guc_submission_disable(struct intel_guc *guc);
  463. void intel_guc_submission_fini(struct intel_guc *guc);
  464. int intel_guc_preempt_work_create(struct intel_guc *guc);
  465. void intel_guc_preempt_work_destroy(struct intel_guc *guc);
  466. +int i915_guc_ipts_submission_enable(struct drm_i915_private *dev_priv,
  467. + struct i915_gem_context *ctx);
  468. +void i915_guc_ipts_submission_disable(struct drm_i915_private *dev_priv);
  469. +void i915_guc_ipts_reacquire_doorbell(struct drm_i915_private *dev_priv);
  470. #endif
  471. diff --git a/drivers/gpu/drm/i915/intel_ipts.c b/drivers/gpu/drm/i915/intel_ipts.c
  472. new file mode 100644
  473. index 000000000000..c1199074924a
  474. --- /dev/null
  475. +++ b/drivers/gpu/drm/i915/intel_ipts.c
  476. @@ -0,0 +1,650 @@
  477. +/*
  478. + * Copyright 2016 Intel Corporation
  479. + *
  480. + * Permission is hereby granted, free of charge, to any person obtaining a
  481. + * copy of this software and associated documentation files (the "Software"),
  482. + * to deal in the Software without restriction, including without limitation
  483. + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  484. + * and/or sell copies of the Software, and to permit persons to whom the
  485. + * Software is furnished to do so, subject to the following conditions:
  486. + *
  487. + * The above copyright notice and this permission notice (including the next
  488. + * paragraph) shall be included in all copies or substantial portions of the
  489. + * Software.
  490. + *
  491. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  492. + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  493. + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  494. + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  495. + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  496. + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  497. + * IN THE SOFTWARE.
  498. + *
  499. + */
  500. +
  501. +#include <drm/drmP.h>
  502. +#include <linux/ipts-gfx.h>
  503. +#include <linux/kernel.h>
  504. +#include <linux/module.h>
  505. +#include <linux/types.h>
  506. +
  507. +#include "intel_guc_submission.h"
  508. +#include "i915_drv.h"
  509. +
  510. +#define SUPPORTED_IPTS_INTERFACE_VERSION 1
  511. +
  512. +#define REACQUIRE_DB_THRESHOLD 10
  513. +
  514. +#define DB_LOST_CHECK_STEP1_INTERVAL 2500 // ms
  515. +#define DB_LOST_CHECK_STEP2_INTERVAL 1000 // ms
  516. +
  517. +// CTX for ipts support
  518. +struct ipts {
  519. + struct drm_device *dev;
  520. + struct i915_gem_context *ipts_context;
  521. + struct ipts_callback ipts_clbks;
  522. +
  523. + // buffers' list
  524. + struct {
  525. + spinlock_t lock;
  526. + struct list_head list;
  527. + } buffers;
  528. +
  529. + void *data;
  530. +
  531. + struct delayed_work reacquire_db_work;
  532. + struct ipts_wq_info wq_info;
  533. + u32 old_tail;
  534. + u32 old_head;
  535. + bool need_reacquire_db;
  536. +
  537. + bool connected;
  538. + bool initialized;
  539. +};
  540. +
  541. +struct ipts ipts;
  542. +
  543. +struct ipts_object {
  544. + struct list_head list;
  545. + struct drm_i915_gem_object *gem_obj;
  546. + void *cpu_addr;
  547. +};
  548. +
  549. +static struct ipts_object *ipts_object_create(size_t size, u32 flags)
  550. +{
  551. + struct drm_i915_private *dev_priv = to_i915(ipts.dev);
  552. + struct ipts_object *obj = NULL;
  553. + struct drm_i915_gem_object *gem_obj = NULL;
  554. + int ret = 0;
  555. +
  556. + obj = kzalloc(sizeof(*obj), GFP_KERNEL);
  557. + if (!obj)
  558. + return NULL;
  559. +
  560. + size = roundup(size, PAGE_SIZE);
  561. + if (size == 0) {
  562. + ret = -EINVAL;
  563. + goto err_out;
  564. + }
  565. +
  566. + // Allocate the new object
  567. + gem_obj = i915_gem_object_create(dev_priv, size);
  568. + if (gem_obj == NULL) {
  569. + ret = -ENOMEM;
  570. + goto err_out;
  571. + }
  572. +
  573. + if (flags & IPTS_BUF_FLAG_CONTIGUOUS) {
  574. + ret = i915_gem_object_attach_phys(gem_obj, PAGE_SIZE);
  575. + if (ret) {
  576. + pr_info(">> ipts no contiguous : %d\n", ret);
  577. + goto err_out;
  578. + }
  579. + }
  580. +
  581. + obj->gem_obj = gem_obj;
  582. +
  583. + spin_lock(&ipts.buffers.lock);
  584. + list_add_tail(&obj->list, &ipts.buffers.list);
  585. + spin_unlock(&ipts.buffers.lock);
  586. +
  587. + return obj;
  588. +
  589. +err_out:
  590. +
  591. + if (gem_obj)
  592. + i915_gem_free_object(&gem_obj->base);
  593. +
  594. + kfree(obj);
  595. +
  596. + return NULL;
  597. +}
  598. +
  599. +static void ipts_object_free(struct ipts_object *obj)
  600. +{
  601. + spin_lock(&ipts.buffers.lock);
  602. + list_del(&obj->list);
  603. + spin_unlock(&ipts.buffers.lock);
  604. +
  605. + i915_gem_free_object(&obj->gem_obj->base);
  606. + kfree(obj);
  607. +}
  608. +
  609. +static int ipts_object_pin(struct ipts_object *obj,
  610. + struct i915_gem_context *ipts_ctx)
  611. +{
  612. + struct i915_address_space *vm = NULL;
  613. + struct i915_vma *vma = NULL;
  614. + struct drm_i915_private *dev_priv = to_i915(ipts.dev);
  615. + int ret = 0;
  616. +
  617. + if (ipts_ctx->ppgtt)
  618. + vm = &ipts_ctx->ppgtt->vm;
  619. + else
  620. + vm = &dev_priv->ggtt.vm;
  621. +
  622. + vma = i915_vma_instance(obj->gem_obj, vm, NULL);
  623. + if (IS_ERR(vma)) {
  624. + DRM_ERROR("cannot find or create vma\n");
  625. + return -1;
  626. + }
  627. +
  628. + ret = i915_vma_pin(vma, 0, PAGE_SIZE, PIN_USER);
  629. +
  630. + return ret;
  631. +}
  632. +
  633. +static void ipts_object_unpin(struct ipts_object *obj)
  634. +{
  635. + // TODO: Add support
  636. +}
  637. +
  638. +static void *ipts_object_map(struct ipts_object *obj)
  639. +{
  640. + return i915_gem_object_pin_map(obj->gem_obj, I915_MAP_WB);
  641. +}
  642. +
  643. +static void ipts_object_unmap(struct ipts_object *obj)
  644. +{
  645. + i915_gem_object_unpin_map(obj->gem_obj);
  646. + obj->cpu_addr = NULL;
  647. +}
  648. +
  649. +static int create_ipts_context(void)
  650. +{
  651. + struct i915_gem_context *ipts_ctx = NULL;
  652. + struct drm_i915_private *dev_priv = to_i915(ipts.dev);
  653. + struct intel_context *ce = NULL;
  654. + struct intel_context *pin_ret;
  655. + int ret = 0;
  656. +
  657. + // Initialize the context right away.
  658. + ret = i915_mutex_lock_interruptible(ipts.dev);
  659. + if (ret) {
  660. + DRM_ERROR("i915_mutex_lock_interruptible failed\n");
  661. + return ret;
  662. + }
  663. +
  664. + ipts_ctx = i915_gem_context_create_ipts(ipts.dev);
  665. + if (IS_ERR(ipts_ctx)) {
  666. + DRM_ERROR("Failed to create IPTS context (error %ld)\n",
  667. + PTR_ERR(ipts_ctx));
  668. + ret = PTR_ERR(ipts_ctx);
  669. + goto err_unlock;
  670. + }
  671. +
  672. + ce = to_intel_context(ipts_ctx, dev_priv->engine[RCS]);
  673. + if (IS_ERR(ce)) {
  674. + DRM_ERROR("Failed to create intel context (error %ld)\n",
  675. + PTR_ERR(ce));
  676. + ret = PTR_ERR(ce);
  677. + goto err_unlock;
  678. + }
  679. +
  680. + ret = execlists_context_deferred_alloc(ipts_ctx, dev_priv->engine[RCS], ce);
  681. + if (ret) {
  682. + DRM_DEBUG("lr context allocation failed: %d\n", ret);
  683. + goto err_ctx;
  684. + }
  685. +
  686. + pin_ret = execlists_context_pin(dev_priv->engine[RCS], ipts_ctx);
  687. + if (IS_ERR(pin_ret)) {
  688. + DRM_DEBUG("lr context pinning failed: %ld\n", PTR_ERR(pin_ret));
  689. + goto err_ctx;
  690. + }
  691. +
  692. + // Release the mutex
  693. + mutex_unlock(&ipts.dev->struct_mutex);
  694. +
  695. + spin_lock_init(&ipts.buffers.lock);
  696. + INIT_LIST_HEAD(&ipts.buffers.list);
  697. +
  698. + ipts.ipts_context = ipts_ctx;
  699. +
  700. + return 0;
  701. +
  702. +err_ctx:
  703. + if (ipts_ctx)
  704. + i915_gem_context_put(ipts_ctx);
  705. +
  706. +err_unlock:
  707. + mutex_unlock(&ipts.dev->struct_mutex);
  708. +
  709. + return ret;
  710. +}
  711. +
  712. +static void destroy_ipts_context(void)
  713. +{
  714. + struct i915_gem_context *ipts_ctx = NULL;
  715. + struct drm_i915_private *dev_priv = to_i915(ipts.dev);
  716. + struct intel_context *ce = NULL;
  717. + int ret = 0;
  718. +
  719. + ipts_ctx = ipts.ipts_context;
  720. +
  721. + ce = to_intel_context(ipts_ctx, dev_priv->engine[RCS]);
  722. +
  723. + // Initialize the context right away.
  724. + ret = i915_mutex_lock_interruptible(ipts.dev);
  725. + if (ret) {
  726. + DRM_ERROR("i915_mutex_lock_interruptible failed\n");
  727. + return;
  728. + }
  729. +
  730. + execlists_context_unpin(ce);
  731. + i915_gem_context_put(ipts_ctx);
  732. +
  733. + mutex_unlock(&ipts.dev->struct_mutex);
  734. +}
  735. +
  736. +int ipts_notify_complete(void)
  737. +{
  738. + if (ipts.ipts_clbks.workload_complete)
  739. + ipts.ipts_clbks.workload_complete(ipts.data);
  740. +
  741. + return 0;
  742. +}
  743. +
  744. +int ipts_notify_backlight_status(bool backlight_on)
  745. +{
  746. + if (ipts.ipts_clbks.notify_gfx_status) {
  747. + if (backlight_on) {
  748. + ipts.ipts_clbks.notify_gfx_status(
  749. + IPTS_NOTIFY_STA_BACKLIGHT_ON, ipts.data);
  750. + schedule_delayed_work(&ipts.reacquire_db_work,
  751. + msecs_to_jiffies(DB_LOST_CHECK_STEP1_INTERVAL));
  752. + } else {
  753. + ipts.ipts_clbks.notify_gfx_status(
  754. + IPTS_NOTIFY_STA_BACKLIGHT_OFF, ipts.data);
  755. + cancel_delayed_work(&ipts.reacquire_db_work);
  756. + }
  757. + }
  758. +
  759. + return 0;
  760. +}
  761. +
  762. +static void ipts_reacquire_db(struct ipts *ipts_p)
  763. +{
  764. + int ret = 0;
  765. +
  766. + ret = i915_mutex_lock_interruptible(ipts_p->dev);
  767. + if (ret) {
  768. + DRM_ERROR("i915_mutex_lock_interruptible failed\n");
  769. + return;
  770. + }
  771. +
  772. + // Reacquire the doorbell
  773. + i915_guc_ipts_reacquire_doorbell(ipts_p->dev->dev_private);
  774. +
  775. + mutex_unlock(&ipts_p->dev->struct_mutex);
  776. +}
  777. +
  778. +static int ipts_get_wq_info(uint64_t gfx_handle,
  779. + struct ipts_wq_info *wq_info)
  780. +{
  781. + if (gfx_handle != (uint64_t)&ipts) {
  782. + DRM_ERROR("invalid gfx handle\n");
  783. + return -EINVAL;
  784. + }
  785. +
  786. + *wq_info = ipts.wq_info;
  787. +
  788. + ipts_reacquire_db(&ipts);
  789. + schedule_delayed_work(&ipts.reacquire_db_work,
  790. + msecs_to_jiffies(DB_LOST_CHECK_STEP1_INTERVAL));
  791. +
  792. + return 0;
  793. +}
  794. +
  795. +static int set_wq_info(void)
  796. +{
  797. + struct drm_i915_private *dev_priv = to_i915(ipts.dev);
  798. + struct intel_guc *guc = &dev_priv->guc;
  799. + struct intel_guc_client *client;
  800. + struct guc_process_desc *desc;
  801. + struct ipts_wq_info *wq_info;
  802. + void *base = NULL;
  803. + u64 phy_base = 0;
  804. +
  805. + wq_info = &ipts.wq_info;
  806. +
  807. + client = guc->ipts_client;
  808. + if (!client) {
  809. + DRM_ERROR("IPTS GuC client is NOT available\n");
  810. + return -EINVAL;
  811. + }
  812. +
  813. + base = client->vaddr;
  814. + desc = (struct guc_process_desc *)
  815. + ((u64)base + client->proc_desc_offset);
  816. +
  817. + desc->wq_base_addr = (u64)base + GUC_DB_SIZE;
  818. + desc->db_base_addr = (u64)base + client->doorbell_offset;
  819. +
  820. + // IPTS expects physical addresses to pass it to ME
  821. + phy_base = sg_dma_address(client->vma->pages->sgl);
  822. +
  823. + wq_info->db_addr = desc->db_base_addr;
  824. + wq_info->db_phy_addr = phy_base + client->doorbell_offset;
  825. + wq_info->db_cookie_offset = offsetof(struct guc_doorbell_info, cookie);
  826. + wq_info->wq_addr = desc->wq_base_addr;
  827. + wq_info->wq_phy_addr = phy_base + GUC_DB_SIZE;
  828. + wq_info->wq_head_addr = (u64)&desc->head;
  829. + wq_info->wq_tail_addr = (u64)&desc->tail;
  830. + wq_info->wq_size = desc->wq_size_bytes;
  831. +
  832. + wq_info->wq_head_phy_addr = phy_base + client->proc_desc_offset +
  833. + offsetof(struct guc_process_desc, head);
  834. +
  835. + wq_info->wq_tail_phy_addr = phy_base + client->proc_desc_offset +
  836. + offsetof(struct guc_process_desc, tail);
  837. +
  838. + return 0;
  839. +}
  840. +
  841. +static int ipts_init_wq(void)
  842. +{
  843. + int ret = 0;
  844. +
  845. + ret = i915_mutex_lock_interruptible(ipts.dev);
  846. + if (ret) {
  847. + DRM_ERROR("i915_mutex_lock_interruptible failed\n");
  848. + return ret;
  849. + }
  850. +
  851. + // disable IPTS submission
  852. + i915_guc_ipts_submission_disable(ipts.dev->dev_private);
  853. +
  854. + // enable IPTS submission
  855. + ret = i915_guc_ipts_submission_enable(ipts.dev->dev_private,
  856. + ipts.ipts_context);
  857. + if (ret) {
  858. + DRM_ERROR("i915_guc_ipts_submission_enable failed: %d\n", ret);
  859. + goto out;
  860. + }
  861. +
  862. + ret = set_wq_info();
  863. + if (ret) {
  864. + DRM_ERROR("set_wq_info failed\n");
  865. + goto out;
  866. + }
  867. +
  868. +out:
  869. + mutex_unlock(&ipts.dev->struct_mutex);
  870. +
  871. + return ret;
  872. +}
  873. +
  874. +static void ipts_release_wq(void)
  875. +{
  876. + int ret = 0;
  877. +
  878. + ret = i915_mutex_lock_interruptible(ipts.dev);
  879. + if (ret) {
  880. + DRM_ERROR("i915_mutex_lock_interruptible failed\n");
  881. + return;
  882. + }
  883. +
  884. + // disable IPTS submission
  885. + i915_guc_ipts_submission_disable(ipts.dev->dev_private);
  886. +
  887. + mutex_unlock(&ipts.dev->struct_mutex);
  888. +}
  889. +
  890. +static int ipts_map_buffer(u64 gfx_handle, struct ipts_mapbuffer *mapbuf)
  891. +{
  892. + struct ipts_object *obj;
  893. + struct i915_gem_context *ipts_ctx = NULL;
  894. + struct drm_i915_private *dev_priv = to_i915(ipts.dev);
  895. + struct i915_address_space *vm = NULL;
  896. + struct i915_vma *vma = NULL;
  897. + int ret = 0;
  898. +
  899. + if (gfx_handle != (uint64_t)&ipts) {
  900. + DRM_ERROR("invalid gfx handle\n");
  901. + return -EINVAL;
  902. + }
  903. +
  904. + // Acquire mutex first
  905. + ret = i915_mutex_lock_interruptible(ipts.dev);
  906. + if (ret) {
  907. + DRM_ERROR("i915_mutex_lock_interruptible failed\n");
  908. + return -EINVAL;
  909. + }
  910. +
  911. + obj = ipts_object_create(mapbuf->size, mapbuf->flags);
  912. + if (!obj)
  913. + return -ENOMEM;
  914. +
  915. + ipts_ctx = ipts.ipts_context;
  916. + ret = ipts_object_pin(obj, ipts_ctx);
  917. + if (ret) {
  918. + DRM_ERROR("Not able to pin iTouch obj\n");
  919. + ipts_object_free(obj);
  920. + mutex_unlock(&ipts.dev->struct_mutex);
  921. + return -ENOMEM;
  922. + }
  923. +
  924. + if (mapbuf->flags & IPTS_BUF_FLAG_CONTIGUOUS)
  925. + obj->cpu_addr = obj->gem_obj->phys_handle->vaddr;
  926. + else
  927. + obj->cpu_addr = ipts_object_map(obj);
  928. +
  929. + if (ipts_ctx->ppgtt)
  930. + vm = &ipts_ctx->ppgtt->vm;
  931. + else
  932. + vm = &dev_priv->ggtt.vm;
  933. +
  934. + vma = i915_vma_instance(obj->gem_obj, vm, NULL);
  935. + if (IS_ERR(vma)) {
  936. + DRM_ERROR("cannot find or create vma\n");
  937. + return -EINVAL;
  938. + }
  939. +
  940. + mapbuf->gfx_addr = (void *)vma->node.start;
  941. + mapbuf->cpu_addr = (void *)obj->cpu_addr;
  942. + mapbuf->buf_handle = (u64)obj;
  943. + if (mapbuf->flags & IPTS_BUF_FLAG_CONTIGUOUS)
  944. + mapbuf->phy_addr = (u64)obj->gem_obj->phys_handle->busaddr;
  945. +
  946. + // Release the mutex
  947. + mutex_unlock(&ipts.dev->struct_mutex);
  948. +
  949. + return 0;
  950. +}
  951. +
  952. +static int ipts_unmap_buffer(uint64_t gfx_handle, uint64_t buf_handle)
  953. +{
  954. + struct ipts_object *obj = (struct ipts_object *)buf_handle;
  955. +
  956. + if (gfx_handle != (uint64_t)&ipts) {
  957. + DRM_ERROR("invalid gfx handle\n");
  958. + return -EINVAL;
  959. + }
  960. +
  961. + if (!obj->gem_obj->phys_handle)
  962. + ipts_object_unmap(obj);
  963. +
  964. + ipts_object_unpin(obj);
  965. + ipts_object_free(obj);
  966. +
  967. + return 0;
  968. +}
  969. +
  970. +int ipts_connect(struct ipts_connect *ipts_connect)
  971. +{
  972. + u32 flags = DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER;
  973. + struct drm_i915_private *dev_priv = to_i915(ipts.dev);
  974. +
  975. + if (!ipts.initialized)
  976. + return -EIO;
  977. +
  978. + if (!ipts_connect)
  979. + return -EINVAL;
  980. +
  981. + if (ipts_connect->if_version > SUPPORTED_IPTS_INTERFACE_VERSION)
  982. + return -EINVAL;
  983. +
  984. + // set up device-link for PM
  985. + if (!device_link_add(ipts_connect->client, ipts.dev->dev, flags))
  986. + return -EFAULT;
  987. +
  988. + // return gpu operations for ipts
  989. + ipts_connect->ipts_ops.get_wq_info = ipts_get_wq_info;
  990. + ipts_connect->ipts_ops.map_buffer = ipts_map_buffer;
  991. + ipts_connect->ipts_ops.unmap_buffer = ipts_unmap_buffer;
  992. + ipts_connect->gfx_version = INTEL_INFO(dev_priv)->gen;
  993. + ipts_connect->gfx_handle = (uint64_t)&ipts;
  994. +
  995. + // save callback and data
  996. + ipts.data = ipts_connect->data;
  997. + ipts.ipts_clbks = ipts_connect->ipts_cb;
  998. +
  999. + ipts.connected = true;
  1000. +
  1001. + return 0;
  1002. +}
  1003. +EXPORT_SYMBOL_GPL(ipts_connect);
  1004. +
  1005. +void ipts_disconnect(uint64_t gfx_handle)
  1006. +{
  1007. + if (!ipts.initialized)
  1008. + return;
  1009. +
  1010. + if (gfx_handle != (uint64_t)&ipts || !ipts.connected) {
  1011. + DRM_ERROR("invalid gfx handle\n");
  1012. + return;
  1013. + }
  1014. +
  1015. + ipts.data = 0;
  1016. + memset(&ipts.ipts_clbks, 0, sizeof(struct ipts_callback));
  1017. +
  1018. + ipts.connected = false;
  1019. +}
  1020. +EXPORT_SYMBOL_GPL(ipts_disconnect);
  1021. +
  1022. +static void reacquire_db_work_func(struct work_struct *work)
  1023. +{
  1024. + struct delayed_work *d_work = container_of(work,
  1025. + struct delayed_work, work);
  1026. + struct ipts *ipts_p = container_of(d_work,
  1027. + struct ipts, reacquire_db_work);
  1028. + u32 head;
  1029. + u32 tail;
  1030. + u32 size;
  1031. + u32 load;
  1032. +
  1033. + head = *(u32 *)ipts_p->wq_info.wq_head_addr;
  1034. + tail = *(u32 *)ipts_p->wq_info.wq_tail_addr;
  1035. + size = ipts_p->wq_info.wq_size;
  1036. +
  1037. + if (head >= tail)
  1038. + load = head - tail;
  1039. + else
  1040. + load = head + size - tail;
  1041. +
  1042. + if (load < REACQUIRE_DB_THRESHOLD) {
  1043. + ipts_p->need_reacquire_db = false;
  1044. + goto reschedule_work;
  1045. + }
  1046. +
  1047. + if (ipts_p->need_reacquire_db) {
  1048. + if (ipts_p->old_head == head &&
  1049. + ipts_p->old_tail == tail)
  1050. + ipts_reacquire_db(ipts_p);
  1051. + ipts_p->need_reacquire_db = false;
  1052. + } else {
  1053. + ipts_p->old_head = head;
  1054. + ipts_p->old_tail = tail;
  1055. + ipts_p->need_reacquire_db = true;
  1056. +
  1057. + // recheck
  1058. + schedule_delayed_work(&ipts_p->reacquire_db_work,
  1059. + msecs_to_jiffies(DB_LOST_CHECK_STEP2_INTERVAL));
  1060. + return;
  1061. + }
  1062. +
  1063. +reschedule_work:
  1064. + schedule_delayed_work(&ipts_p->reacquire_db_work,
  1065. + msecs_to_jiffies(DB_LOST_CHECK_STEP1_INTERVAL));
  1066. +}
  1067. +
  1068. +/**
  1069. + * ipts_init - Initialize ipts support
  1070. + * @dev: drm device
  1071. + *
  1072. + * Setup the required structures for ipts.
  1073. + */
  1074. +int ipts_init(struct drm_device *dev)
  1075. +{
  1076. + int ret = 0;
  1077. +
  1078. + pr_info("ipts: initializing ipts\n");
  1079. +
  1080. + ipts.dev = dev;
  1081. + INIT_DELAYED_WORK(&ipts.reacquire_db_work,
  1082. + reacquire_db_work_func);
  1083. +
  1084. + ret = create_ipts_context();
  1085. + if (ret)
  1086. + return -ENOMEM;
  1087. +
  1088. + ret = ipts_init_wq();
  1089. + if (ret)
  1090. + return ret;
  1091. +
  1092. + ipts.initialized = true;
  1093. + pr_info("ipts: Intel iTouch framework initialized\n");
  1094. +
  1095. + return ret;
  1096. +}
  1097. +
  1098. +void ipts_cleanup(struct drm_device *dev)
  1099. +{
  1100. + struct ipts_object *obj, *n;
  1101. +
  1102. + if (ipts.dev != dev)
  1103. + return;
  1104. +
  1105. + list_for_each_entry_safe(obj, n, &ipts.buffers.list, list) {
  1106. + struct i915_vma *vma, *vn;
  1107. +
  1108. + list_for_each_entry_safe(vma, vn, &obj->list, obj_link) {
  1109. + vma->flags &= ~I915_VMA_PIN_MASK;
  1110. + i915_vma_destroy(vma);
  1111. + }
  1112. +
  1113. + list_del(&obj->list);
  1114. +
  1115. + if (!obj->gem_obj->phys_handle)
  1116. + ipts_object_unmap(obj);
  1117. +
  1118. + ipts_object_unpin(obj);
  1119. + i915_gem_free_object(&obj->gem_obj->base);
  1120. + kfree(obj);
  1121. + }
  1122. +
  1123. + ipts_release_wq();
  1124. + destroy_ipts_context();
  1125. + cancel_delayed_work(&ipts.reacquire_db_work);
  1126. +}
  1127. diff --git a/drivers/gpu/drm/i915/intel_ipts.h b/drivers/gpu/drm/i915/intel_ipts.h
  1128. new file mode 100644
  1129. index 000000000000..67f90b72f237
  1130. --- /dev/null
  1131. +++ b/drivers/gpu/drm/i915/intel_ipts.h
  1132. @@ -0,0 +1,34 @@
  1133. +/*
  1134. + * Copyright © 2016 Intel Corporation
  1135. + *
  1136. + * Permission is hereby granted, free of charge, to any person obtaining a
  1137. + * copy of this software and associated documentation files (the "Software"),
  1138. + * to deal in the Software without restriction, including without limitation
  1139. + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  1140. + * and/or sell copies of the Software, and to permit persons to whom the
  1141. + * Software is furnished to do so, subject to the following conditions:
  1142. + *
  1143. + * The above copyright notice and this permission notice (including the next
  1144. + * paragraph) shall be included in all copies or substantial portions of the
  1145. + * Software.
  1146. + *
  1147. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  1148. + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  1149. + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  1150. + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  1151. + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  1152. + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  1153. + * IN THE SOFTWARE.
  1154. + *
  1155. + */
  1156. +#ifndef _INTEL_IPTS_H_
  1157. +#define _INTEL_IPTS_H_
  1158. +
  1159. +#include <drm/drm_device.h>
  1160. +
  1161. +int ipts_init(struct drm_device *dev);
  1162. +void ipts_cleanup(struct drm_device *dev);
  1163. +int ipts_notify_backlight_status(bool backlight_on);
  1164. +int ipts_notify_complete(void);
  1165. +
  1166. +#endif //_INTEL_IPTS_H_
  1167. diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
  1168. index 13e97faabaa7..a4af67d3d6ff 100644
  1169. --- a/drivers/gpu/drm/i915/intel_lrc.c
  1170. +++ b/drivers/gpu/drm/i915/intel_lrc.c
  1171. @@ -164,9 +164,6 @@
  1172. #define WA_TAIL_DWORDS 2
  1173. #define WA_TAIL_BYTES (sizeof(u32) * WA_TAIL_DWORDS)
  1174. -static int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
  1175. - struct intel_engine_cs *engine,
  1176. - struct intel_context *ce);
  1177. static void execlists_init_reg_state(u32 *reg_state,
  1178. struct i915_gem_context *ctx,
  1179. struct intel_engine_cs *engine,
  1180. @@ -1292,7 +1289,7 @@ static void execlists_context_destroy(struct intel_context *ce)
  1181. i915_gem_object_put(ce->state->obj);
  1182. }
  1183. -static void execlists_context_unpin(struct intel_context *ce)
  1184. +void execlists_context_unpin(struct intel_context *ce)
  1185. {
  1186. intel_ring_unpin(ce->ring);
  1187. @@ -1379,7 +1376,7 @@ static const struct intel_context_ops execlists_context_ops = {
  1188. .destroy = execlists_context_destroy,
  1189. };
  1190. -static struct intel_context *
  1191. +struct intel_context *
  1192. execlists_context_pin(struct intel_engine_cs *engine,
  1193. struct i915_gem_context *ctx)
  1194. {
  1195. @@ -2479,6 +2476,9 @@ int logical_render_ring_init(struct intel_engine_cs *engine)
  1196. logical_ring_setup(engine);
  1197. + engine->irq_keep_mask |= GT_RENDER_PIPECTL_NOTIFY_INTERRUPT
  1198. + << GEN8_RCS_IRQ_SHIFT;
  1199. +
  1200. if (HAS_L3_DPF(dev_priv))
  1201. engine->irq_keep_mask |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
  1202. @@ -2743,7 +2743,7 @@ populate_lr_context(struct i915_gem_context *ctx,
  1203. return ret;
  1204. }
  1205. -static int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
  1206. +int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
  1207. struct intel_engine_cs *engine,
  1208. struct intel_context *ce)
  1209. {
  1210. diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
  1211. index 4dfb78e3ec7e..32159231a16e 100644
  1212. --- a/drivers/gpu/drm/i915/intel_lrc.h
  1213. +++ b/drivers/gpu/drm/i915/intel_lrc.h
  1214. @@ -106,4 +106,12 @@ void intel_lr_context_resume(struct drm_i915_private *dev_priv);
  1215. void intel_execlists_set_default_submission(struct intel_engine_cs *engine);
  1216. +struct intel_context *
  1217. +execlists_context_pin(struct intel_engine_cs *engine,
  1218. + struct i915_gem_context *ctx);
  1219. +void execlists_context_unpin(struct intel_context *ce);
  1220. +int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
  1221. + struct intel_engine_cs *engine,
  1222. + struct intel_context *ce);
  1223. +
  1224. #endif /* _INTEL_LRC_H_ */
  1225. diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
  1226. index 4a9f139e7b73..c137a57f6702 100644
  1227. --- a/drivers/gpu/drm/i915/intel_panel.c
  1228. +++ b/drivers/gpu/drm/i915/intel_panel.c
  1229. @@ -34,6 +34,7 @@
  1230. #include <linux/moduleparam.h>
  1231. #include <linux/pwm.h>
  1232. #include "intel_drv.h"
  1233. +#include "intel_ipts.h"
  1234. #define CRC_PMIC_PWM_PERIOD_NS 21333
  1235. @@ -659,6 +660,9 @@ static void lpt_disable_backlight(const struct drm_connector_state *old_conn_sta
  1236. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1237. u32 tmp;
  1238. + if (INTEL_GEN(dev_priv) >= 9 && i915_modparams.enable_guc && i915_modparams.enable_ipts)
  1239. + ipts_notify_backlight_status(false);
  1240. +
  1241. intel_panel_actually_set_backlight(old_conn_state, 0);
  1242. /*
  1243. @@ -846,6 +850,9 @@ static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
  1244. /* This won't stick until the above enable. */
  1245. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  1246. +
  1247. + if (INTEL_GEN(dev_priv) >= 9 && i915_modparams.enable_guc && i915_modparams.enable_ipts)
  1248. + ipts_notify_backlight_status(true);
  1249. }
  1250. static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
  1251. diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
  1252. index e723156057a6..11795c7a1662 100644
  1253. --- a/drivers/hid/hid-core.c
  1254. +++ b/drivers/hid/hid-core.c
  1255. @@ -290,8 +290,9 @@ static int hid_add_field(struct hid_parser *parser, unsigned report_type, unsign
  1256. /* Total size check: Allow for possible report index byte */
  1257. if (report->size > (HID_MAX_BUFFER_SIZE - 1) << 3) {
  1258. - hid_err(parser->device, "report is too long\n");
  1259. - return -1;
  1260. + hid_warn(parser->device, "report is too long (%u), skipping\n",
  1261. + report->size);
  1262. + return 0;
  1263. }
  1264. if (!parser->local.usage_index) /* Ignore padding fields */
  1265. diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
  1266. index 3726eacdf65d..77263b5f5915 100644
  1267. --- a/drivers/misc/Kconfig
  1268. +++ b/drivers/misc/Kconfig
  1269. @@ -520,6 +520,7 @@ source "drivers/misc/ti-st/Kconfig"
  1270. source "drivers/misc/lis3lv02d/Kconfig"
  1271. source "drivers/misc/altera-stapl/Kconfig"
  1272. source "drivers/misc/mei/Kconfig"
  1273. +source "drivers/misc/ipts/Kconfig"
  1274. source "drivers/misc/vmw_vmci/Kconfig"
  1275. source "drivers/misc/mic/Kconfig"
  1276. source "drivers/misc/genwqe/Kconfig"
  1277. diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
  1278. index af22bbc3d00c..eb1eb0d58c32 100644
  1279. --- a/drivers/misc/Makefile
  1280. +++ b/drivers/misc/Makefile
  1281. @@ -44,6 +44,7 @@ obj-y += lis3lv02d/
  1282. obj-$(CONFIG_USB_SWITCH_FSA9480) += fsa9480.o
  1283. obj-$(CONFIG_ALTERA_STAPL) +=altera-stapl/
  1284. obj-$(CONFIG_INTEL_MEI) += mei/
  1285. +obj-$(CONFIG_INTEL_IPTS) += ipts/
  1286. obj-$(CONFIG_VMWARE_VMCI) += vmw_vmci/
  1287. obj-$(CONFIG_LATTICE_ECP3_CONFIG) += lattice-ecp3-config.o
  1288. obj-$(CONFIG_SRAM) += sram.o
  1289. diff --git a/drivers/misc/ipts/Kconfig b/drivers/misc/ipts/Kconfig
  1290. new file mode 100644
  1291. index 000000000000..900d2c58ca74
  1292. --- /dev/null
  1293. +++ b/drivers/misc/ipts/Kconfig
  1294. @@ -0,0 +1,12 @@
  1295. +# SPDX-License-Identifier: GPL-2.0-or-later
  1296. +config INTEL_IPTS
  1297. + tristate "Intel Precise Touch & Stylus"
  1298. + select INTEL_MEI
  1299. + depends on X86 && PCI && HID && DRM_I915
  1300. + help
  1301. + Intel Precise Touch & Stylus support
  1302. + Supported SoCs:
  1303. + Intel Skylake
  1304. + Intel Kabylake
  1305. +
  1306. +source "drivers/misc/ipts/companion/Kconfig"
  1307. diff --git a/drivers/misc/ipts/Makefile b/drivers/misc/ipts/Makefile
  1308. new file mode 100644
  1309. index 000000000000..bb3982f48afc
  1310. --- /dev/null
  1311. +++ b/drivers/misc/ipts/Makefile
  1312. @@ -0,0 +1,19 @@
  1313. +# SPDX-License-Identifier: GPL-2.0-or-later
  1314. +#
  1315. +# Makefile - Intel Precise Touch & Stylus device driver
  1316. +# Copyright (c) 2016 Intel Corporation
  1317. +#
  1318. +
  1319. +obj-$(CONFIG_INTEL_IPTS)+= intel-ipts.o
  1320. +intel-ipts-objs += companion.o
  1321. +intel-ipts-objs += ipts.o
  1322. +intel-ipts-objs += mei.o
  1323. +intel-ipts-objs += hid.o
  1324. +intel-ipts-objs += msg-handler.o
  1325. +intel-ipts-objs += kernel.o
  1326. +intel-ipts-objs += params.o
  1327. +intel-ipts-objs += resource.o
  1328. +intel-ipts-objs += gfx.o
  1329. +intel-ipts-$(CONFIG_DEBUG_FS) += dbgfs.o
  1330. +
  1331. +obj-y += companion/
  1332. diff --git a/drivers/misc/ipts/companion.c b/drivers/misc/ipts/companion.c
  1333. new file mode 100644
  1334. index 000000000000..c8199d8be5d6
  1335. --- /dev/null
  1336. +++ b/drivers/misc/ipts/companion.c
  1337. @@ -0,0 +1,230 @@
  1338. +// SPDX-License-Identifier: GPL-2.0-or-later
  1339. +/*
  1340. + *
  1341. + * Intel Precise Touch & Stylus
  1342. + * Copyright (c) 2016 Intel Corporation
  1343. + *
  1344. + */
  1345. +
  1346. +#include <linux/firmware.h>
  1347. +#include <linux/ipts.h>
  1348. +#include <linux/ipts-binary.h>
  1349. +#include <linux/ipts-companion.h>
  1350. +#include <linux/mutex.h>
  1351. +
  1352. +#include "companion.h"
  1353. +#include "ipts.h"
  1354. +#include "params.h"
  1355. +
  1356. +#define IPTS_FW_PATH_FMT "intel/ipts/%s"
  1357. +#define IPTS_FW_CONFIG_FILE "ipts_fw_config.bin"
  1358. +
  1359. +struct ipts_companion *ipts_companion;
  1360. +DEFINE_MUTEX(ipts_companion_lock);
  1361. +
  1362. +bool ipts_companion_available(void)
  1363. +{
  1364. + bool ret;
  1365. +
  1366. + mutex_lock(&ipts_companion_lock);
  1367. +
  1368. + ret = ipts_companion != NULL;
  1369. +
  1370. + mutex_unlock(&ipts_companion_lock);
  1371. +
  1372. + return ret;
  1373. +}
  1374. +
  1375. +/*
  1376. + * General purpose API for adding or removing a companion driver
  1377. + * A companion driver is a driver that implements hardware specific
  1378. + * behaviour into IPTS, so it doesn't have to be hardcoded into the
  1379. + * main driver. All requests to the companion driver should be wrapped,
  1380. + * with a fallback in case a companion driver cannot be found.
  1381. + */
  1382. +
  1383. +int ipts_add_companion(struct ipts_companion *companion)
  1384. +{
  1385. + int ret;
  1386. +
  1387. + // Make sure that access to the companion is synchronized
  1388. + mutex_lock(&ipts_companion_lock);
  1389. +
  1390. + if (ipts_companion == NULL) {
  1391. + ret = 0;
  1392. + ipts_companion = companion;
  1393. + } else {
  1394. + ret = -EBUSY;
  1395. + }
  1396. +
  1397. + mutex_unlock(&ipts_companion_lock);
  1398. +
  1399. + return ret;
  1400. +}
  1401. +EXPORT_SYMBOL_GPL(ipts_add_companion);
  1402. +
  1403. +int ipts_remove_companion(struct ipts_companion *companion)
  1404. +{
  1405. + int ret;
  1406. +
  1407. + // Make sure that access to the companion is synchronized
  1408. + mutex_lock(&ipts_companion_lock);
  1409. +
  1410. + if (ipts_companion != NULL && companion != NULL &&
  1411. + ipts_companion->name != companion->name) {
  1412. + ret = -EPERM;
  1413. + } else {
  1414. + ret = 0;
  1415. + ipts_companion = NULL;
  1416. + }
  1417. +
  1418. + mutex_unlock(&ipts_companion_lock);
  1419. + return ret;
  1420. +}
  1421. +EXPORT_SYMBOL_GPL(ipts_remove_companion);
  1422. +
  1423. +/*
  1424. + * Utility functions for IPTS. These functions replace codepaths in the IPTS
  1425. + * driver, and redirect them to the companion driver, if one was found.
  1426. + * Otherwise the legacy code gets executed as a fallback.
  1427. + */
  1428. +
  1429. +int ipts_request_firmware(const struct firmware **fw, const char *name,
  1430. + struct device *device)
  1431. +{
  1432. + int ret = 0;
  1433. + char fw_path[MAX_IOCL_FILE_PATH_LEN];
  1434. +
  1435. + // Make sure that access to the companion is synchronized
  1436. + mutex_lock(&ipts_companion_lock);
  1437. +
  1438. + // Check if a companion was registered. If not, skip
  1439. + // forward and try to load the firmware from the legacy path
  1440. + if (ipts_companion == NULL || ipts_modparams.ignore_companion)
  1441. + goto request_firmware_fallback;
  1442. +
  1443. + ret = ipts_companion->firmware_request(ipts_companion, fw,
  1444. + name, device);
  1445. + if (!ret)
  1446. + goto request_firmware_return;
  1447. +
  1448. +request_firmware_fallback:
  1449. +
  1450. + // If fallback loading for firmware was disabled, abort.
  1451. + // Return -ENOENT as no firmware file was found.
  1452. + if (ipts_modparams.ignore_fw_fallback) {
  1453. + ret = -ENOENT;
  1454. + goto request_firmware_return;
  1455. + }
  1456. +
  1457. + // No firmware was found by the companion driver, try the generic path.
  1458. + snprintf(fw_path, MAX_IOCL_FILE_PATH_LEN, IPTS_FW_PATH_FMT, name);
  1459. + ret = request_firmware(fw, fw_path, device);
  1460. +
  1461. +request_firmware_return:
  1462. +
  1463. + mutex_unlock(&ipts_companion_lock);
  1464. +
  1465. + return ret;
  1466. +}
  1467. +
  1468. +static struct ipts_bin_fw_list *ipts_alloc_fw_list(
  1469. + struct ipts_bin_fw_info **fw)
  1470. +{
  1471. + int size, len, i, j;
  1472. + struct ipts_bin_fw_list *fw_list;
  1473. + char *itr;
  1474. +
  1475. + // Figure out the amount of firmware files inside of the array
  1476. + len = 0;
  1477. + while (fw[len] != NULL)
  1478. + len++;
  1479. +
  1480. + // Determine the size that the final list will need in memory
  1481. + size = sizeof(struct ipts_bin_fw_list);
  1482. + for (i = 0; i < len; i++) {
  1483. + size += sizeof(struct ipts_bin_fw_info);
  1484. + size += sizeof(struct ipts_bin_data_file_info) *
  1485. + fw[i]->num_of_data_files;
  1486. + }
  1487. +
  1488. + fw_list = kmalloc(size, GFP_KERNEL);
  1489. + fw_list->num_of_fws = len;
  1490. +
  1491. + itr = (char *)fw_list->fw_info;
  1492. + for (i = 0; i < len; i++) {
  1493. + *(struct ipts_bin_fw_info *)itr = *fw[i];
  1494. +
  1495. + itr += sizeof(struct ipts_bin_fw_info);
  1496. +
  1497. + for (j = 0; j < fw[i]->num_of_data_files; j++) {
  1498. + *(struct ipts_bin_data_file_info *)itr =
  1499. + fw[i]->data_file[j];
  1500. +
  1501. + itr += sizeof(struct ipts_bin_data_file_info);
  1502. + }
  1503. + }
  1504. +
  1505. + return fw_list;
  1506. +}
  1507. +
  1508. +int ipts_request_firmware_config(struct ipts_info *ipts,
  1509. + struct ipts_bin_fw_list **cfg)
  1510. +{
  1511. + int ret;
  1512. + const struct firmware *config_fw = NULL;
  1513. +
  1514. + // Make sure that access to the companion is synchronized
  1515. + mutex_lock(&ipts_companion_lock);
  1516. +
  1517. + // Check if a companion was registered. If not, skip
  1518. + // forward and try to load the firmware config from a file
  1519. + if (ipts_modparams.ignore_companion || ipts_companion == NULL) {
  1520. + mutex_unlock(&ipts_companion_lock);
  1521. + goto config_fallback;
  1522. + }
  1523. +
  1524. + if (ipts_companion->firmware_config != NULL) {
  1525. + *cfg = ipts_alloc_fw_list(ipts_companion->firmware_config);
  1526. + mutex_unlock(&ipts_companion_lock);
  1527. + return 0;
  1528. + }
  1529. +
  1530. +config_fallback:
  1531. +
  1532. + // If fallback loading for the firmware config was disabled, abort.
  1533. + // Return -ENOENT as no config file was found.
  1534. + if (ipts_modparams.ignore_config_fallback)
  1535. + return -ENOENT;
  1536. +
  1537. + // No firmware config was found by the companion driver,
  1538. + // try loading it from a file now
  1539. + ret = ipts_request_firmware(&config_fw, IPTS_FW_CONFIG_FILE,
  1540. + &ipts->cldev->dev);
  1541. + if (!ret)
  1542. + *cfg = (struct ipts_bin_fw_list *)config_fw->data;
  1543. + else
  1544. + release_firmware(config_fw);
  1545. +
  1546. + return ret;
  1547. +
  1548. +}
  1549. +
  1550. +unsigned int ipts_get_quirks(void)
  1551. +{
  1552. + unsigned int ret;
  1553. +
  1554. + // Make sure that access to the companion is synchronized
  1555. + mutex_lock(&ipts_companion_lock);
  1556. +
  1557. + // If the companion is ignored, or doesn't exist, assume that
  1558. + // the device doesn't have any quirks
  1559. + if (ipts_modparams.ignore_companion || ipts_companion == NULL)
  1560. + ret = IPTS_QUIRK_NONE;
  1561. + else
  1562. + ret = ipts_companion->get_quirks(ipts_companion);
  1563. +
  1564. + mutex_unlock(&ipts_companion_lock);
  1565. +
  1566. + return ret;
  1567. +}
  1568. diff --git a/drivers/misc/ipts/companion.h b/drivers/misc/ipts/companion.h
  1569. new file mode 100644
  1570. index 000000000000..bb3368b41a38
  1571. --- /dev/null
  1572. +++ b/drivers/misc/ipts/companion.h
  1573. @@ -0,0 +1,26 @@
  1574. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  1575. +/*
  1576. + *
  1577. + * Intel Precise Touch & Stylus
  1578. + * Copyright (c) 2016 Intel Corporation
  1579. + *
  1580. + */
  1581. +
  1582. +#ifndef _IPTS_COMPANION_H_
  1583. +#define _IPTS_COMPANION_H_
  1584. +
  1585. +#include <linux/firmware.h>
  1586. +#include <linux/ipts-binary.h>
  1587. +
  1588. +#include "ipts.h"
  1589. +
  1590. +bool ipts_companion_available(void);
  1591. +unsigned int ipts_get_quirks(void);
  1592. +
  1593. +int ipts_request_firmware(const struct firmware **fw, const char *name,
  1594. + struct device *device);
  1595. +
  1596. +int ipts_request_firmware_config(struct ipts_info *ipts,
  1597. + struct ipts_bin_fw_list **firmware_config);
  1598. +
  1599. +#endif // _IPTS_COMPANION_H_
  1600. diff --git a/drivers/misc/ipts/companion/Kconfig b/drivers/misc/ipts/companion/Kconfig
  1601. new file mode 100644
  1602. index 000000000000..ef17d9bb5242
  1603. --- /dev/null
  1604. +++ b/drivers/misc/ipts/companion/Kconfig
  1605. @@ -0,0 +1,8 @@
  1606. +# SPDX-License-Identifier: GPL-2.0-or-later
  1607. +config INTEL_IPTS_SURFACE
  1608. + tristate "IPTS companion driver for Microsoft Surface"
  1609. + depends on INTEL_IPTS && ACPI
  1610. + help
  1611. + IPTS companion driver for Microsoft Surface. This driver is
  1612. + responsible for loading firmware using surface-specific hardware IDs.
  1613. + If you have a Microsoft Surface using IPTS, select y or m here.
  1614. diff --git a/drivers/misc/ipts/companion/Makefile b/drivers/misc/ipts/companion/Makefile
  1615. new file mode 100644
  1616. index 000000000000..b37f2f59937a
  1617. --- /dev/null
  1618. +++ b/drivers/misc/ipts/companion/Makefile
  1619. @@ -0,0 +1,2 @@
  1620. +# SPDX-License-Identifier: GPL-2.0-or-later
  1621. +obj-$(CONFIG_INTEL_IPTS_SURFACE)+= ipts-surface.o
  1622. diff --git a/drivers/misc/ipts/companion/ipts-surface.c b/drivers/misc/ipts/companion/ipts-surface.c
  1623. new file mode 100644
  1624. index 000000000000..1a151538b898
  1625. --- /dev/null
  1626. +++ b/drivers/misc/ipts/companion/ipts-surface.c
  1627. @@ -0,0 +1,224 @@
  1628. +// SPDX-License-Identifier: GPL-2.0-or-later
  1629. +/*
  1630. + *
  1631. + * Intel Precise Touch & Stylus
  1632. + * Copyright (c) 2016 Intel Corporation
  1633. + * Copyright (c) 2019 Dorian Stoll
  1634. + *
  1635. + */
  1636. +
  1637. +#include <linux/acpi.h>
  1638. +#include <linux/firmware.h>
  1639. +#include <linux/ipts.h>
  1640. +#include <linux/ipts-companion.h>
  1641. +#include <linux/module.h>
  1642. +#include <linux/platform_device.h>
  1643. +
  1644. +#define IPTS_SURFACE_FW_PATH_FMT "intel/ipts/%s/%s"
  1645. +
  1646. +/*
  1647. + * checkpatch complains about this and wants it wrapped with do { } while(0);
  1648. + * Since this would absolutely not work, just ignore checkpatch in this case.
  1649. + */
  1650. +#define IPTS_SURFACE_FIRMWARE(X) \
  1651. + MODULE_FIRMWARE("intel/ipts/" X "/config.bin"); \
  1652. + MODULE_FIRMWARE("intel/ipts/" X "/intel_desc.bin"); \
  1653. + MODULE_FIRMWARE("intel/ipts/" X "/vendor_desc.bin"); \
  1654. + MODULE_FIRMWARE("intel/ipts/" X "/vendor_kernel.bin")
  1655. +
  1656. +struct ipts_surface_data {
  1657. + const char *hid;
  1658. + unsigned int quirks;
  1659. +};
  1660. +
  1661. +// Surface Book 1 / Surface Studio
  1662. +static const struct ipts_surface_data ipts_surface_mshw0076 = {
  1663. + .hid = "MSHW0076",
  1664. + .quirks = IPTS_QUIRK_NO_FEEDBACK,
  1665. +};
  1666. +
  1667. +// Surface Pro 4
  1668. +static const struct ipts_surface_data ipts_surface_mshw0078 = {
  1669. + .hid = "MSHW0078",
  1670. + .quirks = IPTS_QUIRK_NO_FEEDBACK,
  1671. +};
  1672. +
  1673. +// Surface Laptop 1 / 2
  1674. +static const struct ipts_surface_data ipts_surface_mshw0079 = {
  1675. + .hid = "MSHW0079",
  1676. + .quirks = IPTS_QUIRK_NONE,
  1677. +};
  1678. +
  1679. +// Surface Pro 5 / 6
  1680. +static const struct ipts_surface_data ipts_surface_mshw0101 = {
  1681. + .hid = "MSHW0101",
  1682. + .quirks = IPTS_QUIRK_NONE,
  1683. +};
  1684. +
  1685. +// Surface Book 2 15"
  1686. +static const struct ipts_surface_data ipts_surface_mshw0102 = {
  1687. + .hid = "MSHW0102",
  1688. + .quirks = IPTS_QUIRK_NONE,
  1689. +};
  1690. +
  1691. +// Unknown, but firmware exists
  1692. +static const struct ipts_surface_data ipts_surface_mshw0103 = {
  1693. + .hid = "MSHW0103",
  1694. + .quirks = IPTS_QUIRK_NONE,
  1695. +};
  1696. +
  1697. +// Surface Book 2 13"
  1698. +static const struct ipts_surface_data ipts_surface_mshw0137 = {
  1699. + .hid = "MSHW0137",
  1700. + .quirks = IPTS_QUIRK_NONE,
  1701. +};
  1702. +
  1703. +/*
  1704. + * Checkpatch complains about the following lines because it sees them as
  1705. + * header files mixed with .c files. However, forward declaration is perfectly
  1706. + * fine in C, and this allows us to seperate the companion data from the
  1707. + * functions for the companion.
  1708. + */
  1709. +int ipts_surface_request_firmware(struct ipts_companion *companion,
  1710. + const struct firmware **fw, const char *name,
  1711. + struct device *device);
  1712. +
  1713. +unsigned int ipts_surface_get_quirks(struct ipts_companion *companion);
  1714. +
  1715. +static struct ipts_bin_fw_info ipts_surface_vendor_kernel = {
  1716. + .fw_name = "vendor_kernel.bin",
  1717. + .vendor_output = -1,
  1718. + .num_of_data_files = 3,
  1719. + .data_file = {
  1720. + {
  1721. + .io_buffer_type = IPTS_CONFIGURATION,
  1722. + .flags = IPTS_DATA_FILE_FLAG_NONE,
  1723. + .file_name = "config.bin",
  1724. + },
  1725. +
  1726. + // The following files are part of the config, but they don't
  1727. + // exist, and the driver never requests them.
  1728. + {
  1729. + .io_buffer_type = IPTS_CALIBRATION,
  1730. + .flags = IPTS_DATA_FILE_FLAG_NONE,
  1731. + .file_name = "calib.bin",
  1732. + },
  1733. + {
  1734. + .io_buffer_type = IPTS_FEATURE,
  1735. + .flags = IPTS_DATA_FILE_FLAG_SHARE,
  1736. + .file_name = "feature.bin",
  1737. + },
  1738. + },
  1739. +};
  1740. +
  1741. +static struct ipts_bin_fw_info *ipts_surface_fw_config[] = {
  1742. + &ipts_surface_vendor_kernel,
  1743. + NULL,
  1744. +};
  1745. +
  1746. +static struct ipts_companion ipts_surface_companion = {
  1747. + .firmware_request = &ipts_surface_request_firmware,
  1748. + .firmware_config = ipts_surface_fw_config,
  1749. + .get_quirks = &ipts_surface_get_quirks,
  1750. + .name = "ipts_surface",
  1751. +};
  1752. +
  1753. +int ipts_surface_request_firmware(struct ipts_companion *companion,
  1754. + const struct firmware **fw, const char *name,
  1755. + struct device *device)
  1756. +{
  1757. + char fw_path[MAX_IOCL_FILE_PATH_LEN];
  1758. + struct ipts_surface_data *data;
  1759. +
  1760. + if (companion == NULL || companion->data == NULL)
  1761. + return -ENOENT;
  1762. +
  1763. + data = (struct ipts_surface_data *)companion->data;
  1764. +
  1765. + snprintf(fw_path, MAX_IOCL_FILE_PATH_LEN, IPTS_SURFACE_FW_PATH_FMT,
  1766. + data->hid, name);
  1767. + return request_firmware(fw, fw_path, device);
  1768. +}
  1769. +
  1770. +unsigned int ipts_surface_get_quirks(struct ipts_companion *companion)
  1771. +{
  1772. + struct ipts_surface_data *data;
  1773. +
  1774. + // In case something went wrong, assume that the
  1775. + // device doesn't have any quirks
  1776. + if (companion == NULL || companion->data == NULL)
  1777. + return IPTS_QUIRK_NONE;
  1778. +
  1779. + data = (struct ipts_surface_data *)companion->data;
  1780. +
  1781. + return data->quirks;
  1782. +}
  1783. +
  1784. +static int ipts_surface_probe(struct platform_device *pdev)
  1785. +{
  1786. + int r;
  1787. + const struct ipts_surface_data *data =
  1788. + acpi_device_get_match_data(&pdev->dev);
  1789. +
  1790. + if (!data) {
  1791. + dev_err(&pdev->dev, "Unable to find ACPI info for device\n");
  1792. + return -ENODEV;
  1793. + }
  1794. +
  1795. + ipts_surface_companion.data = (void *)data;
  1796. +
  1797. + r = ipts_add_companion(&ipts_surface_companion);
  1798. + if (r) {
  1799. + dev_warn(&pdev->dev, "Adding IPTS companion failed: %d\n", r);
  1800. + return r;
  1801. + }
  1802. +
  1803. + return 0;
  1804. +}
  1805. +
  1806. +static int ipts_surface_remove(struct platform_device *pdev)
  1807. +{
  1808. + int r = ipts_remove_companion(&ipts_surface_companion);
  1809. +
  1810. + if (r) {
  1811. + dev_warn(&pdev->dev, "Removing IPTS companion failed: %d\n", r);
  1812. + return r;
  1813. + }
  1814. +
  1815. + return 0;
  1816. +}
  1817. +
  1818. +static const struct acpi_device_id ipts_surface_acpi_match[] = {
  1819. + { "MSHW0076", (unsigned long)&ipts_surface_mshw0076 },
  1820. + { "MSHW0078", (unsigned long)&ipts_surface_mshw0078 },
  1821. + { "MSHW0079", (unsigned long)&ipts_surface_mshw0079 },
  1822. + { "MSHW0101", (unsigned long)&ipts_surface_mshw0101 },
  1823. + { "MSHW0102", (unsigned long)&ipts_surface_mshw0102 },
  1824. + { "MSHW0103", (unsigned long)&ipts_surface_mshw0103 },
  1825. + { "MSHW0137", (unsigned long)&ipts_surface_mshw0137 },
  1826. + { },
  1827. +};
  1828. +MODULE_DEVICE_TABLE(acpi, ipts_surface_acpi_match);
  1829. +
  1830. +static struct platform_driver ipts_surface_driver = {
  1831. + .probe = ipts_surface_probe,
  1832. + .remove = ipts_surface_remove,
  1833. + .driver = {
  1834. + .name = "ipts_surface",
  1835. + .acpi_match_table = ACPI_PTR(ipts_surface_acpi_match),
  1836. + },
  1837. +};
  1838. +module_platform_driver(ipts_surface_driver);
  1839. +
  1840. +MODULE_AUTHOR("Dorian Stoll <dorian.stoll@tmsp.io>");
  1841. +MODULE_DESCRIPTION("IPTS companion driver for Microsoft Surface");
  1842. +MODULE_LICENSE("GPL v2");
  1843. +
  1844. +IPTS_SURFACE_FIRMWARE("MSHW0076");
  1845. +IPTS_SURFACE_FIRMWARE("MSHW0078");
  1846. +IPTS_SURFACE_FIRMWARE("MSHW0079");
  1847. +IPTS_SURFACE_FIRMWARE("MSHW0101");
  1848. +IPTS_SURFACE_FIRMWARE("MSHW0102");
  1849. +IPTS_SURFACE_FIRMWARE("MSHW0103");
  1850. +
  1851. +IPTS_SURFACE_FIRMWARE("MSHW0137");
  1852. diff --git a/drivers/misc/ipts/dbgfs.c b/drivers/misc/ipts/dbgfs.c
  1853. new file mode 100644
  1854. index 000000000000..fd9388de17e7
  1855. --- /dev/null
  1856. +++ b/drivers/misc/ipts/dbgfs.c
  1857. @@ -0,0 +1,277 @@
  1858. +// SPDX-License-Identifier: GPL-2.0-or-later
  1859. +/*
  1860. + *
  1861. + * Intel Precise Touch & Stylus
  1862. + * Copyright (c) 2016 Intel Corporation
  1863. + *
  1864. + */
  1865. +
  1866. +#include <linux/ctype.h>
  1867. +#include <linux/debugfs.h>
  1868. +#include <linux/uaccess.h>
  1869. +
  1870. +#include "ipts.h"
  1871. +#include "msg-handler.h"
  1872. +#include "sensor-regs.h"
  1873. +#include "state.h"
  1874. +#include "../mei/mei_dev.h"
  1875. +
  1876. +static const char ipts_status_fmt[] = "ipts state : %01d\n";
  1877. +static const char ipts_debug_fmt[] = ">> tdt : fw status : %s\n"
  1878. + ">> == Doorbell status:%x, count:%x ==\n"
  1879. + ">> == Workqueue head:%u, tail:%u ==\n";
  1880. +
  1881. +static ssize_t ipts_dbgfs_status_read(struct file *fp, char __user *ubuf,
  1882. + size_t cnt, loff_t *ppos)
  1883. +{
  1884. + struct ipts_info *ipts = fp->private_data;
  1885. + char status[256];
  1886. + int len = 0;
  1887. +
  1888. + if (cnt < sizeof(ipts_status_fmt) - 3)
  1889. + return -EINVAL;
  1890. +
  1891. + len = scnprintf(status, 256, ipts_status_fmt, ipts->state);
  1892. + if (len < 0)
  1893. + return -EIO;
  1894. +
  1895. + return simple_read_from_buffer(ubuf, cnt, ppos, status, len);
  1896. +}
  1897. +
  1898. +static const struct file_operations ipts_status_dbgfs_fops = {
  1899. + .open = simple_open,
  1900. + .read = ipts_dbgfs_status_read,
  1901. + .llseek = generic_file_llseek,
  1902. +};
  1903. +
  1904. +static ssize_t ipts_dbgfs_quiesce_io_cmd_write(struct file *fp,
  1905. + const char __user *ubuf, size_t cnt, loff_t *ppos)
  1906. +{
  1907. + struct ipts_info *ipts = fp->private_data;
  1908. + bool result;
  1909. + int rc;
  1910. +
  1911. + rc = kstrtobool_from_user(ubuf, cnt, &result);
  1912. + if (rc)
  1913. + return rc;
  1914. +
  1915. + if (!result)
  1916. + return -EINVAL;
  1917. +
  1918. + ipts_send_sensor_quiesce_io_cmd(ipts);
  1919. + return cnt;
  1920. +}
  1921. +
  1922. +static const struct file_operations ipts_quiesce_io_cmd_dbgfs_fops = {
  1923. + .open = simple_open,
  1924. + .write = ipts_dbgfs_quiesce_io_cmd_write,
  1925. + .llseek = generic_file_llseek,
  1926. +};
  1927. +
  1928. +static ssize_t ipts_dbgfs_clear_mem_window_cmd_write(struct file *fp,
  1929. + const char __user *ubuf, size_t cnt, loff_t *ppos)
  1930. +{
  1931. + struct ipts_info *ipts = fp->private_data;
  1932. + bool result;
  1933. + int rc;
  1934. +
  1935. + rc = kstrtobool_from_user(ubuf, cnt, &result);
  1936. + if (rc)
  1937. + return rc;
  1938. +
  1939. + if (!result)
  1940. + return -EINVAL;
  1941. +
  1942. + ipts_send_sensor_clear_mem_window_cmd(ipts);
  1943. +
  1944. + return cnt;
  1945. +}
  1946. +
  1947. +static const struct file_operations ipts_clear_mem_window_cmd_dbgfs_fops = {
  1948. + .open = simple_open,
  1949. + .write = ipts_dbgfs_clear_mem_window_cmd_write,
  1950. + .llseek = generic_file_llseek,
  1951. +};
  1952. +
  1953. +static ssize_t ipts_dbgfs_debug_read(struct file *fp, char __user *ubuf,
  1954. + size_t cnt, loff_t *ppos)
  1955. +{
  1956. + struct ipts_info *ipts = fp->private_data;
  1957. + char dbg_info[1024];
  1958. + int len = 0;
  1959. +
  1960. + char fw_sts_str[MEI_FW_STATUS_STR_SZ];
  1961. + u32 *db, *head, *tail;
  1962. + struct ipts_wq_info *wq_info;
  1963. +
  1964. + wq_info = &ipts->resource.wq_info;
  1965. + mei_fw_status_str(ipts->cldev->bus, fw_sts_str, MEI_FW_STATUS_STR_SZ);
  1966. +
  1967. + db = (u32 *)wq_info->db_addr;
  1968. + head = (u32 *)wq_info->wq_head_addr;
  1969. + tail = (u32 *)wq_info->wq_tail_addr;
  1970. +
  1971. + if (cnt < sizeof(ipts_debug_fmt) - 3)
  1972. + return -EINVAL;
  1973. +
  1974. + len = scnprintf(dbg_info, 1024, ipts_debug_fmt,
  1975. + fw_sts_str, *db, *(db+1), *head, *tail);
  1976. +
  1977. + if (len < 0)
  1978. + return -EIO;
  1979. +
  1980. + return simple_read_from_buffer(ubuf, cnt, ppos, dbg_info, len);
  1981. +}
  1982. +
  1983. +static const struct file_operations ipts_debug_dbgfs_fops = {
  1984. + .open = simple_open,
  1985. + .read = ipts_dbgfs_debug_read,
  1986. + .llseek = generic_file_llseek,
  1987. +};
  1988. +
  1989. +static ssize_t ipts_dbgfs_ipts_restart_write(struct file *fp,
  1990. + const char __user *ubuf, size_t cnt, loff_t *ppos)
  1991. +{
  1992. + struct ipts_info *ipts = fp->private_data;
  1993. + bool result;
  1994. + int rc;
  1995. +
  1996. + rc = kstrtobool_from_user(ubuf, cnt, &result);
  1997. + if (rc)
  1998. + return rc;
  1999. + if (!result)
  2000. + return -EINVAL;
  2001. +
  2002. + ipts_restart(ipts);
  2003. + return cnt;
  2004. +}
  2005. +
  2006. +static const struct file_operations ipts_ipts_restart_dbgfs_fops = {
  2007. + .open = simple_open,
  2008. + .write = ipts_dbgfs_ipts_restart_write,
  2009. + .llseek = generic_file_llseek,
  2010. +};
  2011. +
  2012. +static ssize_t ipts_dbgfs_ipts_stop_write(struct file *fp,
  2013. + const char __user *ubuf, size_t cnt, loff_t *ppos)
  2014. +{
  2015. + struct ipts_info *ipts = fp->private_data;
  2016. + bool result;
  2017. + int rc;
  2018. +
  2019. + rc = kstrtobool_from_user(ubuf, cnt, &result);
  2020. + if (rc)
  2021. + return rc;
  2022. +
  2023. + if (!result)
  2024. + return -EINVAL;
  2025. +
  2026. + ipts_stop(ipts);
  2027. + return cnt;
  2028. +}
  2029. +
  2030. +static const struct file_operations ipts_ipts_stop_dbgfs_fops = {
  2031. + .open = simple_open,
  2032. + .write = ipts_dbgfs_ipts_stop_write,
  2033. + .llseek = generic_file_llseek,
  2034. +};
  2035. +
  2036. +static ssize_t ipts_dbgfs_ipts_start_write(struct file *fp,
  2037. + const char __user *ubuf, size_t cnt, loff_t *ppos)
  2038. +{
  2039. + struct ipts_info *ipts = fp->private_data;
  2040. + bool result;
  2041. + int rc;
  2042. +
  2043. + rc = kstrtobool_from_user(ubuf, cnt, &result);
  2044. + if (rc)
  2045. + return rc;
  2046. +
  2047. + if (!result)
  2048. + return -EINVAL;
  2049. +
  2050. + ipts_start(ipts);
  2051. + return cnt;
  2052. +}
  2053. +
  2054. +static const struct file_operations ipts_ipts_start_dbgfs_fops = {
  2055. + .open = simple_open,
  2056. + .write = ipts_dbgfs_ipts_start_write,
  2057. + .llseek = generic_file_llseek,
  2058. +};
  2059. +
  2060. +void ipts_dbgfs_deregister(struct ipts_info *ipts)
  2061. +{
  2062. + if (!ipts->dbgfs_dir)
  2063. + return;
  2064. +
  2065. + debugfs_remove_recursive(ipts->dbgfs_dir);
  2066. + ipts->dbgfs_dir = NULL;
  2067. +}
  2068. +
  2069. +int ipts_dbgfs_register(struct ipts_info *ipts, const char *name)
  2070. +{
  2071. + struct dentry *dir, *f;
  2072. +
  2073. + dir = debugfs_create_dir(name, NULL);
  2074. + if (!dir)
  2075. + return -ENOMEM;
  2076. +
  2077. + f = debugfs_create_file("status", 0200, dir, ipts,
  2078. + &ipts_status_dbgfs_fops);
  2079. + if (!f) {
  2080. + ipts_err(ipts, "debugfs status creation failed\n");
  2081. + goto err;
  2082. + }
  2083. +
  2084. + f = debugfs_create_file("quiesce_io_cmd", 0200, dir, ipts,
  2085. + &ipts_quiesce_io_cmd_dbgfs_fops);
  2086. + if (!f) {
  2087. + ipts_err(ipts, "debugfs quiesce_io_cmd creation failed\n");
  2088. + goto err;
  2089. + }
  2090. +
  2091. + f = debugfs_create_file("clear_mem_window_cmd", 0200, dir, ipts,
  2092. + &ipts_clear_mem_window_cmd_dbgfs_fops);
  2093. + if (!f) {
  2094. + ipts_err(ipts, "debugfs clear_mem_window_cmd creation failed\n");
  2095. + goto err;
  2096. + }
  2097. +
  2098. + f = debugfs_create_file("debug", 0200, dir, ipts,
  2099. + &ipts_debug_dbgfs_fops);
  2100. + if (!f) {
  2101. + ipts_err(ipts, "debugfs debug creation failed\n");
  2102. + goto err;
  2103. + }
  2104. +
  2105. + f = debugfs_create_file("ipts_restart", 0200, dir, ipts,
  2106. + &ipts_ipts_restart_dbgfs_fops);
  2107. + if (!f) {
  2108. + ipts_err(ipts, "debugfs ipts_restart creation failed\n");
  2109. + goto err;
  2110. + }
  2111. +
  2112. + f = debugfs_create_file("ipts_stop", 0200, dir, ipts,
  2113. + &ipts_ipts_stop_dbgfs_fops);
  2114. + if (!f) {
  2115. + ipts_err(ipts, "debugfs ipts_stop creation failed\n");
  2116. + goto err;
  2117. + }
  2118. +
  2119. + f = debugfs_create_file("ipts_start", 0200, dir, ipts,
  2120. + &ipts_ipts_start_dbgfs_fops);
  2121. + if (!f) {
  2122. + ipts_err(ipts, "debugfs ipts_start creation failed\n");
  2123. + goto err;
  2124. + }
  2125. +
  2126. + ipts->dbgfs_dir = dir;
  2127. +
  2128. + return 0;
  2129. +
  2130. +err:
  2131. + ipts_dbgfs_deregister(ipts);
  2132. +
  2133. + return -ENODEV;
  2134. +}
  2135. diff --git a/drivers/misc/ipts/gfx.c b/drivers/misc/ipts/gfx.c
  2136. new file mode 100644
  2137. index 000000000000..b8900f514c75
  2138. --- /dev/null
  2139. +++ b/drivers/misc/ipts/gfx.c
  2140. @@ -0,0 +1,180 @@
  2141. +// SPDX-License-Identifier: GPL-2.0-or-later
  2142. +/*
  2143. + *
  2144. + * Intel Precise Touch & Stylus
  2145. + * Copyright (c) 2016 Intel Corporation
  2146. + *
  2147. + */
  2148. +
  2149. +#include <linux/delay.h>
  2150. +#include <linux/kthread.h>
  2151. +
  2152. +#include "ipts.h"
  2153. +#include "msg-handler.h"
  2154. +#include "params.h"
  2155. +#include "state.h"
  2156. +#include "../mei/mei_dev.h"
  2157. +
  2158. +static void gfx_processing_complete(void *data)
  2159. +{
  2160. + struct ipts_info *ipts = data;
  2161. +
  2162. + if (ipts_get_state(ipts) == IPTS_STA_RAW_DATA_STARTED) {
  2163. + schedule_work(&ipts->raw_data_work);
  2164. + return;
  2165. + }
  2166. +
  2167. + ipts_dbg(ipts, "not ready to handle gfx event\n");
  2168. +}
  2169. +
  2170. +static void notify_gfx_status(u32 status, void *data)
  2171. +{
  2172. + struct ipts_info *ipts = data;
  2173. +
  2174. + ipts->gfx_status = status;
  2175. + schedule_work(&ipts->gfx_status_work);
  2176. +}
  2177. +
  2178. +static int connect_gfx(struct ipts_info *ipts)
  2179. +{
  2180. + int ret = 0;
  2181. + struct ipts_connect connect;
  2182. +
  2183. + connect.client = ipts->cldev->dev.parent;
  2184. + connect.if_version = IPTS_INTERFACE_V1;
  2185. + connect.ipts_cb.workload_complete = gfx_processing_complete;
  2186. + connect.ipts_cb.notify_gfx_status = notify_gfx_status;
  2187. + connect.data = (void *)ipts;
  2188. +
  2189. + ret = ipts_connect(&connect);
  2190. + if (ret)
  2191. + return ret;
  2192. +
  2193. + // TODO: GFX version check
  2194. + ipts->gfx_info.gfx_handle = connect.gfx_handle;
  2195. + ipts->gfx_info.ipts_ops = connect.ipts_ops;
  2196. +
  2197. + return ret;
  2198. +}
  2199. +
  2200. +static void disconnect_gfx(struct ipts_info *ipts)
  2201. +{
  2202. + ipts_disconnect(ipts->gfx_info.gfx_handle);
  2203. +}
  2204. +
  2205. +static struct task_struct *dbg_thread;
  2206. +
  2207. +static void ipts_print_dbg_info(struct ipts_info *ipts)
  2208. +{
  2209. + char fw_sts_str[MEI_FW_STATUS_STR_SZ];
  2210. + u32 *db, *head, *tail;
  2211. + struct ipts_wq_info *wq_info;
  2212. +
  2213. + wq_info = &ipts->resource.wq_info;
  2214. +
  2215. + mei_fw_status_str(ipts->cldev->bus, fw_sts_str, MEI_FW_STATUS_STR_SZ);
  2216. + pr_info(">> tdt : fw status : %s\n", fw_sts_str);
  2217. +
  2218. + db = (u32 *)wq_info->db_addr;
  2219. + head = (u32 *)wq_info->wq_head_addr;
  2220. + tail = (u32 *)wq_info->wq_tail_addr;
  2221. +
  2222. + // Every time the ME has filled up the touch input buffer, and the GuC
  2223. + // doorbell is rang, the doorbell count will increase by one
  2224. + // The workqueue is the queue of touch events that the GuC has to
  2225. + // process. Head is the currently processed event, while tail is
  2226. + // the last one that is currently available. If head and tail are
  2227. + // not equal, this can be an indicator for GuC / GPU hang.
  2228. + pr_info(">> == Doorbell status:%x, count:%x ==\n", *db, *(db+1));
  2229. + pr_info(">> == Workqueue head:%u, tail:%u ==\n", *head, *tail);
  2230. +}
  2231. +
  2232. +static int ipts_dbg_thread(void *data)
  2233. +{
  2234. + struct ipts_info *ipts = (struct ipts_info *)data;
  2235. +
  2236. + pr_info(">> start debug thread\n");
  2237. +
  2238. + while (!kthread_should_stop()) {
  2239. + if (ipts_get_state(ipts) != IPTS_STA_RAW_DATA_STARTED) {
  2240. + pr_info("state is not IPTS_STA_RAW_DATA_STARTED : %d\n",
  2241. + ipts_get_state(ipts));
  2242. +
  2243. + msleep(5000);
  2244. + continue;
  2245. + }
  2246. +
  2247. + ipts_print_dbg_info(ipts);
  2248. + msleep(3000);
  2249. + }
  2250. +
  2251. + return 0;
  2252. +}
  2253. +
  2254. +int ipts_open_gpu(struct ipts_info *ipts)
  2255. +{
  2256. + int ret = 0;
  2257. +
  2258. + ret = connect_gfx(ipts);
  2259. + if (ret) {
  2260. + ipts_dbg(ipts, "cannot connect GPU\n");
  2261. + return ret;
  2262. + }
  2263. +
  2264. + ret = ipts->gfx_info.ipts_ops.get_wq_info(ipts->gfx_info.gfx_handle,
  2265. + &ipts->resource.wq_info);
  2266. + if (ret) {
  2267. + ipts_dbg(ipts, "error in get_wq_info\n");
  2268. + return ret;
  2269. + }
  2270. +
  2271. + if (ipts_modparams.debug_thread)
  2272. + dbg_thread = kthread_run(
  2273. + ipts_dbg_thread, (void *)ipts, "ipts_debug");
  2274. +
  2275. + return 0;
  2276. +}
  2277. +
  2278. +void ipts_close_gpu(struct ipts_info *ipts)
  2279. +{
  2280. + disconnect_gfx(ipts);
  2281. +
  2282. + if (ipts_modparams.debug_thread)
  2283. + kthread_stop(dbg_thread);
  2284. +}
  2285. +
  2286. +struct ipts_mapbuffer *ipts_map_buffer(struct ipts_info *ipts,
  2287. + u32 size, u32 flags)
  2288. +{
  2289. + struct ipts_mapbuffer *buf;
  2290. + u64 handle;
  2291. + int ret;
  2292. +
  2293. + buf = devm_kzalloc(&ipts->cldev->dev, sizeof(*buf), GFP_KERNEL);
  2294. + if (!buf)
  2295. + return NULL;
  2296. +
  2297. + buf->size = size;
  2298. + buf->flags = flags;
  2299. +
  2300. + handle = ipts->gfx_info.gfx_handle;
  2301. + ret = ipts->gfx_info.ipts_ops.map_buffer(handle, buf);
  2302. + if (ret) {
  2303. + devm_kfree(&ipts->cldev->dev, buf);
  2304. + return NULL;
  2305. + }
  2306. +
  2307. + return buf;
  2308. +}
  2309. +
  2310. +void ipts_unmap_buffer(struct ipts_info *ipts, struct ipts_mapbuffer *buf)
  2311. +{
  2312. + u64 handle;
  2313. +
  2314. + if (!buf)
  2315. + return;
  2316. +
  2317. + handle = ipts->gfx_info.gfx_handle;
  2318. + ipts->gfx_info.ipts_ops.unmap_buffer(handle, buf->buf_handle);
  2319. + devm_kfree(&ipts->cldev->dev, buf);
  2320. +}
  2321. diff --git a/drivers/misc/ipts/gfx.h b/drivers/misc/ipts/gfx.h
  2322. new file mode 100644
  2323. index 000000000000..2880e122e9f9
  2324. --- /dev/null
  2325. +++ b/drivers/misc/ipts/gfx.h
  2326. @@ -0,0 +1,25 @@
  2327. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  2328. +/*
  2329. + *
  2330. + * Intel Precise Touch & Stylus
  2331. + * Copyright (c) 2016 Intel Corporation
  2332. + *
  2333. + */
  2334. +
  2335. +#ifndef _IPTS_GFX_H_
  2336. +#define _IPTS_GFX_H_
  2337. +
  2338. +#include <linux/ipts-gfx.h>
  2339. +
  2340. +#include "ipts.h"
  2341. +
  2342. +int ipts_open_gpu(struct ipts_info *ipts);
  2343. +void ipts_close_gpu(struct ipts_info *ipts);
  2344. +
  2345. +struct ipts_mapbuffer *ipts_map_buffer(struct ipts_info *ipts,
  2346. + u32 size, u32 flags);
  2347. +
  2348. +void ipts_unmap_buffer(struct ipts_info *ipts,
  2349. + struct ipts_mapbuffer *buf);
  2350. +
  2351. +#endif // _IPTS_GFX_H_
  2352. diff --git a/drivers/misc/ipts/hid.c b/drivers/misc/ipts/hid.c
  2353. new file mode 100644
  2354. index 000000000000..3652803b5376
  2355. --- /dev/null
  2356. +++ b/drivers/misc/ipts/hid.c
  2357. @@ -0,0 +1,499 @@
  2358. +// SPDX-License-Identifier: GPL-2.0-or-later
  2359. +/*
  2360. + *
  2361. + * Intel Precise Touch & Stylus
  2362. + * Copyright (c) 2016 Intel Corporation
  2363. + *
  2364. + */
  2365. +
  2366. +#include <linux/dmi.h>
  2367. +#include <linux/firmware.h>
  2368. +#include <linux/hid.h>
  2369. +#include <linux/ipts.h>
  2370. +#include <linux/module.h>
  2371. +#include <linux/vmalloc.h>
  2372. +
  2373. +#include "companion.h"
  2374. +#include "hid.h"
  2375. +#include "ipts.h"
  2376. +#include "msg-handler.h"
  2377. +#include "params.h"
  2378. +#include "resource.h"
  2379. +#include "sensor-regs.h"
  2380. +
  2381. +#define HID_DESC_INTEL "intel_desc.bin"
  2382. +#define HID_DESC_VENDOR "vendor_desc.bin"
  2383. +
  2384. +enum output_buffer_payload_type {
  2385. + OUTPUT_BUFFER_PAYLOAD_ERROR = 0,
  2386. + OUTPUT_BUFFER_PAYLOAD_HID_INPUT_REPORT,
  2387. + OUTPUT_BUFFER_PAYLOAD_HID_FEATURE_REPORT,
  2388. + OUTPUT_BUFFER_PAYLOAD_KERNEL_LOAD,
  2389. + OUTPUT_BUFFER_PAYLOAD_FEEDBACK_BUFFER
  2390. +};
  2391. +
  2392. +struct kernel_output_buffer_header {
  2393. + u16 length;
  2394. + u8 payload_type;
  2395. + u8 reserved1;
  2396. + struct touch_hid_private_data hid_private_data;
  2397. + u8 reserved2[28];
  2398. + u8 data[0];
  2399. +};
  2400. +
  2401. +struct kernel_output_payload_error {
  2402. + u16 severity;
  2403. + u16 source;
  2404. + u8 code[4];
  2405. + char string[128];
  2406. +};
  2407. +
  2408. +static int ipts_hid_get_descriptor(struct ipts_info *ipts,
  2409. + u8 **desc, int *size)
  2410. +{
  2411. + u8 *buf;
  2412. + int hid_size = 0, ret = 0;
  2413. + const struct firmware *intel_desc = NULL;
  2414. + const struct firmware *vendor_desc = NULL;
  2415. +
  2416. + ret = ipts_request_firmware(&intel_desc, HID_DESC_INTEL,
  2417. + &ipts->cldev->dev);
  2418. + if (ret)
  2419. + goto no_hid;
  2420. +
  2421. + hid_size = intel_desc->size;
  2422. +
  2423. + ret = ipts_request_firmware(&vendor_desc, HID_DESC_VENDOR,
  2424. + &ipts->cldev->dev);
  2425. + if (ret)
  2426. + ipts_dbg(ipts, "error in reading HID Vendor Descriptor\n");
  2427. + else
  2428. + hid_size += vendor_desc->size;
  2429. +
  2430. + ipts_dbg(ipts, "HID descriptor size = %d\n", hid_size);
  2431. +
  2432. + buf = vmalloc(hid_size);
  2433. + if (buf == NULL) {
  2434. + ret = -ENOMEM;
  2435. + goto no_mem;
  2436. + }
  2437. +
  2438. + memcpy(buf, intel_desc->data, intel_desc->size);
  2439. + if (vendor_desc) {
  2440. + memcpy(&buf[intel_desc->size], vendor_desc->data,
  2441. + vendor_desc->size);
  2442. + release_firmware(vendor_desc);
  2443. + }
  2444. + release_firmware(intel_desc);
  2445. +
  2446. + *desc = buf;
  2447. + *size = hid_size;
  2448. +
  2449. + return 0;
  2450. +
  2451. +no_mem:
  2452. + if (vendor_desc)
  2453. + release_firmware(vendor_desc);
  2454. +
  2455. + release_firmware(intel_desc);
  2456. +
  2457. +no_hid:
  2458. + return ret;
  2459. +}
  2460. +
  2461. +static int ipts_hid_parse(struct hid_device *hid)
  2462. +{
  2463. + struct ipts_info *ipts = hid->driver_data;
  2464. + int ret = 0, size;
  2465. + u8 *buf;
  2466. +
  2467. + ipts_dbg(ipts, "%s() start\n", __func__);
  2468. +
  2469. + ret = ipts_hid_get_descriptor(ipts, &buf, &size);
  2470. + if (ret != 0) {
  2471. + ipts_dbg(ipts, "ipts_hid_get_descriptor: %d\n",
  2472. + ret);
  2473. + return -EIO;
  2474. + }
  2475. +
  2476. + ret = hid_parse_report(hid, buf, size);
  2477. + vfree(buf);
  2478. + if (ret) {
  2479. + ipts_err(ipts, "hid_parse_report error : %d\n", ret);
  2480. + return ret;
  2481. + }
  2482. +
  2483. + ipts->hid_desc_ready = true;
  2484. +
  2485. + return 0;
  2486. +}
  2487. +
  2488. +static int ipts_hid_start(struct hid_device *hid)
  2489. +{
  2490. + return 0;
  2491. +}
  2492. +
  2493. +static void ipts_hid_stop(struct hid_device *hid)
  2494. +{
  2495. +
  2496. +}
  2497. +
  2498. +static int ipts_hid_open(struct hid_device *hid)
  2499. +{
  2500. + return 0;
  2501. +}
  2502. +
  2503. +static void ipts_hid_close(struct hid_device *hid)
  2504. +{
  2505. + struct ipts_info *ipts = hid->driver_data;
  2506. +
  2507. + ipts->hid_desc_ready = false;
  2508. +}
  2509. +
  2510. +static int ipts_hid_send_hid2me_feedback(struct ipts_info *ipts,
  2511. + u32 fb_data_type, __u8 *buf, size_t count)
  2512. +{
  2513. + struct ipts_buffer_info *fb_buf;
  2514. + struct touch_feedback_hdr *feedback;
  2515. + enum ipts_state state;
  2516. + u8 *payload;
  2517. + int header_size;
  2518. +
  2519. + header_size = sizeof(struct touch_feedback_hdr);
  2520. +
  2521. + if (count > ipts->resource.hid2me_buffer_size - header_size)
  2522. + return -EINVAL;
  2523. +
  2524. + state = ipts_get_state(ipts);
  2525. + if (state != IPTS_STA_RAW_DATA_STARTED &&
  2526. + state != IPTS_STA_HID_STARTED)
  2527. + return 0;
  2528. +
  2529. + fb_buf = ipts_get_hid2me_buffer(ipts);
  2530. + feedback = (struct touch_feedback_hdr *)fb_buf->addr;
  2531. + payload = fb_buf->addr + header_size;
  2532. + memset(feedback, 0, header_size);
  2533. +
  2534. + feedback->feedback_data_type = fb_data_type;
  2535. + feedback->feedback_cmd_type = TOUCH_FEEDBACK_CMD_TYPE_NONE;
  2536. + feedback->payload_size_bytes = count;
  2537. + feedback->buffer_id = TOUCH_HID_2_ME_BUFFER_ID;
  2538. + feedback->protocol_ver = 0;
  2539. + feedback->reserved[0] = 0xAC;
  2540. +
  2541. + // copy payload
  2542. + memcpy(payload, buf, count);
  2543. +
  2544. + ipts_send_feedback(ipts, TOUCH_HID_2_ME_BUFFER_ID, 0);
  2545. +
  2546. + return 0;
  2547. +}
  2548. +
  2549. +static int ipts_hid_raw_request(struct hid_device *hid,
  2550. + unsigned char report_number, __u8 *buf, size_t count,
  2551. + unsigned char report_type, int reqtype)
  2552. +{
  2553. + struct ipts_info *ipts = hid->driver_data;
  2554. + u32 fb_data_type;
  2555. +
  2556. + ipts_dbg(ipts, "hid raw request => report %d, request %d\n",
  2557. + (int)report_type, reqtype);
  2558. +
  2559. + if (report_type != HID_FEATURE_REPORT)
  2560. + return 0;
  2561. +
  2562. + switch (reqtype) {
  2563. + case HID_REQ_GET_REPORT:
  2564. + fb_data_type = TOUCH_FEEDBACK_DATA_TYPE_GET_FEATURES;
  2565. + break;
  2566. + case HID_REQ_SET_REPORT:
  2567. + fb_data_type = TOUCH_FEEDBACK_DATA_TYPE_SET_FEATURES;
  2568. + break;
  2569. + default:
  2570. + ipts_err(ipts, "raw request not supprted: %d\n", reqtype);
  2571. + return -EIO;
  2572. + }
  2573. +
  2574. + return ipts_hid_send_hid2me_feedback(ipts, fb_data_type, buf, count);
  2575. +}
  2576. +
  2577. +static int ipts_hid_output_report(struct hid_device *hid,
  2578. + __u8 *buf, size_t count)
  2579. +{
  2580. + struct ipts_info *ipts = hid->driver_data;
  2581. + u32 fb_data_type;
  2582. +
  2583. + ipts_dbg(ipts, "hid output report\n");
  2584. +
  2585. + fb_data_type = TOUCH_FEEDBACK_DATA_TYPE_OUTPUT_REPORT;
  2586. +
  2587. + return ipts_hid_send_hid2me_feedback(ipts, fb_data_type, buf, count);
  2588. +}
  2589. +
  2590. +static struct hid_ll_driver ipts_hid_ll_driver = {
  2591. + .parse = ipts_hid_parse,
  2592. + .start = ipts_hid_start,
  2593. + .stop = ipts_hid_stop,
  2594. + .open = ipts_hid_open,
  2595. + .close = ipts_hid_close,
  2596. + .raw_request = ipts_hid_raw_request,
  2597. + .output_report = ipts_hid_output_report,
  2598. +};
  2599. +
  2600. +int ipts_hid_init(struct ipts_info *ipts)
  2601. +{
  2602. + int ret = 0;
  2603. + struct hid_device *hid;
  2604. +
  2605. + hid = hid_allocate_device();
  2606. + if (IS_ERR(hid))
  2607. + return PTR_ERR(hid);
  2608. +
  2609. + hid->driver_data = ipts;
  2610. + hid->ll_driver = &ipts_hid_ll_driver;
  2611. + hid->dev.parent = &ipts->cldev->dev;
  2612. + hid->bus = BUS_MEI;
  2613. + hid->version = ipts->device_info.fw_rev;
  2614. + hid->vendor = ipts->device_info.vendor_id;
  2615. + hid->product = ipts->device_info.device_id;
  2616. +
  2617. + snprintf(hid->phys, sizeof(hid->phys), "heci3");
  2618. + snprintf(hid->name, sizeof(hid->name),
  2619. + "ipts %04hX:%04hX", hid->vendor, hid->product);
  2620. +
  2621. + ret = hid_add_device(hid);
  2622. + if (ret) {
  2623. + if (ret != -ENODEV)
  2624. + ipts_err(ipts, "can't add hid device: %d\n", ret);
  2625. +
  2626. + hid_destroy_device(hid);
  2627. +
  2628. + return ret;
  2629. + }
  2630. +
  2631. + ipts->hid = hid;
  2632. +
  2633. + return 0;
  2634. +}
  2635. +
  2636. +void ipts_hid_release(struct ipts_info *ipts)
  2637. +{
  2638. + if (!ipts->hid)
  2639. + return;
  2640. +
  2641. + hid_destroy_device(ipts->hid);
  2642. +}
  2643. +
  2644. +int ipts_handle_hid_data(struct ipts_info *ipts,
  2645. + struct touch_sensor_hid_ready_for_data_rsp_data *hid_rsp)
  2646. +{
  2647. + struct touch_raw_data_hdr *raw_header;
  2648. + struct ipts_buffer_info *buffer_info;
  2649. + struct touch_feedback_hdr *feedback;
  2650. + u8 *raw_data;
  2651. + int touch_data_buffer_index;
  2652. + int transaction_id;
  2653. + int ret = 0;
  2654. +
  2655. + touch_data_buffer_index = (int)hid_rsp->touch_data_buffer_index;
  2656. + buffer_info = ipts_get_touch_data_buffer_hid(ipts);
  2657. + raw_header = (struct touch_raw_data_hdr *)buffer_info->addr;
  2658. + transaction_id = raw_header->hid_private_data.transaction_id;
  2659. + raw_data = (u8 *)raw_header + sizeof(struct touch_raw_data_hdr);
  2660. +
  2661. + switch (raw_header->data_type) {
  2662. + case TOUCH_RAW_DATA_TYPE_HID_REPORT: {
  2663. + if (raw_header->raw_data_size_bytes > HID_MAX_BUFFER_SIZE)
  2664. + raw_header->raw_data_size_bytes = HID_MAX_BUFFER_SIZE;
  2665. +
  2666. + memcpy(ipts->hid_input_report, raw_data,
  2667. + raw_header->raw_data_size_bytes);
  2668. +
  2669. + ret = hid_input_report(ipts->hid, HID_INPUT_REPORT,
  2670. + (u8 *)ipts->hid_input_report,
  2671. + raw_header->raw_data_size_bytes, 1);
  2672. + if (ret)
  2673. + ipts_err(ipts, "error in hid_input_report: %d\n", ret);
  2674. +
  2675. + break;
  2676. + }
  2677. + case TOUCH_RAW_DATA_TYPE_GET_FEATURES: {
  2678. + // TODO: implement together with "get feature ioctl"
  2679. + break;
  2680. + }
  2681. + case TOUCH_RAW_DATA_TYPE_ERROR: {
  2682. + struct touch_error *touch_err = (struct touch_error *)raw_data;
  2683. +
  2684. + ipts_err(ipts, "error type: %d, me error: %x, err reg: %x\n",
  2685. + touch_err->touch_error_type,
  2686. + touch_err->touch_me_fw_error.value,
  2687. + touch_err->touch_error_register.reg_value);
  2688. +
  2689. + break;
  2690. + }
  2691. + default:
  2692. + break;
  2693. + }
  2694. +
  2695. + // send feedback data for HID mode
  2696. + buffer_info = ipts_get_feedback_buffer(ipts, touch_data_buffer_index);
  2697. + feedback = (struct touch_feedback_hdr *)buffer_info->addr;
  2698. + memset(feedback, 0, sizeof(struct touch_feedback_hdr));
  2699. + feedback->feedback_cmd_type = TOUCH_FEEDBACK_CMD_TYPE_NONE;
  2700. + feedback->payload_size_bytes = 0;
  2701. + feedback->buffer_id = touch_data_buffer_index;
  2702. + feedback->protocol_ver = 0;
  2703. + feedback->reserved[0] = 0xAC;
  2704. +
  2705. + ret = ipts_send_feedback(ipts, touch_data_buffer_index, transaction_id);
  2706. +
  2707. + return ret;
  2708. +}
  2709. +
  2710. +static int handle_outputs(struct ipts_info *ipts, int parallel_idx)
  2711. +{
  2712. + struct kernel_output_buffer_header *out_buf_hdr;
  2713. + struct ipts_buffer_info *output_buf, *fb_buf = NULL;
  2714. + u8 *input_report, *payload;
  2715. + u32 tr_id;
  2716. + int i, payload_size, ret = 0, header_size;
  2717. +
  2718. + header_size = sizeof(struct kernel_output_buffer_header);
  2719. + output_buf = ipts_get_output_buffers_by_parallel_id(ipts,
  2720. + parallel_idx);
  2721. +
  2722. + for (i = 0; i < ipts->resource.num_of_outputs; i++) {
  2723. + out_buf_hdr = (struct kernel_output_buffer_header *)
  2724. + output_buf[i].addr;
  2725. +
  2726. + if (out_buf_hdr->length < header_size)
  2727. + continue;
  2728. +
  2729. + payload_size = out_buf_hdr->length - header_size;
  2730. + payload = out_buf_hdr->data;
  2731. +
  2732. + switch (out_buf_hdr->payload_type) {
  2733. + case OUTPUT_BUFFER_PAYLOAD_HID_INPUT_REPORT: {
  2734. + input_report = ipts->hid_input_report;
  2735. + memcpy(input_report, payload, payload_size);
  2736. +
  2737. + hid_input_report(ipts->hid, HID_INPUT_REPORT,
  2738. + input_report, payload_size, 1);
  2739. +
  2740. + break;
  2741. + }
  2742. + case OUTPUT_BUFFER_PAYLOAD_HID_FEATURE_REPORT: {
  2743. + ipts_dbg(ipts, "output hid feature report\n");
  2744. + break;
  2745. + }
  2746. + case OUTPUT_BUFFER_PAYLOAD_KERNEL_LOAD: {
  2747. + ipts_dbg(ipts, "output kernel load\n");
  2748. + break;
  2749. + }
  2750. + case OUTPUT_BUFFER_PAYLOAD_FEEDBACK_BUFFER: {
  2751. + // send feedback data for raw data mode
  2752. + fb_buf = ipts_get_feedback_buffer(ipts, parallel_idx);
  2753. + tr_id = out_buf_hdr->hid_private_data.transaction_id;
  2754. +
  2755. + memcpy(fb_buf->addr, payload, payload_size);
  2756. +
  2757. + break;
  2758. + }
  2759. + case OUTPUT_BUFFER_PAYLOAD_ERROR: {
  2760. + struct kernel_output_payload_error *err_payload;
  2761. +
  2762. + if (payload_size == 0)
  2763. + break;
  2764. +
  2765. + err_payload = (struct kernel_output_payload_error *)
  2766. + payload;
  2767. +
  2768. + ipts_err(ipts, "severity: %d, source: %d ",
  2769. + err_payload->severity,
  2770. + err_payload->source);
  2771. + ipts_err(ipts, "code : %d:%d:%d:%d\nstring %s\n",
  2772. + err_payload->code[0],
  2773. + err_payload->code[1],
  2774. + err_payload->code[2],
  2775. + err_payload->code[3],
  2776. + err_payload->string);
  2777. +
  2778. + break;
  2779. + }
  2780. + default:
  2781. + ipts_err(ipts, "invalid output buffer payload\n");
  2782. + break;
  2783. + }
  2784. + }
  2785. +
  2786. + /*
  2787. + * XXX: Calling the "ipts_send_feedback" function repeatedly seems to
  2788. + * be what is causing touch to crash (found by sebanc, see the link
  2789. + * below for the comment) on some models, especially on Surface Pro 4
  2790. + * and Surface Book 1.
  2791. + * The most desirable fix could be done by raising IPTS GuC priority.
  2792. + * Until we find a better solution, use this workaround.
  2793. + *
  2794. + * The decision which devices have no_feedback enabled by default is
  2795. + * made by the companion driver. If no companion driver was loaded,
  2796. + * no_feedback is disabled and the default behaviour is used.
  2797. + *
  2798. + * Link to the comment where sebanc found this workaround:
  2799. + * https://github.com/jakeday/linux-surface/issues/374#issuecomment-508234110
  2800. + * (Touch and pen issue persists · Issue #374 · jakeday/linux-surface)
  2801. + *
  2802. + * Link to the usage from kitakar5525 who made this change:
  2803. + * https://github.com/jakeday/linux-surface/issues/374#issuecomment-517289171
  2804. + * (Touch and pen issue persists · Issue #374 · jakeday/linux-surface)
  2805. + */
  2806. + if (fb_buf) {
  2807. + // A negative value means "decide by dmi table"
  2808. + if (ipts_modparams.no_feedback < 0) {
  2809. + if (ipts_get_quirks() & IPTS_QUIRK_NO_FEEDBACK)
  2810. + ipts_modparams.no_feedback = true;
  2811. + else
  2812. + ipts_modparams.no_feedback = false;
  2813. + }
  2814. +
  2815. + if (ipts_modparams.no_feedback)
  2816. + return 0;
  2817. +
  2818. + ret = ipts_send_feedback(ipts, parallel_idx, tr_id);
  2819. + if (ret)
  2820. + return ret;
  2821. + }
  2822. +
  2823. + return 0;
  2824. +}
  2825. +
  2826. +static int handle_output_buffers(struct ipts_info *ipts,
  2827. + int cur_idx, int end_idx)
  2828. +{
  2829. + int max_num_of_buffers = ipts_get_num_of_parallel_buffers(ipts);
  2830. +
  2831. + do {
  2832. + cur_idx++; // cur_idx has last completed so starts with +1
  2833. + cur_idx %= max_num_of_buffers;
  2834. + handle_outputs(ipts, cur_idx);
  2835. + } while (cur_idx != end_idx);
  2836. +
  2837. + return 0;
  2838. +}
  2839. +
  2840. +int ipts_handle_processed_data(struct ipts_info *ipts)
  2841. +{
  2842. + int ret = 0;
  2843. + int current_buffer_idx;
  2844. + int last_buffer_idx;
  2845. +
  2846. + current_buffer_idx = *ipts->last_submitted_id;
  2847. + last_buffer_idx = ipts->last_buffer_completed;
  2848. +
  2849. + if (current_buffer_idx == last_buffer_idx)
  2850. + return 0;
  2851. +
  2852. + ipts->last_buffer_completed = current_buffer_idx;
  2853. + handle_output_buffers(ipts, last_buffer_idx, current_buffer_idx);
  2854. +
  2855. + return ret;
  2856. +}
  2857. diff --git a/drivers/misc/ipts/hid.h b/drivers/misc/ipts/hid.h
  2858. new file mode 100644
  2859. index 000000000000..c943979e0198
  2860. --- /dev/null
  2861. +++ b/drivers/misc/ipts/hid.h
  2862. @@ -0,0 +1,21 @@
  2863. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  2864. +/*
  2865. + *
  2866. + * Intel Precise Touch & Stylus
  2867. + * Copyright (c) 2016 Intel Corporation
  2868. + *
  2869. + */
  2870. +
  2871. +#ifndef _IPTS_HID_H_
  2872. +#define _IPTS_HID_H_
  2873. +
  2874. +#include "ipts.h"
  2875. +
  2876. +#define BUS_MEI 0x44
  2877. +
  2878. +int ipts_hid_init(struct ipts_info *ipts);
  2879. +void ipts_hid_release(struct ipts_info *ipts);
  2880. +int ipts_handle_hid_data(struct ipts_info *ipts,
  2881. + struct touch_sensor_hid_ready_for_data_rsp_data *hid_rsp);
  2882. +
  2883. +#endif // _IPTS_HID_H_
  2884. diff --git a/drivers/misc/ipts/ipts.c b/drivers/misc/ipts/ipts.c
  2885. new file mode 100644
  2886. index 000000000000..dfafabf8dd94
  2887. --- /dev/null
  2888. +++ b/drivers/misc/ipts/ipts.c
  2889. @@ -0,0 +1,62 @@
  2890. +// SPDX-License-Identifier: GPL-2.0-or-later
  2891. +/*
  2892. + *
  2893. + * Intel Precise Touch & Stylus
  2894. + * Copyright (c) 2016 Intel Corporation
  2895. + *
  2896. + */
  2897. +
  2898. +#include <linux/device.h>
  2899. +#include <stdarg.h>
  2900. +
  2901. +#include "ipts.h"
  2902. +#include "params.h"
  2903. +
  2904. +static void ipts_printk(const char *level, const struct device *dev,
  2905. + struct va_format *vaf)
  2906. +{
  2907. + if (dev) {
  2908. + dev_printk_emit(level[1] - '0', dev, "%s %s: %pV",
  2909. + dev_driver_string(dev), dev_name(dev), vaf);
  2910. + } else {
  2911. + // checkpatch wants this to be prefixed with KERN_*, but
  2912. + // since the level is passed as a parameter, ignore it
  2913. + printk("%s(NULL device *): %pV", level, vaf);
  2914. + }
  2915. +}
  2916. +
  2917. +void ipts_info(struct ipts_info *ipts, const char *fmt, ...)
  2918. +{
  2919. + va_list args;
  2920. + struct va_format vaf;
  2921. +
  2922. + if (!ipts_modparams.debug)
  2923. + return;
  2924. +
  2925. + va_start(args, fmt);
  2926. +
  2927. + vaf.fmt = fmt;
  2928. + vaf.va = &args;
  2929. +
  2930. + ipts_printk(KERN_INFO, &ipts->cldev->dev, &vaf);
  2931. +
  2932. + va_end(args);
  2933. +}
  2934. +
  2935. +void ipts_dbg(struct ipts_info *ipts, const char *fmt, ...)
  2936. +{
  2937. + va_list args;
  2938. + struct va_format vaf;
  2939. +
  2940. + if (!ipts_modparams.debug)
  2941. + return;
  2942. +
  2943. + va_start(args, fmt);
  2944. +
  2945. + vaf.fmt = fmt;
  2946. + vaf.va = &args;
  2947. +
  2948. + ipts_printk(KERN_DEBUG, &ipts->cldev->dev, &vaf);
  2949. +
  2950. + va_end(args);
  2951. +}
  2952. diff --git a/drivers/misc/ipts/ipts.h b/drivers/misc/ipts/ipts.h
  2953. new file mode 100644
  2954. index 000000000000..32eb3ffd68a3
  2955. --- /dev/null
  2956. +++ b/drivers/misc/ipts/ipts.h
  2957. @@ -0,0 +1,172 @@
  2958. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  2959. +/*
  2960. + *
  2961. + * Intel Precise Touch & Stylus
  2962. + * Copyright (c) 2016 Intel Corporation
  2963. + *
  2964. + */
  2965. +
  2966. +#ifndef _IPTS_H_
  2967. +#define _IPTS_H_
  2968. +
  2969. +#include <linux/hid.h>
  2970. +#include <linux/ipts-binary.h>
  2971. +#include <linux/ipts-gfx.h>
  2972. +#include <linux/mei_cl_bus.h>
  2973. +#include <linux/types.h>
  2974. +
  2975. +#include "mei-msgs.h"
  2976. +#include "state.h"
  2977. +
  2978. +#define HID_PARALLEL_DATA_BUFFERS TOUCH_SENSOR_MAX_DATA_BUFFERS
  2979. +
  2980. +#define IPTS_MAX_RETRY 3
  2981. +
  2982. +struct ipts_buffer_info {
  2983. + char *addr;
  2984. + dma_addr_t dma_addr;
  2985. +};
  2986. +
  2987. +struct ipts_gfx_info {
  2988. + u64 gfx_handle;
  2989. + struct ipts_ops ipts_ops;
  2990. +};
  2991. +
  2992. +struct ipts_resource {
  2993. + // ME & GFX resource
  2994. + struct ipts_buffer_info touch_data_buffer_raw
  2995. + [HID_PARALLEL_DATA_BUFFERS];
  2996. + struct ipts_buffer_info touch_data_buffer_hid;
  2997. + struct ipts_buffer_info feedback_buffer[HID_PARALLEL_DATA_BUFFERS];
  2998. + struct ipts_buffer_info hid2me_buffer;
  2999. + u32 hid2me_buffer_size;
  3000. +
  3001. + u8 wq_item_size;
  3002. + struct ipts_wq_info wq_info;
  3003. +
  3004. + // ME2HID buffer
  3005. + char *me2hid_buffer;
  3006. +
  3007. + // GFX specific resource
  3008. + struct ipts_buffer_info raw_data_mode_output_buffer
  3009. + [HID_PARALLEL_DATA_BUFFERS][MAX_NUM_OUTPUT_BUFFERS];
  3010. +
  3011. + int num_of_outputs;
  3012. + bool default_resource_ready;
  3013. + bool raw_data_resource_ready;
  3014. +};
  3015. +
  3016. +struct ipts_info {
  3017. + struct mei_cl_device *cldev;
  3018. + struct hid_device *hid;
  3019. +
  3020. + struct work_struct init_work;
  3021. + struct work_struct raw_data_work;
  3022. + struct work_struct gfx_status_work;
  3023. +
  3024. + struct task_struct *event_loop;
  3025. +
  3026. +#if IS_ENABLED(CONFIG_DEBUG_FS)
  3027. + struct dentry *dbgfs_dir;
  3028. +#endif
  3029. +
  3030. + enum ipts_state state;
  3031. +
  3032. + enum touch_sensor_mode sensor_mode;
  3033. + struct touch_sensor_get_device_info_rsp_data device_info;
  3034. + struct ipts_resource resource;
  3035. + u8 hid_input_report[HID_MAX_BUFFER_SIZE];
  3036. + int num_of_parallel_data_buffers;
  3037. + bool hid_desc_ready;
  3038. +
  3039. + int current_buffer_index;
  3040. + int last_buffer_completed;
  3041. + int *last_submitted_id;
  3042. +
  3043. + struct ipts_gfx_info gfx_info;
  3044. + u64 kernel_handle;
  3045. + int gfx_status;
  3046. + bool display_status;
  3047. +
  3048. + bool restart;
  3049. +};
  3050. +
  3051. +#if IS_ENABLED(CONFIG_DEBUG_FS)
  3052. +int ipts_dbgfs_register(struct ipts_info *ipts, const char *name);
  3053. +void ipts_dbgfs_deregister(struct ipts_info *ipts);
  3054. +#else
  3055. +static int ipts_dbgfs_register(struct ipts_info *ipts, const char *name);
  3056. +static void ipts_dbgfs_deregister(struct ipts_info *ipts);
  3057. +#endif
  3058. +
  3059. +void ipts_info(struct ipts_info *ipts, const char *fmt, ...);
  3060. +void ipts_dbg(struct ipts_info *ipts, const char *fmt, ...);
  3061. +
  3062. +// Because ipts_err is unconditional, this can stay a macro for now
  3063. +#define ipts_err(ipts, format, arg...) \
  3064. + dev_err(&ipts->cldev->dev, format, ##arg)
  3065. +
  3066. +/*
  3067. + * Inline functions
  3068. + */
  3069. +static inline void ipts_set_state(struct ipts_info *ipts,
  3070. + enum ipts_state state)
  3071. +{
  3072. + ipts->state = state;
  3073. +}
  3074. +
  3075. +static inline enum ipts_state ipts_get_state(const struct ipts_info *ipts)
  3076. +{
  3077. + return ipts->state;
  3078. +}
  3079. +
  3080. +static inline bool ipts_is_default_resource_ready(const struct ipts_info *ipts)
  3081. +{
  3082. + return ipts->resource.default_resource_ready;
  3083. +}
  3084. +
  3085. +static inline bool ipts_is_raw_data_resource_ready(const struct ipts_info *ipts)
  3086. +{
  3087. + return ipts->resource.raw_data_resource_ready;
  3088. +}
  3089. +
  3090. +static inline struct ipts_buffer_info *ipts_get_feedback_buffer(
  3091. + struct ipts_info *ipts, int buffer_idx)
  3092. +{
  3093. + return &ipts->resource.feedback_buffer[buffer_idx];
  3094. +}
  3095. +
  3096. +static inline struct ipts_buffer_info *ipts_get_touch_data_buffer_hid(
  3097. + struct ipts_info *ipts)
  3098. +{
  3099. + return &ipts->resource.touch_data_buffer_hid;
  3100. +}
  3101. +
  3102. +static inline struct ipts_buffer_info *ipts_get_output_buffers_by_parallel_id(
  3103. + struct ipts_info *ipts, int parallel_idx)
  3104. +{
  3105. + return &ipts->resource.raw_data_mode_output_buffer[parallel_idx][0];
  3106. +}
  3107. +
  3108. +static inline struct ipts_buffer_info *ipts_get_hid2me_buffer(
  3109. + struct ipts_info *ipts)
  3110. +{
  3111. + return &ipts->resource.hid2me_buffer;
  3112. +}
  3113. +
  3114. +static inline void ipts_set_wq_item_size(struct ipts_info *ipts, u8 size)
  3115. +{
  3116. + ipts->resource.wq_item_size = size;
  3117. +}
  3118. +
  3119. +static inline u8 ipts_get_wq_item_size(const struct ipts_info *ipts)
  3120. +{
  3121. + return ipts->resource.wq_item_size;
  3122. +}
  3123. +
  3124. +static inline int ipts_get_num_of_parallel_buffers(const struct ipts_info *ipts)
  3125. +{
  3126. + return ipts->num_of_parallel_data_buffers;
  3127. +}
  3128. +
  3129. +#endif // _IPTS_H_
  3130. diff --git a/drivers/misc/ipts/kernel.c b/drivers/misc/ipts/kernel.c
  3131. new file mode 100644
  3132. index 000000000000..a2c43228e2c7
  3133. --- /dev/null
  3134. +++ b/drivers/misc/ipts/kernel.c
  3135. @@ -0,0 +1,1047 @@
  3136. +// SPDX-License-Identifier: GPL-2.0-or-later
  3137. +/*
  3138. + *
  3139. + * Intel Precise Touch & Stylus
  3140. + * Copyright (c) 2016 Intel Corporation
  3141. + *
  3142. + */
  3143. +
  3144. +#include <linux/module.h>
  3145. +#include <linux/firmware.h>
  3146. +#include <linux/ipts.h>
  3147. +#include <linux/ipts-binary.h>
  3148. +#include <linux/vmalloc.h>
  3149. +
  3150. +#include "companion.h"
  3151. +#include "gfx.h"
  3152. +#include "ipts.h"
  3153. +#include "msg-handler.h"
  3154. +#include "resource.h"
  3155. +#include "state.h"
  3156. +
  3157. +#define BDW_SURFACE_BASE_ADDRESS 0x6101000e
  3158. +#define SURFACE_STATE_OFFSET_WORD 4
  3159. +#define SBA_OFFSET_BYTES 16384
  3160. +#define LASTSUBMITID_DEFAULT_VALUE -1
  3161. +
  3162. +#define IPTS_INPUT_ON ((u32)1 << IPTS_INPUT)
  3163. +#define IPTS_OUTPUT_ON ((u32)1 << IPTS_OUTPUT)
  3164. +#define IPTS_CONFIGURATION_ON ((u32)1 << IPTS_CONFIGURATION)
  3165. +#define IPTS_CALIBRATION_ON ((u32)1 << IPTS_CALIBRATION)
  3166. +#define IPTS_FEATURE_ON ((u32)1 << IPTS_FEATURE)
  3167. +
  3168. +// OpenCL kernel
  3169. +struct bin_workload {
  3170. + int cmdbuf_index;
  3171. + int iobuf_input;
  3172. + int iobuf_output[MAX_NUM_OUTPUT_BUFFERS];
  3173. +};
  3174. +
  3175. +struct bin_buffer {
  3176. + unsigned int handle;
  3177. + struct ipts_mapbuffer *buf;
  3178. +
  3179. + // only releasing vendor kernel unmaps output buffers
  3180. + bool no_unmap;
  3181. +};
  3182. +
  3183. +struct bin_alloc_info {
  3184. + struct bin_buffer *buffs;
  3185. + int num_of_allocations;
  3186. + int num_of_outputs;
  3187. +
  3188. + int num_of_buffers;
  3189. +};
  3190. +
  3191. +struct bin_guc_wq_item {
  3192. + unsigned int batch_offset;
  3193. + unsigned int size;
  3194. + char data[];
  3195. +};
  3196. +
  3197. +struct bin_kernel_info {
  3198. + struct bin_workload *wl;
  3199. + struct bin_alloc_info *alloc_info;
  3200. + struct bin_guc_wq_item *guc_wq_item;
  3201. + struct ipts_bin_bufid_patch bufid_patch;
  3202. +
  3203. + // 1: vendor, 0: postprocessing
  3204. + bool is_vendor;
  3205. +};
  3206. +
  3207. +struct bin_kernel_list {
  3208. + struct ipts_mapbuffer *bufid_buf;
  3209. + int num_of_kernels;
  3210. + struct bin_kernel_info kernels[];
  3211. +};
  3212. +
  3213. +struct bin_parse_info {
  3214. + u8 *data;
  3215. + int size;
  3216. + int parsed;
  3217. +
  3218. + struct ipts_bin_fw_info *fw_info;
  3219. +
  3220. + // only used by postprocessing
  3221. + struct bin_kernel_info *vendor_kernel;
  3222. +
  3223. + // interested vendor output index
  3224. + u32 interested_vendor_output;
  3225. +};
  3226. +
  3227. +static int bin_read_fw(struct ipts_info *ipts, const char *fw_name,
  3228. + u8 *data, int size)
  3229. +{
  3230. + const struct firmware *fw = NULL;
  3231. + int ret = 0;
  3232. +
  3233. + ret = ipts_request_firmware(&fw, fw_name, &ipts->cldev->dev);
  3234. + if (ret) {
  3235. + ipts_err(ipts, "cannot read fw %s\n", fw_name);
  3236. + return ret;
  3237. + }
  3238. +
  3239. + if (fw->size > size) {
  3240. + ipts_dbg(ipts, "too small buffer to contain fw data\n");
  3241. + ret = -EINVAL;
  3242. + } else {
  3243. + memcpy(data, fw->data, fw->size);
  3244. + }
  3245. +
  3246. + release_firmware(fw);
  3247. +
  3248. + return ret;
  3249. +}
  3250. +
  3251. +
  3252. +static struct ipts_bin_data_file_info *bin_get_data_file_info(
  3253. + struct ipts_bin_fw_info *fw_info, u32 io_buffer_type)
  3254. +{
  3255. + int i;
  3256. +
  3257. + for (i = 0; i < fw_info->num_of_data_files; i++) {
  3258. + if (fw_info->data_file[i].io_buffer_type == io_buffer_type)
  3259. + break;
  3260. + }
  3261. +
  3262. + if (i == fw_info->num_of_data_files)
  3263. + return NULL;
  3264. +
  3265. + return &fw_info->data_file[i];
  3266. +}
  3267. +
  3268. +static inline bool is_shared_data(
  3269. + const struct ipts_bin_data_file_info *data_file)
  3270. +{
  3271. + if (!data_file)
  3272. + return false;
  3273. +
  3274. + return (!!(data_file->flags & IPTS_DATA_FILE_FLAG_SHARE));
  3275. +}
  3276. +
  3277. +static inline bool is_alloc_cont_data(
  3278. + const struct ipts_bin_data_file_info *data_file)
  3279. +{
  3280. + if (!data_file)
  3281. + return false;
  3282. +
  3283. + return (!!(data_file->flags & IPTS_DATA_FILE_FLAG_ALLOC_CONTIGUOUS));
  3284. +}
  3285. +
  3286. +static inline bool is_parsing_vendor_kernel(
  3287. + const struct bin_parse_info *parse_info)
  3288. +{
  3289. + // vendor_kernel == null while loading itself
  3290. + return parse_info->vendor_kernel == NULL;
  3291. +}
  3292. +
  3293. +static int bin_read_allocation_list(struct ipts_info *ipts,
  3294. + struct bin_parse_info *parse_info,
  3295. + struct bin_alloc_info *alloc_info)
  3296. +{
  3297. + struct ipts_bin_alloc_list *alloc_list;
  3298. + int aidx, pidx, num_of_parallels, bidx, num_of_buffers;
  3299. + int parsed, size;
  3300. +
  3301. + parsed = parse_info->parsed;
  3302. + size = parse_info->size;
  3303. +
  3304. + alloc_list = (struct ipts_bin_alloc_list *)&parse_info->data[parsed];
  3305. +
  3306. + // validation check
  3307. + if (sizeof(alloc_list->num) > size - parsed)
  3308. + return -EINVAL;
  3309. +
  3310. + // read the number of aloocations
  3311. + parsed += sizeof(alloc_list->num);
  3312. +
  3313. + // validation check
  3314. + if (sizeof(alloc_list->alloc[0]) * alloc_list->num > size - parsed)
  3315. + return -EINVAL;
  3316. +
  3317. + num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
  3318. + num_of_buffers = num_of_parallels * alloc_list->num + num_of_parallels;
  3319. + alloc_info->buffs = vmalloc(sizeof(struct bin_buffer) *
  3320. + num_of_buffers);
  3321. +
  3322. + if (alloc_info->buffs == NULL)
  3323. + return -ENOMEM;
  3324. +
  3325. + memset(alloc_info->buffs, 0, sizeof(struct bin_buffer) *
  3326. + num_of_buffers);
  3327. +
  3328. + for (aidx = 0; aidx < alloc_list->num; aidx++) {
  3329. + for (pidx = 0; pidx < num_of_parallels; pidx++) {
  3330. + bidx = aidx + (pidx * alloc_list->num);
  3331. + alloc_info->buffs[bidx].handle =
  3332. + alloc_list->alloc[aidx].handle;
  3333. + }
  3334. +
  3335. + parsed += sizeof(alloc_list->alloc[0]);
  3336. + }
  3337. +
  3338. + parse_info->parsed = parsed;
  3339. + alloc_info->num_of_allocations = alloc_list->num;
  3340. + alloc_info->num_of_buffers = num_of_buffers;
  3341. +
  3342. + ipts_dbg(ipts, "number of allocations = %d, buffers = %d\n",
  3343. + alloc_info->num_of_allocations,
  3344. + alloc_info->num_of_buffers);
  3345. +
  3346. + return 0;
  3347. +}
  3348. +
  3349. +static void patch_SBA(u32 *buf_addr, u64 gpu_addr, int size)
  3350. +{
  3351. + u64 *stateBase;
  3352. + u64 SBA;
  3353. + u32 inst;
  3354. + int i;
  3355. +
  3356. + SBA = gpu_addr + SBA_OFFSET_BYTES;
  3357. +
  3358. + for (i = 0; i < size / 4; i++) {
  3359. + inst = buf_addr[i];
  3360. + if (inst == BDW_SURFACE_BASE_ADDRESS) {
  3361. + stateBase = (u64 *)&buf_addr
  3362. + [i + SURFACE_STATE_OFFSET_WORD];
  3363. + *stateBase |= SBA;
  3364. + *stateBase |= 0x01; // enable
  3365. + break;
  3366. + }
  3367. + }
  3368. +}
  3369. +
  3370. +static int bin_read_cmd_buffer(struct ipts_info *ipts,
  3371. + struct bin_parse_info *parse_info,
  3372. + struct bin_alloc_info *alloc_info, struct bin_workload *wl)
  3373. +{
  3374. + struct ipts_bin_cmdbuf *cmd;
  3375. + struct ipts_mapbuffer *buf;
  3376. + int cidx, size, parsed, pidx, num_of_parallels;
  3377. +
  3378. + size = parse_info->size;
  3379. + parsed = parse_info->parsed;
  3380. +
  3381. + cmd = (struct ipts_bin_cmdbuf *)&parse_info->data[parsed];
  3382. +
  3383. + if (sizeof(cmd->size) > size - parsed)
  3384. + return -EINVAL;
  3385. +
  3386. + parsed += sizeof(cmd->size);
  3387. + if (cmd->size > size - parsed)
  3388. + return -EINVAL;
  3389. +
  3390. + ipts_dbg(ipts, "cmd buf size = %d\n", cmd->size);
  3391. + num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
  3392. +
  3393. + // command buffers are located after the other allocations
  3394. + cidx = num_of_parallels * alloc_info->num_of_allocations;
  3395. + for (pidx = 0; pidx < num_of_parallels; pidx++) {
  3396. + buf = ipts_map_buffer(ipts, cmd->size, 0);
  3397. +
  3398. + if (buf == NULL)
  3399. + return -ENOMEM;
  3400. +
  3401. + ipts_dbg(ipts, "cmd_idx[%d] = %d, g:0x%p, c:0x%p\n", pidx,
  3402. + cidx, buf->gfx_addr, buf->cpu_addr);
  3403. +
  3404. + memcpy((void *)buf->cpu_addr, &(cmd->data[0]), cmd->size);
  3405. + patch_SBA(buf->cpu_addr, (u64)buf->gfx_addr, cmd->size);
  3406. +
  3407. + alloc_info->buffs[cidx].buf = buf;
  3408. + wl[pidx].cmdbuf_index = cidx;
  3409. + cidx++;
  3410. + }
  3411. +
  3412. + parsed += cmd->size;
  3413. + parse_info->parsed = parsed;
  3414. +
  3415. + return 0;
  3416. +}
  3417. +
  3418. +static int bin_find_alloc(struct ipts_info *ipts,
  3419. + struct bin_alloc_info *alloc_info, u32 handle)
  3420. +{
  3421. + int i;
  3422. +
  3423. + for (i = 0; i < alloc_info->num_of_allocations; i++) {
  3424. + if (alloc_info->buffs[i].handle == handle)
  3425. + return i;
  3426. + }
  3427. +
  3428. + return -1;
  3429. +}
  3430. +
  3431. +static struct ipts_mapbuffer *bin_get_vendor_kernel_output(
  3432. + struct bin_parse_info *parse_info, int pidx)
  3433. +{
  3434. + struct bin_kernel_info *vendor = parse_info->vendor_kernel;
  3435. + struct bin_alloc_info *alloc_info;
  3436. + int bidx, vidx;
  3437. +
  3438. + alloc_info = vendor->alloc_info;
  3439. + vidx = parse_info->interested_vendor_output;
  3440. +
  3441. + if (vidx >= alloc_info->num_of_outputs)
  3442. + return NULL;
  3443. +
  3444. + bidx = vendor->wl[pidx].iobuf_output[vidx];
  3445. +
  3446. + return alloc_info->buffs[bidx].buf;
  3447. +}
  3448. +
  3449. +static int bin_read_res_list(struct ipts_info *ipts,
  3450. + struct bin_parse_info *parse_info,
  3451. + struct bin_alloc_info *alloc_info, struct bin_workload *wl)
  3452. +{
  3453. + struct ipts_bin_res_list *res_list;
  3454. + struct ipts_bin_res *res;
  3455. + struct ipts_mapbuffer *buf;
  3456. + struct ipts_bin_data_file_info *data_file;
  3457. + u8 *bin_data;
  3458. + int i, size, parsed, pidx, num_of_parallels, oidx = -1;
  3459. + int bidx, num_of_alloc;
  3460. + u32 buf_size, flags, io_buf_type;
  3461. + bool initialize;
  3462. +
  3463. + parsed = parse_info->parsed;
  3464. + size = parse_info->size;
  3465. + bin_data = parse_info->data;
  3466. +
  3467. + res_list = (struct ipts_bin_res_list *)&parse_info->data[parsed];
  3468. +
  3469. + if (sizeof(res_list->num) > (size - parsed))
  3470. + return -EINVAL;
  3471. +
  3472. + parsed += sizeof(res_list->num);
  3473. + num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
  3474. +
  3475. + ipts_dbg(ipts, "number of resources %u\n", res_list->num);
  3476. +
  3477. + for (i = 0; i < res_list->num; i++) {
  3478. + struct ipts_bin_io_header *io_hdr;
  3479. +
  3480. + initialize = false;
  3481. + io_buf_type = 0;
  3482. + flags = 0;
  3483. +
  3484. + // initial data
  3485. + data_file = NULL;
  3486. +
  3487. + res = (struct ipts_bin_res *)(&(bin_data[parsed]));
  3488. + if (sizeof(res[0]) > (size - parsed))
  3489. + return -EINVAL;
  3490. +
  3491. + ipts_dbg(ipts, "Resource(%d): handle 0x%08x type %u init %u size %u alsigned %u\n",
  3492. + i, res->handle, res->type, res->initialize,
  3493. + res->size, res->aligned_size);
  3494. +
  3495. + parsed += sizeof(res[0]);
  3496. +
  3497. + if (res->initialize) {
  3498. + if (res->size > (size - parsed))
  3499. + return -EINVAL;
  3500. + parsed += res->size;
  3501. + }
  3502. +
  3503. + initialize = res->initialize;
  3504. + if (!initialize || res->size <=
  3505. + sizeof(struct ipts_bin_io_header))
  3506. + goto read_res_list_no_init;
  3507. +
  3508. + io_hdr = (struct ipts_bin_io_header *)(&res->data[0]);
  3509. +
  3510. + if (strncmp(io_hdr->str, "INTELTOUCH", 10) != 0)
  3511. + goto read_res_list_no_init;
  3512. +
  3513. + data_file = bin_get_data_file_info(parse_info->fw_info,
  3514. + (u32)io_hdr->type);
  3515. +
  3516. + switch (io_hdr->type) {
  3517. + case IPTS_INPUT: {
  3518. + ipts_dbg(ipts, "input detected\n");
  3519. + io_buf_type = IPTS_INPUT_ON;
  3520. + flags = IPTS_BUF_FLAG_CONTIGUOUS;
  3521. + break;
  3522. + }
  3523. + case IPTS_OUTPUT: {
  3524. + ipts_dbg(ipts, "output detected\n");
  3525. + io_buf_type = IPTS_OUTPUT_ON;
  3526. + oidx++;
  3527. + break;
  3528. + }
  3529. + default: {
  3530. + if ((u32)io_hdr->type > 31) {
  3531. + ipts_err(ipts, "invalid io buffer : %u\n",
  3532. + (u32)io_hdr->type);
  3533. + continue;
  3534. + }
  3535. +
  3536. + if (is_alloc_cont_data(data_file))
  3537. + flags = IPTS_BUF_FLAG_CONTIGUOUS;
  3538. +
  3539. + io_buf_type = ((u32)1 << (u32)io_hdr->type);
  3540. + ipts_dbg(ipts, "special io buffer %u\n",
  3541. + io_hdr->type);
  3542. +
  3543. + break;
  3544. + }
  3545. + }
  3546. +
  3547. + initialize = false;
  3548. +
  3549. +read_res_list_no_init:
  3550. + num_of_alloc = alloc_info->num_of_allocations;
  3551. + bidx = bin_find_alloc(ipts, alloc_info, res->handle);
  3552. +
  3553. + if (bidx == -1) {
  3554. + ipts_dbg(ipts, "cannot find alloc info\n");
  3555. + return -EINVAL;
  3556. + }
  3557. +
  3558. + for (pidx = 0; pidx < num_of_parallels; pidx++,
  3559. + bidx += num_of_alloc) {
  3560. + if (!res->aligned_size)
  3561. + continue;
  3562. +
  3563. + if (!(pidx == 0 || (io_buf_type &&
  3564. + !is_shared_data(data_file))))
  3565. + continue;
  3566. +
  3567. + buf_size = res->aligned_size;
  3568. + if (io_buf_type & IPTS_INPUT_ON) {
  3569. + buf_size = max_t(u32, buf_size,
  3570. + ipts->device_info.frame_size);
  3571. +
  3572. + wl[pidx].iobuf_input = bidx;
  3573. + } else if (io_buf_type & IPTS_OUTPUT_ON) {
  3574. + wl[pidx].iobuf_output[oidx] = bidx;
  3575. +
  3576. + if (is_parsing_vendor_kernel(parse_info) ||
  3577. + oidx == 0)
  3578. + goto read_res_list_no_inout_err;
  3579. +
  3580. + ipts_err(ipts, "postproc with >1 inout is not supported: %d\n",
  3581. + oidx);
  3582. +
  3583. + return -EINVAL;
  3584. + }
  3585. +
  3586. +read_res_list_no_inout_err:
  3587. + if (!is_parsing_vendor_kernel(parse_info) &&
  3588. + io_buf_type & IPTS_OUTPUT_ON) {
  3589. + buf = bin_get_vendor_kernel_output(
  3590. + parse_info, pidx);
  3591. +
  3592. + alloc_info->buffs[bidx].no_unmap = true;
  3593. + } else {
  3594. + buf = ipts_map_buffer(ipts, buf_size, flags);
  3595. + }
  3596. +
  3597. + if (buf == NULL) {
  3598. + ipts_dbg(ipts, "ipts_map_buffer failed\n");
  3599. + return -ENOMEM;
  3600. + }
  3601. +
  3602. + if (initialize) {
  3603. + memcpy((void *)buf->cpu_addr, &(res->data[0]),
  3604. + res->size);
  3605. + } else if (data_file && strlen(data_file->file_name)) {
  3606. + bin_read_fw(ipts, data_file->file_name,
  3607. + buf->cpu_addr, buf_size);
  3608. + } else if (is_parsing_vendor_kernel(parse_info) ||
  3609. + !(io_buf_type & IPTS_OUTPUT_ON)) {
  3610. + memset((void *)buf->cpu_addr, 0, res->size);
  3611. + }
  3612. +
  3613. + alloc_info->buffs[bidx].buf = buf;
  3614. + }
  3615. + }
  3616. +
  3617. + alloc_info->num_of_outputs = oidx + 1;
  3618. + parse_info->parsed = parsed;
  3619. +
  3620. + return 0;
  3621. +}
  3622. +
  3623. +static int bin_read_patch_list(struct ipts_info *ipts,
  3624. + struct bin_parse_info *parse_info,
  3625. + struct bin_alloc_info *alloc_info, struct bin_workload *wl)
  3626. +{
  3627. + struct ipts_bin_patch_list *patch_list;
  3628. + struct ipts_bin_patch *patch;
  3629. + struct ipts_mapbuffer *cmd = NULL;
  3630. + u8 *batch;
  3631. + int parsed, size, i, pidx, num_of_parallels, cidx, bidx;
  3632. + unsigned int gtt_offset;
  3633. +
  3634. + parsed = parse_info->parsed;
  3635. + size = parse_info->size;
  3636. + patch_list = (struct ipts_bin_patch_list *)&parse_info->data[parsed];
  3637. +
  3638. + if (sizeof(patch_list->num) > (size - parsed))
  3639. + return -EFAULT;
  3640. + parsed += sizeof(patch_list->num);
  3641. +
  3642. + num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
  3643. + patch = (struct ipts_bin_patch *)(&patch_list->patch[0]);
  3644. +
  3645. + for (i = 0; i < patch_list->num; i++) {
  3646. + if (sizeof(patch_list->patch[0]) > (size - parsed))
  3647. + return -EFAULT;
  3648. +
  3649. + for (pidx = 0; pidx < num_of_parallels; pidx++) {
  3650. + cidx = wl[pidx].cmdbuf_index;
  3651. + bidx = patch[i].index + pidx *
  3652. + alloc_info->num_of_allocations;
  3653. +
  3654. + // buffer is shared
  3655. + if (alloc_info->buffs[bidx].buf == NULL)
  3656. + bidx = patch[i].index;
  3657. +
  3658. + cmd = alloc_info->buffs[cidx].buf;
  3659. + batch = (char *)(u64)cmd->cpu_addr;
  3660. +
  3661. + gtt_offset = 0;
  3662. + if (alloc_info->buffs[bidx].buf != NULL) {
  3663. + gtt_offset = (u32)(u64)alloc_info->buffs
  3664. + [bidx].buf->gfx_addr;
  3665. + }
  3666. + gtt_offset += patch[i].alloc_offset;
  3667. +
  3668. + batch += patch[i].patch_offset;
  3669. + *(u32 *)batch = gtt_offset;
  3670. + }
  3671. +
  3672. + parsed += sizeof(patch_list->patch[0]);
  3673. + }
  3674. +
  3675. + parse_info->parsed = parsed;
  3676. +
  3677. + return 0;
  3678. +}
  3679. +
  3680. +static int bin_read_guc_wq_item(struct ipts_info *ipts,
  3681. + struct bin_parse_info *parse_info,
  3682. + struct bin_guc_wq_item **guc_wq_item)
  3683. +{
  3684. + struct ipts_bin_guc_wq_info *bin_guc_wq;
  3685. + struct bin_guc_wq_item *item;
  3686. + u8 *wi_data;
  3687. + int size, parsed, hdr_size, wi_size;
  3688. + int i, batch_offset;
  3689. +
  3690. + parsed = parse_info->parsed;
  3691. + size = parse_info->size;
  3692. + bin_guc_wq = (struct ipts_bin_guc_wq_info *)&parse_info->data[parsed];
  3693. +
  3694. + wi_size = bin_guc_wq->size;
  3695. + wi_data = bin_guc_wq->data;
  3696. + batch_offset = bin_guc_wq->batch_offset;
  3697. +
  3698. + ipts_dbg(ipts, "wi size = %d, bt offset = %d\n", wi_size, batch_offset);
  3699. +
  3700. + for (i = 0; i < wi_size / sizeof(u32); i++)
  3701. + ipts_dbg(ipts, "wi[%d] = 0x%08x\n", i, *((u32 *)wi_data + i));
  3702. +
  3703. + hdr_size = sizeof(bin_guc_wq->size) + sizeof(bin_guc_wq->batch_offset);
  3704. +
  3705. + if (hdr_size > (size - parsed))
  3706. + return -EINVAL;
  3707. +
  3708. + parsed += hdr_size;
  3709. + item = vmalloc(sizeof(struct bin_guc_wq_item) + wi_size);
  3710. +
  3711. + if (item == NULL)
  3712. + return -ENOMEM;
  3713. +
  3714. + item->size = wi_size;
  3715. + item->batch_offset = batch_offset;
  3716. + memcpy(item->data, wi_data, wi_size);
  3717. +
  3718. + *guc_wq_item = item;
  3719. +
  3720. + parsed += wi_size;
  3721. + parse_info->parsed = parsed;
  3722. +
  3723. + return 0;
  3724. +}
  3725. +
  3726. +static int bin_setup_guc_workqueue(struct ipts_info *ipts,
  3727. + struct bin_kernel_list *kernel_list)
  3728. +{
  3729. + struct bin_alloc_info *alloc_info;
  3730. + struct bin_workload *wl;
  3731. + struct bin_kernel_info *kernel;
  3732. + struct bin_buffer *bin_buf;
  3733. + u8 *wq_start, *wq_addr, *wi_data;
  3734. + int wq_size, wi_size, pidx, cidx, kidx, iter_size;
  3735. + int i, num_of_parallels, batch_offset, k_num, total_workload;
  3736. +
  3737. + wq_addr = (u8 *)ipts->resource.wq_info.wq_addr;
  3738. + wq_size = ipts->resource.wq_info.wq_size;
  3739. + num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
  3740. + total_workload = ipts_get_wq_item_size(ipts);
  3741. + k_num = kernel_list->num_of_kernels;
  3742. +
  3743. + iter_size = total_workload * num_of_parallels;
  3744. + if (wq_size % iter_size) {
  3745. + ipts_err(ipts, "wq item cannot fit into wq\n");
  3746. + return -EINVAL;
  3747. + }
  3748. +
  3749. + wq_start = wq_addr;
  3750. + for (pidx = 0; pidx < num_of_parallels; pidx++) {
  3751. + kernel = &kernel_list->kernels[0];
  3752. +
  3753. + for (kidx = 0; kidx < k_num; kidx++, kernel++) {
  3754. + wl = kernel->wl;
  3755. + alloc_info = kernel->alloc_info;
  3756. +
  3757. + batch_offset = kernel->guc_wq_item->batch_offset;
  3758. + wi_size = kernel->guc_wq_item->size;
  3759. + wi_data = &kernel->guc_wq_item->data[0];
  3760. +
  3761. + cidx = wl[pidx].cmdbuf_index;
  3762. + bin_buf = &alloc_info->buffs[cidx];
  3763. +
  3764. + // Patch the WQ Data with proper batch buffer offset
  3765. + *(u32 *)(wi_data + batch_offset) =
  3766. + (u32)(unsigned long)(bin_buf->buf->gfx_addr);
  3767. +
  3768. + memcpy(wq_addr, wi_data, wi_size);
  3769. + wq_addr += wi_size;
  3770. + }
  3771. + }
  3772. +
  3773. + for (i = 0; i < (wq_size / iter_size) - 1; i++) {
  3774. + memcpy(wq_addr, wq_start, iter_size);
  3775. + wq_addr += iter_size;
  3776. + }
  3777. +
  3778. + return 0;
  3779. +}
  3780. +
  3781. +static int bin_read_bufid_patch(struct ipts_info *ipts,
  3782. + struct bin_parse_info *parse_info,
  3783. + struct ipts_bin_bufid_patch *bufid_patch)
  3784. +{
  3785. + struct ipts_bin_bufid_patch *patch;
  3786. + int size, parsed;
  3787. +
  3788. + parsed = parse_info->parsed;
  3789. + size = parse_info->size;
  3790. + patch = (struct ipts_bin_bufid_patch *)&parse_info->data[parsed];
  3791. +
  3792. + if (sizeof(struct ipts_bin_bufid_patch) > (size - parsed)) {
  3793. + ipts_dbg(ipts, "invalid bufid info\n");
  3794. + return -EINVAL;
  3795. + }
  3796. +
  3797. + parsed += sizeof(struct ipts_bin_bufid_patch);
  3798. + parse_info->parsed = parsed;
  3799. +
  3800. + memcpy(bufid_patch, patch, sizeof(struct ipts_bin_bufid_patch));
  3801. +
  3802. + return 0;
  3803. +}
  3804. +
  3805. +static int bin_setup_bufid_buffer(struct ipts_info *ipts,
  3806. + struct bin_kernel_list *kernel_list)
  3807. +{
  3808. + struct ipts_mapbuffer *buf, *cmd_buf;
  3809. + struct bin_kernel_info *last_kernel;
  3810. + struct bin_alloc_info *alloc_info;
  3811. + struct bin_workload *wl;
  3812. + u8 *batch;
  3813. + int pidx, num_of_parallels, cidx;
  3814. + u32 mem_offset, imm_offset;
  3815. +
  3816. + buf = ipts_map_buffer(ipts, PAGE_SIZE, 0);
  3817. + if (!buf)
  3818. + return -ENOMEM;
  3819. +
  3820. + last_kernel = &kernel_list->kernels[kernel_list->num_of_kernels - 1];
  3821. +
  3822. + mem_offset = last_kernel->bufid_patch.mem_offset;
  3823. + imm_offset = last_kernel->bufid_patch.imm_offset;
  3824. + wl = last_kernel->wl;
  3825. + alloc_info = last_kernel->alloc_info;
  3826. +
  3827. + // Initialize the buffer with default value
  3828. + *((u32 *)buf->cpu_addr) = LASTSUBMITID_DEFAULT_VALUE;
  3829. + ipts->current_buffer_index = LASTSUBMITID_DEFAULT_VALUE;
  3830. + ipts->last_buffer_completed = LASTSUBMITID_DEFAULT_VALUE;
  3831. + ipts->last_submitted_id = (int *)buf->cpu_addr;
  3832. +
  3833. + num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
  3834. +
  3835. + for (pidx = 0; pidx < num_of_parallels; pidx++) {
  3836. + cidx = wl[pidx].cmdbuf_index;
  3837. + cmd_buf = alloc_info->buffs[cidx].buf;
  3838. + batch = (u8 *)(u64)cmd_buf->cpu_addr;
  3839. +
  3840. + *((u32 *)(batch + mem_offset)) = (u32)(u64)(buf->gfx_addr);
  3841. + *((u32 *)(batch + imm_offset)) = pidx;
  3842. + }
  3843. +
  3844. + kernel_list->bufid_buf = buf;
  3845. +
  3846. + return 0;
  3847. +}
  3848. +
  3849. +static void unmap_buffers(struct ipts_info *ipts,
  3850. + struct bin_alloc_info *alloc_info)
  3851. +{
  3852. + struct bin_buffer *buffs;
  3853. + int i, num_of_buffers;
  3854. +
  3855. + num_of_buffers = alloc_info->num_of_buffers;
  3856. + buffs = &alloc_info->buffs[0];
  3857. +
  3858. + for (i = 0; i < num_of_buffers; i++) {
  3859. + if (buffs[i].no_unmap != true && buffs[i].buf != NULL)
  3860. + ipts_unmap_buffer(ipts, buffs[i].buf);
  3861. + }
  3862. +}
  3863. +
  3864. +static int load_kernel(struct ipts_info *ipts,
  3865. + struct bin_parse_info *parse_info,
  3866. + struct bin_kernel_info *kernel)
  3867. +{
  3868. + struct ipts_bin_header *hdr;
  3869. + struct bin_workload *wl;
  3870. + struct bin_alloc_info *alloc_info;
  3871. + struct bin_guc_wq_item *guc_wq_item = NULL;
  3872. + struct ipts_bin_bufid_patch bufid_patch;
  3873. + int num_of_parallels, ret;
  3874. +
  3875. + num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
  3876. +
  3877. + // check header version and magic numbers
  3878. + hdr = (struct ipts_bin_header *)parse_info->data;
  3879. + if (hdr->version != IPTS_BIN_HEADER_VERSION ||
  3880. + strncmp(hdr->str, "IOCL", 4) != 0) {
  3881. + ipts_err(ipts, "binary header is not correct version = %d, ",
  3882. + hdr->version);
  3883. +
  3884. + ipts_err(ipts, "string = %c%c%c%c\n", hdr->str[0], hdr->str[1],
  3885. + hdr->str[2], hdr->str[3]);
  3886. +
  3887. + return -EINVAL;
  3888. + }
  3889. +
  3890. + parse_info->parsed = sizeof(struct ipts_bin_header);
  3891. + wl = vmalloc(sizeof(struct bin_workload) * num_of_parallels);
  3892. +
  3893. + if (wl == NULL)
  3894. + return -ENOMEM;
  3895. +
  3896. + memset(wl, 0, sizeof(struct bin_workload) * num_of_parallels);
  3897. + alloc_info = vmalloc(sizeof(struct bin_alloc_info));
  3898. +
  3899. + if (alloc_info == NULL) {
  3900. + vfree(wl);
  3901. + return -ENOMEM;
  3902. + }
  3903. +
  3904. + memset(alloc_info, 0, sizeof(struct bin_alloc_info));
  3905. +
  3906. + ipts_dbg(ipts, "kernel setup(size : %d)\n", parse_info->size);
  3907. +
  3908. + ret = bin_read_allocation_list(ipts, parse_info, alloc_info);
  3909. + if (ret) {
  3910. + ipts_dbg(ipts, "error read_allocation_list\n");
  3911. + goto setup_error;
  3912. + }
  3913. +
  3914. + ret = bin_read_cmd_buffer(ipts, parse_info, alloc_info, wl);
  3915. + if (ret) {
  3916. + ipts_dbg(ipts, "error read_cmd_buffer\n");
  3917. + goto setup_error;
  3918. + }
  3919. +
  3920. + ret = bin_read_res_list(ipts, parse_info, alloc_info, wl);
  3921. + if (ret) {
  3922. + ipts_dbg(ipts, "error read_res_list\n");
  3923. + goto setup_error;
  3924. + }
  3925. +
  3926. + ret = bin_read_patch_list(ipts, parse_info, alloc_info, wl);
  3927. + if (ret) {
  3928. + ipts_dbg(ipts, "error read_patch_list\n");
  3929. + goto setup_error;
  3930. + }
  3931. +
  3932. + ret = bin_read_guc_wq_item(ipts, parse_info, &guc_wq_item);
  3933. + if (ret) {
  3934. + ipts_dbg(ipts, "error read_guc_workqueue\n");
  3935. + goto setup_error;
  3936. + }
  3937. +
  3938. + memset(&bufid_patch, 0, sizeof(bufid_patch));
  3939. +
  3940. + ret = bin_read_bufid_patch(ipts, parse_info, &bufid_patch);
  3941. + if (ret) {
  3942. + ipts_dbg(ipts, "error read_bufid_patch\n");
  3943. + goto setup_error;
  3944. + }
  3945. +
  3946. + kernel->wl = wl;
  3947. + kernel->alloc_info = alloc_info;
  3948. + kernel->is_vendor = is_parsing_vendor_kernel(parse_info);
  3949. + kernel->guc_wq_item = guc_wq_item;
  3950. +
  3951. + memcpy(&kernel->bufid_patch, &bufid_patch, sizeof(bufid_patch));
  3952. +
  3953. + return 0;
  3954. +
  3955. +setup_error:
  3956. + vfree(guc_wq_item);
  3957. +
  3958. + unmap_buffers(ipts, alloc_info);
  3959. +
  3960. + vfree(alloc_info->buffs);
  3961. + vfree(alloc_info);
  3962. + vfree(wl);
  3963. +
  3964. + return ret;
  3965. +}
  3966. +
  3967. +void bin_setup_input_output(struct ipts_info *ipts,
  3968. + struct bin_kernel_list *kernel_list)
  3969. +{
  3970. + struct bin_kernel_info *vendor_kernel;
  3971. + struct bin_workload *wl;
  3972. + struct ipts_mapbuffer *buf;
  3973. + struct bin_alloc_info *alloc_info;
  3974. + int pidx, num_of_parallels, i, bidx;
  3975. +
  3976. + vendor_kernel = &kernel_list->kernels[0];
  3977. +
  3978. + wl = vendor_kernel->wl;
  3979. + alloc_info = vendor_kernel->alloc_info;
  3980. + ipts->resource.num_of_outputs = alloc_info->num_of_outputs;
  3981. + num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
  3982. +
  3983. + for (pidx = 0; pidx < num_of_parallels; pidx++) {
  3984. + bidx = wl[pidx].iobuf_input;
  3985. + buf = alloc_info->buffs[bidx].buf;
  3986. +
  3987. + ipts_dbg(ipts, "in_buf[%d](%d) c:%p, p:%p, g:%p\n",
  3988. + pidx, bidx, (void *)buf->cpu_addr,
  3989. + (void *)buf->phy_addr, (void *)buf->gfx_addr);
  3990. +
  3991. + ipts_set_input_buffer(ipts, pidx, buf->cpu_addr, buf->phy_addr);
  3992. +
  3993. + for (i = 0; i < alloc_info->num_of_outputs; i++) {
  3994. + bidx = wl[pidx].iobuf_output[i];
  3995. + buf = alloc_info->buffs[bidx].buf;
  3996. +
  3997. + ipts_dbg(ipts, "out_buf[%d][%d] c:%p, p:%p, g:%p\n",
  3998. + pidx, i, (void *)buf->cpu_addr,
  3999. + (void *)buf->phy_addr, (void *)buf->gfx_addr);
  4000. +
  4001. + ipts_set_output_buffer(ipts, pidx, i,
  4002. + buf->cpu_addr, buf->phy_addr);
  4003. + }
  4004. + }
  4005. +}
  4006. +
  4007. +static void unload_kernel(struct ipts_info *ipts,
  4008. + struct bin_kernel_info *kernel)
  4009. +{
  4010. + struct bin_alloc_info *alloc_info = kernel->alloc_info;
  4011. + struct bin_guc_wq_item *guc_wq_item = kernel->guc_wq_item;
  4012. +
  4013. + if (guc_wq_item)
  4014. + vfree(guc_wq_item);
  4015. +
  4016. + if (alloc_info) {
  4017. + unmap_buffers(ipts, alloc_info);
  4018. +
  4019. + vfree(alloc_info->buffs);
  4020. + vfree(alloc_info);
  4021. + }
  4022. +}
  4023. +
  4024. +static int setup_kernel(struct ipts_info *ipts,
  4025. + struct ipts_bin_fw_list *fw_list)
  4026. +{
  4027. + struct bin_kernel_list *kernel_list = NULL;
  4028. + struct bin_kernel_info *kernel = NULL;
  4029. + const struct firmware *fw = NULL;
  4030. + struct bin_workload *wl;
  4031. + struct ipts_bin_fw_info *fw_info;
  4032. + char *fw_name, *fw_data;
  4033. + struct bin_parse_info parse_info;
  4034. + int ret = 0, kidx = 0, num_of_kernels = 0;
  4035. + int vidx, total_workload = 0;
  4036. +
  4037. + num_of_kernels = fw_list->num_of_fws;
  4038. + kernel_list = vmalloc(sizeof(*kernel) *
  4039. + num_of_kernels + sizeof(*kernel_list));
  4040. +
  4041. + if (kernel_list == NULL)
  4042. + return -ENOMEM;
  4043. +
  4044. + memset(kernel_list, 0, sizeof(*kernel) *
  4045. + num_of_kernels + sizeof(*kernel_list));
  4046. +
  4047. + kernel_list->num_of_kernels = num_of_kernels;
  4048. + kernel = &kernel_list->kernels[0];
  4049. +
  4050. + fw_data = (char *)&fw_list->fw_info[0];
  4051. + for (kidx = 0; kidx < num_of_kernels; kidx++) {
  4052. + fw_info = (struct ipts_bin_fw_info *)fw_data;
  4053. + fw_name = &fw_info->fw_name[0];
  4054. + vidx = fw_info->vendor_output;
  4055. +
  4056. + ret = ipts_request_firmware(&fw, fw_name, &ipts->cldev->dev);
  4057. + if (ret) {
  4058. + ipts_err(ipts, "cannot read fw %s\n", fw_name);
  4059. + goto error_exit;
  4060. + }
  4061. +
  4062. + parse_info.data = (u8 *)fw->data;
  4063. + parse_info.size = fw->size;
  4064. + parse_info.parsed = 0;
  4065. + parse_info.fw_info = fw_info;
  4066. + parse_info.vendor_kernel = (kidx == 0) ? NULL : &kernel[0];
  4067. + parse_info.interested_vendor_output = vidx;
  4068. +
  4069. + ret = load_kernel(ipts, &parse_info, &kernel[kidx]);
  4070. + if (ret) {
  4071. + ipts_err(ipts, "do_setup_kernel error : %d\n", ret);
  4072. + release_firmware(fw);
  4073. + goto error_exit;
  4074. + }
  4075. +
  4076. + release_firmware(fw);
  4077. +
  4078. + total_workload += kernel[kidx].guc_wq_item->size;
  4079. +
  4080. + // advance to the next kernel
  4081. + fw_data += sizeof(struct ipts_bin_fw_info);
  4082. + fw_data += sizeof(struct ipts_bin_data_file_info) *
  4083. + fw_info->num_of_data_files;
  4084. + }
  4085. +
  4086. + ipts_set_wq_item_size(ipts, total_workload);
  4087. +
  4088. + ret = bin_setup_guc_workqueue(ipts, kernel_list);
  4089. + if (ret) {
  4090. + ipts_dbg(ipts, "error setup_guc_workqueue\n");
  4091. + goto error_exit;
  4092. + }
  4093. +
  4094. + ret = bin_setup_bufid_buffer(ipts, kernel_list);
  4095. + if (ret) {
  4096. + ipts_dbg(ipts, "error setup_lastbubmit_buffer\n");
  4097. + goto error_exit;
  4098. + }
  4099. +
  4100. + bin_setup_input_output(ipts, kernel_list);
  4101. +
  4102. + // workload is not needed during run-time so free them
  4103. + for (kidx = 0; kidx < num_of_kernels; kidx++) {
  4104. + wl = kernel[kidx].wl;
  4105. + vfree(wl);
  4106. + }
  4107. +
  4108. + ipts->kernel_handle = (u64)kernel_list;
  4109. +
  4110. + return 0;
  4111. +
  4112. +error_exit:
  4113. +
  4114. + for (kidx = 0; kidx < num_of_kernels; kidx++) {
  4115. + wl = kernel[kidx].wl;
  4116. + vfree(wl);
  4117. + unload_kernel(ipts, &kernel[kidx]);
  4118. + }
  4119. +
  4120. + vfree(kernel_list);
  4121. +
  4122. + return ret;
  4123. +}
  4124. +
  4125. +
  4126. +static void release_kernel(struct ipts_info *ipts)
  4127. +{
  4128. + struct bin_kernel_list *kernel_list;
  4129. + struct bin_kernel_info *kernel;
  4130. + int kidx, knum;
  4131. +
  4132. + kernel_list = (struct bin_kernel_list *)ipts->kernel_handle;
  4133. + knum = kernel_list->num_of_kernels;
  4134. + kernel = &kernel_list->kernels[0];
  4135. +
  4136. + for (kidx = 0; kidx < knum; kidx++) {
  4137. + unload_kernel(ipts, kernel);
  4138. + kernel++;
  4139. + }
  4140. +
  4141. + ipts_unmap_buffer(ipts, kernel_list->bufid_buf);
  4142. +
  4143. + vfree(kernel_list);
  4144. + ipts->kernel_handle = 0;
  4145. +}
  4146. +
  4147. +int ipts_init_kernels(struct ipts_info *ipts)
  4148. +{
  4149. + struct ipts_bin_fw_list *fw_list;
  4150. + int ret;
  4151. +
  4152. + ret = ipts_open_gpu(ipts);
  4153. + if (ret) {
  4154. + ipts_err(ipts, "open gpu error : %d\n", ret);
  4155. + return ret;
  4156. + }
  4157. +
  4158. + ret = ipts_request_firmware_config(ipts, &fw_list);
  4159. + if (ret) {
  4160. + ipts_err(ipts, "request firmware config error : %d\n", ret);
  4161. + goto close_gpu;
  4162. + }
  4163. +
  4164. + ret = setup_kernel(ipts, fw_list);
  4165. + if (ret) {
  4166. + ipts_err(ipts, "setup kernel error : %d\n", ret);
  4167. + goto close_gpu;
  4168. + }
  4169. +
  4170. + return ret;
  4171. +
  4172. +close_gpu:
  4173. + ipts_close_gpu(ipts);
  4174. +
  4175. + return ret;
  4176. +}
  4177. +
  4178. +void ipts_release_kernels(struct ipts_info *ipts)
  4179. +{
  4180. + release_kernel(ipts);
  4181. + ipts_close_gpu(ipts);
  4182. +}
  4183. diff --git a/drivers/misc/ipts/kernel.h b/drivers/misc/ipts/kernel.h
  4184. new file mode 100644
  4185. index 000000000000..7be45da01cfc
  4186. --- /dev/null
  4187. +++ b/drivers/misc/ipts/kernel.h
  4188. @@ -0,0 +1,17 @@
  4189. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  4190. +/*
  4191. + *
  4192. + * Intel Precise Touch & Stylus
  4193. + * Copyright (c) 2016 Intel Corporation
  4194. + *
  4195. + */
  4196. +
  4197. +#ifndef _IPTS_KERNEL_H_
  4198. +#define _IPTS_KERNEL_H_
  4199. +
  4200. +#include "ipts.h"
  4201. +
  4202. +int ipts_init_kernels(struct ipts_info *ipts);
  4203. +void ipts_release_kernels(struct ipts_info *ipts);
  4204. +
  4205. +#endif // _IPTS_KERNEL_H_
  4206. diff --git a/drivers/misc/ipts/mei-msgs.h b/drivers/misc/ipts/mei-msgs.h
  4207. new file mode 100644
  4208. index 000000000000..036b74f7234e
  4209. --- /dev/null
  4210. +++ b/drivers/misc/ipts/mei-msgs.h
  4211. @@ -0,0 +1,901 @@
  4212. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  4213. +/*
  4214. + *
  4215. + * Intel Precise Touch & Stylus
  4216. + * Copyright (c) 2013-2016 Intel Corporation
  4217. + *
  4218. + */
  4219. +
  4220. +#ifndef _IPTS_MEI_MSGS_H_
  4221. +#define _IPTS_MEI_MSGS_H_
  4222. +
  4223. +#include <linux/build_bug.h>
  4224. +
  4225. +#include "sensor-regs.h"
  4226. +
  4227. +#pragma pack(1)
  4228. +
  4229. +// Define static_assert macro (which will be available after 5.1
  4230. +// and not available on 4.19 yet) to check structure size and fail
  4231. +// compile for unexpected mismatch.
  4232. +// Taken from upstream commit 6bab69c65013bed5fce9f101a64a84d0385b3946.
  4233. +#define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr)
  4234. +#define __static_assert(expr, msg, ...) _Static_assert(expr, msg)
  4235. +
  4236. +// Initial protocol version
  4237. +#define TOUCH_HECI_CLIENT_PROTOCOL_VERSION 10
  4238. +
  4239. +// GUID that identifies the Touch HECI client.
  4240. +#define TOUCH_HECI_CLIENT_GUID \
  4241. + {0x3e8d0870, 0x271a, 0x4208, \
  4242. + {0x8e, 0xb5, 0x9a, 0xcb, 0x94, 0x02, 0xae, 0x04} }
  4243. +
  4244. +#define TOUCH_SENSOR_GET_DEVICE_INFO_CMD 0x00000001
  4245. +#define TOUCH_SENSOR_GET_DEVICE_INFO_RSP 0x80000001
  4246. +
  4247. +#define TOUCH_SENSOR_SET_MODE_CMD 0x00000002
  4248. +#define TOUCH_SENSOR_SET_MODE_RSP 0x80000002
  4249. +
  4250. +#define TOUCH_SENSOR_SET_MEM_WINDOW_CMD 0x00000003
  4251. +#define TOUCH_SENSOR_SET_MEM_WINDOW_RSP 0x80000003
  4252. +
  4253. +#define TOUCH_SENSOR_QUIESCE_IO_CMD 0x00000004
  4254. +#define TOUCH_SENSOR_QUIESCE_IO_RSP 0x80000004
  4255. +
  4256. +#define TOUCH_SENSOR_HID_READY_FOR_DATA_CMD 0x00000005
  4257. +#define TOUCH_SENSOR_HID_READY_FOR_DATA_RSP 0x80000005
  4258. +
  4259. +#define TOUCH_SENSOR_FEEDBACK_READY_CMD 0x00000006
  4260. +#define TOUCH_SENSOR_FEEDBACK_READY_RSP 0x80000006
  4261. +
  4262. +#define TOUCH_SENSOR_CLEAR_MEM_WINDOW_CMD 0x00000007
  4263. +#define TOUCH_SENSOR_CLEAR_MEM_WINDOW_RSP 0x80000007
  4264. +
  4265. +#define TOUCH_SENSOR_NOTIFY_DEV_READY_CMD 0x00000008
  4266. +#define TOUCH_SENSOR_NOTIFY_DEV_READY_RSP 0x80000008
  4267. +
  4268. +#define TOUCH_SENSOR_SET_POLICIES_CMD 0x00000009
  4269. +#define TOUCH_SENSOR_SET_POLICIES_RSP 0x80000009
  4270. +
  4271. +#define TOUCH_SENSOR_GET_POLICIES_CMD 0x0000000A
  4272. +#define TOUCH_SENSOR_GET_POLICIES_RSP 0x8000000A
  4273. +
  4274. +#define TOUCH_SENSOR_RESET_CMD 0x0000000B
  4275. +#define TOUCH_SENSOR_RESET_RSP 0x8000000B
  4276. +
  4277. +#define TOUCH_SENSOR_READ_ALL_REGS_CMD 0x0000000C
  4278. +#define TOUCH_SENSOR_READ_ALL_REGS_RSP 0x8000000C
  4279. +
  4280. +// ME sends this message to indicate previous command was unrecognized
  4281. +#define TOUCH_SENSOR_CMD_ERROR_RSP 0x8FFFFFFF
  4282. +
  4283. +#define TOUCH_SENSOR_MAX_DATA_BUFFERS 16
  4284. +#define TOUCH_HID_2_ME_BUFFER_ID TOUCH_SENSOR_MAX_DATA_BUFFERS
  4285. +#define TOUCH_HID_2_ME_BUFFER_SIZE_MAX 1024
  4286. +#define TOUCH_INVALID_BUFFER_ID 0xFF
  4287. +
  4288. +#define TOUCH_DEFAULT_DOZE_TIMER_SECONDS 30
  4289. +
  4290. +#define TOUCH_MSG_SIZE_MAX_BYTES \
  4291. + (MAX(sizeof(struct touch_sensor_msg_m2h), \
  4292. + sizeof(struct touch_sensor_msg_h2m)))
  4293. +
  4294. +// indicates GuC got reset and ME must re-read GuC data such as
  4295. +// TailOffset and Doorbell Cookie values
  4296. +#define TOUCH_SENSOR_QUIESCE_FLAG_GUC_RESET BIT(0)
  4297. +
  4298. +/*
  4299. + * Debug Policy bits used by TOUCH_POLICY_DATA.DebugOverride
  4300. + */
  4301. +
  4302. +// Disable sensor startup timer
  4303. +#define TOUCH_DBG_POLICY_OVERRIDE_STARTUP_TIMER_DIS BIT(0)
  4304. +
  4305. +// Disable Sync Byte check
  4306. +#define TOUCH_DBG_POLICY_OVERRIDE_SYNC_BYTE_DIS BIT(1)
  4307. +
  4308. +// Disable error resets
  4309. +#define TOUCH_DBG_POLICY_OVERRIDE_ERR_RESET_DIS BIT(2)
  4310. +
  4311. +/*
  4312. + * Touch Sensor Status Codes
  4313. + */
  4314. +enum touch_status {
  4315. + // Requested operation was successful
  4316. + TOUCH_STATUS_SUCCESS = 0,
  4317. +
  4318. + // Invalid parameter(s) sent
  4319. + TOUCH_STATUS_INVALID_PARAMS,
  4320. +
  4321. + // Unable to validate address range
  4322. + TOUCH_STATUS_ACCESS_DENIED,
  4323. +
  4324. + // HECI message incorrect size for specified command
  4325. + TOUCH_STATUS_CMD_SIZE_ERROR,
  4326. +
  4327. + // Memory window not set or device is not armed for operation
  4328. + TOUCH_STATUS_NOT_READY,
  4329. +
  4330. + // There is already an outstanding message of the same type, must
  4331. + // wait for response before sending another request of that type
  4332. + TOUCH_STATUS_REQUEST_OUTSTANDING,
  4333. +
  4334. + // Sensor could not be found. Either no sensor is connected,
  4335. + // the sensor has not yet initialized, or the system is
  4336. + // improperly configured.
  4337. + TOUCH_STATUS_NO_SENSOR_FOUND,
  4338. +
  4339. + // Not enough memory/storage for requested operation
  4340. + TOUCH_STATUS_OUT_OF_MEMORY,
  4341. +
  4342. + // Unexpected error occurred
  4343. + TOUCH_STATUS_INTERNAL_ERROR,
  4344. +
  4345. + // Used in TOUCH_SENSOR_HID_READY_FOR_DATA_RSP to indicate sensor
  4346. + // has been disabled or reset and must be reinitialized.
  4347. + TOUCH_STATUS_SENSOR_DISABLED,
  4348. +
  4349. + // Used to indicate compatibility revision check between sensor and ME
  4350. + // failed, or protocol ver between ME/HID/Kernels failed.
  4351. + TOUCH_STATUS_COMPAT_CHECK_FAIL,
  4352. +
  4353. + // Indicates sensor went through a reset initiated by ME
  4354. + TOUCH_STATUS_SENSOR_EXPECTED_RESET,
  4355. +
  4356. + // Indicates sensor went through an unexpected reset
  4357. + TOUCH_STATUS_SENSOR_UNEXPECTED_RESET,
  4358. +
  4359. + // Requested sensor reset failed to complete
  4360. + TOUCH_STATUS_RESET_FAILED,
  4361. +
  4362. + // Operation timed out
  4363. + TOUCH_STATUS_TIMEOUT,
  4364. +
  4365. + // Test mode pattern did not match expected values
  4366. + TOUCH_STATUS_TEST_MODE_FAIL,
  4367. +
  4368. + // Indicates sensor reported fatal error during reset sequence.
  4369. + // Further progress is not possible.
  4370. + TOUCH_STATUS_SENSOR_FAIL_FATAL,
  4371. +
  4372. + // Indicates sensor reported non-fatal error during reset sequence.
  4373. + // HID/BIOS logs error and attempts to continue.
  4374. + TOUCH_STATUS_SENSOR_FAIL_NONFATAL,
  4375. +
  4376. + // Indicates sensor reported invalid capabilities, such as not
  4377. + // supporting required minimum frequency or I/O mode.
  4378. + TOUCH_STATUS_INVALID_DEVICE_CAPS,
  4379. +
  4380. + // Indicates that command cannot be complete until ongoing Quiesce I/O
  4381. + // flow has completed.
  4382. + TOUCH_STATUS_QUIESCE_IO_IN_PROGRESS,
  4383. +
  4384. + // Invalid value, never returned
  4385. + TOUCH_STATUS_MAX
  4386. +};
  4387. +static_assert(sizeof(enum touch_status) == 4);
  4388. +
  4389. +/*
  4390. + * Defines for message structures used for Host to ME communication
  4391. + */
  4392. +enum touch_sensor_mode {
  4393. + // Set mode to HID mode
  4394. + TOUCH_SENSOR_MODE_HID = 0,
  4395. +
  4396. + // Set mode to Raw Data mode
  4397. + TOUCH_SENSOR_MODE_RAW_DATA,
  4398. +
  4399. + // Used like TOUCH_SENSOR_MODE_HID but data coming from sensor is
  4400. + // not necessarily a HID packet.
  4401. + TOUCH_SENSOR_MODE_SENSOR_DEBUG = 4,
  4402. +
  4403. + // Invalid value
  4404. + TOUCH_SENSOR_MODE_MAX
  4405. +};
  4406. +static_assert(sizeof(enum touch_sensor_mode) == 4);
  4407. +
  4408. +struct touch_sensor_set_mode_cmd_data {
  4409. + // Indicate desired sensor mode
  4410. + enum touch_sensor_mode sensor_mode;
  4411. +
  4412. + // For future expansion
  4413. + u32 Reserved[3];
  4414. +};
  4415. +static_assert(sizeof(struct touch_sensor_set_mode_cmd_data) == 16);
  4416. +
  4417. +struct touch_sensor_set_mem_window_cmd_data {
  4418. + // Lower 32 bits of Touch Data Buffer physical address. Size of each
  4419. + // buffer should be TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.FrameSize
  4420. + u32 touch_data_buffer_addr_lower[TOUCH_SENSOR_MAX_DATA_BUFFERS];
  4421. +
  4422. + // Upper 32 bits of Touch Data Buffer physical address. Size of each
  4423. + // buffer should be TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.FrameSize
  4424. + u32 touch_data_buffer_addr_upper[TOUCH_SENSOR_MAX_DATA_BUFFERS];
  4425. +
  4426. + // Lower 32 bits of Tail Offset physical address
  4427. + u32 tail_offset_addr_lower;
  4428. +
  4429. + // Upper 32 bits of Tail Offset physical address, always 32 bit,
  4430. + // increment by WorkQueueItemSize
  4431. + u32 tail_offset_addr_upper;
  4432. +
  4433. + // Lower 32 bits of Doorbell register physical address
  4434. + u32 doorbell_cookie_addr_lower;
  4435. +
  4436. + // Upper 32 bits of Doorbell register physical address, always 32 bit,
  4437. + // increment as integer, rollover to 1
  4438. + u32 doorbell_cookie_addr_upper;
  4439. +
  4440. + // Lower 32 bits of Feedback Buffer physical address. Size of each
  4441. + // buffer should be TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.FeedbackSize
  4442. + u32 feedback_buffer_addr_lower[TOUCH_SENSOR_MAX_DATA_BUFFERS];
  4443. +
  4444. + // Upper 32 bits of Feedback Buffer physical address. Size of each
  4445. + // buffer should be TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.FeedbackSize
  4446. + u32 feedback_buffer_addr_upper[TOUCH_SENSOR_MAX_DATA_BUFFERS];
  4447. +
  4448. + // Lower 32 bits of dedicated HID to ME communication buffer.
  4449. + // Size is Hid2MeBufferSize.
  4450. + u32 hid2me_buffer_addr_lower;
  4451. +
  4452. + // Upper 32 bits of dedicated HID to ME communication buffer.
  4453. + // Size is Hid2MeBufferSize.
  4454. + u32 hid2me_buffer_addr_upper;
  4455. +
  4456. + // Size in bytes of Hid2MeBuffer, can be no bigger than
  4457. + // TOUCH_HID_2_ME_BUFFER_SIZE_MAX
  4458. + u32 hid2me_buffer_size;
  4459. +
  4460. + // For future expansion
  4461. + u8 reserved1;
  4462. +
  4463. + // Size in bytes of the GuC Work Queue Item pointed to by TailOffset
  4464. + u8 work_queue_item_size;
  4465. +
  4466. + // Size in bytes of the entire GuC Work Queue
  4467. + u16 work_queue_size;
  4468. +
  4469. + // For future expansion
  4470. + u32 reserved[8];
  4471. +};
  4472. +static_assert(sizeof(struct touch_sensor_set_mem_window_cmd_data) == 320);
  4473. +
  4474. +struct touch_sensor_quiesce_io_cmd_data {
  4475. + // Optionally set TOUCH_SENSOR_QUIESCE_FLAG_GUC_RESET
  4476. + u32 quiesce_flags;
  4477. + u32 reserved[2];
  4478. +};
  4479. +static_assert(sizeof(struct touch_sensor_quiesce_io_cmd_data) == 12);
  4480. +
  4481. +struct touch_sensor_feedback_ready_cmd_data {
  4482. + // Index value from 0 to TOUCH_HID_2_ME_BUFFER_ID used to indicate
  4483. + // which Feedback Buffer to use. Using special value
  4484. + // TOUCH_HID_2_ME_BUFFER_ID is an indication to ME to
  4485. + // get feedback data from the Hid2Me buffer instead of one
  4486. + // of the standard Feedback buffers.
  4487. + u8 feedback_index;
  4488. +
  4489. + // For future expansion
  4490. + u8 reserved1[3];
  4491. +
  4492. + // Transaction ID that was originally passed to host in
  4493. + // TOUCH_HID_PRIVATE_DATA. Used to track round trip of a given
  4494. + // transaction for performance measurements.
  4495. + u32 transaction_id;
  4496. +
  4497. + // For future expansion
  4498. + u32 reserved2[2];
  4499. +};
  4500. +static_assert(sizeof(struct touch_sensor_feedback_ready_cmd_data) == 16);
  4501. +
  4502. +enum touch_freq_override {
  4503. + // Do not apply any override
  4504. + TOUCH_FREQ_OVERRIDE_NONE,
  4505. +
  4506. + // Force frequency to 10MHz (not currently supported)
  4507. + TOUCH_FREQ_OVERRIDE_10MHZ,
  4508. +
  4509. + // Force frequency to 17MHz
  4510. + TOUCH_FREQ_OVERRIDE_17MHZ,
  4511. +
  4512. + // Force frequency to 30MHz
  4513. + TOUCH_FREQ_OVERRIDE_30MHZ,
  4514. +
  4515. + // Force frequency to 50MHz (not currently supported)
  4516. + TOUCH_FREQ_OVERRIDE_50MHZ,
  4517. +
  4518. + // Invalid value
  4519. + TOUCH_FREQ_OVERRIDE_MAX
  4520. +};
  4521. +static_assert(sizeof(enum touch_freq_override) == 4);
  4522. +
  4523. +enum touch_spi_io_mode_override {
  4524. + // Do not apply any override
  4525. + TOUCH_SPI_IO_MODE_OVERRIDE_NONE,
  4526. +
  4527. + // Force Single I/O
  4528. + TOUCH_SPI_IO_MODE_OVERRIDE_SINGLE,
  4529. +
  4530. + // Force Dual I/O
  4531. + TOUCH_SPI_IO_MODE_OVERRIDE_DUAL,
  4532. +
  4533. + // Force Quad I/O
  4534. + TOUCH_SPI_IO_MODE_OVERRIDE_QUAD,
  4535. +
  4536. + // Invalid value
  4537. + TOUCH_SPI_IO_MODE_OVERRIDE_MAX
  4538. +};
  4539. +static_assert(sizeof(enum touch_spi_io_mode_override) == 4);
  4540. +
  4541. +struct touch_policy_data {
  4542. + // For future expansion.
  4543. + u32 reserved0;
  4544. +
  4545. + // Value in seconds, after which ME will put the sensor into Doze power
  4546. + // state if no activity occurs. Set to 0 to disable Doze mode
  4547. + // (not recommended). Value will be set to
  4548. + // TOUCH_DEFAULT_DOZE_TIMER_SECONDS by default
  4549. + u32 doze_timer:16;
  4550. +
  4551. + // Override frequency requested by sensor
  4552. + enum touch_freq_override freq_override:3;
  4553. +
  4554. + // Override IO mode requested by sensor
  4555. + enum touch_spi_io_mode_override spi_io_override :3;
  4556. +
  4557. + // For future expansion
  4558. + u32 reserved1:10;
  4559. +
  4560. + // For future expansion
  4561. + u32 reserved2;
  4562. +
  4563. + // Normally all bits will be zero. Bits will be defined as needed
  4564. + // for enabling special debug features
  4565. + u32 debug_override;
  4566. +};
  4567. +static_assert(sizeof(struct touch_policy_data) == 16);
  4568. +
  4569. +struct touch_sensor_set_policies_cmd_data {
  4570. + // Contains the desired policy to be set
  4571. + struct touch_policy_data policy_data;
  4572. +};
  4573. +static_assert(sizeof(struct touch_sensor_set_policies_cmd_data) == 16);
  4574. +
  4575. +enum touch_sensor_reset_type {
  4576. + // Hardware Reset using dedicated GPIO pin
  4577. + TOUCH_SENSOR_RESET_TYPE_HARD,
  4578. +
  4579. + // Software Reset using command written over SPI interface
  4580. + TOUCH_SENSOR_RESET_TYPE_SOFT,
  4581. +
  4582. + // Invalid value
  4583. + TOUCH_SENSOR_RESET_TYPE_MAX
  4584. +};
  4585. +static_assert(sizeof(enum touch_sensor_reset_type) == 4);
  4586. +
  4587. +struct touch_sensor_reset_cmd_data {
  4588. + // Indicate desired reset type
  4589. + enum touch_sensor_reset_type reset_type;
  4590. +
  4591. + // For future expansion
  4592. + u32 reserved;
  4593. +};
  4594. +static_assert(sizeof(struct touch_sensor_reset_cmd_data) == 8);
  4595. +
  4596. +/*
  4597. + * Host to ME message
  4598. + */
  4599. +union touch_sensor_data_h2m {
  4600. + struct touch_sensor_set_mode_cmd_data set_mode_cmd_data;
  4601. + struct touch_sensor_set_mem_window_cmd_data set_window_cmd_data;
  4602. + struct touch_sensor_quiesce_io_cmd_data quiesce_io_cmd_data;
  4603. + struct touch_sensor_feedback_ready_cmd_data feedback_ready_cmd_data;
  4604. + struct touch_sensor_set_policies_cmd_data set_policies_cmd_data;
  4605. + struct touch_sensor_reset_cmd_data reset_cmd_data;
  4606. +};
  4607. +struct touch_sensor_msg_h2m {
  4608. + u32 command_code;
  4609. + union touch_sensor_data_h2m h2m_data;
  4610. +};
  4611. +static_assert(sizeof(struct touch_sensor_msg_h2m) == 324);
  4612. +
  4613. +/*
  4614. + * Message structures used for ME to Host communication
  4615. + */
  4616. +
  4617. +// I/O mode values used by TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.
  4618. +enum touch_spi_io_mode {
  4619. + // Sensor set for Single I/O SPI
  4620. + TOUCH_SPI_IO_MODE_SINGLE = 0,
  4621. +
  4622. + // Sensor set for Dual I/O SPI
  4623. + TOUCH_SPI_IO_MODE_DUAL,
  4624. +
  4625. + // Sensor set for Quad I/O SPI
  4626. + TOUCH_SPI_IO_MODE_QUAD,
  4627. +
  4628. + // Invalid value
  4629. + TOUCH_SPI_IO_MODE_MAX
  4630. +};
  4631. +static_assert(sizeof(enum touch_spi_io_mode) == 4);
  4632. +
  4633. +/*
  4634. + * TOUCH_SENSOR_GET_DEVICE_INFO_RSP code is sent in response to
  4635. + * TOUCH_SENSOR_GET_DEVICE_INFO_CMD. This code will be followed by
  4636. + * TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.
  4637. + *
  4638. + * Possible Status values:
  4639. + * TOUCH_STATUS_SUCCESS:
  4640. + * Command was processed successfully and sensor
  4641. + * details are reported.
  4642. + *
  4643. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  4644. + * Command sent did not match expected size. Other fields will
  4645. + * not contain valid data.
  4646. + *
  4647. + * TOUCH_STATUS_NO_SENSOR_FOUND:
  4648. + * Sensor has not yet been detected. Other fields will
  4649. + * not contain valid data.
  4650. + *
  4651. + * TOUCH_STATUS_INVALID_DEVICE_CAPS:
  4652. + * Indicates sensor does not support minimum required Frequency
  4653. + * or I/O Mode. ME firmware will choose best possible option for
  4654. + * the errant field. Caller should attempt to continue.
  4655. + *
  4656. + * TOUCH_STATUS_COMPAT_CHECK_FAIL:
  4657. + * Indicates TouchIC/ME compatibility mismatch. Caller should
  4658. + * attempt to continue.
  4659. + */
  4660. +struct touch_sensor_get_device_info_rsp_data {
  4661. + // Touch Sensor vendor ID
  4662. + u16 vendor_id;
  4663. +
  4664. + // Touch Sensor device ID
  4665. + u16 device_id;
  4666. +
  4667. + // Touch Sensor Hardware Revision
  4668. + u32 hw_rev;
  4669. +
  4670. + // Touch Sensor Firmware Revision
  4671. + u32 fw_rev;
  4672. +
  4673. + // Max size of one frame returned by Touch IC in bytes. This data
  4674. + // will be TOUCH_RAW_DATA_HDR followed by a payload. The payload can be
  4675. + // raw data or a HID structure depending on mode.
  4676. + u32 frame_size;
  4677. +
  4678. + // Max size of one Feedback structure in bytes
  4679. + u32 feedback_size;
  4680. +
  4681. + // Current operating mode of the sensor
  4682. + enum touch_sensor_mode sensor_mode;
  4683. +
  4684. + // Maximum number of simultaneous touch points that
  4685. + // can be reported by sensor
  4686. + u32 max_touch_points:8;
  4687. +
  4688. + // SPI bus Frequency supported by sensor and ME firmware
  4689. + enum touch_freq spi_frequency:8;
  4690. +
  4691. + // SPI bus I/O Mode supported by sensor and ME firmware
  4692. + enum touch_spi_io_mode spi_io_mode:8;
  4693. +
  4694. + // For future expansion
  4695. + u32 reserved0:8;
  4696. +
  4697. + // Minor version number of EDS spec supported by
  4698. + // sensor (from Compat Rev ID Reg)
  4699. + u8 sensor_minor_eds_rev;
  4700. +
  4701. + // Major version number of EDS spec supported by
  4702. + // sensor (from Compat Rev ID Reg)
  4703. + u8 sensor_major_eds_rev;
  4704. +
  4705. + // Minor version number of EDS spec supported by ME
  4706. + u8 me_minor_eds_rev;
  4707. +
  4708. + // Major version number of EDS spec supported by ME
  4709. + u8 me_major_eds_rev;
  4710. +
  4711. + // EDS Interface Revision Number supported by
  4712. + // sensor (from Compat Rev ID Reg)
  4713. + u8 sensor_eds_intf_rev;
  4714. +
  4715. + // EDS Interface Revision Number supported by ME
  4716. + u8 me_eds_intf_rev;
  4717. +
  4718. + // EU Kernel Compatibility Version (from Compat Rev ID Reg)
  4719. + u8 kernel_compat_ver;
  4720. +
  4721. + // For future expansion
  4722. + u8 reserved1;
  4723. +
  4724. + // For future expansion
  4725. + u32 reserved2[2];
  4726. +};
  4727. +static_assert(sizeof(struct touch_sensor_get_device_info_rsp_data) == 44);
  4728. +
  4729. +/*
  4730. + * TOUCH_SENSOR_SET_MODE_RSP code is sent in response to
  4731. + * TOUCH_SENSOR_SET_MODE_CMD. This code will be followed by
  4732. + * TOUCH_SENSOR_SET_MODE_RSP_DATA.
  4733. + *
  4734. + * Possible Status values:
  4735. + * TOUCH_STATUS_SUCCESS:
  4736. + * Command was processed successfully and mode was set.
  4737. + *
  4738. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  4739. + * Command sent did not match expected size. Other fields will
  4740. + * not contain valid data.
  4741. + *
  4742. + * TOUCH_STATUS_INVALID_PARAMS:
  4743. + * Input parameters are out of range.
  4744. + */
  4745. +struct touch_sensor_set_mode_rsp_data {
  4746. + // For future expansion
  4747. + u32 reserved[3];
  4748. +};
  4749. +static_assert(sizeof(struct touch_sensor_set_mode_rsp_data) == 12);
  4750. +
  4751. +/*
  4752. + * TOUCH_SENSOR_SET_MEM_WINDOW_RSP code is sent in response to
  4753. + * TOUCH_SENSOR_SET_MEM_WINDOW_CMD. This code will be followed
  4754. + * by TOUCH_SENSOR_SET_MEM_WINDOW_RSP_DATA.
  4755. + *
  4756. + * Possible Status values:
  4757. + * TOUCH_STATUS_SUCCESS:
  4758. + * Command was processed successfully and memory window was set.
  4759. + *
  4760. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  4761. + * Command sent did not match expected size. Other fields will
  4762. + * not contain valid data.
  4763. + *
  4764. + * TOUCH_STATUS_INVALID_PARAMS:
  4765. + * Input parameters are out of range.
  4766. + *
  4767. + * TOUCH_STATUS_ACCESS_DENIED:
  4768. + * Unable to map host address ranges for DMA.
  4769. + *
  4770. + * TOUCH_STATUS_OUT_OF_MEMORY:
  4771. + * Unable to allocate enough space for needed buffers.
  4772. + */
  4773. +struct touch_sensor_set_mem_window_rsp_data {
  4774. + // For future expansion
  4775. + u32 reserved[3];
  4776. +};
  4777. +static_assert(sizeof(struct touch_sensor_set_mem_window_rsp_data) == 12);
  4778. +
  4779. +/*
  4780. + * TOUCH_SENSOR_QUIESCE_IO_RSP code is sent in response to
  4781. + * TOUCH_SENSOR_QUIESCE_IO_CMD. This code will be followed
  4782. + * by TOUCH_SENSOR_QUIESCE_IO_RSP_DATA.
  4783. + *
  4784. + * Possible Status values:
  4785. + * TOUCH_STATUS_SUCCESS:
  4786. + * Command was processed successfully and touch flow has stopped.
  4787. + *
  4788. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  4789. + * Command sent did not match expected size. Other fields will
  4790. + * not contain valid data.
  4791. + *
  4792. + * TOUCH_STATUS_QUIESCE_IO_IN_PROGRESS:
  4793. + * Indicates that Quiesce I/O is already in progress and this
  4794. + * command cannot be accepted at this time.
  4795. + *
  4796. + * TOUCH_STATIS_TIMEOUT:
  4797. + * Indicates ME timed out waiting for Quiesce I/O flow to complete.
  4798. + */
  4799. +struct touch_sensor_quiesce_io_rsp_data {
  4800. + // For future expansion
  4801. + u32 reserved[3];
  4802. +};
  4803. +static_assert(sizeof(struct touch_sensor_quiesce_io_rsp_data) == 12);
  4804. +
  4805. +// Reset Reason values used in TOUCH_SENSOR_HID_READY_FOR_DATA_RSP_DATA
  4806. +enum touch_reset_reason {
  4807. + // Reason for sensor reset is not known
  4808. + TOUCH_RESET_REASON_UNKNOWN = 0,
  4809. +
  4810. + // Reset was requested as part of TOUCH_SENSOR_FEEDBACK_READY_CMD
  4811. + TOUCH_RESET_REASON_FEEDBACK_REQUEST,
  4812. +
  4813. + // Reset was requested via TOUCH_SENSOR_RESET_CMD
  4814. + TOUCH_RESET_REASON_HECI_REQUEST,
  4815. +
  4816. + TOUCH_RESET_REASON_MAX
  4817. +};
  4818. +static_assert(sizeof(enum touch_reset_reason) == 4);
  4819. +
  4820. +/*
  4821. + * TOUCH_SENSOR_HID_READY_FOR_DATA_RSP code is sent in response to
  4822. + * TOUCH_SENSOR_HID_READY_FOR_DATA_CMD. This code will be followed
  4823. + * by TOUCH_SENSOR_HID_READY_FOR_DATA_RSP_DATA.
  4824. + *
  4825. + * Possible Status values:
  4826. + * TOUCH_STATUS_SUCCESS:
  4827. + * Command was processed successfully and HID data was sent by DMA.
  4828. + * This will only be sent in HID mode.
  4829. + *
  4830. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  4831. + * Command sent did not match expected size. Other fields will
  4832. + * not contain valid data.
  4833. + *
  4834. + * TOUCH_STATUS_REQUEST_OUTSTANDING:
  4835. + * Previous request is still outstanding, ME FW cannot handle
  4836. + * another request for the same command.
  4837. + *
  4838. + * TOUCH_STATUS_NOT_READY:
  4839. + * Indicates memory window has not yet been set by BIOS/HID.
  4840. + *
  4841. + * TOUCH_STATUS_SENSOR_DISABLED:
  4842. + * Indicates that ME to HID communication has been stopped either
  4843. + * by TOUCH_SENSOR_QUIESCE_IO_CMD or
  4844. + * TOUCH_SENSOR_CLEAR_MEM_WINDOW_CMD.
  4845. + *
  4846. + * TOUCH_STATUS_SENSOR_UNEXPECTED_RESET:
  4847. + * Sensor signaled a Reset Interrupt. ME did not expect this and
  4848. + * has no info about why this occurred.
  4849. + *
  4850. + * TOUCH_STATUS_SENSOR_EXPECTED_RESET:
  4851. + * Sensor signaled a Reset Interrupt. ME either directly requested
  4852. + * this reset, or it was expected as part of a defined flow
  4853. + * in the EDS.
  4854. + *
  4855. + * TOUCH_STATUS_QUIESCE_IO_IN_PROGRESS:
  4856. + * Indicates that Quiesce I/O is already in progress and this
  4857. + * command cannot be accepted at this time.
  4858. + *
  4859. + * TOUCH_STATUS_TIMEOUT:
  4860. + * Sensor did not generate a reset interrupt in the time allotted.
  4861. + * Could indicate sensor is not connected or malfunctioning.
  4862. + */
  4863. +struct touch_sensor_hid_ready_for_data_rsp_data {
  4864. + // Size of the data the ME DMA'd into a RawDataBuffer.
  4865. + // Valid only when Status == TOUCH_STATUS_SUCCESS
  4866. + u32 data_size;
  4867. +
  4868. + // Index to indicate which RawDataBuffer was used.
  4869. + // Valid only when Status == TOUCH_STATUS_SUCCESS
  4870. + u8 touch_data_buffer_index;
  4871. +
  4872. + // If Status is TOUCH_STATUS_SENSOR_EXPECTED_RESET, ME will provide
  4873. + // the cause. See TOUCH_RESET_REASON.
  4874. + u8 reset_reason;
  4875. +
  4876. + // For future expansion
  4877. + u8 reserved1[2];
  4878. + u32 reserved2[5];
  4879. +};
  4880. +static_assert(sizeof(struct touch_sensor_hid_ready_for_data_rsp_data) == 28);
  4881. +
  4882. +/*
  4883. + * TOUCH_SENSOR_FEEDBACK_READY_RSP code is sent in response to
  4884. + * TOUCH_SENSOR_FEEDBACK_READY_CMD. This code will be followed
  4885. + * by TOUCH_SENSOR_FEEDBACK_READY_RSP_DATA.
  4886. + *
  4887. + * Possible Status values:
  4888. + * TOUCH_STATUS_SUCCESS:
  4889. + * Command was processed successfully and any feedback or
  4890. + * commands were sent to sensor.
  4891. + *
  4892. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  4893. + * Command sent did not match expected size. Other fields will
  4894. + * not contain valid data.
  4895. + *
  4896. + * TOUCH_STATUS_INVALID_PARAMS:
  4897. + * Input parameters are out of range.
  4898. + *
  4899. + * TOUCH_STATUS_COMPAT_CHECK_FAIL:
  4900. + * Indicates ProtocolVer does not match ME supported
  4901. + * version. (non-fatal error)
  4902. + *
  4903. + * TOUCH_STATUS_INTERNAL_ERROR:
  4904. + * Unexpected error occurred. This should not normally be seen.
  4905. + *
  4906. + * TOUCH_STATUS_OUT_OF_MEMORY:
  4907. + * Insufficient space to store Calibration Data
  4908. + */
  4909. +struct touch_sensor_feedback_ready_rsp_data {
  4910. + // Index value from 0 to TOUCH_SENSOR_MAX_DATA_BUFFERS used
  4911. + // to indicate which Feedback Buffer to use
  4912. + u8 feedback_index;
  4913. +
  4914. + // For future expansion
  4915. + u8 reserved1[3];
  4916. + u32 reserved2[6];
  4917. +};
  4918. +static_assert(sizeof(struct touch_sensor_feedback_ready_rsp_data) == 28);
  4919. +
  4920. +/*
  4921. + * TOUCH_SENSOR_CLEAR_MEM_WINDOW_RSP code is sent in response to
  4922. + * TOUCH_SENSOR_CLEAR_MEM_WINDOW_CMD. This code will be followed
  4923. + * by TOUCH_SENSOR_CLEAR_MEM_WINDOW_RSP_DATA.
  4924. + *
  4925. + * Possible Status values:
  4926. + * TOUCH_STATUS_SUCCESS:
  4927. + * Command was processed successfully and memory window was set.
  4928. + *
  4929. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  4930. + * Command sent did not match expected size. Other fields will
  4931. + * not contain valid data.
  4932. + *
  4933. + * TOUCH_STATUS_INVALID_PARAMS:
  4934. + * Input parameters are out of range.
  4935. + *
  4936. + * TOUCH_STATUS_QUIESCE_IO_IN_PROGRESS:
  4937. + * Indicates that Quiesce I/O is already in progress and this
  4938. + * command cannot be accepted at this time.
  4939. + */
  4940. +struct touch_sensor_clear_mem_window_rsp_data {
  4941. + // For future expansion
  4942. + u32 reserved[3];
  4943. +};
  4944. +static_assert(sizeof(struct touch_sensor_clear_mem_window_rsp_data) == 12);
  4945. +
  4946. +/*
  4947. + * TOUCH_SENSOR_NOTIFY_DEV_READY_RSP code is sent in response to
  4948. + * TOUCH_SENSOR_NOTIFY_DEV_READY_CMD. This code will be followed
  4949. + * by TOUCH_SENSOR_NOTIFY_DEV_READY_RSP_DATA.
  4950. + *
  4951. + * Possible Status values:
  4952. + * TOUCH_STATUS_SUCCESS:
  4953. + * Command was processed successfully and sensor has
  4954. + * been detected by ME FW.
  4955. + *
  4956. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  4957. + * Command sent did not match expected size.
  4958. + *
  4959. + * TOUCH_STATUS_REQUEST_OUTSTANDING:
  4960. + * Previous request is still outstanding, ME FW cannot handle
  4961. + * another request for the same command.
  4962. + *
  4963. + * TOUCH_STATUS_TIMEOUT:
  4964. + * Sensor did not generate a reset interrupt in the time allotted.
  4965. + * Could indicate sensor is not connected or malfunctioning.
  4966. + *
  4967. + * TOUCH_STATUS_SENSOR_FAIL_FATAL:
  4968. + * Sensor indicated a fatal error, further operation is not
  4969. + * possible. Error details can be found in ErrReg.
  4970. + *
  4971. + * TOUCH_STATUS_SENSOR_FAIL_NONFATAL:
  4972. + * Sensor indicated a non-fatal error. Error should be logged by
  4973. + * caller and init flow can continue. Error details can be found
  4974. + * in ErrReg.
  4975. + */
  4976. +struct touch_sensor_notify_dev_ready_rsp_data {
  4977. + // Value of sensor Error Register, field is only valid for
  4978. + // Status == TOUCH_STATUS_SENSOR_FAIL_FATAL or
  4979. + // TOUCH_STATUS_SENSOR_FAIL_NONFATAL
  4980. + union touch_err_reg err_reg;
  4981. +
  4982. + // For future expansion
  4983. + u32 reserved[2];
  4984. +};
  4985. +static_assert(sizeof(struct touch_sensor_notify_dev_ready_rsp_data) == 12);
  4986. +
  4987. +/*
  4988. + * TOUCH_SENSOR_SET_POLICIES_RSP code is sent in response to
  4989. + * TOUCH_SENSOR_SET_POLICIES_CMD. This code will be followed
  4990. + * by TOUCH_SENSOR_SET_POLICIES_RSP_DATA.
  4991. + *
  4992. + * Possible Status values:
  4993. + * TOUCH_STATUS_SUCCESS:
  4994. + * Command was processed successfully and new policies were set.
  4995. + *
  4996. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  4997. + * Command sent did not match expected size. Other fields will
  4998. + * not contain valid data.
  4999. + *
  5000. + * TOUCH_STATUS_INVALID_PARAMS:
  5001. + * Input parameters are out of range.
  5002. + */
  5003. +struct touch_sensor_set_policies_rsp_data {
  5004. + // For future expansion
  5005. + u32 reserved[3];
  5006. +};
  5007. +static_assert(sizeof(struct touch_sensor_set_policies_rsp_data) == 12);
  5008. +
  5009. +/*
  5010. + * TOUCH_SENSOR_GET_POLICIES_RSP code is sent in response to
  5011. + * TOUCH_SENSOR_GET_POLICIES_CMD. This code will be followed
  5012. + * by TOUCH_SENSOR_GET_POLICIES_RSP_DATA.
  5013. + *
  5014. + * Possible Status values:
  5015. + * TOUCH_STATUS_SUCCESS:
  5016. + * Command was processed successfully and new policies were set.
  5017. + *
  5018. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  5019. + * Command sent did not match expected size. Other fields will
  5020. + * not contain valid data.
  5021. + */
  5022. +struct touch_sensor_get_policies_rsp_data {
  5023. + // Contains the current policy
  5024. + struct touch_policy_data policy_data;
  5025. +};
  5026. +static_assert(sizeof(struct touch_sensor_get_policies_rsp_data) == 16);
  5027. +
  5028. +
  5029. +/*
  5030. + * TOUCH_SENSOR_RESET_RSP code is sent in response to
  5031. + * TOUCH_SENSOR_RESET_CMD. This code will be followed
  5032. + * by TOUCH_SENSOR_RESET_RSP_DATA.
  5033. + *
  5034. + * Possible Status values:
  5035. + * TOUCH_STATUS_SUCCESS:
  5036. + * Command was processed successfully and
  5037. + * sensor reset was completed.
  5038. + *
  5039. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  5040. + * Command sent did not match expected size. Other fields will
  5041. + * not contain valid data.
  5042. + *
  5043. + * TOUCH_STATUS_INVALID_PARAMS:
  5044. + * Input parameters are out of range.
  5045. + *
  5046. + * TOUCH_STATUS_TIMEOUT:
  5047. + * Sensor did not generate a reset interrupt in the time allotted.
  5048. + * Could indicate sensor is not connected or malfunctioning.
  5049. + *
  5050. + * TOUCH_STATUS_RESET_FAILED:
  5051. + * Sensor generated an invalid or unexpected interrupt.
  5052. + *
  5053. + * TOUCH_STATUS_QUIESCE_IO_IN_PROGRESS:
  5054. + * Indicates that Quiesce I/O is already in progress and this
  5055. + * command cannot be accepted at this time.
  5056. + */
  5057. +struct touch_sensor_reset_rsp_data {
  5058. + // For future expansion
  5059. + u32 reserved[3];
  5060. +};
  5061. +static_assert(sizeof(struct touch_sensor_reset_rsp_data) == 12);
  5062. +
  5063. +/*
  5064. + * TOUCH_SENSOR_READ_ALL_REGS_RSP code is sent in response to
  5065. + * TOUCH_SENSOR_READ_ALL_REGS_CMD. This code will be followed
  5066. + * by TOUCH_SENSOR_READ_ALL_REGS_RSP_DATA.
  5067. + *
  5068. + * Possible Status values:
  5069. + * TOUCH_STATUS_SUCCESS:
  5070. + * Command was processed successfully and new policies were set.
  5071. + * TOUCH_STATUS_CMD_SIZE_ERROR:
  5072. + * Command sent did not match expected size. Other fields will
  5073. + * not contain valid data.
  5074. + */
  5075. +struct touch_sensor_read_all_regs_rsp_data {
  5076. + // Returns first 64 bytes of register space used for normal
  5077. + // touch operation. Does not include test mode register.
  5078. + struct touch_reg_block sensor_regs;
  5079. + u32 reserved[4];
  5080. +};
  5081. +static_assert(sizeof(struct touch_sensor_read_all_regs_rsp_data) == 80);
  5082. +
  5083. +/*
  5084. + * ME to Host Message
  5085. + */
  5086. +union touch_sensor_data_m2h {
  5087. + struct touch_sensor_get_device_info_rsp_data device_info_rsp_data;
  5088. + struct touch_sensor_set_mode_rsp_data set_mode_rsp_data;
  5089. + struct touch_sensor_set_mem_window_rsp_data set_mem_window_rsp_data;
  5090. + struct touch_sensor_quiesce_io_rsp_data quiesce_io_rsp_data;
  5091. +
  5092. + struct touch_sensor_hid_ready_for_data_rsp_data
  5093. + hid_ready_for_data_rsp_data;
  5094. +
  5095. + struct touch_sensor_feedback_ready_rsp_data feedback_ready_rsp_data;
  5096. + struct touch_sensor_clear_mem_window_rsp_data clear_mem_window_rsp_data;
  5097. + struct touch_sensor_notify_dev_ready_rsp_data notify_dev_ready_rsp_data;
  5098. + struct touch_sensor_set_policies_rsp_data set_policies_rsp_data;
  5099. + struct touch_sensor_get_policies_rsp_data get_policies_rsp_data;
  5100. + struct touch_sensor_reset_rsp_data reset_rsp_data;
  5101. + struct touch_sensor_read_all_regs_rsp_data read_all_regs_rsp_data;
  5102. +};
  5103. +struct touch_sensor_msg_m2h {
  5104. + u32 command_code;
  5105. + enum touch_status status;
  5106. + union touch_sensor_data_m2h m2h_data;
  5107. +};
  5108. +static_assert(sizeof(struct touch_sensor_msg_m2h) == 88);
  5109. +
  5110. +#pragma pack()
  5111. +
  5112. +#endif // _IPTS_MEI_MSGS_H_
  5113. diff --git a/drivers/misc/ipts/mei.c b/drivers/misc/ipts/mei.c
  5114. new file mode 100644
  5115. index 000000000000..03b5d747a728
  5116. --- /dev/null
  5117. +++ b/drivers/misc/ipts/mei.c
  5118. @@ -0,0 +1,238 @@
  5119. +// SPDX-License-Identifier: GPL-2.0-or-later
  5120. +/*
  5121. + *
  5122. + * Intel Precise Touch & Stylus
  5123. + * Copyright (c) 2016 Intel Corporation
  5124. + *
  5125. + */
  5126. +
  5127. +#include <linux/dma-mapping.h>
  5128. +#include <linux/hid.h>
  5129. +#include <linux/ipts-binary.h>
  5130. +#include <linux/kthread.h>
  5131. +#include <linux/mei_cl_bus.h>
  5132. +#include <linux/module.h>
  5133. +#include <linux/mod_devicetable.h>
  5134. +
  5135. +#include "companion.h"
  5136. +#include "hid.h"
  5137. +#include "ipts.h"
  5138. +#include "params.h"
  5139. +#include "msg-handler.h"
  5140. +#include "mei-msgs.h"
  5141. +#include "state.h"
  5142. +
  5143. +#define IPTS_DRIVER_NAME "ipts"
  5144. +#define IPTS_MEI_UUID UUID_LE(0x3e8d0870, 0x271a, 0x4208, \
  5145. + 0x8e, 0xb5, 0x9a, 0xcb, 0x94, 0x02, 0xae, 0x04)
  5146. +
  5147. +static struct mei_cl_device_id ipts_mei_cl_tbl[] = {
  5148. + { "", IPTS_MEI_UUID, MEI_CL_VERSION_ANY },
  5149. + { }
  5150. +};
  5151. +MODULE_DEVICE_TABLE(mei, ipts_mei_cl_tbl);
  5152. +
  5153. +static ssize_t device_info_show(struct device *dev,
  5154. + struct device_attribute *attr, char *buf)
  5155. +{
  5156. + struct ipts_info *ipts;
  5157. +
  5158. + ipts = dev_get_drvdata(dev);
  5159. + return sprintf(buf, "vendor id = 0x%04hX\ndevice id = 0x%04hX\n"
  5160. + "HW rev = 0x%08X\nfirmware rev = 0x%08X\n",
  5161. + ipts->device_info.vendor_id, ipts->device_info.device_id,
  5162. + ipts->device_info.hw_rev, ipts->device_info.fw_rev);
  5163. +}
  5164. +static DEVICE_ATTR_RO(device_info);
  5165. +
  5166. +static struct attribute *ipts_attrs[] = {
  5167. + &dev_attr_device_info.attr,
  5168. + NULL
  5169. +};
  5170. +
  5171. +static const struct attribute_group ipts_grp = {
  5172. + .attrs = ipts_attrs,
  5173. +};
  5174. +
  5175. +static void raw_data_work_func(struct work_struct *work)
  5176. +{
  5177. + struct ipts_info *ipts = container_of(work,
  5178. + struct ipts_info, raw_data_work);
  5179. +
  5180. + ipts_handle_processed_data(ipts);
  5181. +}
  5182. +
  5183. +static void gfx_status_work_func(struct work_struct *work)
  5184. +{
  5185. + struct ipts_info *ipts = container_of(work, struct ipts_info,
  5186. + gfx_status_work);
  5187. + enum ipts_state state;
  5188. + int status = ipts->gfx_status;
  5189. +
  5190. + ipts_dbg(ipts, "notify gfx status : %d\n", status);
  5191. +
  5192. + state = ipts_get_state(ipts);
  5193. +
  5194. + if (state != IPTS_STA_RAW_DATA_STARTED && state != IPTS_STA_HID_STARTED)
  5195. + return;
  5196. +
  5197. + if (status == IPTS_NOTIFY_STA_BACKLIGHT_ON && !ipts->display_status) {
  5198. + ipts_send_sensor_clear_mem_window_cmd(ipts);
  5199. + ipts->display_status = true;
  5200. + }
  5201. +
  5202. + if (status == IPTS_NOTIFY_STA_BACKLIGHT_OFF && ipts->display_status) {
  5203. + ipts_send_sensor_quiesce_io_cmd(ipts);
  5204. + ipts->display_status = false;
  5205. + }
  5206. +}
  5207. +
  5208. +// event loop
  5209. +static int ipts_mei_cl_event_thread(void *data)
  5210. +{
  5211. + struct ipts_info *ipts = (struct ipts_info *)data;
  5212. + struct mei_cl_device *cldev = ipts->cldev;
  5213. + ssize_t msg_len;
  5214. + struct touch_sensor_msg_m2h m2h_msg;
  5215. +
  5216. + while (!kthread_should_stop()) {
  5217. + msg_len = mei_cldev_recv(cldev,
  5218. + (u8 *)&m2h_msg, sizeof(m2h_msg));
  5219. + if (msg_len <= 0) {
  5220. + ipts_err(ipts, "error in reading m2h msg\n");
  5221. + continue;
  5222. + }
  5223. +
  5224. + if (ipts_handle_resp(ipts, &m2h_msg, msg_len) != 0)
  5225. + ipts_err(ipts, "error in handling resp msg\n");
  5226. + }
  5227. +
  5228. + ipts_dbg(ipts, "!! end event loop !!\n");
  5229. +
  5230. + return 0;
  5231. +}
  5232. +
  5233. +static void init_work_func(struct work_struct *work)
  5234. +{
  5235. + struct ipts_info *ipts = container_of(work,
  5236. + struct ipts_info, init_work);
  5237. +
  5238. + ipts->sensor_mode = TOUCH_SENSOR_MODE_RAW_DATA;
  5239. + ipts->display_status = true;
  5240. +
  5241. + ipts_start(ipts);
  5242. +}
  5243. +
  5244. +static int ipts_mei_cl_probe(struct mei_cl_device *cldev,
  5245. + const struct mei_cl_device_id *id)
  5246. +{
  5247. + int ret = 0;
  5248. + struct ipts_info *ipts = NULL;
  5249. +
  5250. + // Check if a companion driver for firmware loading was registered
  5251. + // If not, defer probing until it was properly registered
  5252. + if (!ipts_companion_available() && !ipts_modparams.ignore_companion)
  5253. + return -EPROBE_DEFER;
  5254. +
  5255. + pr_info("probing Intel Precise Touch & Stylus\n");
  5256. +
  5257. + // setup the DMA BIT mask, the system will choose the best possible
  5258. + if (dma_coerce_mask_and_coherent(&cldev->dev, DMA_BIT_MASK(64)) == 0) {
  5259. + pr_info("IPTS using DMA_BIT_MASK(64)\n");
  5260. + } else if (dma_coerce_mask_and_coherent(&cldev->dev,
  5261. + DMA_BIT_MASK(32)) == 0) {
  5262. + pr_info("IPTS using DMA_BIT_MASK(32)\n");
  5263. + } else {
  5264. + pr_err("IPTS: No suitable DMA available\n");
  5265. + return -EFAULT;
  5266. + }
  5267. +
  5268. + ret = mei_cldev_enable(cldev);
  5269. + if (ret < 0) {
  5270. + pr_err("cannot enable IPTS\n");
  5271. + return ret;
  5272. + }
  5273. +
  5274. + ipts = devm_kzalloc(&cldev->dev, sizeof(struct ipts_info), GFP_KERNEL);
  5275. + if (ipts == NULL) {
  5276. + ret = -ENOMEM;
  5277. + goto disable_mei;
  5278. + }
  5279. +
  5280. + ipts->cldev = cldev;
  5281. + mei_cldev_set_drvdata(cldev, ipts);
  5282. + ipts->event_loop = kthread_run(ipts_mei_cl_event_thread, (void *)ipts,
  5283. + "ipts_event_thread");
  5284. +
  5285. + if (ipts_dbgfs_register(ipts, "ipts"))
  5286. + pr_debug("cannot register debugfs for IPTS\n");
  5287. +
  5288. + INIT_WORK(&ipts->init_work, init_work_func);
  5289. + INIT_WORK(&ipts->raw_data_work, raw_data_work_func);
  5290. + INIT_WORK(&ipts->gfx_status_work, gfx_status_work_func);
  5291. +
  5292. + ret = sysfs_create_group(&cldev->dev.kobj, &ipts_grp);
  5293. + if (ret != 0)
  5294. + pr_debug("cannot create sysfs for IPTS\n");
  5295. +
  5296. + schedule_work(&ipts->init_work);
  5297. +
  5298. + return 0;
  5299. +
  5300. +disable_mei:
  5301. + mei_cldev_disable(cldev);
  5302. +
  5303. + return ret;
  5304. +}
  5305. +
  5306. +static int ipts_mei_cl_remove(struct mei_cl_device *cldev)
  5307. +{
  5308. + struct ipts_info *ipts = mei_cldev_get_drvdata(cldev);
  5309. +
  5310. + ipts_stop(ipts);
  5311. +
  5312. + sysfs_remove_group(&cldev->dev.kobj, &ipts_grp);
  5313. + ipts_hid_release(ipts);
  5314. + ipts_dbgfs_deregister(ipts);
  5315. + mei_cldev_disable(cldev);
  5316. +
  5317. + kthread_stop(ipts->event_loop);
  5318. +
  5319. + pr_info("IPTS removed\n");
  5320. +
  5321. + return 0;
  5322. +}
  5323. +
  5324. +static struct mei_cl_driver ipts_mei_cl_driver = {
  5325. + .id_table = ipts_mei_cl_tbl,
  5326. + .name = IPTS_DRIVER_NAME,
  5327. + .probe = ipts_mei_cl_probe,
  5328. + .remove = ipts_mei_cl_remove,
  5329. +};
  5330. +
  5331. +static int ipts_mei_cl_init(void)
  5332. +{
  5333. + int ret;
  5334. +
  5335. + pr_info("IPTS %s() is called\n", __func__);
  5336. +
  5337. + ret = mei_cldev_driver_register(&ipts_mei_cl_driver);
  5338. + if (ret) {
  5339. + pr_err("unable to register IPTS mei client driver\n");
  5340. + return ret;
  5341. + }
  5342. +
  5343. + return 0;
  5344. +}
  5345. +
  5346. +static void __exit ipts_mei_cl_exit(void)
  5347. +{
  5348. + pr_info("IPTS %s() is called\n", __func__);
  5349. + mei_cldev_driver_unregister(&ipts_mei_cl_driver);
  5350. +}
  5351. +
  5352. +module_init(ipts_mei_cl_init);
  5353. +module_exit(ipts_mei_cl_exit);
  5354. +
  5355. +MODULE_DESCRIPTION("Intel(R) ME Interface Client Driver for IPTS");
  5356. +MODULE_LICENSE("GPL");
  5357. diff --git a/drivers/misc/ipts/msg-handler.c b/drivers/misc/ipts/msg-handler.c
  5358. new file mode 100644
  5359. index 000000000000..b2b382ea4675
  5360. --- /dev/null
  5361. +++ b/drivers/misc/ipts/msg-handler.c
  5362. @@ -0,0 +1,396 @@
  5363. +// SPDX-License-Identifier: GPL-2.0-or-later
  5364. +/*
  5365. + *
  5366. + * Intel Precise Touch & Stylus
  5367. + * Copyright (c) 2016 Intel Corporation
  5368. + *
  5369. + */
  5370. +
  5371. +#include <linux/mei_cl_bus.h>
  5372. +
  5373. +#include "hid.h"
  5374. +#include "ipts.h"
  5375. +#include "mei-msgs.h"
  5376. +#include "resource.h"
  5377. +
  5378. +#define rsp_failed(ipts, cmd, status) \
  5379. + ipts_err(ipts, "0x%08x failed status = %d\n", cmd, status)
  5380. +
  5381. +int ipts_handle_cmd(struct ipts_info *ipts, u32 cmd, void *data, int data_size)
  5382. +{
  5383. + int ret = 0;
  5384. + int len = 0;
  5385. + struct touch_sensor_msg_h2m h2m_msg;
  5386. +
  5387. + memset(&h2m_msg, 0, sizeof(h2m_msg));
  5388. +
  5389. + h2m_msg.command_code = cmd;
  5390. + len = sizeof(h2m_msg.command_code) + data_size;
  5391. +
  5392. + if (data != NULL && data_size != 0)
  5393. + memcpy(&h2m_msg.h2m_data, data, data_size); // copy payload
  5394. +
  5395. + ret = mei_cldev_send(ipts->cldev, (u8 *)&h2m_msg, len);
  5396. + if (ret < 0) {
  5397. + ipts_err(ipts, "mei_cldev_send() error 0x%X:%d\n", cmd, ret);
  5398. + return ret;
  5399. + }
  5400. +
  5401. + return 0;
  5402. +}
  5403. +
  5404. +int ipts_send_feedback(struct ipts_info *ipts, int buffer_idx,
  5405. + u32 transaction_id)
  5406. +{
  5407. + int cmd_len = sizeof(struct touch_sensor_feedback_ready_cmd_data);
  5408. + struct touch_sensor_feedback_ready_cmd_data fb_ready_cmd;
  5409. +
  5410. + memset(&fb_ready_cmd, 0, cmd_len);
  5411. +
  5412. + fb_ready_cmd.feedback_index = buffer_idx;
  5413. + fb_ready_cmd.transaction_id = transaction_id;
  5414. +
  5415. + return ipts_handle_cmd(ipts, TOUCH_SENSOR_FEEDBACK_READY_CMD,
  5416. + &fb_ready_cmd, cmd_len);
  5417. +}
  5418. +
  5419. +int ipts_send_sensor_quiesce_io_cmd(struct ipts_info *ipts)
  5420. +{
  5421. + int cmd_len = sizeof(struct touch_sensor_quiesce_io_cmd_data);
  5422. + struct touch_sensor_quiesce_io_cmd_data quiesce_io_cmd;
  5423. +
  5424. + memset(&quiesce_io_cmd, 0, cmd_len);
  5425. +
  5426. + return ipts_handle_cmd(ipts, TOUCH_SENSOR_QUIESCE_IO_CMD,
  5427. + &quiesce_io_cmd, cmd_len);
  5428. +}
  5429. +
  5430. +int ipts_send_sensor_hid_ready_for_data_cmd(struct ipts_info *ipts)
  5431. +{
  5432. + return ipts_handle_cmd(ipts,
  5433. + TOUCH_SENSOR_HID_READY_FOR_DATA_CMD, NULL, 0);
  5434. +}
  5435. +
  5436. +int ipts_send_sensor_clear_mem_window_cmd(struct ipts_info *ipts)
  5437. +{
  5438. + return ipts_handle_cmd(ipts,
  5439. + TOUCH_SENSOR_CLEAR_MEM_WINDOW_CMD, NULL, 0);
  5440. +}
  5441. +
  5442. +static int check_validity(struct touch_sensor_msg_m2h *m2h_msg, u32 msg_len)
  5443. +{
  5444. + int ret = 0;
  5445. + int valid_msg_len = sizeof(m2h_msg->command_code);
  5446. + u32 cmd_code = m2h_msg->command_code;
  5447. +
  5448. + switch (cmd_code) {
  5449. + case TOUCH_SENSOR_SET_MODE_RSP:
  5450. + valid_msg_len +=
  5451. + sizeof(struct touch_sensor_set_mode_rsp_data);
  5452. + break;
  5453. + case TOUCH_SENSOR_SET_MEM_WINDOW_RSP:
  5454. + valid_msg_len +=
  5455. + sizeof(struct touch_sensor_set_mem_window_rsp_data);
  5456. + break;
  5457. + case TOUCH_SENSOR_QUIESCE_IO_RSP:
  5458. + valid_msg_len +=
  5459. + sizeof(struct touch_sensor_quiesce_io_rsp_data);
  5460. + break;
  5461. + case TOUCH_SENSOR_HID_READY_FOR_DATA_RSP:
  5462. + valid_msg_len +=
  5463. + sizeof(struct touch_sensor_hid_ready_for_data_rsp_data);
  5464. + break;
  5465. + case TOUCH_SENSOR_FEEDBACK_READY_RSP:
  5466. + valid_msg_len +=
  5467. + sizeof(struct touch_sensor_feedback_ready_rsp_data);
  5468. + break;
  5469. + case TOUCH_SENSOR_CLEAR_MEM_WINDOW_RSP:
  5470. + valid_msg_len +=
  5471. + sizeof(struct touch_sensor_clear_mem_window_rsp_data);
  5472. + break;
  5473. + case TOUCH_SENSOR_NOTIFY_DEV_READY_RSP:
  5474. + valid_msg_len +=
  5475. + sizeof(struct touch_sensor_notify_dev_ready_rsp_data);
  5476. + break;
  5477. + case TOUCH_SENSOR_SET_POLICIES_RSP:
  5478. + valid_msg_len +=
  5479. + sizeof(struct touch_sensor_set_policies_rsp_data);
  5480. + break;
  5481. + case TOUCH_SENSOR_GET_POLICIES_RSP:
  5482. + valid_msg_len +=
  5483. + sizeof(struct touch_sensor_get_policies_rsp_data);
  5484. + break;
  5485. + case TOUCH_SENSOR_RESET_RSP:
  5486. + valid_msg_len +=
  5487. + sizeof(struct touch_sensor_reset_rsp_data);
  5488. + break;
  5489. + }
  5490. +
  5491. + if (valid_msg_len != msg_len)
  5492. + return -EINVAL;
  5493. + return ret;
  5494. +}
  5495. +
  5496. +int ipts_start(struct ipts_info *ipts)
  5497. +{
  5498. + /*
  5499. + * TODO: check if we need to do SET_POLICIES_CMD we need to do this
  5500. + * when protocol version doesn't match with reported one how we keep
  5501. + * vendor specific data is the first thing to solve.
  5502. + */
  5503. + ipts_set_state(ipts, IPTS_STA_INIT);
  5504. + ipts->num_of_parallel_data_buffers = TOUCH_SENSOR_MAX_DATA_BUFFERS;
  5505. +
  5506. + // start with RAW_DATA
  5507. + ipts->sensor_mode = TOUCH_SENSOR_MODE_RAW_DATA;
  5508. +
  5509. + return ipts_handle_cmd(ipts,
  5510. + TOUCH_SENSOR_NOTIFY_DEV_READY_CMD, NULL, 0);
  5511. +}
  5512. +
  5513. +void ipts_stop(struct ipts_info *ipts)
  5514. +{
  5515. + enum ipts_state old_state = ipts_get_state(ipts);
  5516. +
  5517. + ipts_set_state(ipts, IPTS_STA_STOPPING);
  5518. +
  5519. + ipts_send_sensor_quiesce_io_cmd(ipts);
  5520. + ipts_send_sensor_clear_mem_window_cmd(ipts);
  5521. +
  5522. + if (old_state < IPTS_STA_RESOURCE_READY)
  5523. + return;
  5524. +
  5525. + if (old_state == IPTS_STA_RAW_DATA_STARTED ||
  5526. + old_state == IPTS_STA_HID_STARTED) {
  5527. + ipts_free_default_resource(ipts);
  5528. + ipts_free_raw_data_resource(ipts);
  5529. + }
  5530. +}
  5531. +
  5532. +int ipts_restart(struct ipts_info *ipts)
  5533. +{
  5534. + ipts_dbg(ipts, "ipts restart\n");
  5535. + ipts_stop(ipts);
  5536. +
  5537. + ipts_send_sensor_quiesce_io_cmd(ipts);
  5538. + ipts->restart = true;
  5539. +
  5540. + return 0;
  5541. +}
  5542. +
  5543. +int ipts_handle_resp(struct ipts_info *ipts,
  5544. + struct touch_sensor_msg_m2h *m2h_msg, u32 msg_len)
  5545. +{
  5546. + int ret = 0;
  5547. + int rsp_status = 0;
  5548. + int cmd_status = 0;
  5549. + int cmd_len = 0;
  5550. + u32 cmd;
  5551. +
  5552. + if (!check_validity(m2h_msg, msg_len)) {
  5553. + ipts_err(ipts, "wrong rsp\n");
  5554. + return -EINVAL;
  5555. + }
  5556. +
  5557. + rsp_status = m2h_msg->status;
  5558. + cmd = m2h_msg->command_code;
  5559. +
  5560. + switch (cmd) {
  5561. + case TOUCH_SENSOR_NOTIFY_DEV_READY_RSP: {
  5562. + if (rsp_status != TOUCH_STATUS_SENSOR_FAIL_NONFATAL &&
  5563. + rsp_status != 0) {
  5564. + rsp_failed(ipts, cmd, rsp_status);
  5565. + break;
  5566. + }
  5567. +
  5568. + cmd_status = ipts_handle_cmd(ipts,
  5569. + TOUCH_SENSOR_GET_DEVICE_INFO_CMD, NULL, 0);
  5570. +
  5571. + break;
  5572. + }
  5573. + case TOUCH_SENSOR_GET_DEVICE_INFO_RSP: {
  5574. + if (rsp_status != TOUCH_STATUS_COMPAT_CHECK_FAIL &&
  5575. + rsp_status != 0) {
  5576. + rsp_failed(ipts, cmd, rsp_status);
  5577. + break;
  5578. + }
  5579. +
  5580. + memcpy(&ipts->device_info,
  5581. + &m2h_msg->m2h_data.device_info_rsp_data,
  5582. + sizeof(struct touch_sensor_get_device_info_rsp_data));
  5583. +
  5584. + /*
  5585. + * TODO: support raw_request during HID init. Although HID
  5586. + * init happens here, technically most of reports
  5587. + * (for both direction) can be issued only after
  5588. + * SET_MEM_WINDOWS_CMD since they may require ME or touch IC.
  5589. + * If ipts vendor requires raw_request during HID init, we
  5590. + * need to consider to move HID init.
  5591. + */
  5592. + if (ipts->hid_desc_ready == false) {
  5593. + ret = ipts_hid_init(ipts);
  5594. + if (ret)
  5595. + break;
  5596. + }
  5597. +
  5598. + cmd_status = ipts_send_sensor_clear_mem_window_cmd(ipts);
  5599. +
  5600. + break;
  5601. + }
  5602. + case TOUCH_SENSOR_CLEAR_MEM_WINDOW_RSP: {
  5603. + struct touch_sensor_set_mode_cmd_data sensor_mode_cmd;
  5604. +
  5605. + if (rsp_status != TOUCH_STATUS_TIMEOUT && rsp_status != 0) {
  5606. + rsp_failed(ipts, cmd, rsp_status);
  5607. + break;
  5608. + }
  5609. +
  5610. + if (ipts_get_state(ipts) == IPTS_STA_STOPPING)
  5611. + break;
  5612. +
  5613. + // allocate default resource: common & hid only
  5614. + if (!ipts_is_default_resource_ready(ipts)) {
  5615. + ret = ipts_allocate_default_resource(ipts);
  5616. + if (ret)
  5617. + break;
  5618. + }
  5619. +
  5620. + if (ipts->sensor_mode == TOUCH_SENSOR_MODE_RAW_DATA &&
  5621. + !ipts_is_raw_data_resource_ready(ipts)) {
  5622. + ret = ipts_allocate_raw_data_resource(ipts);
  5623. + if (ret) {
  5624. + ipts_free_default_resource(ipts);
  5625. + break;
  5626. + }
  5627. + }
  5628. +
  5629. + ipts_set_state(ipts, IPTS_STA_RESOURCE_READY);
  5630. +
  5631. + cmd_len = sizeof(struct touch_sensor_set_mode_cmd_data);
  5632. + memset(&sensor_mode_cmd, 0, cmd_len);
  5633. +
  5634. + sensor_mode_cmd.sensor_mode = ipts->sensor_mode;
  5635. + cmd_status = ipts_handle_cmd(ipts, TOUCH_SENSOR_SET_MODE_CMD,
  5636. + &sensor_mode_cmd, cmd_len);
  5637. +
  5638. + break;
  5639. + }
  5640. + case TOUCH_SENSOR_SET_MODE_RSP: {
  5641. + struct touch_sensor_set_mem_window_cmd_data smw_cmd;
  5642. +
  5643. + if (rsp_status != 0) {
  5644. + rsp_failed(ipts, cmd, rsp_status);
  5645. + break;
  5646. + }
  5647. +
  5648. + cmd_len = sizeof(struct touch_sensor_set_mem_window_cmd_data);
  5649. + memset(&smw_cmd, 0, cmd_len);
  5650. +
  5651. + ipts_get_set_mem_window_cmd_data(ipts, &smw_cmd);
  5652. + cmd_status = ipts_handle_cmd(ipts,
  5653. + TOUCH_SENSOR_SET_MEM_WINDOW_CMD, &smw_cmd, cmd_len);
  5654. +
  5655. + break;
  5656. + }
  5657. + case TOUCH_SENSOR_SET_MEM_WINDOW_RSP: {
  5658. + if (rsp_status != 0) {
  5659. + rsp_failed(ipts, cmd, rsp_status);
  5660. + break;
  5661. + }
  5662. +
  5663. + cmd_status = ipts_send_sensor_hid_ready_for_data_cmd(ipts);
  5664. + if (cmd_status)
  5665. + break;
  5666. +
  5667. + if (ipts->sensor_mode == TOUCH_SENSOR_MODE_HID)
  5668. + ipts_set_state(ipts, IPTS_STA_HID_STARTED);
  5669. + else if (ipts->sensor_mode == TOUCH_SENSOR_MODE_RAW_DATA)
  5670. + ipts_set_state(ipts, IPTS_STA_RAW_DATA_STARTED);
  5671. +
  5672. + ipts_dbg(ipts, "touch enabled %d\n", ipts_get_state(ipts));
  5673. +
  5674. + break;
  5675. + }
  5676. + case TOUCH_SENSOR_HID_READY_FOR_DATA_RSP: {
  5677. + struct touch_sensor_hid_ready_for_data_rsp_data *hid_data;
  5678. + enum ipts_state state;
  5679. +
  5680. + if (rsp_status != TOUCH_STATUS_SENSOR_DISABLED &&
  5681. + rsp_status != 0) {
  5682. + rsp_failed(ipts, cmd, rsp_status);
  5683. + break;
  5684. + }
  5685. +
  5686. + state = ipts_get_state(ipts);
  5687. + if (ipts->sensor_mode == TOUCH_SENSOR_MODE_HID &&
  5688. + state == IPTS_STA_HID_STARTED) {
  5689. + hid_data =
  5690. + &m2h_msg->m2h_data.hid_ready_for_data_rsp_data;
  5691. +
  5692. + // HID mode only uses buffer 0
  5693. + if (hid_data->touch_data_buffer_index != 0)
  5694. + break;
  5695. +
  5696. + // handle hid data
  5697. + ipts_handle_hid_data(ipts, hid_data);
  5698. + }
  5699. +
  5700. + break;
  5701. + }
  5702. + case TOUCH_SENSOR_FEEDBACK_READY_RSP: {
  5703. + if (rsp_status != TOUCH_STATUS_COMPAT_CHECK_FAIL &&
  5704. + rsp_status != 0) {
  5705. + rsp_failed(ipts, cmd, rsp_status);
  5706. + break;
  5707. + }
  5708. +
  5709. + if (m2h_msg->m2h_data.feedback_ready_rsp_data.feedback_index
  5710. + == TOUCH_HID_2_ME_BUFFER_ID)
  5711. + break;
  5712. +
  5713. + if (ipts->sensor_mode == TOUCH_SENSOR_MODE_HID)
  5714. + cmd_status = ipts_handle_cmd(ipts,
  5715. + TOUCH_SENSOR_HID_READY_FOR_DATA_CMD, NULL, 0);
  5716. +
  5717. + break;
  5718. + }
  5719. + case TOUCH_SENSOR_QUIESCE_IO_RSP: {
  5720. + enum ipts_state state;
  5721. +
  5722. + if (rsp_status != 0) {
  5723. + rsp_failed(ipts, cmd, rsp_status);
  5724. + break;
  5725. + }
  5726. +
  5727. + state = ipts_get_state(ipts);
  5728. + if (state == IPTS_STA_STOPPING && ipts->restart) {
  5729. + ipts_dbg(ipts, "restart\n");
  5730. + ipts_start(ipts);
  5731. + ipts->restart = 0;
  5732. + break;
  5733. + }
  5734. +
  5735. + break;
  5736. + }
  5737. + }
  5738. +
  5739. + // handle error in rsp_status
  5740. + if (rsp_status != 0) {
  5741. + switch (rsp_status) {
  5742. + case TOUCH_STATUS_SENSOR_EXPECTED_RESET:
  5743. + case TOUCH_STATUS_SENSOR_UNEXPECTED_RESET:
  5744. + ipts_dbg(ipts, "sensor reset %d\n", rsp_status);
  5745. + ipts_restart(ipts);
  5746. + break;
  5747. + default:
  5748. + ipts_dbg(ipts, "cmd : 0x%08x, status %d\n",
  5749. + cmd, rsp_status);
  5750. + break;
  5751. + }
  5752. + }
  5753. +
  5754. + if (cmd_status)
  5755. + ipts_restart(ipts);
  5756. +
  5757. + return ret;
  5758. +}
  5759. diff --git a/drivers/misc/ipts/msg-handler.h b/drivers/misc/ipts/msg-handler.h
  5760. new file mode 100644
  5761. index 000000000000..eca4238adf4b
  5762. --- /dev/null
  5763. +++ b/drivers/misc/ipts/msg-handler.h
  5764. @@ -0,0 +1,28 @@
  5765. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  5766. +/*
  5767. + *
  5768. + * Intel Precise Touch & Stylus
  5769. + * Copyright (c) 2016 Intel Corporation
  5770. + *
  5771. + */
  5772. +
  5773. +#ifndef _IPTS_MSG_HANDLER_H_
  5774. +#define _IPTS_MSG_HANDLER_H_
  5775. +
  5776. +int ipts_start(struct ipts_info *ipts);
  5777. +void ipts_stop(struct ipts_info *ipts);
  5778. +int ipts_handle_cmd(struct ipts_info *ipts, u32 cmd, void *data, int data_size);
  5779. +
  5780. +int ipts_handle_resp(struct ipts_info *ipts,
  5781. + struct touch_sensor_msg_m2h *m2h_msg, u32 msg_len);
  5782. +
  5783. +int ipts_send_feedback(struct ipts_info *ipts,
  5784. + int buffer_idx, u32 transaction_id);
  5785. +
  5786. +int ipts_handle_processed_data(struct ipts_info *ipts);
  5787. +int ipts_send_sensor_quiesce_io_cmd(struct ipts_info *ipts);
  5788. +int ipts_send_sensor_hid_ready_for_data_cmd(struct ipts_info *ipts);
  5789. +int ipts_send_sensor_clear_mem_window_cmd(struct ipts_info *ipts);
  5790. +int ipts_restart(struct ipts_info *ipts);
  5791. +
  5792. +#endif /* _IPTS_MSG_HANDLER_H */
  5793. diff --git a/drivers/misc/ipts/params.c b/drivers/misc/ipts/params.c
  5794. new file mode 100644
  5795. index 000000000000..93b19cbf4786
  5796. --- /dev/null
  5797. +++ b/drivers/misc/ipts/params.c
  5798. @@ -0,0 +1,46 @@
  5799. +// SPDX-License-Identifier: GPL-2.0-or-later
  5800. +/*
  5801. + *
  5802. + * Intel Precise Touch & Stylus
  5803. + * Copyright (c) 2016 Intel Corporation
  5804. + *
  5805. + */
  5806. +
  5807. +#include <linux/moduleparam.h>
  5808. +
  5809. +#include "params.h"
  5810. +
  5811. +#define IPTS_PARAM(NAME, TYPE, PERM, DESC) \
  5812. + module_param_named(NAME, ipts_modparams.NAME, TYPE, PERM); \
  5813. + MODULE_PARM_DESC(NAME, DESC)
  5814. +
  5815. +struct ipts_params ipts_modparams = {
  5816. + .ignore_fw_fallback = false,
  5817. + .ignore_config_fallback = false,
  5818. + .ignore_companion = false,
  5819. + .no_feedback = -1,
  5820. +
  5821. + .debug = false,
  5822. + .debug_thread = false,
  5823. +};
  5824. +
  5825. +IPTS_PARAM(ignore_fw_fallback, bool, 0400,
  5826. + "Don't use the IPTS firmware fallback path. (default: false)"
  5827. +);
  5828. +IPTS_PARAM(ignore_config_fallback, bool, 0400,
  5829. + "Don't try to load the IPTS firmware config from a file. (default: false)"
  5830. +);
  5831. +IPTS_PARAM(ignore_companion, bool, 0400,
  5832. + "Don't use a companion driver to load firmware. (default: false)"
  5833. +);
  5834. +IPTS_PARAM(no_feedback, int, 0644,
  5835. + "Disable sending feedback to ME (can prevent crashes on Skylake). (-1=auto [default], 0=false, 1=true)"
  5836. +);
  5837. +
  5838. +IPTS_PARAM(debug, bool, 0400,
  5839. + "Enable IPTS debugging output. (default: false)"
  5840. +);
  5841. +IPTS_PARAM(debug_thread, bool, 0400,
  5842. + "Periodically print the ME status into the kernel log. (default: false)"
  5843. +);
  5844. +
  5845. diff --git a/drivers/misc/ipts/params.h b/drivers/misc/ipts/params.h
  5846. new file mode 100644
  5847. index 000000000000..4d9d2bca5ede
  5848. --- /dev/null
  5849. +++ b/drivers/misc/ipts/params.h
  5850. @@ -0,0 +1,26 @@
  5851. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  5852. +/*
  5853. + *
  5854. + * Intel Precise Touch & Stylus
  5855. + * Copyright (c) 2016 Intel Corporation
  5856. + *
  5857. + */
  5858. +
  5859. +#ifndef _IPTS_PARAMS_H_
  5860. +#define _IPTS_PARAMS_H_
  5861. +
  5862. +#include <linux/types.h>
  5863. +
  5864. +struct ipts_params {
  5865. + bool ignore_fw_fallback;
  5866. + bool ignore_config_fallback;
  5867. + bool ignore_companion;
  5868. + int no_feedback;
  5869. +
  5870. + bool debug;
  5871. + bool debug_thread;
  5872. +};
  5873. +
  5874. +extern struct ipts_params ipts_modparams;
  5875. +
  5876. +#endif // _IPTS_PARAMS_H_
  5877. diff --git a/drivers/misc/ipts/resource.c b/drivers/misc/ipts/resource.c
  5878. new file mode 100644
  5879. index 000000000000..cfd212f2cac0
  5880. --- /dev/null
  5881. +++ b/drivers/misc/ipts/resource.c
  5882. @@ -0,0 +1,291 @@
  5883. +// SPDX-License-Identifier: GPL-2.0-or-later
  5884. +/*
  5885. + *
  5886. + * Intel Precise Touch & Stylus
  5887. + * Copyright (c) 2016 Intel Corporation
  5888. + *
  5889. + */
  5890. +
  5891. +#include <linux/dma-mapping.h>
  5892. +
  5893. +#include "ipts.h"
  5894. +#include "kernel.h"
  5895. +#include "mei-msgs.h"
  5896. +
  5897. +static void free_common_resource(struct ipts_info *ipts)
  5898. +{
  5899. + char *addr;
  5900. + struct ipts_buffer_info *feedback_buffer;
  5901. + dma_addr_t dma_addr;
  5902. + u32 buffer_size;
  5903. + int i, num_of_parallels;
  5904. +
  5905. + if (ipts->resource.me2hid_buffer) {
  5906. + devm_kfree(&ipts->cldev->dev, ipts->resource.me2hid_buffer);
  5907. + ipts->resource.me2hid_buffer = 0;
  5908. + }
  5909. +
  5910. + addr = ipts->resource.hid2me_buffer.addr;
  5911. + dma_addr = ipts->resource.hid2me_buffer.dma_addr;
  5912. + buffer_size = ipts->resource.hid2me_buffer_size;
  5913. +
  5914. + if (ipts->resource.hid2me_buffer.addr) {
  5915. + dmam_free_coherent(&ipts->cldev->dev, buffer_size,
  5916. + addr, dma_addr);
  5917. +
  5918. + ipts->resource.hid2me_buffer.addr = 0;
  5919. + ipts->resource.hid2me_buffer.dma_addr = 0;
  5920. + ipts->resource.hid2me_buffer_size = 0;
  5921. + }
  5922. +
  5923. + feedback_buffer = ipts->resource.feedback_buffer;
  5924. + num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
  5925. + for (i = 0; i < num_of_parallels; i++) {
  5926. +
  5927. + if (!feedback_buffer[i].addr)
  5928. + continue;
  5929. +
  5930. + dmam_free_coherent(&ipts->cldev->dev,
  5931. + ipts->device_info.feedback_size,
  5932. + feedback_buffer[i].addr, feedback_buffer[i].dma_addr);
  5933. +
  5934. + feedback_buffer[i].addr = 0;
  5935. + feedback_buffer[i].dma_addr = 0;
  5936. + }
  5937. +}
  5938. +
  5939. +static int allocate_common_resource(struct ipts_info *ipts)
  5940. +{
  5941. + char *addr, *me2hid_addr;
  5942. + struct ipts_buffer_info *feedback_buffer;
  5943. + dma_addr_t dma_addr;
  5944. + int i, ret = 0, num_of_parallels;
  5945. + u32 buffer_size;
  5946. +
  5947. + buffer_size = ipts->device_info.feedback_size;
  5948. +
  5949. + addr = dmam_alloc_coherent(&ipts->cldev->dev, buffer_size, &dma_addr,
  5950. + GFP_ATOMIC | __GFP_ZERO);
  5951. + if (addr == NULL)
  5952. + return -ENOMEM;
  5953. +
  5954. + me2hid_addr = devm_kzalloc(&ipts->cldev->dev, buffer_size, GFP_KERNEL);
  5955. + if (me2hid_addr == NULL) {
  5956. + ret = -ENOMEM;
  5957. + goto release_resource;
  5958. + }
  5959. +
  5960. + ipts->resource.hid2me_buffer.addr = addr;
  5961. + ipts->resource.hid2me_buffer.dma_addr = dma_addr;
  5962. + ipts->resource.hid2me_buffer_size = buffer_size;
  5963. + ipts->resource.me2hid_buffer = me2hid_addr;
  5964. +
  5965. + feedback_buffer = ipts->resource.feedback_buffer;
  5966. + num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
  5967. +
  5968. + for (i = 0; i < num_of_parallels; i++) {
  5969. + feedback_buffer[i].addr = dmam_alloc_coherent(&ipts->cldev->dev,
  5970. + ipts->device_info.feedback_size,
  5971. + &feedback_buffer[i].dma_addr, GFP_ATOMIC|__GFP_ZERO);
  5972. +
  5973. + if (feedback_buffer[i].addr == NULL) {
  5974. + ret = -ENOMEM;
  5975. + goto release_resource;
  5976. + }
  5977. + }
  5978. +
  5979. + return 0;
  5980. +
  5981. +release_resource:
  5982. + free_common_resource(ipts);
  5983. +
  5984. + return ret;
  5985. +}
  5986. +
  5987. +void ipts_free_raw_data_resource(struct ipts_info *ipts)
  5988. +{
  5989. + if (ipts_is_raw_data_resource_ready(ipts)) {
  5990. + ipts->resource.raw_data_resource_ready = false;
  5991. + ipts_release_kernels(ipts);
  5992. + }
  5993. +}
  5994. +
  5995. +static int allocate_hid_resource(struct ipts_info *ipts)
  5996. +{
  5997. + struct ipts_buffer_info *buffer_hid;
  5998. +
  5999. + // hid mode uses only one touch data buffer
  6000. + buffer_hid = &ipts->resource.touch_data_buffer_hid;
  6001. + buffer_hid->addr = dmam_alloc_coherent(&ipts->cldev->dev,
  6002. + ipts->device_info.frame_size, &buffer_hid->dma_addr,
  6003. + GFP_ATOMIC|__GFP_ZERO);
  6004. +
  6005. + if (buffer_hid->addr == NULL)
  6006. + return -ENOMEM;
  6007. +
  6008. + return 0;
  6009. +}
  6010. +
  6011. +static void free_hid_resource(struct ipts_info *ipts)
  6012. +{
  6013. + struct ipts_buffer_info *buffer_hid;
  6014. +
  6015. + buffer_hid = &ipts->resource.touch_data_buffer_hid;
  6016. + if (buffer_hid->addr) {
  6017. + dmam_free_coherent(&ipts->cldev->dev,
  6018. + ipts->device_info.frame_size,
  6019. + buffer_hid->addr, buffer_hid->dma_addr);
  6020. +
  6021. + buffer_hid->addr = 0;
  6022. + buffer_hid->dma_addr = 0;
  6023. + }
  6024. +}
  6025. +
  6026. +int ipts_allocate_default_resource(struct ipts_info *ipts)
  6027. +{
  6028. + int ret;
  6029. +
  6030. + ret = allocate_common_resource(ipts);
  6031. + if (ret) {
  6032. + ipts_dbg(ipts, "cannot allocate common resource\n");
  6033. + return ret;
  6034. + }
  6035. +
  6036. + ret = allocate_hid_resource(ipts);
  6037. + if (ret) {
  6038. + ipts_dbg(ipts, "cannot allocate hid resource\n");
  6039. + free_common_resource(ipts);
  6040. + return ret;
  6041. + }
  6042. +
  6043. + ipts->resource.default_resource_ready = true;
  6044. +
  6045. + return 0;
  6046. +}
  6047. +
  6048. +void ipts_free_default_resource(struct ipts_info *ipts)
  6049. +{
  6050. + if (ipts_is_default_resource_ready(ipts)) {
  6051. + ipts->resource.default_resource_ready = false;
  6052. + free_hid_resource(ipts);
  6053. + free_common_resource(ipts);
  6054. + }
  6055. +}
  6056. +
  6057. +int ipts_allocate_raw_data_resource(struct ipts_info *ipts)
  6058. +{
  6059. + int ret = 0;
  6060. +
  6061. + ret = ipts_init_kernels(ipts);
  6062. + if (ret)
  6063. + return ret;
  6064. +
  6065. + ipts->resource.raw_data_resource_ready = true;
  6066. + return 0;
  6067. +}
  6068. +
  6069. +static void get_hid_only_smw_cmd_data(struct ipts_info *ipts,
  6070. + struct touch_sensor_set_mem_window_cmd_data *data,
  6071. + struct ipts_resource *resrc)
  6072. +{
  6073. + struct ipts_buffer_info *touch_buf;
  6074. + struct ipts_buffer_info *feedback_buf;
  6075. +
  6076. + touch_buf = &resrc->touch_data_buffer_hid;
  6077. + feedback_buf = &resrc->feedback_buffer[0];
  6078. +
  6079. + data->touch_data_buffer_addr_lower[0] =
  6080. + lower_32_bits(touch_buf->dma_addr);
  6081. +
  6082. + data->touch_data_buffer_addr_upper[0] =
  6083. + upper_32_bits(touch_buf->dma_addr);
  6084. +
  6085. + data->feedback_buffer_addr_lower[0] =
  6086. + lower_32_bits(feedback_buf->dma_addr);
  6087. +
  6088. + data->feedback_buffer_addr_upper[0] =
  6089. + upper_32_bits(feedback_buf->dma_addr);
  6090. +}
  6091. +
  6092. +static void get_raw_data_only_smw_cmd_data(struct ipts_info *ipts,
  6093. + struct touch_sensor_set_mem_window_cmd_data *data,
  6094. + struct ipts_resource *resrc)
  6095. +{
  6096. + u64 wq_tail_phy_addr;
  6097. + u64 cookie_phy_addr;
  6098. + struct ipts_buffer_info *touch_buf;
  6099. + struct ipts_buffer_info *feedback_buf;
  6100. + int i, num_of_parallels;
  6101. +
  6102. + touch_buf = resrc->touch_data_buffer_raw;
  6103. + feedback_buf = resrc->feedback_buffer;
  6104. +
  6105. + num_of_parallels = ipts_get_num_of_parallel_buffers(ipts);
  6106. + for (i = 0; i < num_of_parallels; i++) {
  6107. + data->touch_data_buffer_addr_lower[i] =
  6108. + lower_32_bits(touch_buf[i].dma_addr);
  6109. +
  6110. + data->touch_data_buffer_addr_upper[i] =
  6111. + upper_32_bits(touch_buf[i].dma_addr);
  6112. +
  6113. + data->feedback_buffer_addr_lower[i] =
  6114. + lower_32_bits(feedback_buf[i].dma_addr);
  6115. +
  6116. + data->feedback_buffer_addr_upper[i] =
  6117. + upper_32_bits(feedback_buf[i].dma_addr);
  6118. + }
  6119. +
  6120. + wq_tail_phy_addr = resrc->wq_info.wq_tail_phy_addr;
  6121. + data->tail_offset_addr_lower = lower_32_bits(wq_tail_phy_addr);
  6122. + data->tail_offset_addr_upper = upper_32_bits(wq_tail_phy_addr);
  6123. +
  6124. + cookie_phy_addr = resrc->wq_info.db_phy_addr +
  6125. + resrc->wq_info.db_cookie_offset;
  6126. +
  6127. + data->doorbell_cookie_addr_lower = lower_32_bits(cookie_phy_addr);
  6128. + data->doorbell_cookie_addr_upper = upper_32_bits(cookie_phy_addr);
  6129. + data->work_queue_size = resrc->wq_info.wq_size;
  6130. + data->work_queue_item_size = resrc->wq_item_size;
  6131. +}
  6132. +
  6133. +void ipts_get_set_mem_window_cmd_data(struct ipts_info *ipts,
  6134. + struct touch_sensor_set_mem_window_cmd_data *data)
  6135. +{
  6136. + struct ipts_resource *resrc = &ipts->resource;
  6137. +
  6138. + if (ipts->sensor_mode == TOUCH_SENSOR_MODE_RAW_DATA)
  6139. + get_raw_data_only_smw_cmd_data(ipts, data, resrc);
  6140. + else if (ipts->sensor_mode == TOUCH_SENSOR_MODE_HID)
  6141. + get_hid_only_smw_cmd_data(ipts, data, resrc);
  6142. +
  6143. + // hid2me is common for "raw data" and "hid"
  6144. + data->hid2me_buffer_addr_lower =
  6145. + lower_32_bits(resrc->hid2me_buffer.dma_addr);
  6146. +
  6147. + data->hid2me_buffer_addr_upper =
  6148. + upper_32_bits(resrc->hid2me_buffer.dma_addr);
  6149. +
  6150. + data->hid2me_buffer_size = resrc->hid2me_buffer_size;
  6151. +}
  6152. +
  6153. +void ipts_set_input_buffer(struct ipts_info *ipts, int parallel_idx,
  6154. + u8 *cpu_addr, u64 dma_addr)
  6155. +{
  6156. + struct ipts_buffer_info *touch_buf;
  6157. +
  6158. + touch_buf = ipts->resource.touch_data_buffer_raw;
  6159. + touch_buf[parallel_idx].dma_addr = dma_addr;
  6160. + touch_buf[parallel_idx].addr = cpu_addr;
  6161. +}
  6162. +
  6163. +void ipts_set_output_buffer(struct ipts_info *ipts, int parallel_idx,
  6164. + int output_idx, u8 *cpu_addr, u64 dma_addr)
  6165. +{
  6166. + struct ipts_buffer_info *output_buf;
  6167. +
  6168. + output_buf = &ipts->resource.raw_data_mode_output_buffer
  6169. + [parallel_idx][output_idx];
  6170. +
  6171. + output_buf->dma_addr = dma_addr;
  6172. + output_buf->addr = cpu_addr;
  6173. +}
  6174. diff --git a/drivers/misc/ipts/resource.h b/drivers/misc/ipts/resource.h
  6175. new file mode 100644
  6176. index 000000000000..27b9c17fcb89
  6177. --- /dev/null
  6178. +++ b/drivers/misc/ipts/resource.h
  6179. @@ -0,0 +1,26 @@
  6180. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  6181. +/*
  6182. + *
  6183. + * Intel Precise Touch & Stylus
  6184. + * Copyright (c) 2016 Intel Corporation
  6185. + *
  6186. + */
  6187. +
  6188. +#ifndef _IPTS_RESOURCE_H_
  6189. +#define _IPTS_RESOURCE_H_
  6190. +
  6191. +int ipts_allocate_default_resource(struct ipts_info *ipts);
  6192. +void ipts_free_default_resource(struct ipts_info *ipts);
  6193. +int ipts_allocate_raw_data_resource(struct ipts_info *ipts);
  6194. +void ipts_free_raw_data_resource(struct ipts_info *ipts);
  6195. +
  6196. +void ipts_get_set_mem_window_cmd_data(struct ipts_info *ipts,
  6197. + struct touch_sensor_set_mem_window_cmd_data *data);
  6198. +
  6199. +void ipts_set_input_buffer(struct ipts_info *ipts, int parallel_idx,
  6200. + u8 *cpu_addr, u64 dma_addr);
  6201. +
  6202. +void ipts_set_output_buffer(struct ipts_info *ipts, int parallel_idx,
  6203. + int output_idx, u8 *cpu_addr, u64 dma_addr);
  6204. +
  6205. +#endif // _IPTS_RESOURCE_H_
  6206. diff --git a/drivers/misc/ipts/sensor-regs.h b/drivers/misc/ipts/sensor-regs.h
  6207. new file mode 100644
  6208. index 000000000000..c1afab48249b
  6209. --- /dev/null
  6210. +++ b/drivers/misc/ipts/sensor-regs.h
  6211. @@ -0,0 +1,834 @@
  6212. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  6213. +/*
  6214. + *
  6215. + * Intel Precise Touch & Stylus
  6216. + * Copyright (c) 2013-2016 Intel Corporation
  6217. + *
  6218. + */
  6219. +
  6220. +#ifndef _IPTS_SENSOR_REGS_H_
  6221. +#define _IPTS_SENSOR_REGS_H_
  6222. +
  6223. +#include <linux/build_bug.h>
  6224. +
  6225. +#pragma pack(1)
  6226. +
  6227. +// Define static_assert macro (which will be available after 5.1
  6228. +// and not available on 4.19 yet) to check structure size and fail
  6229. +// compile for unexpected mismatch.
  6230. +// Taken from upstream commit 6bab69c65013bed5fce9f101a64a84d0385b3946.
  6231. +#define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr)
  6232. +#define __static_assert(expr, msg, ...) _Static_assert(expr, msg)
  6233. +
  6234. +/*
  6235. + * Compatibility versions for this header file
  6236. + */
  6237. +#define TOUCH_EDS_REV_MINOR 0
  6238. +#define TOUCH_EDS_REV_MAJOR 1
  6239. +#define TOUCH_EDS_INTF_REV 1
  6240. +#define TOUCH_PROTOCOL_VER 0
  6241. +
  6242. +/*
  6243. + * Offset 00h: TOUCH_STS: Status Register
  6244. + * This register is read by the SPI Controller immediately following
  6245. + * an interrupt.
  6246. + */
  6247. +#define TOUCH_STS_REG_OFFSET 0x00
  6248. +
  6249. +#define TOUCH_SYNC_BYTE_VALUE 0x5A
  6250. +
  6251. +/*
  6252. + * Offset 04h: TOUCH_FRAME_CHAR: Frame Characteristics Register
  6253. + * This registers describes the characteristics of each data frame read by the
  6254. + * SPI Controller in response to a touch interrupt.
  6255. + */
  6256. +#define TOUCH_FRAME_CHAR_REG_OFFSET 0x04
  6257. +
  6258. +/*
  6259. + * Offset 08h: Touch Error Register
  6260. + */
  6261. +#define TOUCH_ERR_REG_OFFSET 0x08
  6262. +
  6263. +/*
  6264. + * Offset 10h: Touch Identification Register
  6265. + */
  6266. +#define TOUCH_ID_REG_OFFSET 0x10
  6267. +#define TOUCH_ID_REG_VALUE 0x43495424
  6268. +
  6269. +/*
  6270. + * Offset 14h: TOUCH_DATA_SZ: Touch Data Size Register
  6271. + * This register describes the maximum size of frames and feedback data
  6272. + */
  6273. +#define TOUCH_DATA_SZ_REG_OFFSET 0x14
  6274. +
  6275. +#define TOUCH_MAX_FRAME_SIZE_INCREMENT 64
  6276. +#define TOUCH_MAX_FEEDBACK_SIZE_INCREMENT 64
  6277. +
  6278. +/*
  6279. + * Max allowed frame size 32KB
  6280. + * Max allowed feedback size 16KB
  6281. + */
  6282. +#define TOUCH_SENSOR_MAX_FRAME_SIZE (32 * 1024)
  6283. +#define TOUCH_SENSOR_MAX_FEEDBACK_SIZE (16 * 1024)
  6284. +
  6285. +/*
  6286. + * Offset 18h: TOUCH_CAPABILITIES: Touch Capabilities Register
  6287. + * This register informs the host as to the capabilities of the touch IC.
  6288. + */
  6289. +#define TOUCH_CAPS_REG_OFFSET 0x18
  6290. +
  6291. +#define TOUCH_BULK_DATA_MAX_WRITE_INCREMENT 64
  6292. +
  6293. +/*
  6294. + * Offset 1Ch: TOUCH_CFG: Touch Configuration Register
  6295. + * This register allows the SPI Controller to configure the touch sensor as
  6296. + * needed during touch operations.
  6297. + */
  6298. +#define TOUCH_CFG_REG_OFFSET 0x1C
  6299. +
  6300. +/*
  6301. + * Offset 20h: TOUCH_CMD: Touch Command Register
  6302. + * This register is used for sending commands to the Touch IC.
  6303. + */
  6304. +#define TOUCH_CMD_REG_OFFSET 0x20
  6305. +
  6306. +/*
  6307. + * Offset 24h: Power Management Control
  6308. + * This register is used for active power management. The Touch IC is allowed
  6309. + * to mover from Doze or Armed to Sensing after a touch has occurred. All other
  6310. + * transitions will be made at the request of the SPI Controller.
  6311. + */
  6312. +#define TOUCH_PWR_MGMT_CTRL_REG_OFFSET 0x24
  6313. +
  6314. +/*
  6315. + * Offset 28h: Vendor HW Information Register
  6316. + * This register is used to relay Intel-assigned vendor ID information to the
  6317. + * SPI Controller, which may be forwarded to SW running on the host CPU.
  6318. + */
  6319. +#define TOUCH_VEN_HW_INFO_REG_OFFSET 0x28
  6320. +
  6321. +/*
  6322. + * Offset 2Ch: HW Revision ID Register
  6323. + * This register is used to relay vendor HW revision information to the SPI
  6324. + * Controller which may be forwarded to SW running on the host CPU.
  6325. + */
  6326. +#define TOUCH_HW_REV_REG_OFFSET 0x2C
  6327. +
  6328. +/*
  6329. + * Offset 30h: FW Revision ID Register
  6330. + * This register is used to relay vendor FW revision information to the SPI
  6331. + * Controller which may be forwarded to SW running on the host CPU.
  6332. + */
  6333. +#define TOUCH_FW_REV_REG_OFFSET 0x30
  6334. +
  6335. +/*
  6336. + * Offset 34h: Compatibility Revision ID Register
  6337. + * This register is used to relay vendor compatibility information to the SPI
  6338. + * Controller which may be forwarded to SW running on the host CPU.
  6339. + * Compatibility Information is a numeric value given by Intel to the Touch IC
  6340. + * vendor based on the major and minor revision of the EDS supported. From a
  6341. + * nomenclature point of view in an x.y revision number of the EDS, the major
  6342. + * version is the value of x and the minor version is the value of y. For
  6343. + * example, a Touch IC supporting an EDS version of 0.61 would contain a major
  6344. + * version of 0 and a minor version of 61 in the register.
  6345. + */
  6346. +#define TOUCH_COMPAT_REV_REG_OFFSET 0x34
  6347. +
  6348. +/*
  6349. + * Touch Register Block is the full set of registers from offset 0x00h to 0x3F
  6350. + * This is the entire set of registers needed for normal touch operation. It
  6351. + * does not include test registers such as TOUCH_TEST_CTRL_REG
  6352. + */
  6353. +#define TOUCH_REG_BLOCK_OFFSET TOUCH_STS_REG_OFFSET
  6354. +
  6355. +/*
  6356. + * Offset 40h: Test Control Register
  6357. + * This register
  6358. + */
  6359. +#define TOUCH_TEST_CTRL_REG_OFFSET 0x40
  6360. +
  6361. +/*
  6362. + * Offsets 0x000 to 0xFFF are reserved for Intel-defined Registers
  6363. + */
  6364. +#define TOUCH_REGISTER_LIMIT 0xFFF
  6365. +
  6366. +/*
  6367. + * Data Window: Address 0x1000-0x1FFFF
  6368. + * The data window is reserved for writing and reading large quantities of
  6369. + * data to and from the sensor.
  6370. + */
  6371. +#define TOUCH_DATA_WINDOW_OFFSET 0x1000
  6372. +#define TOUCH_DATA_WINDOW_LIMIT 0x1FFFF
  6373. +
  6374. +#define TOUCH_SENSOR_MAX_OFFSET TOUCH_DATA_WINDOW_LIMIT
  6375. +
  6376. +enum touch_sts_reg_int_type {
  6377. + // Touch Data Available
  6378. + TOUCH_STS_REG_INT_TYPE_DATA_AVAIL = 0,
  6379. +
  6380. + // Reset Occurred
  6381. + TOUCH_STS_REG_INT_TYPE_RESET_OCCURRED,
  6382. +
  6383. + // Error Occurred
  6384. + TOUCH_STS_REG_INT_TYPE_ERROR_OCCURRED,
  6385. +
  6386. + // Vendor specific data, treated same as raw frame
  6387. + TOUCH_STS_REG_INT_TYPE_VENDOR_DATA,
  6388. +
  6389. + // Get Features response data available
  6390. + TOUCH_STS_REG_INT_TYPE_GET_FEATURES,
  6391. +
  6392. + TOUCH_STS_REG_INT_TYPE_MAX
  6393. +};
  6394. +static_assert(sizeof(enum touch_sts_reg_int_type) == 4);
  6395. +
  6396. +enum touch_sts_reg_pwr_state {
  6397. + // Sleep
  6398. + TOUCH_STS_REG_PWR_STATE_SLEEP = 0,
  6399. +
  6400. + // Doze
  6401. + TOUCH_STS_REG_PWR_STATE_DOZE,
  6402. +
  6403. + // Armed
  6404. + TOUCH_STS_REG_PWR_STATE_ARMED,
  6405. +
  6406. + // Sensing
  6407. + TOUCH_STS_REG_PWR_STATE_SENSING,
  6408. +
  6409. + TOUCH_STS_REG_PWR_STATE_MAX
  6410. +};
  6411. +static_assert(sizeof(enum touch_sts_reg_pwr_state) == 4);
  6412. +
  6413. +enum touch_sts_reg_init_state {
  6414. + // Ready for normal operation
  6415. + TOUCH_STS_REG_INIT_STATE_READY_FOR_OP = 0,
  6416. +
  6417. + // Touch IC needs its Firmware loaded
  6418. + TOUCH_STS_REG_INIT_STATE_FW_NEEDED,
  6419. +
  6420. + // Touch IC needs its Data loaded
  6421. + TOUCH_STS_REG_INIT_STATE_DATA_NEEDED,
  6422. +
  6423. + // Error info in TOUCH_ERR_REG
  6424. + TOUCH_STS_REG_INIT_STATE_INIT_ERROR,
  6425. +
  6426. + TOUCH_STS_REG_INIT_STATE_MAX
  6427. +};
  6428. +static_assert(sizeof(enum touch_sts_reg_init_state) == 4);
  6429. +
  6430. +union touch_sts_reg {
  6431. + u32 reg_value;
  6432. + struct {
  6433. + // When set, this indicates the hardware has data
  6434. + // that needs to be read.
  6435. + u32 int_status:1;
  6436. +
  6437. + // see TOUCH_STS_REG_INT_TYPE
  6438. + u32 int_type:4;
  6439. +
  6440. + // see TOUCH_STS_REG_PWR_STATE
  6441. + u32 pwr_state:2;
  6442. +
  6443. + // see TOUCH_STS_REG_INIT_STATE
  6444. + u32 init_state:2;
  6445. +
  6446. + // Busy bit indicates that sensor cannot
  6447. + // accept writes at this time
  6448. + u32 busy:1;
  6449. +
  6450. + // Reserved
  6451. + u32 reserved:14;
  6452. +
  6453. + // Synchronization bit, should always be TOUCH_SYNC_BYTE_VALUE
  6454. + u32 sync_byte:8;
  6455. + } fields;
  6456. +};
  6457. +static_assert(sizeof(union touch_sts_reg) == 4);
  6458. +
  6459. +union touch_frame_char_reg {
  6460. + u32 reg_value;
  6461. + struct {
  6462. + // Micro-Frame Size (MFS): Indicates the size of a touch
  6463. + // micro-frame in byte increments. When a micro-frame is to be
  6464. + // read for processing (in data mode), this is the total number
  6465. + // of bytes that must be read per interrupt, split into
  6466. + // multiple read commands no longer than RPS.
  6467. + // Maximum micro-frame size is 256KB.
  6468. + u32 microframe_size:18;
  6469. +
  6470. + // Micro-Frames per Frame (MFPF): Indicates the number of
  6471. + // micro-frames per frame. If a sensor's frame does not contain
  6472. + // micro-frames this value will be 1. Valid values are 1-31.
  6473. + u32 microframes_per_frame:5;
  6474. +
  6475. + // Micro-Frame Index (MFI): Indicates the index of the
  6476. + // micro-frame within a frame. This allows the SPI Controller
  6477. + // to maintain synchronization with the sensor and determine
  6478. + // when the final micro-frame has arrived.
  6479. + // Valid values are 1-31.
  6480. + u32 microframe_index:5;
  6481. +
  6482. + // HID/Raw Data: This bit describes whether the data from the
  6483. + // sensor is Raw data or a HID report. When set, the data
  6484. + // is a HID report.
  6485. + u32 hid_report:1;
  6486. +
  6487. + // Reserved
  6488. + u32 reserved:3;
  6489. + } fields;
  6490. +};
  6491. +static_assert(sizeof(union touch_frame_char_reg) == 4);
  6492. +
  6493. +// bit definition is vendor specific
  6494. +union touch_err_reg {
  6495. + u32 reg_value;
  6496. + struct {
  6497. + u32 invalid_fw:1;
  6498. + u32 invalid_data:1;
  6499. + u32 self_test_failed:1;
  6500. + u32 reserved:12;
  6501. + u32 fatal_error:1;
  6502. + u32 vendor_errors:16;
  6503. + } fields;
  6504. +};
  6505. +static_assert(sizeof(union touch_err_reg) == 4);
  6506. +
  6507. +union touch_data_sz_reg {
  6508. + u32 reg_value;
  6509. + struct {
  6510. + // This value describes the maximum frame size in
  6511. + // 64byte increments.
  6512. + u32 max_frame_size:12;
  6513. +
  6514. + // This value describes the maximum feedback size in
  6515. + // 64byte increments.
  6516. + u32 max_feedback_size:8;
  6517. +
  6518. + // Reserved
  6519. + u32 reserved:12;
  6520. + } fields;
  6521. +};
  6522. +static_assert(sizeof(union touch_data_sz_reg) == 4);
  6523. +
  6524. +enum touch_caps_reg_read_delay_time {
  6525. + TOUCH_CAPS_REG_READ_DELAY_TIME_0,
  6526. + TOUCH_CAPS_REG_READ_DELAY_TIME_10uS,
  6527. + TOUCH_CAPS_REG_READ_DELAY_TIME_50uS,
  6528. + TOUCH_CAPS_REG_READ_DELAY_TIME_100uS,
  6529. + TOUCH_CAPS_REG_READ_DELAY_TIME_150uS,
  6530. + TOUCH_CAPS_REG_READ_DELAY_TIME_250uS,
  6531. + TOUCH_CAPS_REG_READ_DELAY_TIME_500uS,
  6532. + TOUCH_CAPS_REG_READ_DELAY_TIME_1mS,
  6533. +};
  6534. +static_assert(sizeof(enum touch_caps_reg_read_delay_time) == 4);
  6535. +
  6536. +union touch_caps_reg {
  6537. + u32 reg_value;
  6538. + struct {
  6539. + // Reserved for future frequency
  6540. + u32 reserved0:1;
  6541. +
  6542. + // 17 MHz (14 MHz on Atom) Supported
  6543. + // 0b - Not supported, 1b - Supported
  6544. + u32 supported_17Mhz:1;
  6545. +
  6546. + // 30 MHz (25MHz on Atom) Supported
  6547. + // 0b - Not supported, 1b - Supported
  6548. + u32 supported_30Mhz:1;
  6549. +
  6550. + // 50 MHz Supported
  6551. + // 0b - Not supported, 1b - Supported
  6552. + u32 supported_50Mhz:1;
  6553. +
  6554. + // Reserved
  6555. + u32 reserved1:4;
  6556. +
  6557. + // Single I/O Supported
  6558. + // 0b - Not supported, 1b - Supported
  6559. + u32 supported_single_io:1;
  6560. +
  6561. + // Dual I/O Supported
  6562. + // 0b - Not supported, 1b - Supported
  6563. + u32 supported_dual_io:1;
  6564. +
  6565. + // Quad I/O Supported
  6566. + // 0b - Not supported, 1b - Supported
  6567. + u32 supported_quad_io:1;
  6568. +
  6569. + // Bulk Data Area Max Write Size: The amount of data the SPI
  6570. + // Controller can write to the bulk data area before it has to
  6571. + // poll the busy bit. This field is in multiples of 64 bytes.
  6572. + // The SPI Controller will write the amount of data specified
  6573. + // in this field, then check and wait for the Status.Busy bit
  6574. + // to be zero before writing the next data chunk. This field is
  6575. + // 6 bits long, allowing for 4KB of contiguous writes w/o a
  6576. + // poll of the busy bit. If this field is 0x00 the Touch IC has
  6577. + // no limit in the amount of data the SPI Controller can write
  6578. + // to the bulk data area.
  6579. + u32 bulk_data_max_write:6;
  6580. +
  6581. + // Read Delay Timer Value: This field describes the delay the
  6582. + // SPI Controller will initiate when a read interrupt follows
  6583. + // a write data command. Uses values from
  6584. + // TOUCH_CAPS_REG_READ_DELAY_TIME
  6585. + u32 read_delay_timer_value:3;
  6586. +
  6587. + // Reserved
  6588. + u32 reserved2:4;
  6589. +
  6590. + // Maximum Touch Points: A byte value based on the
  6591. + // HID descriptor definition.
  6592. + u32 max_touch_points:8;
  6593. + } fields;
  6594. +};
  6595. +static_assert(sizeof(union touch_caps_reg) == 4);
  6596. +
  6597. +enum touch_cfg_reg_bulk_xfer_size {
  6598. + // Bulk Data Transfer Size is 4 bytes
  6599. + TOUCH_CFG_REG_BULK_XFER_SIZE_4B = 0,
  6600. +
  6601. + // Bulk Data Transfer Size is 8 bytes
  6602. + TOUCH_CFG_REG_BULK_XFER_SIZE_8B,
  6603. +
  6604. + // Bulk Data Transfer Size is 16 bytes
  6605. + TOUCH_CFG_REG_BULK_XFER_SIZE_16B,
  6606. +
  6607. + // Bulk Data Transfer Size is 32 bytes
  6608. + TOUCH_CFG_REG_BULK_XFER_SIZE_32B,
  6609. +
  6610. + // Bulk Data Transfer Size is 64 bytes
  6611. + TOUCH_CFG_REG_BULK_XFER_SIZE_64B,
  6612. +
  6613. + TOUCH_CFG_REG_BULK_XFER_SIZE_MAX
  6614. +};
  6615. +static_assert(sizeof(enum touch_cfg_reg_bulk_xfer_size) == 4);
  6616. +
  6617. +/*
  6618. + * Frequency values used by TOUCH_CFG_REG
  6619. + * and TOUCH_SENSOR_GET_DEVICE_INFO_RSP_DATA.
  6620. + */
  6621. +enum touch_freq {
  6622. + // Reserved value
  6623. + TOUCH_FREQ_RSVD = 0,
  6624. +
  6625. + // Sensor set for 17MHz operation (14MHz on Atom)
  6626. + TOUCH_FREQ_17MHZ,
  6627. +
  6628. + // Sensor set for 30MHz operation (25MHz on Atom)
  6629. + TOUCH_FREQ_30MHZ,
  6630. +
  6631. + // Invalid value
  6632. + TOUCH_FREQ_MAX
  6633. +};
  6634. +static_assert(sizeof(enum touch_freq) == 4);
  6635. +
  6636. +union touch_cfg_reg {
  6637. + u32 reg_value;
  6638. + struct {
  6639. + // Touch Enable (TE): This bit is used as a HW semaphore for
  6640. + // the Touch IC to guarantee to the SPI Controller to that
  6641. + // (when 0) no sensing operations will occur and only the Reset
  6642. + // interrupt will be generated.
  6643. + //
  6644. + // When TE is cleared by the SPI
  6645. + // Controller:
  6646. + // - TICs must flush all output buffers
  6647. + // - TICs must De-assert any pending interrupt
  6648. + // - ME must throw away any partial frame and pending
  6649. + // interrupt must be cleared/not serviced.
  6650. + //
  6651. + // The SPI Controller will only modify the configuration of the
  6652. + // TIC when TE is cleared.
  6653. + // TE is defaulted to 0h on a power-on reset.
  6654. + u32 touch_enable:1;
  6655. +
  6656. + // Data/HID Packet Mode (DHPM)
  6657. + // Raw Data Mode: 0h, HID Packet Mode: 1h
  6658. + u32 dhpm:1;
  6659. +
  6660. + // Bulk Data Transfer Size: This field represents the amount
  6661. + // of data written to the Bulk Data Area
  6662. + // (SPI Offset 0x1000-0x2FFF) in a single SPI write protocol
  6663. + u32 bulk_xfer_size:4;
  6664. +
  6665. + // Frequency Select: Frequency for the TouchIC to run at.
  6666. + // Use values from TOUCH_FREQ
  6667. + u32 freq_select:3;
  6668. +
  6669. + // Reserved
  6670. + u32 reserved:23;
  6671. + } fields;
  6672. +};
  6673. +static_assert(sizeof(union touch_cfg_reg) == 4);
  6674. +
  6675. +enum touch_cmd_reg_code {
  6676. + // No Operation
  6677. + TOUCH_CMD_REG_CODE_NOP = 0,
  6678. +
  6679. + // Soft Reset
  6680. + TOUCH_CMD_REG_CODE_SOFT_RESET,
  6681. +
  6682. + // Prepare All Registers for Read
  6683. + TOUCH_CMD_REG_CODE_PREP_4_READ,
  6684. +
  6685. + // Generate Test Packets according to value in TOUCH_TEST_CTRL_REG
  6686. + TOUCH_CMD_REG_CODE_GEN_TEST_PACKETS,
  6687. +
  6688. + TOUCH_CMD_REG_CODE_MAX
  6689. +};
  6690. +static_assert(sizeof(enum touch_cmd_reg_code) == 4);
  6691. +
  6692. +union touch_cmd_reg {
  6693. + u32 reg_value;
  6694. + struct {
  6695. + // Command Code: See TOUCH_CMD_REG_CODE
  6696. + u32 command_code:8;
  6697. +
  6698. + // Reserved
  6699. + u32 reserved:24;
  6700. + } fields;
  6701. +};
  6702. +static_assert(sizeof(union touch_cmd_reg) == 4);
  6703. +
  6704. +enum touch_pwr_mgmt_ctrl_reg_cmd {
  6705. + // No change to power state
  6706. + TOUCH_PWR_MGMT_CTRL_REG_CMD_NOP = 0,
  6707. +
  6708. + // Sleep - set when the system goes into connected standby
  6709. + TOUCH_PWR_MGMT_CTRL_REG_CMD_SLEEP,
  6710. +
  6711. + // Doze - set after 300 seconds of inactivity
  6712. + TOUCH_PWR_MGMT_CTRL_REG_CMD_DOZE,
  6713. +
  6714. + // Armed - Set by FW when a "finger off" message is
  6715. + // received from the EUs
  6716. + TOUCH_PWR_MGMT_CTRL_REG_CMD_ARMED,
  6717. +
  6718. + // Sensing - not typically set by FW
  6719. + TOUCH_PWR_MGMT_CTRL_REG_CMD_SENSING,
  6720. +
  6721. + // Values will result in no change to the power state of the Touch IC
  6722. + TOUCH_PWR_MGMT_CTRL_REG_CMD_MAX
  6723. +};
  6724. +static_assert(sizeof(enum touch_pwr_mgmt_ctrl_reg_cmd) == 4);
  6725. +
  6726. +union touch_pwr_mgmt_ctrl_reg {
  6727. + u32 reg_value;
  6728. + struct {
  6729. + // Power State Command: See TOUCH_PWR_MGMT_CTRL_REG_CMD
  6730. + u32 pwr_state_cmd:3;
  6731. +
  6732. + // Reserved
  6733. + u32 reserved:29;
  6734. + } fields;
  6735. +};
  6736. +static_assert(sizeof(union touch_pwr_mgmt_ctrl_reg) == 4);
  6737. +
  6738. +union touch_ven_hw_info_reg {
  6739. + u32 reg_value;
  6740. + struct {
  6741. + // Touch Sensor Vendor ID
  6742. + u32 vendor_id:16;
  6743. +
  6744. + // Touch Sensor Device ID
  6745. + u32 device_id:16;
  6746. + } fields;
  6747. +};
  6748. +static_assert(sizeof(union touch_ven_hw_info_reg) == 4);
  6749. +
  6750. +union touch_compat_rev_reg {
  6751. + u32 reg_value;
  6752. +
  6753. + struct {
  6754. + // EDS Minor Revision
  6755. + u8 minor;
  6756. +
  6757. + // EDS Major Revision
  6758. + u8 major;
  6759. +
  6760. + // Interface Revision Number (from EDS)
  6761. + u8 intf_rev;
  6762. +
  6763. + // EU Kernel Compatibility Version - vendor specific value
  6764. + u8 kernel_compat_ver;
  6765. + } fields;
  6766. +};
  6767. +static_assert(sizeof(union touch_compat_rev_reg) == 4);
  6768. +
  6769. +struct touch_reg_block {
  6770. + // 0x00
  6771. + union touch_sts_reg sts_reg;
  6772. +
  6773. + // 0x04
  6774. + union touch_frame_char_reg frame_char_reg;
  6775. +
  6776. + // 0x08
  6777. + union touch_err_reg error_reg;
  6778. +
  6779. + // 0x0C
  6780. + u32 reserved0;
  6781. +
  6782. + // 0x10 - expected value is "$TIC" or 0x43495424
  6783. + u32 id_reg;
  6784. +
  6785. + // 0x14
  6786. + union touch_data_sz_reg data_size_reg;
  6787. +
  6788. + // 0x18
  6789. + union touch_caps_reg caps_reg;
  6790. +
  6791. + // 0x1C
  6792. + union touch_cfg_reg cfg_reg;
  6793. +
  6794. + // 0x20
  6795. + union touch_cmd_reg cmd_reg;
  6796. +
  6797. + // 0x24
  6798. + union touch_pwr_mgmt_ctrl_reg pwm_mgme_ctrl_reg;
  6799. +
  6800. + // 0x28
  6801. + union touch_ven_hw_info_reg ven_hw_info_reg;
  6802. +
  6803. + // 0x2C
  6804. + u32 hw_rev_reg;
  6805. +
  6806. + // 0x30
  6807. + u32 fw_rev_reg;
  6808. +
  6809. + // 0x34
  6810. + union touch_compat_rev_reg compat_rev_reg;
  6811. +
  6812. + // 0x38
  6813. + u32 reserved1;
  6814. +
  6815. + // 0x3C
  6816. + u32 reserved2;
  6817. +};
  6818. +static_assert(sizeof(struct touch_reg_block) == 64);
  6819. +
  6820. +union touch_test_ctrl_reg {
  6821. + u32 reg_value;
  6822. + struct {
  6823. + // Size of Test Frame in Raw Data Mode: This field specifies
  6824. + // the test frame size in raw data mode in multiple of 64 bytes.
  6825. + // For example, if this field value is 16, the test frame size
  6826. + // will be 16x64 = 1K.
  6827. + u32 raw_test_frame_size:16;
  6828. +
  6829. + // Number of Raw Data Frames or HID Report Packets Generation.
  6830. + // This field represents the number of test frames or HID
  6831. + // reports to be generated when test mode is enabled. When
  6832. + // multiple packets/frames are generated, they need be
  6833. + // generated at 100 Hz frequency, i.e. 10ms per packet/frame.
  6834. + u32 num_test_frames:16;
  6835. + } fields;
  6836. +};
  6837. +static_assert(sizeof(union touch_test_ctrl_reg) == 4);
  6838. +
  6839. +/*
  6840. + * The following data structures represent the headers defined in the Data
  6841. + * Structures chapter of the Intel Integrated Touch EDS
  6842. + */
  6843. +
  6844. +// Enumeration used in TOUCH_RAW_DATA_HDR
  6845. +enum touch_raw_data_types {
  6846. + TOUCH_RAW_DATA_TYPE_FRAME = 0,
  6847. +
  6848. + // RawData will be the TOUCH_ERROR struct below
  6849. + TOUCH_RAW_DATA_TYPE_ERROR,
  6850. +
  6851. + // Set when InterruptType is Vendor Data
  6852. + TOUCH_RAW_DATA_TYPE_VENDOR_DATA,
  6853. +
  6854. + TOUCH_RAW_DATA_TYPE_HID_REPORT,
  6855. + TOUCH_RAW_DATA_TYPE_GET_FEATURES,
  6856. + TOUCH_RAW_DATA_TYPE_MAX
  6857. +};
  6858. +static_assert(sizeof(enum touch_raw_data_types) == 4);
  6859. +
  6860. +// Private data structure. Kernels must copy to HID driver buffer
  6861. +struct touch_hid_private_data {
  6862. + u32 transaction_id;
  6863. + u8 reserved[28];
  6864. +};
  6865. +static_assert(sizeof(struct touch_hid_private_data) == 32);
  6866. +
  6867. +// This is the data structure sent from the PCH FW to the EU kernel
  6868. +struct touch_raw_data_hdr {
  6869. + // use values from TOUCH_RAW_DATA_TYPES
  6870. + u32 data_type;
  6871. +
  6872. + // The size in bytes of the raw data read from the sensor, does not
  6873. + // include TOUCH_RAW_DATA_HDR. Will be the sum of all uFrames, or size
  6874. + // of TOUCH_ERROR for if DataType is TOUCH_RAW_DATA_TYPE_ERROR
  6875. + u32 raw_data_size_bytes;
  6876. +
  6877. + // An ID to qualify with the feedback data to track buffer usage
  6878. + u32 buffer_id;
  6879. +
  6880. + // Must match protocol version of the EDS
  6881. + u32 protocol_ver;
  6882. +
  6883. + // Copied from the Compatibility Revision ID Reg
  6884. + u8 kernel_compat_id;
  6885. +
  6886. + // Padding to extend header to full 64 bytes and allow for growth
  6887. + u8 reserved[15];
  6888. +
  6889. + // Private data structure. Kernels must copy to HID driver buffer
  6890. + struct touch_hid_private_data hid_private_data;
  6891. +};
  6892. +static_assert(sizeof(struct touch_raw_data_hdr) == 64);
  6893. +
  6894. +struct touch_raw_data {
  6895. + struct touch_raw_data_hdr header;
  6896. +
  6897. + // used to access the raw data as an array and keep the compilers
  6898. + // happy. Actual size of this array is Header.RawDataSizeBytes
  6899. + u8 raw_data[1];
  6900. +};
  6901. +
  6902. +/*
  6903. + * The following section describes the data passed in TOUCH_RAW_DATA.RawData
  6904. + * when DataType equals TOUCH_RAW_DATA_TYPE_ERROR
  6905. + * Note: This data structure is also applied to HID mode
  6906. + */
  6907. +enum touch_err_types {
  6908. + TOUCH_RAW_DATA_ERROR = 0,
  6909. + TOUCH_RAW_ERROR_MAX
  6910. +};
  6911. +static_assert(sizeof(enum touch_err_types) == 4);
  6912. +
  6913. +union touch_me_fw_error {
  6914. + u32 value;
  6915. + struct {
  6916. + u32 invalid_frame_characteristics:1;
  6917. + u32 microframe_index_invalid:1;
  6918. + u32 reserved:30;
  6919. + } fields;
  6920. +};
  6921. +static_assert(sizeof(union touch_me_fw_error) == 4);
  6922. +
  6923. +struct touch_error {
  6924. + // This must be a value from TOUCH_ERROR_TYPES
  6925. + u8 touch_error_type;
  6926. + u8 reserved[3];
  6927. + union touch_me_fw_error touch_me_fw_error;
  6928. +
  6929. + // Contains the value copied from the Touch Error Reg
  6930. + union touch_err_reg touch_error_register;
  6931. +};
  6932. +static_assert(sizeof(struct touch_error) == 12);
  6933. +
  6934. +// Enumeration used in TOUCH_FEEDBACK_BUFFER
  6935. +enum touch_feedback_cmd_types {
  6936. + TOUCH_FEEDBACK_CMD_TYPE_NONE = 0,
  6937. + TOUCH_FEEDBACK_CMD_TYPE_SOFT_RESET,
  6938. + TOUCH_FEEDBACK_CMD_TYPE_GOTO_ARMED,
  6939. + TOUCH_FEEDBACK_CMD_TYPE_GOTO_SENSING,
  6940. + TOUCH_FEEDBACK_CMD_TYPE_GOTO_SLEEP,
  6941. + TOUCH_FEEDBACK_CMD_TYPE_GOTO_DOZE,
  6942. + TOUCH_FEEDBACK_CMD_TYPE_HARD_RESET,
  6943. + TOUCH_FEEDBACK_CMD_TYPE_MAX
  6944. +};
  6945. +static_assert(sizeof(enum touch_feedback_cmd_types) == 4);
  6946. +
  6947. +// Enumeration used in TOUCH_FEEDBACK_HDR
  6948. +enum touch_feedback_data_types {
  6949. + // This is vendor specific feedback to be written to the sensor
  6950. + TOUCH_FEEDBACK_DATA_TYPE_FEEDBACK = 0,
  6951. +
  6952. + // This is a set features command to be written to the sensor
  6953. + TOUCH_FEEDBACK_DATA_TYPE_SET_FEATURES,
  6954. +
  6955. + // This is a get features command to be written to the sensor
  6956. + TOUCH_FEEDBACK_DATA_TYPE_GET_FEATURES,
  6957. +
  6958. + // This is a HID output report to be written to the sensor
  6959. + TOUCH_FEEDBACK_DATA_TYPE_OUTPUT_REPORT,
  6960. +
  6961. + // This is calibration data to be written to system flash
  6962. + TOUCH_FEEDBACK_DATA_TYPE_STORE_DATA,
  6963. +
  6964. + TOUCH_FEEDBACK_DATA_TYPE_MAX
  6965. +};
  6966. +static_assert(sizeof(enum touch_feedback_data_types) == 4);
  6967. +
  6968. +/*
  6969. + * This is the data structure sent from the EU kernels back to the ME FW.
  6970. + * In addition to "feedback" data, the FW can execute a "command" described by
  6971. + * the command type parameter. Any payload data will always be sent to the TIC
  6972. + * first, then any command will be issued.
  6973. + */
  6974. +struct touch_feedback_hdr {
  6975. + // use values from TOUCH_FEEDBACK_CMD_TYPES
  6976. + u32 feedback_cmd_type;
  6977. +
  6978. + // The amount of data to be written to the sensor,
  6979. + // not including the header
  6980. + u32 payload_size_bytes;
  6981. +
  6982. + // The ID of the raw data buffer that generated this feedback data
  6983. + u32 buffer_id;
  6984. +
  6985. + // Must match protocol version of the EDS
  6986. + u32 protocol_ver;
  6987. +
  6988. + // use values from TOUCH_FEEDBACK_DATA_TYPES. This is not relevant
  6989. + // if PayloadSizeBytes is 0
  6990. + u32 feedback_data_type;
  6991. +
  6992. + // The offset from TOUCH_DATA_WINDOW_OFFSET at which to write the
  6993. + // Payload data. Maximum offset is 0x1EFFF.
  6994. + u32 spi_offest;
  6995. +
  6996. + // Padding to extend header to full 64 bytes and allow for growth
  6997. + u8 reserved[40];
  6998. +};
  6999. +static_assert(sizeof(struct touch_feedback_hdr) == 64);
  7000. +
  7001. +struct touch_feedback_buffer {
  7002. + struct touch_feedback_hdr Header;
  7003. +
  7004. + // used to access the feedback data as an array and keep the compilers
  7005. + // happy. Actual size of this array is Header.PayloadSizeBytes
  7006. + u8 feedback_data[1];
  7007. +};
  7008. +
  7009. +/*
  7010. + * This data structure describes the header prepended to all data
  7011. + * written to the touch IC at the bulk data write
  7012. + * (TOUCH_DATA_WINDOW_OFFSET + TOUCH_FEEDBACK_HDR.SpiOffest) address.
  7013. + */
  7014. +enum touch_write_data_type {
  7015. + TOUCH_WRITE_DATA_TYPE_FW_LOAD = 0,
  7016. + TOUCH_WRITE_DATA_TYPE_DATA_LOAD,
  7017. + TOUCH_WRITE_DATA_TYPE_FEEDBACK,
  7018. + TOUCH_WRITE_DATA_TYPE_SET_FEATURES,
  7019. + TOUCH_WRITE_DATA_TYPE_GET_FEATURES,
  7020. + TOUCH_WRITE_DATA_TYPE_OUTPUT_REPORT,
  7021. + TOUCH_WRITE_DATA_TYPE_NO_DATA_USE_DEFAULTS,
  7022. + TOUCH_WRITE_DATA_TYPE_MAX
  7023. +};
  7024. +static_assert(sizeof(enum touch_write_data_type) == 4);
  7025. +
  7026. +struct touch_write_hdr {
  7027. + // Use values from TOUCH_WRITE_DATA_TYPE
  7028. + u32 write_data_type;
  7029. +
  7030. + // This field designates the amount of data to follow
  7031. + u32 write_data_len;
  7032. +};
  7033. +static_assert(sizeof(struct touch_write_hdr) == 8);
  7034. +
  7035. +struct touch_write_data {
  7036. + struct touch_write_hdr header;
  7037. +
  7038. + // used to access the write data as an array and keep the compilers
  7039. + // happy. Actual size of this array is Header.WriteDataLen
  7040. + u8 write_data[1];
  7041. +};
  7042. +
  7043. +#pragma pack()
  7044. +
  7045. +#endif // _IPTS_SENSOR_REGS_H_
  7046. diff --git a/drivers/misc/ipts/state.h b/drivers/misc/ipts/state.h
  7047. new file mode 100644
  7048. index 000000000000..ef73d28db47c
  7049. --- /dev/null
  7050. +++ b/drivers/misc/ipts/state.h
  7051. @@ -0,0 +1,22 @@
  7052. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  7053. +/*
  7054. + *
  7055. + * Intel Precise Touch & Stylus
  7056. + * Copyright (c) 2016 Intel Corporation
  7057. + *
  7058. + */
  7059. +
  7060. +#ifndef _IPTS_STATE_H_
  7061. +#define _IPTS_STATE_H_
  7062. +
  7063. +// IPTS driver states
  7064. +enum ipts_state {
  7065. + IPTS_STA_NONE,
  7066. + IPTS_STA_INIT,
  7067. + IPTS_STA_RESOURCE_READY,
  7068. + IPTS_STA_HID_STARTED,
  7069. + IPTS_STA_RAW_DATA_STARTED,
  7070. + IPTS_STA_STOPPING
  7071. +};
  7072. +
  7073. +#endif // _IPTS_STATE_H_
  7074. diff --git a/drivers/misc/mei/hw-me-regs.h b/drivers/misc/mei/hw-me-regs.h
  7075. index 9c4042420022..5d63ebba3e9f 100644
  7076. --- a/drivers/misc/mei/hw-me-regs.h
  7077. +++ b/drivers/misc/mei/hw-me-regs.h
  7078. @@ -119,6 +119,7 @@
  7079. #define MEI_DEV_ID_SPT 0x9D3A /* Sunrise Point */
  7080. #define MEI_DEV_ID_SPT_2 0x9D3B /* Sunrise Point 2 */
  7081. +#define MEI_DEV_ID_SPT_4 0x9D3E /* Sunrise Point 4 */
  7082. #define MEI_DEV_ID_SPT_H 0xA13A /* Sunrise Point H */
  7083. #define MEI_DEV_ID_SPT_H_2 0xA13B /* Sunrise Point H 2 */
  7084. diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
  7085. index 41a10e392839..2b93a067cebc 100644
  7086. --- a/drivers/misc/mei/pci-me.c
  7087. +++ b/drivers/misc/mei/pci-me.c
  7088. @@ -86,6 +86,7 @@ static const struct pci_device_id mei_me_pci_tbl[] = {
  7089. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, MEI_ME_PCH8_CFG)},
  7090. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, MEI_ME_PCH8_CFG)},
  7091. + {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_4, MEI_ME_PCH8_CFG)},
  7092. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, MEI_ME_PCH8_SPS_CFG)},
  7093. {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, MEI_ME_PCH8_SPS_CFG)},
  7094. {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_CFG)},
  7095. diff --git a/include/linux/ipts-binary.h b/include/linux/ipts-binary.h
  7096. new file mode 100644
  7097. index 000000000000..98b54d74ff88
  7098. --- /dev/null
  7099. +++ b/include/linux/ipts-binary.h
  7100. @@ -0,0 +1,140 @@
  7101. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  7102. +/*
  7103. + *
  7104. + * Intel Precise Touch & Stylus
  7105. + * Copyright (c) 2016 Intel Corporation
  7106. + *
  7107. + */
  7108. +
  7109. +#ifndef IPTS_BINARY_H
  7110. +#define IPTS_BINARY_H
  7111. +
  7112. +#include <linux/ipts.h>
  7113. +#include <linux/types.h>
  7114. +
  7115. +#define IPTS_BIN_HEADER_VERSION 2
  7116. +
  7117. +#pragma pack(1)
  7118. +
  7119. +// we support 16 output buffers (1:feedback, 15:HID)
  7120. +#define MAX_NUM_OUTPUT_BUFFERS 16
  7121. +
  7122. +enum ipts_bin_res_type {
  7123. + IPTS_BIN_KERNEL,
  7124. + IPTS_BIN_RO_DATA,
  7125. + IPTS_BIN_RW_DATA,
  7126. + IPTS_BIN_SENSOR_FRAME,
  7127. + IPTS_BIN_OUTPUT,
  7128. + IPTS_BIN_DYNAMIC_STATE_HEAP,
  7129. + IPTS_BIN_PATCH_LOCATION_LIST,
  7130. + IPTS_BIN_ALLOCATION_LIST,
  7131. + IPTS_BIN_COMMAND_BUFFER_PACKET,
  7132. + IPTS_BIN_TAG,
  7133. +};
  7134. +
  7135. +struct ipts_bin_header {
  7136. + char str[4];
  7137. + u32 version;
  7138. +
  7139. +#if IPTS_BIN_HEADER_VERSION > 1
  7140. + u32 gfxcore;
  7141. + u32 revid;
  7142. +#endif
  7143. +};
  7144. +
  7145. +struct ipts_bin_alloc {
  7146. + u32 handle;
  7147. + u32 reserved;
  7148. +};
  7149. +
  7150. +struct ipts_bin_alloc_list {
  7151. + u32 num;
  7152. + struct ipts_bin_alloc alloc[];
  7153. +};
  7154. +
  7155. +struct ipts_bin_cmdbuf {
  7156. + u32 size;
  7157. + char data[];
  7158. +};
  7159. +
  7160. +struct ipts_bin_res {
  7161. + u32 handle;
  7162. + enum ipts_bin_res_type type;
  7163. + u32 initialize;
  7164. + u32 aligned_size;
  7165. + u32 size;
  7166. + char data[];
  7167. +};
  7168. +
  7169. +enum ipts_bin_io_buffer_type {
  7170. + IPTS_INPUT,
  7171. + IPTS_OUTPUT,
  7172. + IPTS_CONFIGURATION,
  7173. + IPTS_CALIBRATION,
  7174. + IPTS_FEATURE,
  7175. +};
  7176. +
  7177. +struct ipts_bin_io_header {
  7178. + char str[10];
  7179. + u16 type;
  7180. +};
  7181. +
  7182. +struct ipts_bin_res_list {
  7183. + u32 num;
  7184. + struct ipts_bin_res res[];
  7185. +};
  7186. +
  7187. +struct ipts_bin_patch {
  7188. + u32 index;
  7189. + u32 reserved1[2];
  7190. + u32 alloc_offset;
  7191. + u32 patch_offset;
  7192. + u32 reserved2;
  7193. +};
  7194. +
  7195. +struct ipts_bin_patch_list {
  7196. + u32 num;
  7197. + struct ipts_bin_patch patch[];
  7198. +};
  7199. +
  7200. +struct ipts_bin_guc_wq_info {
  7201. + u32 batch_offset;
  7202. + u32 size;
  7203. + char data[];
  7204. +};
  7205. +
  7206. +struct ipts_bin_bufid_patch {
  7207. + u32 imm_offset;
  7208. + u32 mem_offset;
  7209. +};
  7210. +
  7211. +enum ipts_bin_data_file_flags {
  7212. + IPTS_DATA_FILE_FLAG_NONE = 0,
  7213. + IPTS_DATA_FILE_FLAG_SHARE = 1,
  7214. + IPTS_DATA_FILE_FLAG_ALLOC_CONTIGUOUS = 2,
  7215. +};
  7216. +
  7217. +struct ipts_bin_data_file_info {
  7218. + u32 io_buffer_type;
  7219. + u32 flags;
  7220. + char file_name[MAX_IOCL_FILE_NAME_LEN];
  7221. +};
  7222. +
  7223. +struct ipts_bin_fw_info {
  7224. + char fw_name[MAX_IOCL_FILE_NAME_LEN];
  7225. +
  7226. + // output index. -1 for no use
  7227. + s32 vendor_output;
  7228. +
  7229. + u32 num_of_data_files;
  7230. + struct ipts_bin_data_file_info data_file[];
  7231. +};
  7232. +
  7233. +struct ipts_bin_fw_list {
  7234. + u32 num_of_fws;
  7235. + struct ipts_bin_fw_info fw_info[];
  7236. +};
  7237. +
  7238. +#pragma pack()
  7239. +
  7240. +#endif // IPTS_BINARY_H
  7241. diff --git a/include/linux/ipts-companion.h b/include/linux/ipts-companion.h
  7242. new file mode 100644
  7243. index 000000000000..1f606a5fb5f2
  7244. --- /dev/null
  7245. +++ b/include/linux/ipts-companion.h
  7246. @@ -0,0 +1,30 @@
  7247. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  7248. +/*
  7249. + *
  7250. + * Intel Precise Touch & Stylus
  7251. + * Copyright (c) 2016 Intel Corporation
  7252. + * Copyright (c) 2019 Dorian Stoll
  7253. + *
  7254. + */
  7255. +
  7256. +#ifndef IPTS_COMPANION_H
  7257. +#define IPTS_COMPANION_H
  7258. +
  7259. +#include <linux/firmware.h>
  7260. +#include <linux/ipts-binary.h>
  7261. +
  7262. +struct ipts_companion {
  7263. + unsigned int (*get_quirks)(struct ipts_companion *companion);
  7264. + int (*firmware_request)(struct ipts_companion *companion,
  7265. + const struct firmware **fw,
  7266. + const char *name, struct device *device);
  7267. +
  7268. + struct ipts_bin_fw_info **firmware_config;
  7269. + void *data;
  7270. + const char *name;
  7271. +};
  7272. +
  7273. +int ipts_add_companion(struct ipts_companion *companion);
  7274. +int ipts_remove_companion(struct ipts_companion *companion);
  7275. +
  7276. +#endif // IPTS_COMPANION_H
  7277. diff --git a/include/linux/ipts-gfx.h b/include/linux/ipts-gfx.h
  7278. new file mode 100644
  7279. index 000000000000..cb9d98fe96e4
  7280. --- /dev/null
  7281. +++ b/include/linux/ipts-gfx.h
  7282. @@ -0,0 +1,86 @@
  7283. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  7284. +/*
  7285. + *
  7286. + * Intel Precise Touch & Stylus
  7287. + * Copyright (c) 2016 Intel Corporation
  7288. + *
  7289. + */
  7290. +
  7291. +#ifndef IPTS_GFX_H
  7292. +#define IPTS_GFX_H
  7293. +
  7294. +enum {
  7295. + IPTS_INTERFACE_V1 = 1,
  7296. +};
  7297. +
  7298. +#define IPTS_BUF_FLAG_CONTIGUOUS 0x01
  7299. +
  7300. +#define IPTS_NOTIFY_STA_BACKLIGHT_OFF 0x00
  7301. +#define IPTS_NOTIFY_STA_BACKLIGHT_ON 0x01
  7302. +
  7303. +struct ipts_mapbuffer {
  7304. + u32 size;
  7305. + u32 flags;
  7306. + void *gfx_addr;
  7307. + void *cpu_addr;
  7308. + u64 buf_handle;
  7309. + u64 phy_addr;
  7310. +};
  7311. +
  7312. +struct ipts_wq_info {
  7313. + u64 db_addr;
  7314. + u64 db_phy_addr;
  7315. + u32 db_cookie_offset;
  7316. + u32 wq_size;
  7317. + u64 wq_addr;
  7318. + u64 wq_phy_addr;
  7319. +
  7320. + // head of wq is managed by GPU
  7321. + u64 wq_head_addr;
  7322. + u64 wq_head_phy_addr;
  7323. +
  7324. + // tail of wq is managed by CSME
  7325. + u64 wq_tail_addr;
  7326. + u64 wq_tail_phy_addr;
  7327. +};
  7328. +
  7329. +struct ipts_ops {
  7330. + int (*get_wq_info)(uint64_t gfx_handle,
  7331. + struct ipts_wq_info *wq_info);
  7332. + int (*map_buffer)(uint64_t gfx_handle,
  7333. + struct ipts_mapbuffer *mapbuffer);
  7334. + int (*unmap_buffer)(uint64_t gfx_handle, uint64_t buf_handle);
  7335. +};
  7336. +
  7337. +struct ipts_callback {
  7338. + void (*workload_complete)(void *data);
  7339. + void (*notify_gfx_status)(u32 status, void *data);
  7340. +};
  7341. +
  7342. +struct ipts_connect {
  7343. + // input: Client device for PM setup
  7344. + struct device *client;
  7345. +
  7346. + // input: Callback addresses
  7347. + struct ipts_callback ipts_cb;
  7348. +
  7349. + // input: Callback data
  7350. + void *data;
  7351. +
  7352. + // input: interface version
  7353. + u32 if_version;
  7354. +
  7355. + // output: GFX version
  7356. + u32 gfx_version;
  7357. +
  7358. + // output: GFX handle
  7359. + u64 gfx_handle;
  7360. +
  7361. + // output: GFX ops for IPTS
  7362. + struct ipts_ops ipts_ops;
  7363. +};
  7364. +
  7365. +int ipts_connect(struct ipts_connect *ipts_connect);
  7366. +void ipts_disconnect(uint64_t gfx_handle);
  7367. +
  7368. +#endif // IPTS_GFX_H
  7369. diff --git a/include/linux/ipts.h b/include/linux/ipts.h
  7370. new file mode 100644
  7371. index 000000000000..bfa8e1375926
  7372. --- /dev/null
  7373. +++ b/include/linux/ipts.h
  7374. @@ -0,0 +1,20 @@
  7375. +/* SPDX-License-Identifier: GPL-2.0-or-later */
  7376. +/*
  7377. + *
  7378. + * Intel Precise Touch & Stylus
  7379. + * Copyright (c) 2016 Intel Corporation
  7380. + *
  7381. + */
  7382. +
  7383. +#ifndef IPTS_H
  7384. +#define IPTS_H
  7385. +
  7386. +#include <linux/bits.h>
  7387. +
  7388. +#define MAX_IOCL_FILE_NAME_LEN 80
  7389. +#define MAX_IOCL_FILE_PATH_LEN 256
  7390. +
  7391. +#define IPTS_QUIRK_NONE 0
  7392. +#define IPTS_QUIRK_NO_FEEDBACK BIT(0)
  7393. +
  7394. +#endif // IPTS_H
  7395. --
  7396. 2.25.0