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Update v5.12 patches

Changes:
 - Backport/add fixes for s0ix on AMD devices
 - Rebase onto v5.12.12

Links:
 - kernel: https://github.com/linux-surface/kernel/commit/81416742c58d07213996e0f8f755c675d6e7646d
Maximilian Luz 4 년 전
부모
커밋
7deb5ff4d2

+ 1 - 1
patches/5.12/0001-surface3-oemb.patch

@@ -1,4 +1,4 @@
-From 53fdf62b84f3cb4ad7ce88b7deaf5bcd1f2e8c50 Mon Sep 17 00:00:00 2001
+From 78cdb8bdb0128033729581675f0714eadc58a60f Mon Sep 17 00:00:00 2001
 From: Tsuchiya Yuto <kitakar@gmail.com>
 Date: Sun, 18 Oct 2020 16:42:44 +0900
 Subject: [PATCH] (surface3-oemb) add DMI matches for Surface 3 with broken DMI

+ 28 - 28
patches/5.12/0002-mwifiex.patch

@@ -1,4 +1,4 @@
-From a1af69e4f86bfc6dc6e4c295cfc4f0bbc5171d88 Mon Sep 17 00:00:00 2001
+From 24b83eb4ef4d616d96e190e40279d39201ad7509 Mon Sep 17 00:00:00 2001
 From: Tsuchiya Yuto <kitakar@gmail.com>
 Date: Mon, 28 Sep 2020 17:46:49 +0900
 Subject: [PATCH] mwifiex: pcie: add DMI-based quirk impl for Surface devices
@@ -206,7 +206,7 @@ index 000000000000..5326ae7e5671
 -- 
 2.32.0
 
-From 046ff9de09dd1d6048507ceb38596c427beef6ed Mon Sep 17 00:00:00 2001
+From 6fbc8dfcb90727e124e69504ba97489700f094cc Mon Sep 17 00:00:00 2001
 From: Tsuchiya Yuto <kitakar@gmail.com>
 Date: Tue, 29 Sep 2020 17:25:22 +0900
 Subject: [PATCH] mwifiex: pcie: add reset_d3cold quirk for Surface gen4+
@@ -407,7 +407,7 @@ index 5326ae7e5671..8b9dcb5070d8 100644
 -- 
 2.32.0
 
-From 02e8d9092fc3adfec1fc458b85f97e1242ff1f58 Mon Sep 17 00:00:00 2001
+From b6b4703e08fb3e7ccc43986759a0b4e75e57178b Mon Sep 17 00:00:00 2001
 From: Tsuchiya Yuto <kitakar@gmail.com>
 Date: Tue, 29 Sep 2020 17:32:22 +0900
 Subject: [PATCH] mwifiex: pcie: add reset_wsid quirk for Surface 3
@@ -586,7 +586,7 @@ index 8b9dcb5070d8..3ef7440418e3 100644
 -- 
 2.32.0
 
-From 61ea5fea884ec630890cdef2585cfe6f8f1088dc Mon Sep 17 00:00:00 2001
+From 0de339063bddf7f6060d7008d36773c8e3dab2ad Mon Sep 17 00:00:00 2001
 From: Tsuchiya Yuto <kitakar@gmail.com>
 Date: Wed, 30 Sep 2020 18:08:24 +0900
 Subject: [PATCH] mwifiex: pcie: (OEMB) add quirk for Surface 3 with broken DMI
@@ -648,7 +648,7 @@ index f0a6fa0a7ae5..34dcd84f02a6 100644
 -- 
 2.32.0
 
-From 3ff9b9b558c3c5d5c6027b217abd3367d2424160 Mon Sep 17 00:00:00 2001
+From 18769664a2bdc2152c0bf225e9d1b9af82344b5b Mon Sep 17 00:00:00 2001
 From: Tsuchiya Yuto <kitakar@gmail.com>
 Date: Sun, 4 Oct 2020 00:11:49 +0900
 Subject: [PATCH] mwifiex: pcie: disable bridge_d3 for Surface gen4+
@@ -803,7 +803,7 @@ index 3ef7440418e3..a95ebac06e13 100644
 -- 
 2.32.0
 
-From 32c53b2aa58fa55e9035663a502b4f9940350e11 Mon Sep 17 00:00:00 2001
+From 01b3839b0acab1b5c5df211e4543255164e25e7c Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Tue, 3 Nov 2020 13:28:04 +0100
 Subject: [PATCH] mwifiex: Add quirk resetting the PCI bridge on MS Surface
@@ -970,7 +970,7 @@ index a95ebac06e13..4ec2ae72f632 100644
 -- 
 2.32.0
 
-From 355025949c0a2356686217e20311997f0173e075 Mon Sep 17 00:00:00 2001
+From b7b842f7255845a0b309b75758e3883c1bd5f811 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Thu, 25 Mar 2021 11:33:02 +0100
 Subject: [PATCH] Bluetooth: btusb: Lower passive lescan interval on Marvell
@@ -1006,7 +1006,7 @@ Patchset: mwifiex
  1 file changed, 15 insertions(+)
 
 diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
-index 4a901508e48e..e69ebe224566 100644
+index ddc7b86725cd..22df5fe95678 100644
 --- a/drivers/bluetooth/btusb.c
 +++ b/drivers/bluetooth/btusb.c
 @@ -61,6 +61,7 @@ static struct usb_driver btusb_driver;
@@ -1025,7 +1025,7 @@ index 4a901508e48e..e69ebe224566 100644
  
  	/* Intel Bluetooth devices */
  	{ USB_DEVICE(0x8087, 0x0025), .driver_info = BTUSB_INTEL_NEW |
-@@ -4715,6 +4717,19 @@ static int btusb_probe(struct usb_interface *intf,
+@@ -4717,6 +4719,19 @@ static int btusb_probe(struct usb_interface *intf,
  	if (id->driver_info & BTUSB_MARVELL)
  		hdev->set_bdaddr = btusb_set_bdaddr_marvell;
  
@@ -1048,7 +1048,7 @@ index 4a901508e48e..e69ebe224566 100644
 -- 
 2.32.0
 
-From 1d36d569a4840969c5d3ff611d0524e7bbe89e64 Mon Sep 17 00:00:00 2001
+From 068635d1c18315aace9f52e0fc2f8ee6bc3197a1 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Wed, 11 Nov 2020 12:31:26 +0100
 Subject: [PATCH] mwifiex: Small cleanup for handling virtual interface type
@@ -1149,7 +1149,7 @@ index a2ed268ce0da..789de1b0c5b1 100644
 -- 
 2.32.0
 
-From e79634d8341bddb0d763427cc24ae5b8f47a01e1 Mon Sep 17 00:00:00 2001
+From ba26824ae7da74d236935d7565e2c1d5ee6b196b Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Tue, 10 Nov 2020 12:49:56 +0100
 Subject: [PATCH] mwifiex: Use non-posted PCI register writes
@@ -1206,7 +1206,7 @@ index 8a99e243aff2..84b1d30e07e4 100644
 -- 
 2.32.0
 
-From d54d24de7ce82772016ec4ba62aa2ab8dc6bd3d7 Mon Sep 17 00:00:00 2001
+From cc0e3fd252b6465d7f752a2146bcfcebaaff0dd8 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Wed, 11 Nov 2020 12:44:39 +0100
 Subject: [PATCH] mwifiex: Use function to check whether interface type change
@@ -1439,7 +1439,7 @@ index 789de1b0c5b1..13698818e58a 100644
 -- 
 2.32.0
 
-From df30cc8f92a3e1df13fba2636d88ac0cbfcf0111 Mon Sep 17 00:00:00 2001
+From a3558aa591fe8224b0167d032b1e0a17eca64d0a Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Wed, 11 Nov 2020 13:33:04 +0100
 Subject: [PATCH] mwifiex: Run SET_BSS_MODE when changing from P2P to STATION
@@ -1507,7 +1507,7 @@ index 13698818e58a..f5b9f1d26114 100644
 -- 
 2.32.0
 
-From 8af4d650f127d304f690519c0b8ca5276c88ddab Mon Sep 17 00:00:00 2001
+From 393db9b4217b1df947a3ed5d1e4ddd89145e507f Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Wed, 11 Nov 2020 14:42:54 +0100
 Subject: [PATCH] mwifiex: Use helper function for counting interface types
@@ -1683,7 +1683,7 @@ index f5b9f1d26114..44cff715bf29 100644
 -- 
 2.32.0
 
-From 417cd522f3e9840f5a3e0e7ac7b77dc6f5358c95 Mon Sep 17 00:00:00 2001
+From 1a6f1847d7ddaec7a50489ba9ad25013e091e7f9 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Fri, 26 Mar 2021 15:56:58 +0100
 Subject: [PATCH] mwifiex: Update virtual interface counters right after
@@ -1786,7 +1786,7 @@ index 44cff715bf29..e637129a411f 100644
 -- 
 2.32.0
 
-From 4af5a065e86fe6111e6bb83a7b3c0eca6847a26b Mon Sep 17 00:00:00 2001
+From 902f166952eecffe64051832c4bbc6c8e4f6ccbe Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Wed, 11 Nov 2020 13:42:40 +0100
 Subject: [PATCH] mwifiex: Allow switching interface type from P2P_CLIENT to
@@ -1875,7 +1875,7 @@ index e637129a411f..395573db6405 100644
 -- 
 2.32.0
 
-From 0771b1169c92c44e4f499384210527e7788fbb79 Mon Sep 17 00:00:00 2001
+From aacd991f679ad25fa89d31e51e36a9a00d8b691f Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Fri, 26 Mar 2021 15:31:08 +0100
 Subject: [PATCH] mwifiex: Handle interface type changes from AP to STATION
@@ -1902,7 +1902,7 @@ index 395573db6405..90a757aa0b25 100644
 -- 
 2.32.0
 
-From f1b89e25e105cb029d520c9b5d009af6b9c3a075 Mon Sep 17 00:00:00 2001
+From f4425efbba7120375fd4b6907f655e0b582287aa Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Fri, 26 Mar 2021 15:32:16 +0100
 Subject: [PATCH] mwifiex: Properly initialize private structure on interface
@@ -1957,7 +1957,7 @@ index 90a757aa0b25..0c01d8f9048e 100644
 -- 
 2.32.0
 
-From 8a43562f7ea04a132ce1bdc61b39ef4dfe965efa Mon Sep 17 00:00:00 2001
+From 1916d83912dabc57670cc5587ec52b8bac750c4e Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Sat, 27 Mar 2021 12:19:14 +0100
 Subject: [PATCH] mwifiex: Fix copy-paste mistake when creating virtual
@@ -1989,7 +1989,7 @@ index 0c01d8f9048e..8c472b2d982a 100644
 -- 
 2.32.0
 
-From 9e6c426ce67a4284d9b2670c40328b7aeb2add67 Mon Sep 17 00:00:00 2001
+From a9956324b539ab99683802f8457d13a076777c49 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Sun, 28 Mar 2021 21:10:06 +0200
 Subject: [PATCH] mwifiex: Try waking the firmware until we get an interrupt
@@ -2078,7 +2078,7 @@ index 84b1d30e07e4..88d30ec6d57d 100644
 -- 
 2.32.0
 
-From 0a666190c434c5f4bc6d07bf6c6c0b28a0f3a39f Mon Sep 17 00:00:00 2001
+From 0fad11417f56c18e3f94e24dcee3b96ec58cb09d Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Tue, 13 Apr 2021 14:30:28 +0200
 Subject: [PATCH] mwifiex: Deactive host sleep using HSCFG after it was
@@ -2234,7 +2234,7 @@ index d3a968ef21ef..76db9a7b8199 100644
 -- 
 2.32.0
 
-From cab23dbf7679065f56f6733ff5a45c2624d12c7d Mon Sep 17 00:00:00 2001
+From 816f58d0521cc80532c2006eab6de3d22a8befc8 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Tue, 13 Apr 2021 14:23:05 +0200
 Subject: [PATCH] mwifiex: Add quirk to disable deep sleep with certain
@@ -2337,7 +2337,7 @@ index 6b5d35d9e69f..8e49ebca1847 100644
 -- 
 2.32.0
 
-From 7cbdf8ae348ebad4beca6973a84db03d980e1dd3 Mon Sep 17 00:00:00 2001
+From 011c7440faa4022ce9d8d3e4a834a51eb65afac6 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Wed, 11 Nov 2020 15:17:07 +0100
 Subject: [PATCH] mwifiex: Don't log error on suspend if wake-on-wlan is
@@ -2369,7 +2369,7 @@ index 8c472b2d982a..153025d1b2fa 100644
 -- 
 2.32.0
 
-From d3e8bb853e22d56ba72f5f9467e5c7c6415467fa Mon Sep 17 00:00:00 2001
+From 0fdae3197e841955b5bcb5551666b35de7b6ac97 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Sun, 28 Mar 2021 21:42:54 +0200
 Subject: [PATCH] mwifiex: Log an error on command failure during key-material
@@ -2409,7 +2409,7 @@ index 153025d1b2fa..ef6ce3f63aec 100644
 -- 
 2.32.0
 
-From 030823fd7c579c37a45239304ea53c8e95a4ddf1 Mon Sep 17 00:00:00 2001
+From b5b5ecffb62ed8bb1f90c98f591531df7cfa8cf8 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Tue, 13 Apr 2021 12:44:03 +0200
 Subject: [PATCH] mwifiex: Fix an incorrect comment
@@ -2437,7 +2437,7 @@ index 6696bce56178..b0695432b26a 100644
 -- 
 2.32.0
 
-From 978efebd9008adbf1e22776a667200e8c1b35cb1 Mon Sep 17 00:00:00 2001
+From 73737c011804bd0c2eb3ea6a7a067723777fc226 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Tue, 13 Apr 2021 12:45:59 +0200
 Subject: [PATCH] mwifiex: Send DELBA requests according to spec
@@ -2480,7 +2480,7 @@ index b0695432b26a..9ff2058bcd7e 100644
 -- 
 2.32.0
 
-From 8c8e06efcb5b6ec852b3ba932d6600bfb4ff55e6 Mon Sep 17 00:00:00 2001
+From 66be029ebeb4512cea566c316f8e49de44369f50 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Tue, 13 Apr 2021 12:57:41 +0200
 Subject: [PATCH] mwifiex: Ignore BTCOEX events from the firmware
@@ -2518,7 +2518,7 @@ index 68c63268e2e6..933111a3511c 100644
 -- 
 2.32.0
 
-From 6162c794d8c821273fd4a063973aa3a3d9bc5919 Mon Sep 17 00:00:00 2001
+From 1897d5f10e36ad1691f9f30c8fd60843569c689a Mon Sep 17 00:00:00 2001
 From: Brian Norris <briannorris@chromium.org>
 Date: Fri, 14 May 2021 19:42:27 -0700
 Subject: [PATCH] mwifiex: bring down link before deleting interface

+ 1 - 1
patches/5.12/0003-ath10k.patch

@@ -1,4 +1,4 @@
-From b486ce596ee388c2fbf2669ec08d587d14f02856 Mon Sep 17 00:00:00 2001
+From 5d19a4fb12a225e480059db4229bd8efbe312aec Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Sat, 27 Feb 2021 00:45:52 +0100
 Subject: [PATCH] ath10k: Add module parameters to override board files

+ 2 - 2
patches/5.12/0004-ipts.patch

@@ -1,4 +1,4 @@
-From 4198c5c9f7fd9fc732b33834ecc7e780a2c11be4 Mon Sep 17 00:00:00 2001
+From 7f2e2886fb8478d7a6005f495b92c35c08520ca8 Mon Sep 17 00:00:00 2001
 From: Dorian Stoll <dorian.stoll@tmsp.io>
 Date: Thu, 30 Jul 2020 13:21:53 +0200
 Subject: [PATCH] misc: mei: Add missing IPTS device IDs
@@ -36,7 +36,7 @@ index c3393b383e59..0098f98426c1 100644
 -- 
 2.32.0
 
-From 0ac898fbd3e48b5a4266310c572b8974ea2d71d2 Mon Sep 17 00:00:00 2001
+From 206c095837edd47a26bc58a48fcd0fcef6e7be5e Mon Sep 17 00:00:00 2001
 From: Dorian Stoll <dorian.stoll@tmsp.io>
 Date: Thu, 6 Aug 2020 11:20:41 +0200
 Subject: [PATCH] misc: Add support for Intel Precise Touch & Stylus

+ 2 - 2
patches/5.12/0005-surface-sam-over-hid.patch

@@ -1,4 +1,4 @@
-From 6da49554eeb34beb92b89754f35c93d357dfa486 Mon Sep 17 00:00:00 2001
+From 0d728875e01c8f9848d9f2f19c75d172c28f8732 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Sat, 25 Jul 2020 17:19:53 +0200
 Subject: [PATCH] i2c: acpi: Implement RawBytes read access
@@ -110,7 +110,7 @@ index 8ceaa88dd78f..deceed0d76c6 100644
 -- 
 2.32.0
 
-From b928ebf5c753e8b0d76908d791be3bc69e1476b0 Mon Sep 17 00:00:00 2001
+From a605171b6ffaa2a3b8fc3b948b390b4855cefafe Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Sat, 13 Feb 2021 16:41:18 +0100
 Subject: [PATCH] platform/surface: Add driver for Surface Book 1 dGPU switch

+ 52 - 88
patches/5.12/0006-surface-sam.patch

@@ -1,4 +1,4 @@
-From aa9ba6524556fbb145ad38abce235a511d54e7d7 Mon Sep 17 00:00:00 2001
+From 705b8aab05f2bf30d2f2cdbd5f2c9e7d81cdb933 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Fri, 12 Feb 2021 12:54:34 +0100
 Subject: [PATCH] platform/surface: Set up Surface Aggregator device registry
@@ -396,7 +396,7 @@ index 000000000000..a051d941ad96
 -- 
 2.32.0
 
-From a7ee92df17ee57fc54fee1463e4756add999c9c4 Mon Sep 17 00:00:00 2001
+From 5d55ae5d32efc0b59e25cb71181f330288db77ac Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Fri, 12 Feb 2021 12:54:35 +0100
 Subject: [PATCH] platform/surface: aggregator_registry: Add base device hub
@@ -725,7 +725,7 @@ index a051d941ad96..6c23d75a044c 100644
 -- 
 2.32.0
 
-From 1ad77ad680b032f9031a9048a16c294ebccf51dc Mon Sep 17 00:00:00 2001
+From 18aa896e429ab2ebb6b70bd2c8bc9c4a51a4f09d Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Fri, 12 Feb 2021 12:54:36 +0100
 Subject: [PATCH] platform/surface: aggregator_registry: Add battery subsystem
@@ -814,7 +814,7 @@ index 6c23d75a044c..cde279692842 100644
 -- 
 2.32.0
 
-From 0632d41d8f1d1f416abf6a276738f6925147302f Mon Sep 17 00:00:00 2001
+From 02252ecc039c9a99a8fc8e435353cd2c49e75b08 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Fri, 12 Feb 2021 12:54:37 +0100
 Subject: [PATCH] platform/surface: aggregator_registry: Add platform profile
@@ -916,7 +916,7 @@ index cde279692842..33904613dd4b 100644
 -- 
 2.32.0
 
-From 1bdf9933be6f4d7da027ed7087d24024b4344dfa Mon Sep 17 00:00:00 2001
+From 50f14367387ece2b2f4f08c10aece89865736ac6 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Fri, 12 Feb 2021 12:54:38 +0100
 Subject: [PATCH] platform/surface: aggregator_registry: Add DTX device
@@ -960,7 +960,7 @@ index 33904613dd4b..dc044d06828b 100644
 -- 
 2.32.0
 
-From 058d7a59d391c501170138e6eee8fd9270d7b032 Mon Sep 17 00:00:00 2001
+From 86a4b59f4f29f9957222824a5949a45fa6df1837 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Fri, 12 Feb 2021 12:54:39 +0100
 Subject: [PATCH] platform/surface: aggregator_registry: Add HID subsystem
@@ -1056,7 +1056,7 @@ index dc044d06828b..caee90d135c5 100644
 -- 
 2.32.0
 
-From 3928b25950c4420f62f53f36fa4d0d018f5177f9 Mon Sep 17 00:00:00 2001
+From 65761a80c3038f100e01ec6dfa6e5aadd124360a Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Thu, 11 Feb 2021 21:17:03 +0100
 Subject: [PATCH] platform/surface: Add platform profile driver
@@ -1342,7 +1342,7 @@ index 000000000000..0081b01a5b0f
 -- 
 2.32.0
 
-From 30ba0a7fa5fa8ffebd347613b5f418e929a7386a Mon Sep 17 00:00:00 2001
+From 072a711e20747612cd54ec291950292eede6ec0c Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Thu, 4 Mar 2021 20:05:24 +0100
 Subject: [PATCH] platform/surface: aggregator: Make SSAM_DEFINE_SYNC_REQUEST_x
@@ -1417,7 +1417,7 @@ index 26d13085a117..e519d374c378 100644
  executing the specified request, using the device IDs and controller given
  in the client device. The full list of such macros for client devices is:
 diff --git a/drivers/platform/surface/aggregator/controller.c b/drivers/platform/surface/aggregator/controller.c
-index 89761d3e1a47..88ec47cae5bf 100644
+index d68d51fb24ff..d006a36b2924 100644
 --- a/drivers/platform/surface/aggregator/controller.c
 +++ b/drivers/platform/surface/aggregator/controller.c
 @@ -1750,35 +1750,35 @@ EXPORT_SYMBOL_GPL(ssam_request_sync_with_buffer);
@@ -1721,7 +1721,7 @@ index 02f3e06c0a60..4441ad667c3f 100644
 -- 
 2.32.0
 
-From a6298c49bd907d6ebf3f33b049f89febc6be5f6c Mon Sep 17 00:00:00 2001
+From 6592e46470410ba5f1f184a27904a34765988c81 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Mon, 8 Mar 2021 19:48:17 +0100
 Subject: [PATCH] platform/surface: Add DTX driver
@@ -3216,7 +3216,7 @@ index 000000000000..0833aab0d819
 -- 
 2.32.0
 
-From 2016437480c23131d92ec9d966dc49a3f87ad78d Mon Sep 17 00:00:00 2001
+From a4bbb0f9369da181ed415be4ed2a8d9500e648e0 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Mon, 8 Mar 2021 19:48:18 +0100
 Subject: [PATCH] platform/surface: dtx: Add support for native SSAM devices
@@ -3360,7 +3360,7 @@ index 1301fab0ea14..85451eb94d98 100644
 -- 
 2.32.0
 
-From 8e834adfb98ea0c1cb4660aacdeac4b6c5ceb7e7 Mon Sep 17 00:00:00 2001
+From 5890c643d04cfc741ebabf744415c5f3cc40e687 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Mon, 8 Mar 2021 19:48:19 +0100
 Subject: [PATCH] docs: driver-api: Add Surface DTX driver documentation
@@ -4131,7 +4131,7 @@ index 3917e7363520..da1487d672a8 100644
 -- 
 2.32.0
 
-From 9b42287cd84686e9dabc4631d5c9fa4836f7d773 Mon Sep 17 00:00:00 2001
+From a67067d338253dd9dc952ec413d178fbdedd1df5 Mon Sep 17 00:00:00 2001
 From: Wei Yongjun <weiyongjun1@huawei.com>
 Date: Tue, 9 Mar 2021 13:15:00 +0000
 Subject: [PATCH] platform/surface: aggregator_registry: Make symbol
@@ -4172,7 +4172,7 @@ index cdb4a95af3e8..86cff5fce3cd 100644
 -- 
 2.32.0
 
-From b618934a4995a9e79bcdc1142631cdf54a3eb53c Mon Sep 17 00:00:00 2001
+From 4f6ffb38b6ffaa76e84d814fe4e9785cb66dc084 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Tue, 9 Mar 2021 17:25:50 +0100
 Subject: [PATCH] platform/surface: aggregator_registry: Add support for
@@ -4215,7 +4215,7 @@ index 86cff5fce3cd..eccb9d1007cd 100644
 -- 
 2.32.0
 
-From 0461a5116e9723a5799e435fd22810b1a18d2bfd Mon Sep 17 00:00:00 2001
+From 34e4872204fa0377dec4a21ae6529d9a6e504a6d Mon Sep 17 00:00:00 2001
 From: kernel test robot <lkp@intel.com>
 Date: Fri, 19 Mar 2021 13:19:19 +0800
 Subject: [PATCH] platform/surface: fix semicolon.cocci warnings
@@ -4254,7 +4254,7 @@ index 85451eb94d98..1fedacf74050 100644
 -- 
 2.32.0
 
-From fbd1a5807e882f8e4e65e1fbf06623ebb150fa96 Mon Sep 17 00:00:00 2001
+From 3bcb7dcc312c36be8b4fba448184067322396ddf Mon Sep 17 00:00:00 2001
 From: Dan Carpenter <dan.carpenter@oracle.com>
 Date: Fri, 26 Mar 2021 15:28:48 +0300
 Subject: [PATCH] platform/surface: clean up a variable in surface_dtx_read()
@@ -4287,7 +4287,7 @@ index 1fedacf74050..63ce587e79e3 100644
 -- 
 2.32.0
 
-From 7ebd992f400ab9588f9795f30f3c370fa4b3b7d3 Mon Sep 17 00:00:00 2001
+From a701a79e78c3c33d5890a242f544b320fe5df7b7 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Tue, 6 Apr 2021 01:12:22 +0200
 Subject: [PATCH] platform/surface: aggregator_registry: Give devices time to
@@ -4530,7 +4530,7 @@ index eccb9d1007cd..685d37a7add1 100644
 -- 
 2.32.0
 
-From b305658cafa96eec90ed2fccdbd2b1e7990e7739 Mon Sep 17 00:00:00 2001
+From fb11346712e2ea0f7262975b9c004932554a0b8c Mon Sep 17 00:00:00 2001
 From: Barry Song <song.bao.hua@hisilicon.com>
 Date: Wed, 3 Mar 2021 11:49:15 +1300
 Subject: [PATCH] genirq: Add IRQF_NO_AUTOEN for request_irq/nmi()
@@ -4632,7 +4632,7 @@ index 21ea370fccda..49288e941365 100644
 -- 
 2.32.0
 
-From 2711c67fd4aaa590060f396bab2e1a7a3888b6ac Mon Sep 17 00:00:00 2001
+From fb24cc387d26a18e408c2efa24c2eb0dca01820f Mon Sep 17 00:00:00 2001
 From: Tian Tao <tiantao6@hisilicon.com>
 Date: Wed, 7 Apr 2021 15:00:52 +0800
 Subject: [PATCH] platform/surface: aggregator: move to use request_irq by
@@ -4655,7 +4655,7 @@ Patchset: surface-sam
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/platform/surface/aggregator/controller.c b/drivers/platform/surface/aggregator/controller.c
-index 88ec47cae5bf..69e86cd599d3 100644
+index d006a36b2924..eace5e9374fe 100644
 --- a/drivers/platform/surface/aggregator/controller.c
 +++ b/drivers/platform/surface/aggregator/controller.c
 @@ -2483,7 +2483,8 @@ int ssam_irq_setup(struct ssam_controller *ctrl)
@@ -4679,7 +4679,7 @@ index 88ec47cae5bf..69e86cd599d3 100644
 -- 
 2.32.0
 
-From 5964d8a52ae4a2d8e16e4ce8c076eaba377e5cec Mon Sep 17 00:00:00 2001
+From f0247b4c21e0f19a2b53fe935e6e416cfdb6f9ec Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Wed, 5 May 2021 14:53:45 +0200
 Subject: [PATCH] platform/surface: aggregator: Do not mark interrupt as shared
@@ -4697,7 +4697,7 @@ Patchset: surface-sam
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/drivers/platform/surface/aggregator/controller.c b/drivers/platform/surface/aggregator/controller.c
-index 69e86cd599d3..8a70df60142c 100644
+index eace5e9374fe..a06964aa96e7 100644
 --- a/drivers/platform/surface/aggregator/controller.c
 +++ b/drivers/platform/surface/aggregator/controller.c
 @@ -2483,8 +2483,7 @@ int ssam_irq_setup(struct ssam_controller *ctrl)
@@ -4713,7 +4713,7 @@ index 69e86cd599d3..8a70df60142c 100644
 -- 
 2.32.0
 
-From 149beb79e92f12b75241d317a956847d743587a0 Mon Sep 17 00:00:00 2001
+From a36db39bc9d1a8a4a788f3026bda7938b4ef6dd6 Mon Sep 17 00:00:00 2001
 From: Arnd Bergmann <arnd@arndb.de>
 Date: Fri, 14 May 2021 22:04:36 +0200
 Subject: [PATCH] platform/surface: aggregator: avoid clang
@@ -4772,7 +4772,7 @@ index 4441ad667c3f..6ff9c58b3e17 100644
 -- 
 2.32.0
 
-From 5d495258cd15f59431766d45c06e7a437dd165c0 Mon Sep 17 00:00:00 2001
+From 834367a87cdf964b58ebef030c935cb0686fd8fe Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Thu, 13 May 2021 15:44:37 +0200
 Subject: [PATCH] platform/surface: dtx: Fix poll function
@@ -4825,7 +4825,7 @@ index 63ce587e79e3..5d9b758a99bb 100644
 -- 
 2.32.0
 
-From c01878b3648b032c36b470467c8038a205a923b9 Mon Sep 17 00:00:00 2001
+From ee815c6088c55a34169d88c7cdeef14ffc990f2c Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Sun, 23 May 2021 14:35:37 +0200
 Subject: [PATCH] platform/surface: aggregator_registry: Update comments for
@@ -4866,7 +4866,7 @@ index 685d37a7add1..bdc09305aab7 100644
 -- 
 2.32.0
 
-From fd4c2be4f90e45cd114506ab7fcb25257f9a6a9d Mon Sep 17 00:00:00 2001
+From cabf5525958973f7e9b9af713d1909e1cfca522d Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Sun, 23 May 2021 14:36:36 +0200
 Subject: [PATCH] platform/surface: aggregator_registry: Add support for 13"
@@ -4901,7 +4901,7 @@ index bdc09305aab7..ef83461fa536 100644
 -- 
 2.32.0
 
-From cf2eb9af798e965cf17bfff82cec89e5af17badd Mon Sep 17 00:00:00 2001
+From 8c0ff40737bdd97c2b5b3583e4a447882a7f677c Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Sun, 23 May 2021 14:09:42 +0200
 Subject: [PATCH] platform/surface: aggregator_registry: Consolidate node
@@ -5017,43 +5017,7 @@ index ef83461fa536..4428c4330229 100644
 -- 
 2.32.0
 
-From 8dcc001ab423932eb36c118924177aed3b84142b Mon Sep 17 00:00:00 2001
-From: Maximilian Luz <luzmaximilian@gmail.com>
-Date: Thu, 3 Jun 2021 01:48:36 +0200
-Subject: [PATCH] platform/surface: aggregator: Fix event disable function
-
-Disabling events silently fails due to the wrong command ID being used.
-Instead of the command ID for the disable call, the command ID for the
-enable call was being used. This causes the disable call to enable the
-event instead. As the event is already enabled when we call this
-function, the EC silently drops this command and does nothing.
-
-Use the correct command ID for disabling the event to fix this.
-
-Fixes: c167b9c7e3d6 ("platform/surface: Add Surface Aggregator subsystem")
-Signed-off-by: Maximilian Luz <luzmaximilian@gmail.com>
-Patchset: surface-sam
----
- drivers/platform/surface/aggregator/controller.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/platform/surface/aggregator/controller.c b/drivers/platform/surface/aggregator/controller.c
-index 8a70df60142c..a06964aa96e7 100644
---- a/drivers/platform/surface/aggregator/controller.c
-+++ b/drivers/platform/surface/aggregator/controller.c
-@@ -1907,7 +1907,7 @@ static int ssam_ssh_event_disable(struct ssam_controller *ctrl,
- {
- 	int status;
- 
--	status = __ssam_ssh_event_request(ctrl, reg, reg.cid_enable, id, flags);
-+	status = __ssam_ssh_event_request(ctrl, reg, reg.cid_disable, id, flags);
- 
- 	if (status < 0 && status != -EINVAL) {
- 		ssam_err(ctrl,
--- 
-2.32.0
-
-From c6a118ef4445a83b593fa435440c8b60a11e6f0e Mon Sep 17 00:00:00 2001
+From a7ea4da54ade773160600c6114e81e1f361d00db Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Wed, 10 Mar 2021 23:53:28 +0100
 Subject: [PATCH] HID: Add support for Surface Aggregator Module HID transport
@@ -5111,7 +5075,7 @@ index da1487d672a8..f54b22333ec6 100644
  M:	Maximilian Luz <luzmaximilian@gmail.com>
  L:	platform-driver-x86@vger.kernel.org
 diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
-index 786b71ef7738..26e06097ba08 100644
+index c6a643f4fc5f..a0913a67f614 100644
 --- a/drivers/hid/Kconfig
 +++ b/drivers/hid/Kconfig
 @@ -1206,4 +1206,6 @@ source "drivers/hid/intel-ish-hid/Kconfig"
@@ -5800,7 +5764,7 @@ index 000000000000..4b1a7b57e035
 -- 
 2.32.0
 
-From 8b076986259615b6774eb4a66f6234dc5d6bc902 Mon Sep 17 00:00:00 2001
+From 9b15ccd7a10309119a515d2777710ae60a98a656 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Wed, 10 Mar 2021 23:53:29 +0100
 Subject: [PATCH] HID: surface-hid: Add support for legacy keyboard interface
@@ -6171,7 +6135,7 @@ index 000000000000..0635341bc517
 -- 
 2.32.0
 
-From 73a215fa43a5a14a5f527cc5dbd6e316492c64fe Mon Sep 17 00:00:00 2001
+From a542744c3b32228350be32a704d00568baca1a7f Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Fri, 23 Apr 2021 00:51:22 +0200
 Subject: [PATCH] HID: surface-hid: Fix integer endian conversion
@@ -6210,7 +6174,7 @@ index 7b27ec392232..5571e74abe91 100644
 -- 
 2.32.0
 
-From b62ad9539e19a4dbc5c1cc1762a1227dcd8bd62f Mon Sep 17 00:00:00 2001
+From d7170a0355b4211bd723ffad34f720439c74a186 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Mon, 7 Jun 2021 21:56:22 +0200
 Subject: [PATCH] HID: surface-hid: Fix get-report request
@@ -6251,7 +6215,7 @@ index 3477b31611ae..a3a70e4f3f6c 100644
 -- 
 2.32.0
 
-From d65242c9383c25182014ef5b3876f41af266ae02 Mon Sep 17 00:00:00 2001
+From 9e256dce5b656cfef42774d84e7991917c596782 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Tue, 6 Apr 2021 01:41:25 +0200
 Subject: [PATCH] power: supply: Add battery driver for Surface Aggregator
@@ -7233,7 +7197,7 @@ index 000000000000..4116dd839ecd
 -- 
 2.32.0
 
-From a75110f7757e6f58304ba69b39666380071bf334 Mon Sep 17 00:00:00 2001
+From 3057864b0b88ff4c58bf27910fde283cba4b6fac Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Tue, 6 Apr 2021 01:41:26 +0200
 Subject: [PATCH] power: supply: Add AC driver for Surface Aggregator Module
@@ -7601,7 +7565,7 @@ index 000000000000..c2dd7e604d14
 -- 
 2.32.0
 
-From 4e2c24313751826a0d43a675fc1872477ed9f978 Mon Sep 17 00:00:00 2001
+From 49b76c06e664b71263ad41169b3cfc9f04995c1b Mon Sep 17 00:00:00 2001
 From: Qiheng Lin <linqiheng@huawei.com>
 Date: Sat, 10 Apr 2021 12:12:46 +0800
 Subject: [PATCH] power: supply: surface-battery: Make some symbols static
@@ -7650,7 +7614,7 @@ index 4116dd839ecd..7efa431a62b2 100644
 -- 
 2.32.0
 
-From 96e3f04858f6ebe7b0b580debdfb77c726fffea0 Mon Sep 17 00:00:00 2001
+From ed440fead2c27627fd7f60cabf67b97df468d013 Mon Sep 17 00:00:00 2001
 From: Qiheng Lin <linqiheng@huawei.com>
 Date: Sat, 10 Apr 2021 12:12:49 +0800
 Subject: [PATCH] power: supply: surface-charger: Make symbol
@@ -7689,7 +7653,7 @@ index c2dd7e604d14..81a5b79822c9 100644
 -- 
 2.32.0
 
-From e88360fb44b2a03ef1333aeec9ce4554978c3ca8 Mon Sep 17 00:00:00 2001
+From 672a4bb560c098b6eba85647372f19d56af3f648 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Tue, 4 May 2021 20:00:46 +0200
 Subject: [PATCH] power: supply: surface_battery: Fix battery event handling
@@ -7746,7 +7710,7 @@ index 7efa431a62b2..5ec2e6bb2465 100644
 -- 
 2.32.0
 
-From 77d33f8f3df530bb5434ff1158ba0e9af4f130c5 Mon Sep 17 00:00:00 2001
+From e4d0b4193df0c886ff13c4596725b2f1f3e6a826 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Tue, 11 May 2021 11:24:21 +0200
 Subject: [PATCH] power: supply: surface-charger: Fix type of integer variable
@@ -7778,7 +7742,7 @@ index 81a5b79822c9..a060c36c7766 100644
 -- 
 2.32.0
 
-From d1102ca27b35297c693c73fba75c0eba5ff91d1a Mon Sep 17 00:00:00 2001
+From 0ad21cf6835303634e94c05e537e56e21c110ebe Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Wed, 2 Jun 2021 18:27:21 +0200
 Subject: [PATCH] platform/surface: aggregator: Allow registering notifiers
@@ -8003,7 +7967,7 @@ index 0806796eabcb..cf4bb48a850e 100644
 -- 
 2.32.0
 
-From 1ce295263dfedd7ceddf75b3030a0f940183d0ba Mon Sep 17 00:00:00 2001
+From 6dfa2d8af3defd1ac5bb02f6dd5d4fb748f8b4f4 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Wed, 2 Jun 2021 18:34:48 +0200
 Subject: [PATCH] platform/surface: aggregator: Allow enabling of events
@@ -8204,7 +8168,7 @@ index cf4bb48a850e..7965bdc669c5 100644
 -- 
 2.32.0
 
-From 423299bd5e0e2cba4b71c9aef973232511ebb958 Mon Sep 17 00:00:00 2001
+From 618af4496d5a6dd349a0a8ddab97c81ad5151fe2 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Thu, 3 Jun 2021 00:10:38 +0200
 Subject: [PATCH] platform/surface: aggregator: Update copyright
@@ -8467,7 +8431,7 @@ index 64276fbfa1d5..c3de43edcffa 100644
 -- 
 2.32.0
 
-From 5e9a53c7b99d2dfb18d79d54a4e62043bf230a60 Mon Sep 17 00:00:00 2001
+From b8897a74921a1029d5ad129cbee9f06af9cc8fab Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Wed, 2 Jun 2021 19:29:16 +0200
 Subject: [PATCH] platform/surface: aggregator_cdev: Add support for forwarding
@@ -9157,7 +9121,7 @@ index fbcce04abfe9..4f393fafc235 100644
 -- 
 2.32.0
 
-From 5193133cb761eb9c510849eec9c737369e1d1d3b Mon Sep 17 00:00:00 2001
+From 947d2ea994de1695087c850e98c966151997142f Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Wed, 2 Jun 2021 19:30:42 +0200
 Subject: [PATCH] platform/surface: aggregator_cdev: Allow enabling of events
@@ -9308,7 +9272,7 @@ index 4f393fafc235..08f46b60b151 100644
 -- 
 2.32.0
 
-From ad42eb537c009ac1aeca65197cfaf19bb2cc2beb Mon Sep 17 00:00:00 2001
+From 711acc1b8bcfcd3b8cab67d9c4983ac60b139845 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Wed, 2 Jun 2021 19:38:07 +0200
 Subject: [PATCH] platform/surface: aggregator_cdev: Add lockdep support
@@ -9401,7 +9365,7 @@ index 55bf55c93624..2cad4147645c 100644
 -- 
 2.32.0
 
-From 48656994a93e65ff6b4824ce5d79af45aabd1f51 Mon Sep 17 00:00:00 2001
+From 5ca6fc2eb261a49cf53541ae3fb0356cd39afcbc Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Fri, 4 Jun 2021 22:28:41 +0200
 Subject: [PATCH] platform/surface: aggregator: Fixups for user-space event
@@ -9856,7 +9820,7 @@ index 2cad4147645c..30fb50fde450 100644
 -- 
 2.32.0
 
-From 46978343e05c504486c67d342f35573df6fd591c Mon Sep 17 00:00:00 2001
+From 93850912c8a826f921faa20e08e381a2fb78ff24 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Fri, 4 Jun 2021 22:56:38 +0200
 Subject: [PATCH] platform/surface: aggregator: Do not return uninitialized
@@ -9890,7 +9854,7 @@ index 6646f4d6e10d..634399387d76 100644
 -- 
 2.32.0
 
-From e44c8c583d3c9c9b5355ca7c44c221bf85bcecff Mon Sep 17 00:00:00 2001
+From 999f8213f981f3f1e82b576df493c9af5d2d28d0 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Fri, 4 Jun 2021 23:00:47 +0200
 Subject: [PATCH] platform/surface: aggregator: Drop unnecessary variable
@@ -9921,7 +9885,7 @@ index 634399387d76..b8c377b3f932 100644
 -- 
 2.32.0
 
-From 8f01e661f7641cc6c05c9d9b3871eccace71f4e8 Mon Sep 17 00:00:00 2001
+From a25476d14a796cc971820e5968d183dcfa11a4a5 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Wed, 2 Jun 2021 20:07:47 +0200
 Subject: [PATCH] docs: driver-api: Update Surface Aggregator user-space
@@ -10099,7 +10063,7 @@ index 248c1372d879..0134a841a079 100644
 -- 
 2.32.0
 
-From d66ed484a5779839b96d682bd78cde64ded68871 Mon Sep 17 00:00:00 2001
+From a7b33c2ec4bb9199c8a285493d48ca77e3c03f60 Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Wed, 5 May 2021 18:22:04 +0200
 Subject: [PATCH] pinctrl/amd: Add device HID for new AMD GPIO controller
@@ -10131,7 +10095,7 @@ index 2d4acf21117c..c5950a3b4e4c 100644
 -- 
 2.32.0
 
-From 4d854c0a30b9d8172bf15d885253ec387a152022 Mon Sep 17 00:00:00 2001
+From a952bcef7239e31c9d0ee71b07a45a26c0233a83 Mon Sep 17 00:00:00 2001
 From: Sachi King <nakato@nakato.io>
 Date: Sat, 29 May 2021 17:47:38 +1000
 Subject: [PATCH] ACPI: Add quirk for Surface Laptop 4 AMD missing irq 7
@@ -10198,7 +10162,7 @@ index 14cd3186dc77..ab3ba60cb6da 100644
 -- 
 2.32.0
 
-From aa5da92fb04d3aca18dc7d3825091e9425e5d26a Mon Sep 17 00:00:00 2001
+From b5b68a72b2ed7d4112a1db7db5843d78adc031eb Mon Sep 17 00:00:00 2001
 From: Maximilian Luz <luzmaximilian@gmail.com>
 Date: Thu, 3 Jun 2021 14:04:26 +0200
 Subject: [PATCH] ACPI: Add AMD 13" Surface Laptop 4 model to irq 7 override
@@ -10240,7 +10204,7 @@ index ab3ba60cb6da..fa1dcdd119e5 100644
 -- 
 2.32.0
 
-From f14656bc0fd393f4e3fc1082005336600fc8f07a Mon Sep 17 00:00:00 2001
+From fb2baa4b6adb5637ecc427265a8ea2467549a788 Mon Sep 17 00:00:00 2001
 From: Sachi King <nakato@nakato.io>
 Date: Sat, 29 May 2021 22:27:25 +1000
 Subject: [PATCH] platform/x86: amd-pmc: Add device HID for AMD PMC

+ 13 - 13
patches/5.12/0007-surface-typecover.patch

@@ -1,4 +1,4 @@
-From 370b6f17fa38410c60b3e01060196610039d5945 Mon Sep 17 00:00:00 2001
+From 374704adea41017c7a87e54e3ddec2f979cb146c Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Jonas=20Dre=C3=9Fler?= <verdre@v0yd.nl>
 Date: Thu, 5 Nov 2020 13:09:45 +0100
 Subject: [PATCH] hid/multitouch: Turn off Type Cover keyboard backlight when
@@ -34,7 +34,7 @@ Patchset: surface-typecover
  1 file changed, 98 insertions(+), 2 deletions(-)
 
 diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multitouch.c
-index 55dcb8536286..35d9c08cd18e 100644
+index 2e4fb76c45f3..d7a27d891fba 100644
 --- a/drivers/hid/hid-multitouch.c
 +++ b/drivers/hid/hid-multitouch.c
 @@ -34,7 +34,10 @@
@@ -56,11 +56,11 @@ index 55dcb8536286..35d9c08cd18e 100644
  
  /* quirks to control the device */
  #define MT_QUIRK_NOT_SEEN_MEANS_UP	BIT(0)
-@@ -70,12 +74,15 @@ MODULE_LICENSE("GPL");
- #define MT_QUIRK_WIN8_PTP_BUTTONS	BIT(18)
+@@ -71,12 +75,15 @@ MODULE_LICENSE("GPL");
  #define MT_QUIRK_SEPARATE_APP_REPORT	BIT(19)
  #define MT_QUIRK_FORCE_MULTI_INPUT	BIT(20)
-+#define MT_QUIRK_HAS_TYPE_COVER_BACKLIGHT	BIT(21)
+ #define MT_QUIRK_DISABLE_WAKEUP		BIT(21)
++#define MT_QUIRK_HAS_TYPE_COVER_BACKLIGHT	BIT(22)
  
  #define MT_INPUTMODE_TOUCHSCREEN	0x02
  #define MT_INPUTMODE_TOUCHPAD		0x03
@@ -72,7 +72,7 @@ index 55dcb8536286..35d9c08cd18e 100644
  enum latency_mode {
  	HID_LATENCY_NORMAL = 0,
  	HID_LATENCY_HIGH = 1,
-@@ -167,6 +174,8 @@ struct mt_device {
+@@ -168,6 +175,8 @@ struct mt_device {
  
  	struct list_head applications;
  	struct list_head reports;
@@ -81,7 +81,7 @@ index 55dcb8536286..35d9c08cd18e 100644
  };
  
  static void mt_post_parse_default_settings(struct mt_device *td,
-@@ -208,6 +217,7 @@ static void mt_post_parse(struct mt_device *td, struct mt_application *app);
+@@ -210,6 +219,7 @@ static void mt_post_parse(struct mt_device *td, struct mt_application *app);
  #define MT_CLS_GOOGLE				0x0111
  #define MT_CLS_RAZER_BLADE_STEALTH		0x0112
  #define MT_CLS_SMART_TECH			0x0113
@@ -89,7 +89,7 @@ index 55dcb8536286..35d9c08cd18e 100644
  
  #define MT_DEFAULT_MAXCONTACT	10
  #define MT_MAX_MAXCONTACT	250
-@@ -367,6 +377,16 @@ static const struct mt_class mt_classes[] = {
+@@ -378,6 +388,16 @@ static const struct mt_class mt_classes[] = {
  			MT_QUIRK_CONTACT_CNT_ACCURATE |
  			MT_QUIRK_SEPARATE_APP_REPORT,
  	},
@@ -106,7 +106,7 @@ index 55dcb8536286..35d9c08cd18e 100644
  	{ }
  };
  
-@@ -1678,6 +1698,69 @@ static void mt_expired_timeout(struct timer_list *t)
+@@ -1690,6 +1710,69 @@ static void mt_expired_timeout(struct timer_list *t)
  	clear_bit(MT_IO_FLAGS_RUNNING, &td->mt_io_flags);
  }
  
@@ -176,7 +176,7 @@ index 55dcb8536286..35d9c08cd18e 100644
  static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)
  {
  	int ret, i;
-@@ -1701,6 +1784,9 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)
+@@ -1713,6 +1796,9 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)
  	td->inputmode_value = MT_INPUTMODE_TOUCHSCREEN;
  	hid_set_drvdata(hdev, td);
  
@@ -186,7 +186,7 @@ index 55dcb8536286..35d9c08cd18e 100644
  	INIT_LIST_HEAD(&td->applications);
  	INIT_LIST_HEAD(&td->reports);
  
-@@ -1730,15 +1816,19 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)
+@@ -1742,15 +1828,19 @@ static int mt_probe(struct hid_device *hdev, const struct hid_device_id *id)
  	timer_setup(&td->release_timer, mt_expired_timeout, 0);
  
  	ret = hid_parse(hdev);
@@ -208,7 +208,7 @@ index 55dcb8536286..35d9c08cd18e 100644
  
  	ret = sysfs_create_group(&hdev->dev.kobj, &mt_attribute_group);
  	if (ret)
-@@ -1783,6 +1873,7 @@ static void mt_remove(struct hid_device *hdev)
+@@ -1801,6 +1891,7 @@ static void mt_remove(struct hid_device *hdev)
  {
  	struct mt_device *td = hid_get_drvdata(hdev);
  
@@ -216,7 +216,7 @@ index 55dcb8536286..35d9c08cd18e 100644
  	del_timer_sync(&td->release_timer);
  
  	sysfs_remove_group(&hdev->dev.kobj, &mt_attribute_group);
-@@ -2134,6 +2225,11 @@ static const struct hid_device_id mt_devices[] = {
+@@ -2158,6 +2249,11 @@ static const struct hid_device_id mt_devices[] = {
  		MT_USB_DEVICE(USB_VENDOR_ID_XIROKU,
  			USB_DEVICE_ID_XIROKU_CSR2) },
  

+ 4 - 4
patches/5.12/0008-surface-go-touchscreen.patch

@@ -1,4 +1,4 @@
-From 47e6f843845c9c88762384c6481770fd8d6128f2 Mon Sep 17 00:00:00 2001
+From cf5d037ad71fa27be3081f5905210ac7a067fe5b Mon Sep 17 00:00:00 2001
 From: Zoltan Tamas Vajda <zoltan.tamas.vajda@gmail.com>
 Date: Thu, 3 Jun 2021 10:50:55 +0200
 Subject: [PATCH] Added quirk for Surface Go touchscreen
@@ -10,10 +10,10 @@ Patchset: surface-go-touchscreen
  2 files changed, 3 insertions(+)
 
 diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
-index ba338973e968..bb976bb1b1c0 100644
+index 03978111d944..06168f485722 100644
 --- a/drivers/hid/hid-ids.h
 +++ b/drivers/hid/hid-ids.h
-@@ -396,6 +396,7 @@
+@@ -397,6 +397,7 @@
  #define USB_DEVICE_ID_HP_X2_10_COVER	0x0755
  #define I2C_DEVICE_ID_HP_SPECTRE_X360_15	0x2817
  #define USB_DEVICE_ID_ASUS_UX550_TOUCHSCREEN	0x2706
@@ -22,7 +22,7 @@ index ba338973e968..bb976bb1b1c0 100644
  #define USB_VENDOR_ID_ELECOM		0x056e
  #define USB_DEVICE_ID_ELECOM_BM084	0x0061
 diff --git a/drivers/hid/hid-input.c b/drivers/hid/hid-input.c
-index 236bccd37760..cc16f29e27a4 100644
+index e982d8173c9c..f7d482619dfd 100644
 --- a/drivers/hid/hid-input.c
 +++ b/drivers/hid/hid-input.c
 @@ -326,6 +326,8 @@ static const struct hid_device_id hid_battery_quirks[] = {

+ 14 - 14
patches/5.12/0009-cameras.patch

@@ -1,4 +1,4 @@
-From b9e19b0b6e124089493b681d1483136db2022bb9 Mon Sep 17 00:00:00 2001
+From 6dda1b86d10073ccb88d3cc3010bd90fc8d9d31d Mon Sep 17 00:00:00 2001
 From: Daniel Scally <djrscally@gmail.com>
 Date: Thu, 20 May 2021 15:09:21 +0100
 Subject: [PATCH] ACPI: scan: Extend acpi_walk_dep_device_list()
@@ -380,7 +380,7 @@ index 3bdcfc4401b7..c2da6b8939c0 100644
 -- 
 2.32.0
 
-From e06f8f0f2a1bd608389e64d3b8a522b489f81074 Mon Sep 17 00:00:00 2001
+From 30f1a3cc3abf1f2d2506769639570a66308e545d Mon Sep 17 00:00:00 2001
 From: Daniel Scally <djrscally@gmail.com>
 Date: Thu, 20 May 2021 15:09:22 +0100
 Subject: [PATCH] ACPI: scan: Add function to fetch dependent of acpi device
@@ -470,7 +470,7 @@ index 849f3540ed53..b531750eb422 100644
 -- 
 2.32.0
 
-From eea44ffc2a013c8cdb74369e285267097f33cd7e Mon Sep 17 00:00:00 2001
+From ebbb8f7b5a02e0f0f950d8cca295b382889187b3 Mon Sep 17 00:00:00 2001
 From: Daniel Scally <djrscally@gmail.com>
 Date: Thu, 20 May 2021 15:09:23 +0100
 Subject: [PATCH] i2c: core: Add a format macro for I2C device names
@@ -531,7 +531,7 @@ index a670ae129f4b..a2f6ee71b5be 100644
 -- 
 2.32.0
 
-From 05033ca6a674cf9b3458c60554f291e230ad1e4d Mon Sep 17 00:00:00 2001
+From d9fe6b91aa76165eb257c382e7d2700a6da91edf Mon Sep 17 00:00:00 2001
 From: Daniel Scally <djrscally@gmail.com>
 Date: Thu, 20 May 2021 15:09:24 +0100
 Subject: [PATCH] gpiolib: acpi: Export acpi_get_gpiod()
@@ -608,7 +608,7 @@ index c73b25bc9213..566feb56601f 100644
 -- 
 2.32.0
 
-From c8a871b6624792a90f4cff8cc5ce780b336d792f Mon Sep 17 00:00:00 2001
+From 057d80f3715a60e2850f93e9784f69e5f761005d Mon Sep 17 00:00:00 2001
 From: Daniel Scally <djrscally@gmail.com>
 Date: Thu, 20 May 2021 15:09:25 +0100
 Subject: [PATCH] clkdev: Make clkdev_drop() null aware
@@ -640,7 +640,7 @@ index 0f2e3fcf0f19..c082720f8ade 100644
 -- 
 2.32.0
 
-From 1827f31fb7296824ad962949f72f6e9b6643d41f Mon Sep 17 00:00:00 2001
+From 0d02febaf7b2b79cfb426c1daa1dbd24199dae57 Mon Sep 17 00:00:00 2001
 From: Daniel Scally <djrscally@gmail.com>
 Date: Thu, 20 May 2021 15:09:26 +0100
 Subject: [PATCH] gpiolib: acpi: Add acpi_gpio_get_io_resource()
@@ -717,7 +717,7 @@ index c2da6b8939c0..07a0044397e1 100644
 -- 
 2.32.0
 
-From fe854563d2a5b930b64758699cdceb84b5871a58 Mon Sep 17 00:00:00 2001
+From 20b77bf6987805ddd9f302c73bcbeae969b34971 Mon Sep 17 00:00:00 2001
 From: Daniel Scally <djrscally@gmail.com>
 Date: Thu, 20 May 2021 15:09:27 +0100
 Subject: [PATCH] platform/x86: Add intel_skl_int3472 driver
@@ -1818,7 +1818,7 @@ index 000000000000..843eaa27e9da
 -- 
 2.32.0
 
-From f857d90d27f18521dd936d3bee7d6d3785b6045b Mon Sep 17 00:00:00 2001
+From 808b78ceece4561bc354ab6e32ba1ebd53e4c4de Mon Sep 17 00:00:00 2001
 From: Daniel Scally <djrscally@gmail.com>
 Date: Thu, 20 May 2021 15:09:28 +0100
 Subject: [PATCH] mfd: tps68470: Remove tps68470 MFD driver
@@ -2014,7 +2014,7 @@ index 4a4df4ffd18c..000000000000
 -- 
 2.32.0
 
-From 32d081d6da931f1ad2d67aadc08f33953f8ebb95 Mon Sep 17 00:00:00 2001
+From 8f808256be49fd5436b8a75a7ea779be7ba563ec Mon Sep 17 00:00:00 2001
 From: Daniel Scally <djrscally@gmail.com>
 Date: Mon, 5 Apr 2021 23:56:53 +0100
 Subject: [PATCH] media: ipu3-cio2: Toggle sensor streaming in pm runtime ops
@@ -2074,7 +2074,7 @@ index fecef85bd62e..9dafb9470708 100644
 -- 
 2.32.0
 
-From fe3d26934cc8ac8d8dba7c5934c55ccfb3f1ebb8 Mon Sep 17 00:00:00 2001
+From 3235cd4bee7864c7cf0ba1daf96df8a8afa852d8 Mon Sep 17 00:00:00 2001
 From: Daniel Scally <djrscally@gmail.com>
 Date: Mon, 5 Apr 2021 23:56:54 +0100
 Subject: [PATCH] media: i2c: Add support for ov5693 sensor
@@ -3717,7 +3717,7 @@ index 000000000000..da2ca99a7ad3
 -- 
 2.32.0
 
-From f0972bd88b2f391f20a4b91ddd1c0e9c745e45b3 Mon Sep 17 00:00:00 2001
+From 3c24026519e47ee51806119e64b44b601920c6c9 Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Fabian=20W=C3=BCthrich?= <me@fabwu.ch>
 Date: Fri, 22 Jan 2021 20:58:13 +0100
 Subject: [PATCH] cio2-bridge: Parse sensor orientation and rotation
@@ -3880,7 +3880,7 @@ index dd0ffcafa489..924d99d20328 100644
 -- 
 2.32.0
 
-From 8a4acd725e11a5132494342ae07c00a91fa1025d Mon Sep 17 00:00:00 2001
+From 542b57aed4feeba4a350785626bcf338fd3b4b5a Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Fabian=20W=C3=BCthrich?= <me@fabwu.ch>
 Date: Sun, 24 Jan 2021 11:07:42 +0100
 Subject: [PATCH] cio2-bridge: Use macros and add warnings
@@ -3984,7 +3984,7 @@ index 924d99d20328..e1e388cc9f45 100644
 -- 
 2.32.0
 
-From 88edf97e89eca8f406929ff258a96bd6a36c558c Mon Sep 17 00:00:00 2001
+From 98b16c2a92727ecde728679eedacb3d442c5bf2c Mon Sep 17 00:00:00 2001
 From: =?UTF-8?q?Fabian=20W=C3=BCthrich?= <me@fabwu.ch>
 Date: Thu, 6 May 2021 07:52:44 +0200
 Subject: [PATCH] cio2-bridge: Use correct dev_properties size
@@ -4010,7 +4010,7 @@ index e1e388cc9f45..deaf5804f70d 100644
 -- 
 2.32.0
 
-From c15c869334981b6394a7087f3a612d87d4966c69 Mon Sep 17 00:00:00 2001
+From 9a61bbfc118edbc63f1c8d1b67d009b8b1222188 Mon Sep 17 00:00:00 2001
 From: Daniel Scally <djrscally@gmail.com>
 Date: Thu, 20 May 2021 23:31:04 +0100
 Subject: [PATCH] media: i2c: Fix vertical flip in ov5693

+ 1228 - 0
patches/5.12/0010-s0ix-amd.patch

@@ -0,0 +1,1228 @@
+From e383cca0273be5de8be1b459e65e123fb09f5460 Mon Sep 17 00:00:00 2001
+From: Mario Limonciello <mario.limonciello@amd.com>
+Date: Wed, 12 May 2021 17:15:14 -0500
+Subject: [PATCH] ACPI: processor idle: Fix up C-state latency if not ordered
+
+Generally, the C-state latency is provided by the _CST method or
+FADT, but some OEM platforms using AMD Picasso, Renoir, Van Gogh,
+and Cezanne set the C2 latency greater than C3's which causes the
+C2 state to be skipped.
+
+That will block the core entering PC6, which prevents S0ix working
+properly on Linux systems.
+
+In other operating systems, the latency values are not validated and
+this does not cause problems by skipping states.
+
+To avoid this issue on Linux, detect when latencies are not an
+arithmetic progression and sort them.
+
+Link: https://gitlab.freedesktop.org/agd5f/linux/-/commit/026d186e4592c1ee9c1cb44295912d0294508725
+Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1230#note_712174
+Suggested-by: Prike Liang <Prike.Liang@amd.com>
+Suggested-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+[ rjw: Subject and changelog edits ]
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Patchset: s0ix-amd
+---
+ drivers/acpi/processor_idle.c | 40 +++++++++++++++++++++++++++++++++++
+ 1 file changed, 40 insertions(+)
+
+diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
+index 4e2d76b8b697..6790df5a2462 100644
+--- a/drivers/acpi/processor_idle.c
++++ b/drivers/acpi/processor_idle.c
+@@ -16,6 +16,7 @@
+ #include <linux/acpi.h>
+ #include <linux/dmi.h>
+ #include <linux/sched.h>       /* need_resched() */
++#include <linux/sort.h>
+ #include <linux/tick.h>
+ #include <linux/cpuidle.h>
+ #include <linux/cpu.h>
+@@ -388,10 +389,37 @@ static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
+ 	return;
+ }
+ 
++static int acpi_cst_latency_cmp(const void *a, const void *b)
++{
++	const struct acpi_processor_cx *x = a, *y = b;
++
++	if (!(x->valid && y->valid))
++		return 0;
++	if (x->latency > y->latency)
++		return 1;
++	if (x->latency < y->latency)
++		return -1;
++	return 0;
++}
++static void acpi_cst_latency_swap(void *a, void *b, int n)
++{
++	struct acpi_processor_cx *x = a, *y = b;
++	u32 tmp;
++
++	if (!(x->valid && y->valid))
++		return;
++	tmp = x->latency;
++	x->latency = y->latency;
++	y->latency = tmp;
++}
++
+ static int acpi_processor_power_verify(struct acpi_processor *pr)
+ {
+ 	unsigned int i;
+ 	unsigned int working = 0;
++	unsigned int last_latency = 0;
++	unsigned int last_type = 0;
++	bool buggy_latency = false;
+ 
+ 	pr->power.timer_broadcast_on_state = INT_MAX;
+ 
+@@ -415,12 +443,24 @@ static int acpi_processor_power_verify(struct acpi_processor *pr)
+ 		}
+ 		if (!cx->valid)
+ 			continue;
++		if (cx->type >= last_type && cx->latency < last_latency)
++			buggy_latency = true;
++		last_latency = cx->latency;
++		last_type = cx->type;
+ 
+ 		lapic_timer_check_state(i, pr, cx);
+ 		tsc_check_state(cx->type);
+ 		working++;
+ 	}
+ 
++	if (buggy_latency) {
++		pr_notice("FW issue: working around C-state latencies out of order\n");
++		sort(&pr->power.states[1], max_cstate,
++		     sizeof(struct acpi_processor_cx),
++		     acpi_cst_latency_cmp,
++		     acpi_cst_latency_swap);
++	}
++
+ 	lapic_timer_propagate_broadcast(pr);
+ 
+ 	return (working);
+-- 
+2.32.0
+
+From d8497dd616e71c0a959b47ac91624cf22570527d Mon Sep 17 00:00:00 2001
+From: Marcin Bachry <hegel666@gmail.com>
+Date: Tue, 16 Mar 2021 15:28:51 -0400
+Subject: [PATCH] PCI: quirks: Quirk PCI d3hot delay for AMD xhci
+
+Renoir needs a similar delay.
+
+Signed-off-by: Marcin Bachry <hegel666@gmail.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Patchset: s0ix-amd
+---
+ drivers/pci/quirks.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
+index 653660e3ba9e..36e5ec670fae 100644
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -1904,6 +1904,9 @@ static void quirk_ryzen_xhci_d3hot(struct pci_dev *dev)
+ }
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e0, quirk_ryzen_xhci_d3hot);
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x15e1, quirk_ryzen_xhci_d3hot);
++/* Renoir XHCI requires longer delay when transitioning from D0 to
++ * D3hot */
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1639, quirk_ryzen_xhci_d3hot);
+ 
+ #ifdef CONFIG_X86_IO_APIC
+ static int dmi_disable_ioapicreroute(const struct dmi_system_id *d)
+-- 
+2.32.0
+
+From bcacb7c52413f7f8a29512817fa4f21982a64c2a Mon Sep 17 00:00:00 2001
+From: Mario Limonciello <mario.limonciello@amd.com>
+Date: Fri, 28 May 2021 11:02:34 -0500
+Subject: [PATCH] nvme-pci: look for StorageD3Enable on companion ACPI device
+ instead
+
+The documentation around the StorageD3Enable property hints that it
+should be made on the PCI device.  This is where newer AMD systems set
+the property and it's required for S0i3 support.
+
+So rather than look for nodes of the root port only present on Intel
+systems, switch to the companion ACPI device for all systems.
+David Box from Intel indicated this should work on Intel as well.
+
+Link: https://lore.kernel.org/linux-nvme/YK6gmAWqaRmvpJXb@google.com/T/#m900552229fa455867ee29c33b854845fce80ba70
+Link: https://docs.microsoft.com/en-us/windows-hardware/design/component-guidelines/power-management-for-storage-hardware-devices-intro
+Fixes: df4f9bc4fb9c ("nvme-pci: add support for ACPI StorageD3Enable property")
+Suggested-by: Liang Prike <Prike.Liang@amd.com>
+Acked-by: Raul E Rangel <rrangel@chromium.org>
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+Reviewed-by: David E. Box <david.e.box@linux.intel.com>
+Signed-off-by: Christoph Hellwig <hch@lst.de>
+Patchset: s0ix-amd
+---
+ drivers/nvme/host/pci.c | 24 +-----------------------
+ 1 file changed, 1 insertion(+), 23 deletions(-)
+
+diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
+index c92a15c3fbc5..60c1c83e03fa 100644
+--- a/drivers/nvme/host/pci.c
++++ b/drivers/nvme/host/pci.c
+@@ -2834,10 +2834,7 @@ static unsigned long check_vendor_combination_bug(struct pci_dev *pdev)
+ #ifdef CONFIG_ACPI
+ static bool nvme_acpi_storage_d3(struct pci_dev *dev)
+ {
+-	struct acpi_device *adev;
+-	struct pci_dev *root;
+-	acpi_handle handle;
+-	acpi_status status;
++	struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
+ 	u8 val;
+ 
+ 	/*
+@@ -2845,28 +2842,9 @@ static bool nvme_acpi_storage_d3(struct pci_dev *dev)
+ 	 * must use D3 to support deep platform power savings during
+ 	 * suspend-to-idle.
+ 	 */
+-	root = pcie_find_root_port(dev);
+-	if (!root)
+-		return false;
+ 
+-	adev = ACPI_COMPANION(&root->dev);
+ 	if (!adev)
+ 		return false;
+-
+-	/*
+-	 * The property is defined in the PXSX device for South complex ports
+-	 * and in the PEGP device for North complex ports.
+-	 */
+-	status = acpi_get_handle(adev->handle, "PXSX", &handle);
+-	if (ACPI_FAILURE(status)) {
+-		status = acpi_get_handle(adev->handle, "PEGP", &handle);
+-		if (ACPI_FAILURE(status))
+-			return false;
+-	}
+-
+-	if (acpi_bus_get_device(handle, &adev))
+-		return false;
+-
+ 	if (fwnode_property_read_u8(acpi_fwnode_handle(adev), "StorageD3Enable",
+ 			&val))
+ 		return false;
+-- 
+2.32.0
+
+From 3a7312be4394026ded533964eca055e3b7ac86aa Mon Sep 17 00:00:00 2001
+From: Mario Limonciello <mario.limonciello@amd.com>
+Date: Wed, 9 Jun 2021 13:40:17 -0500
+Subject: [PATCH] ACPI: Check StorageD3Enable _DSD property in ACPI code
+
+Although first implemented for NVME, this check may be usable by
+other drivers as well. Microsoft's specification explicitly mentions
+that is may be usable by SATA and AHCI devices.  Google also indicates
+that they have used this with SDHCI in a downstream kernel tree that
+a user can plug a storage device into.
+
+Link: https://docs.microsoft.com/en-us/windows-hardware/design/component-guidelines/power-management-for-storage-hardware-devices-intro
+Suggested-by: Keith Busch <kbusch@kernel.org>
+CC: Shyam-sundar S-k <Shyam-sundar.S-k@amd.com>
+CC: Alexander Deucher <Alexander.Deucher@amd.com>
+CC: Rafael J. Wysocki <rjw@rjwysocki.net>
+CC: Prike Liang <prike.liang@amd.com>
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Signed-off-by: Christoph Hellwig <hch@lst.de>
+Patchset: s0ix-amd
+---
+ drivers/acpi/device_pm.c | 29 +++++++++++++++++++++++++++++
+ drivers/nvme/host/pci.c  | 28 +---------------------------
+ include/linux/acpi.h     |  5 +++++
+ 3 files changed, 35 insertions(+), 27 deletions(-)
+
+diff --git a/drivers/acpi/device_pm.c b/drivers/acpi/device_pm.c
+index 58876248b192..1e278785c7db 100644
+--- a/drivers/acpi/device_pm.c
++++ b/drivers/acpi/device_pm.c
+@@ -1337,4 +1337,33 @@ int acpi_dev_pm_attach(struct device *dev, bool power_on)
+ 	return 1;
+ }
+ EXPORT_SYMBOL_GPL(acpi_dev_pm_attach);
++
++/**
++ * acpi_storage_d3 - Check if D3 should be used in the suspend path
++ * @dev: Device to check
++ *
++ * Return %true if the platform firmware wants @dev to be programmed
++ * into D3hot or D3cold (if supported) in the suspend path, or %false
++ * when there is no specific preference. On some platforms, if this
++ * hint is ignored, @dev may remain unresponsive after suspending the
++ * platform as a whole.
++ *
++ * Although the property has storage in the name it actually is
++ * applied to the PCIe slot and plugging in a non-storage device the
++ * same platform restrictions will likely apply.
++ */
++bool acpi_storage_d3(struct device *dev)
++{
++	struct acpi_device *adev = ACPI_COMPANION(dev);
++	u8 val;
++
++	if (!adev)
++		return false;
++	if (fwnode_property_read_u8(acpi_fwnode_handle(adev), "StorageD3Enable",
++			&val))
++		return false;
++	return val == 1;
++}
++EXPORT_SYMBOL_GPL(acpi_storage_d3);
++
+ #endif /* CONFIG_PM */
+diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
+index 60c1c83e03fa..8593161d4da0 100644
+--- a/drivers/nvme/host/pci.c
++++ b/drivers/nvme/host/pci.c
+@@ -2831,32 +2831,6 @@ static unsigned long check_vendor_combination_bug(struct pci_dev *pdev)
+ 	return 0;
+ }
+ 
+-#ifdef CONFIG_ACPI
+-static bool nvme_acpi_storage_d3(struct pci_dev *dev)
+-{
+-	struct acpi_device *adev = ACPI_COMPANION(&dev->dev);
+-	u8 val;
+-
+-	/*
+-	 * Look for _DSD property specifying that the storage device on the port
+-	 * must use D3 to support deep platform power savings during
+-	 * suspend-to-idle.
+-	 */
+-
+-	if (!adev)
+-		return false;
+-	if (fwnode_property_read_u8(acpi_fwnode_handle(adev), "StorageD3Enable",
+-			&val))
+-		return false;
+-	return val == 1;
+-}
+-#else
+-static inline bool nvme_acpi_storage_d3(struct pci_dev *dev)
+-{
+-	return false;
+-}
+-#endif /* CONFIG_ACPI */
+-
+ static void nvme_async_probe(void *data, async_cookie_t cookie)
+ {
+ 	struct nvme_dev *dev = data;
+@@ -2906,7 +2880,7 @@ static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+ 
+ 	quirks |= check_vendor_combination_bug(pdev);
+ 
+-	if (!noacpi && nvme_acpi_storage_d3(pdev)) {
++	if (!noacpi && acpi_storage_d3(&pdev->dev)) {
+ 		/*
+ 		 * Some systems use a bios work around to ask for D3 on
+ 		 * platforms that support kernel managed suspend.
+diff --git a/include/linux/acpi.h b/include/linux/acpi.h
+index 07a0044397e1..1997fc6589b9 100644
+--- a/include/linux/acpi.h
++++ b/include/linux/acpi.h
+@@ -1001,6 +1001,7 @@ int acpi_dev_resume(struct device *dev);
+ int acpi_subsys_runtime_suspend(struct device *dev);
+ int acpi_subsys_runtime_resume(struct device *dev);
+ int acpi_dev_pm_attach(struct device *dev, bool power_on);
++bool acpi_storage_d3(struct device *dev);
+ #else
+ static inline int acpi_subsys_runtime_suspend(struct device *dev) { return 0; }
+ static inline int acpi_subsys_runtime_resume(struct device *dev) { return 0; }
+@@ -1008,6 +1009,10 @@ static inline int acpi_dev_pm_attach(struct device *dev, bool power_on)
+ {
+ 	return 0;
+ }
++static inline bool acpi_storage_d3(struct device *dev)
++{
++	return false;
++}
+ #endif
+ 
+ #if defined(CONFIG_ACPI) && defined(CONFIG_PM_SLEEP)
+-- 
+2.32.0
+
+From 109ecd87b661fc54f18fdb6a99c468a39a2e600c Mon Sep 17 00:00:00 2001
+From: Mario Limonciello <mario.limonciello@amd.com>
+Date: Wed, 9 Jun 2021 13:40:18 -0500
+Subject: [PATCH] ACPI: Add quirks for AMD Renoir/Lucienne CPUs to force the D3
+ hint
+
+AMD systems from Renoir and Lucienne require that the NVME controller
+is put into D3 over a Modern Standby / suspend-to-idle
+cycle.  This is "typically" accomplished using the `StorageD3Enable`
+property in the _DSD, but this property was introduced after many
+of these systems launched and most OEM systems don't have it in
+their BIOS.
+
+On AMD Renoir without these drives going into D3 over suspend-to-idle
+the resume will fail with the NVME controller being reset and a trace
+like this in the kernel logs:
+```
+[   83.556118] nvme nvme0: I/O 161 QID 2 timeout, aborting
+[   83.556178] nvme nvme0: I/O 162 QID 2 timeout, aborting
+[   83.556187] nvme nvme0: I/O 163 QID 2 timeout, aborting
+[   83.556196] nvme nvme0: I/O 164 QID 2 timeout, aborting
+[   95.332114] nvme nvme0: I/O 25 QID 0 timeout, reset controller
+[   95.332843] nvme nvme0: Abort status: 0x371
+[   95.332852] nvme nvme0: Abort status: 0x371
+[   95.332856] nvme nvme0: Abort status: 0x371
+[   95.332859] nvme nvme0: Abort status: 0x371
+[   95.332909] PM: dpm_run_callback(): pci_pm_resume+0x0/0xe0 returns -16
+[   95.332936] nvme 0000:03:00.0: PM: failed to resume async: error -16
+```
+
+The Microsoft documentation for StorageD3Enable mentioned that Windows has
+a hardcoded allowlist for D3 support, which was used for these platforms.
+Introduce quirks to hardcode them for Linux as well.
+
+As this property is now "standardized", OEM systems using AMD Cezanne and
+newer APU's have adopted this property, and quirks like this should not be
+necessary.
+
+CC: Shyam-sundar S-k <Shyam-sundar.S-k@amd.com>
+CC: Alexander Deucher <Alexander.Deucher@amd.com>
+CC: Prike Liang <prike.liang@amd.com>
+Link: https://docs.microsoft.com/en-us/windows-hardware/design/component-guidelines/power-management-for-storage-hardware-devices-intro
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Tested-by: Julian Sikorski <belegdol@gmail.com>
+Signed-off-by: Christoph Hellwig <hch@lst.de>
+Patchset: s0ix-amd
+---
+ drivers/acpi/device_pm.c |  3 +++
+ drivers/acpi/internal.h  |  9 +++++++++
+ drivers/acpi/x86/utils.c | 25 +++++++++++++++++++++++++
+ 3 files changed, 37 insertions(+)
+
+diff --git a/drivers/acpi/device_pm.c b/drivers/acpi/device_pm.c
+index 1e278785c7db..28f629a3d95c 100644
+--- a/drivers/acpi/device_pm.c
++++ b/drivers/acpi/device_pm.c
+@@ -1357,6 +1357,9 @@ bool acpi_storage_d3(struct device *dev)
+ 	struct acpi_device *adev = ACPI_COMPANION(dev);
+ 	u8 val;
+ 
++	if (force_storage_d3())
++		return true;
++
+ 	if (!adev)
+ 		return false;
+ 	if (fwnode_property_read_u8(acpi_fwnode_handle(adev), "StorageD3Enable",
+diff --git a/drivers/acpi/internal.h b/drivers/acpi/internal.h
+index cb8f70842249..96471be3f0c8 100644
+--- a/drivers/acpi/internal.h
++++ b/drivers/acpi/internal.h
+@@ -236,6 +236,15 @@ static inline int suspend_nvs_save(void) { return 0; }
+ static inline void suspend_nvs_restore(void) {}
+ #endif
+ 
++#ifdef CONFIG_X86
++bool force_storage_d3(void);
++#else
++static inline bool force_storage_d3(void)
++{
++	return false;
++}
++#endif
++
+ /*--------------------------------------------------------------------------
+ 				Device properties
+   -------------------------------------------------------------------------- */
+diff --git a/drivers/acpi/x86/utils.c b/drivers/acpi/x86/utils.c
+index bdc1ba00aee9..5298bb4d81fe 100644
+--- a/drivers/acpi/x86/utils.c
++++ b/drivers/acpi/x86/utils.c
+@@ -135,3 +135,28 @@ bool acpi_device_always_present(struct acpi_device *adev)
+ 
+ 	return ret;
+ }
++
++/*
++ * AMD systems from Renoir and Lucienne *require* that the NVME controller
++ * is put into D3 over a Modern Standby / suspend-to-idle cycle.
++ *
++ * This is "typically" accomplished using the `StorageD3Enable`
++ * property in the _DSD that is checked via the `acpi_storage_d3` function
++ * but this property was introduced after many of these systems launched
++ * and most OEM systems don't have it in their BIOS.
++ *
++ * The Microsoft documentation for StorageD3Enable mentioned that Windows has
++ * a hardcoded allowlist for D3 support, which was used for these platforms.
++ *
++ * This allows quirking on Linux in a similar fashion.
++ */
++const struct x86_cpu_id storage_d3_cpu_ids[] = {
++	X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 96, NULL),	/* Renoir */
++	X86_MATCH_VENDOR_FAM_MODEL(AMD, 23, 104, NULL),	/* Lucienne */
++	{}
++};
++
++bool force_storage_d3(void)
++{
++	return x86_match_cpu(storage_d3_cpu_ids);
++}
+-- 
+2.32.0
+
+From fd1137b4558167f32866e8735190e89aeb41a4fd Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 5 May 2021 09:20:32 -0400
+Subject: [PATCH] ACPI: PM: s2idle: Add missing LPS0 functions for AMD
+
+These are supposedly not required for AMD platforms,
+but at least some HP laptops seem to require it to
+properly turn off the keyboard backlight.
+
+Based on a patch from Marcin Bachry <hegel666@gmail.com>.
+
+Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1230
+Reviewed-by: Hans de Goede <hdegoede@redhat.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Patchset: s0ix-amd
+---
+ drivers/acpi/x86/s2idle.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/acpi/x86/s2idle.c b/drivers/acpi/x86/s2idle.c
+index 2b69536cdccb..2d7ddb8a8cb6 100644
+--- a/drivers/acpi/x86/s2idle.c
++++ b/drivers/acpi/x86/s2idle.c
+@@ -42,6 +42,8 @@ static const struct acpi_device_id lps0_device_ids[] = {
+ 
+ /* AMD */
+ #define ACPI_LPS0_DSM_UUID_AMD      "e3f32452-febc-43ce-9039-932122d37721"
++#define ACPI_LPS0_ENTRY_AMD         2
++#define ACPI_LPS0_EXIT_AMD          3
+ #define ACPI_LPS0_SCREEN_OFF_AMD    4
+ #define ACPI_LPS0_SCREEN_ON_AMD     5
+ 
+@@ -408,6 +410,7 @@ int acpi_s2idle_prepare_late(void)
+ 
+ 	if (acpi_s2idle_vendor_amd()) {
+ 		acpi_sleep_run_lps0_dsm(ACPI_LPS0_SCREEN_OFF_AMD);
++		acpi_sleep_run_lps0_dsm(ACPI_LPS0_ENTRY_AMD);
+ 	} else {
+ 		acpi_sleep_run_lps0_dsm(ACPI_LPS0_SCREEN_OFF);
+ 		acpi_sleep_run_lps0_dsm(ACPI_LPS0_ENTRY);
+@@ -422,6 +425,7 @@ void acpi_s2idle_restore_early(void)
+ 		return;
+ 
+ 	if (acpi_s2idle_vendor_amd()) {
++		acpi_sleep_run_lps0_dsm(ACPI_LPS0_EXIT_AMD);
+ 		acpi_sleep_run_lps0_dsm(ACPI_LPS0_SCREEN_ON_AMD);
+ 	} else {
+ 		acpi_sleep_run_lps0_dsm(ACPI_LPS0_EXIT);
+-- 
+2.32.0
+
+From 03350292ce75c93e6dbfa473d9794c61e863ed0f Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 17 Mar 2021 10:38:42 -0400
+Subject: [PATCH] platform/x86: force LPS0 functions for AMD
+
+ACPI_LPS0_ENTRY_AMD/ACPI_LPS0_EXIT_AMD are supposedly not
+required for AMD platforms, and on some platforms they are
+not even listed in the function mask but at least some HP
+laptops seem to require it to properly support s0ix.
+
+Based on a patch from Marcin Bachry <hegel666@gmail.com>.
+
+Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1230
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: Marcin Bachry <hegel666@gmail.com>
+Reviewed-by: Hans de Goede <hdegoede@redhat.com>
+Patchset: s0ix-amd
+---
+ drivers/acpi/x86/s2idle.c | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/drivers/acpi/x86/s2idle.c b/drivers/acpi/x86/s2idle.c
+index 2d7ddb8a8cb6..482e6b23b21a 100644
+--- a/drivers/acpi/x86/s2idle.c
++++ b/drivers/acpi/x86/s2idle.c
+@@ -368,6 +368,13 @@ static int lps0_device_attach(struct acpi_device *adev,
+ 
+ 	ACPI_FREE(out_obj);
+ 
++	/*
++	 * Some HP laptops require ACPI_LPS0_ENTRY_AMD/ACPI_LPS0_EXIT_AMD for proper
++	 * S0ix, but don't set the function mask correctly.  Fix that up here.
++	 */
++	if (acpi_s2idle_vendor_amd())
++		lps0_dsm_func_mask |= (1 << ACPI_LPS0_ENTRY_AMD) | (1 << ACPI_LPS0_EXIT_AMD);
++
+ 	acpi_handle_debug(adev->handle, "_DSM function mask: 0x%x\n",
+ 			  lps0_dsm_func_mask);
+ 
+-- 
+2.32.0
+
+From 1c073f49ae73140c34464a77c511057bfff118e1 Mon Sep 17 00:00:00 2001
+From: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Date: Thu, 17 Jun 2021 17:00:35 +0530
+Subject: [PATCH] platform/x86: amd-pmc: Fix command completion code
+
+The protocol to submit a job request to SMU is to wait for
+AMD_PMC_REGISTER_RESPONSE to return 1,meaning SMU is ready to take
+requests. PMC driver has to make sure that the response code is always
+AMD_PMC_RESULT_OK before making any command submissions.
+
+Also, when we submit a message to SMU, we have to wait until it processes
+the request. Adding a read_poll_timeout() check as this was missing in
+the existing code.
+
+Fixes: 156ec4731cb2 ("platform/x86: amd-pmc: Add AMD platform support for S2Idle")
+Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Reviewed-by: Hans de Goede <hdegoede@redhat.com>
+Patchset: s0ix-amd
+---
+ drivers/platform/x86/amd-pmc.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c
+index 0b5578a8a449..535e431f98a8 100644
+--- a/drivers/platform/x86/amd-pmc.c
++++ b/drivers/platform/x86/amd-pmc.c
+@@ -140,7 +140,7 @@ static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, bool set)
+ 
+ 	/* Wait until we get a valid response */
+ 	rc = readx_poll_timeout(ioread32, dev->regbase + AMD_PMC_REGISTER_RESPONSE,
+-				val, val > 0, PMC_MSG_DELAY_MIN_US,
++				val, val == AMD_PMC_RESULT_OK, PMC_MSG_DELAY_MIN_US,
+ 				PMC_MSG_DELAY_MIN_US * RESPONSE_REGISTER_LOOP_MAX);
+ 	if (rc) {
+ 		dev_err(dev->dev, "failed to talk to SMU\n");
+@@ -156,6 +156,14 @@ static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, bool set)
+ 	/* Write message ID to message ID register */
+ 	msg = (dev->cpu_id == AMD_CPU_ID_RN) ? MSG_OS_HINT_RN : MSG_OS_HINT_PCO;
+ 	amd_pmc_reg_write(dev, AMD_PMC_REGISTER_MESSAGE, msg);
++	/* Wait until we get a valid response */
++	rc = readx_poll_timeout(ioread32, dev->regbase + AMD_PMC_REGISTER_RESPONSE,
++				val, val == AMD_PMC_RESULT_OK, PMC_MSG_DELAY_MIN_US,
++				PMC_MSG_DELAY_MIN_US * RESPONSE_REGISTER_LOOP_MAX);
++	if (rc) {
++		dev_err(dev->dev, "SMU response timed out\n");
++		return rc;
++	}
+ 	return 0;
+ }
+ 
+-- 
+2.32.0
+
+From b2defd4d2db7997cd38733875b435582a44b0fa3 Mon Sep 17 00:00:00 2001
+From: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Date: Thu, 17 Jun 2021 17:00:36 +0530
+Subject: [PATCH] platform/x86: amd-pmc: Fix SMU firmware reporting mechanism
+
+It was lately understood that the current mechanism available in the
+driver to get SMU firmware info works only on internal SMU builds and
+there is a separate way to get all the SMU logging counters (addressed
+in the next patch). Hence remove all the smu info shown via debugfs as it
+is no more useful.
+
+Also, use dump registers routine only at one place i.e. after the command
+submission to SMU is done.
+
+Fixes: 156ec4731cb2 ("platform/x86: amd-pmc: Add AMD platform support for S2Idle")
+Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Patchset: s0ix-amd
+---
+ drivers/platform/x86/amd-pmc.c | 15 +--------------
+ 1 file changed, 1 insertion(+), 14 deletions(-)
+
+diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c
+index 535e431f98a8..d32f0a0eeb9f 100644
+--- a/drivers/platform/x86/amd-pmc.c
++++ b/drivers/platform/x86/amd-pmc.c
+@@ -52,7 +52,6 @@
+ #define AMD_CPU_ID_PCO			AMD_CPU_ID_RV
+ #define AMD_CPU_ID_CZN			AMD_CPU_ID_RN
+ 
+-#define AMD_SMU_FW_VERSION		0x0
+ #define PMC_MSG_DELAY_MIN_US		100
+ #define RESPONSE_REGISTER_LOOP_MAX	200
+ 
+@@ -88,11 +87,6 @@ static inline void amd_pmc_reg_write(struct amd_pmc_dev *dev, int reg_offset, u3
+ #ifdef CONFIG_DEBUG_FS
+ static int smu_fw_info_show(struct seq_file *s, void *unused)
+ {
+-	struct amd_pmc_dev *dev = s->private;
+-	u32 value;
+-
+-	value = ioread32(dev->smu_base + AMD_SMU_FW_VERSION);
+-	seq_printf(s, "SMU FW Info: %x\n", value);
+ 	return 0;
+ }
+ DEFINE_SHOW_ATTRIBUTE(smu_fw_info);
+@@ -164,6 +158,7 @@ static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, bool set)
+ 		dev_err(dev->dev, "SMU response timed out\n");
+ 		return rc;
+ 	}
++	amd_pmc_dump_registers(dev);
+ 	return 0;
+ }
+ 
+@@ -176,7 +171,6 @@ static int __maybe_unused amd_pmc_suspend(struct device *dev)
+ 	if (rc)
+ 		dev_err(pdev->dev, "suspend failed\n");
+ 
+-	amd_pmc_dump_registers(pdev);
+ 	return 0;
+ }
+ 
+@@ -189,7 +183,6 @@ static int __maybe_unused amd_pmc_resume(struct device *dev)
+ 	if (rc)
+ 		dev_err(pdev->dev, "resume failed\n");
+ 
+-	amd_pmc_dump_registers(pdev);
+ 	return 0;
+ }
+ 
+@@ -256,17 +249,11 @@ static int amd_pmc_probe(struct platform_device *pdev)
+ 	pci_dev_put(rdev);
+ 	base_addr = ((u64)base_addr_hi << 32 | base_addr_lo);
+ 
+-	dev->smu_base = devm_ioremap(dev->dev, base_addr, AMD_PMC_MAPPING_SIZE);
+-	if (!dev->smu_base)
+-		return -ENOMEM;
+-
+ 	dev->regbase = devm_ioremap(dev->dev, base_addr + AMD_PMC_BASE_ADDR_OFFSET,
+ 				    AMD_PMC_MAPPING_SIZE);
+ 	if (!dev->regbase)
+ 		return -ENOMEM;
+ 
+-	amd_pmc_dump_registers(dev);
+-
+ 	platform_set_drvdata(pdev, dev);
+ 	amd_pmc_dbgfs_register(dev);
+ 	return 0;
+-- 
+2.32.0
+
+From 2d0b80b1785d1ad85fb70fdc6edf1f29773e0875 Mon Sep 17 00:00:00 2001
+From: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Date: Thu, 17 Jun 2021 17:00:37 +0530
+Subject: [PATCH] platform/x86: amd-pmc: Add support for logging SMU metrics
+
+SMU provides a way to dump the s0ix debug statistics in the form of a
+metrics table via a of set special mailbox commands.
+
+Add support to the driver which can send these commands to SMU and expose
+the information received via debugfs. The information contains the s0ix
+entry/exit, active time of each IP block etc.
+
+As a side note, SMU subsystem logging is not supported on Picasso based
+SoC's.
+
+Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Patchset: s0ix-amd
+---
+ drivers/platform/x86/amd-pmc.c | 148 +++++++++++++++++++++++++++++++--
+ 1 file changed, 140 insertions(+), 8 deletions(-)
+
+diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c
+index d32f0a0eeb9f..b5249fdeb95f 100644
+--- a/drivers/platform/x86/amd-pmc.c
++++ b/drivers/platform/x86/amd-pmc.c
+@@ -46,6 +46,14 @@
+ #define AMD_PMC_RESULT_CMD_UNKNOWN           0xFE
+ #define AMD_PMC_RESULT_FAILED                0xFF
+ 
++/* SMU Message Definations */
++#define SMU_MSG_GETSMUVERSION		0x02
++#define SMU_MSG_LOG_GETDRAM_ADDR_HI	0x04
++#define SMU_MSG_LOG_GETDRAM_ADDR_LO	0x05
++#define SMU_MSG_LOG_START		0x06
++#define SMU_MSG_LOG_RESET		0x07
++#define SMU_MSG_LOG_DUMP_DATA		0x08
++#define SMU_MSG_GET_SUP_CONSTRAINTS	0x09
+ /* List of supported CPU ids */
+ #define AMD_CPU_ID_RV			0x15D0
+ #define AMD_CPU_ID_RN			0x1630
+@@ -55,17 +63,42 @@
+ #define PMC_MSG_DELAY_MIN_US		100
+ #define RESPONSE_REGISTER_LOOP_MAX	200
+ 
++#define SOC_SUBSYSTEM_IP_MAX	12
++#define DELAY_MIN_US		2000
++#define DELAY_MAX_US		3000
+ enum amd_pmc_def {
+ 	MSG_TEST = 0x01,
+ 	MSG_OS_HINT_PCO,
+ 	MSG_OS_HINT_RN,
+ };
+ 
++struct amd_pmc_bit_map {
++	const char *name;
++	u32 bit_mask;
++};
++
++static const struct amd_pmc_bit_map soc15_ip_blk[] = {
++	{"DISPLAY",	BIT(0)},
++	{"CPU",		BIT(1)},
++	{"GFX",		BIT(2)},
++	{"VDD",		BIT(3)},
++	{"ACP",		BIT(4)},
++	{"VCN",		BIT(5)},
++	{"ISP",		BIT(6)},
++	{"NBIO",	BIT(7)},
++	{"DF",		BIT(8)},
++	{"USB0",	BIT(9)},
++	{"USB1",	BIT(10)},
++	{"LAPIC",	BIT(11)},
++	{}
++};
++
+ struct amd_pmc_dev {
+ 	void __iomem *regbase;
+-	void __iomem *smu_base;
++	void __iomem *smu_virt_addr;
+ 	u32 base_addr;
+ 	u32 cpu_id;
++	u32 active_ips;
+ 	struct device *dev;
+ #if IS_ENABLED(CONFIG_DEBUG_FS)
+ 	struct dentry *dbgfs_dir;
+@@ -73,6 +106,7 @@ struct amd_pmc_dev {
+ };
+ 
+ static struct amd_pmc_dev pmc;
++static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, bool set, u32 *data, u8 msg, bool ret);
+ 
+ static inline u32 amd_pmc_reg_read(struct amd_pmc_dev *dev, int reg_offset)
+ {
+@@ -84,9 +118,50 @@ static inline void amd_pmc_reg_write(struct amd_pmc_dev *dev, int reg_offset, u3
+ 	iowrite32(val, dev->regbase + reg_offset);
+ }
+ 
++struct smu_metrics {
++	u32 table_version;
++	u32 hint_count;
++	u32 s0i3_cyclecount;
++	u32 timein_s0i2;
++	u64 timeentering_s0i3_lastcapture;
++	u64 timeentering_s0i3_totaltime;
++	u64 timeto_resume_to_os_lastcapture;
++	u64 timeto_resume_to_os_totaltime;
++	u64 timein_s0i3_lastcapture;
++	u64 timein_s0i3_totaltime;
++	u64 timein_swdrips_lastcapture;
++	u64 timein_swdrips_totaltime;
++	u64 timecondition_notmet_lastcapture[SOC_SUBSYSTEM_IP_MAX];
++	u64 timecondition_notmet_totaltime[SOC_SUBSYSTEM_IP_MAX];
++} __packed;
++
+ #ifdef CONFIG_DEBUG_FS
+ static int smu_fw_info_show(struct seq_file *s, void *unused)
+ {
++	struct amd_pmc_dev *dev = s->private;
++	struct smu_metrics table;
++	u32 value;
++	int idx;
++
++	if (dev->cpu_id == AMD_CPU_ID_PCO)
++		return -EINVAL;
++
++	memcpy_fromio(&table, dev->smu_virt_addr, sizeof(struct smu_metrics));
++
++	seq_puts(s, "\n=== SMU Statistics ===\n");
++	seq_printf(s, "Table Version: %d\n", table.table_version);
++	seq_printf(s, "Hint Count: %d\n", table.hint_count);
++	seq_printf(s, "S0i3 Cycle Count: %d\n", table.s0i3_cyclecount);
++	seq_printf(s, "Time (in us) to S0i3: %lld\n", table.timeentering_s0i3_lastcapture);
++	seq_printf(s, "Time (in us) in S0i3: %lld\n", table.timein_s0i3_lastcapture);
++
++	seq_puts(s, "\n=== Active time (in us) ===\n");
++	for (idx = 0 ; idx < SOC_SUBSYSTEM_IP_MAX ; idx++) {
++		if (soc15_ip_blk[idx].bit_mask & dev->active_ips)
++			seq_printf(s, "%-8s : %lld\n", soc15_ip_blk[idx].name,
++				   table.timecondition_notmet_lastcapture[idx]);
++	}
++
+ 	return 0;
+ }
+ DEFINE_SHOW_ATTRIBUTE(smu_fw_info);
+@@ -112,6 +187,32 @@ static inline void amd_pmc_dbgfs_unregister(struct amd_pmc_dev *dev)
+ }
+ #endif /* CONFIG_DEBUG_FS */
+ 
++static int amd_pmc_setup_smu_logging(struct amd_pmc_dev *dev)
++{
++	u32 phys_addr_low, phys_addr_hi;
++	u64 smu_phys_addr;
++
++	if (dev->cpu_id == AMD_CPU_ID_PCO)
++		return -EINVAL;
++
++	/* Get Active devices list from SMU */
++	amd_pmc_send_cmd(dev, 0, &dev->active_ips, SMU_MSG_GET_SUP_CONSTRAINTS, 1);
++
++	/* Get dram address */
++	amd_pmc_send_cmd(dev, 0, &phys_addr_low, SMU_MSG_LOG_GETDRAM_ADDR_LO, 1);
++	amd_pmc_send_cmd(dev, 0, &phys_addr_hi, SMU_MSG_LOG_GETDRAM_ADDR_HI, 1);
++	smu_phys_addr = ((u64)phys_addr_hi << 32 | phys_addr_low);
++
++	dev->smu_virt_addr = devm_ioremap(dev->dev, smu_phys_addr, sizeof(struct smu_metrics));
++	if (!dev->smu_virt_addr)
++		return -ENOMEM;
++
++	/* Start the logging */
++	amd_pmc_send_cmd(dev, 0, NULL, SMU_MSG_LOG_START, 0);
++
++	return 0;
++}
++
+ static void amd_pmc_dump_registers(struct amd_pmc_dev *dev)
+ {
+ 	u32 value;
+@@ -126,10 +227,9 @@ static void amd_pmc_dump_registers(struct amd_pmc_dev *dev)
+ 	dev_dbg(dev->dev, "AMD_PMC_REGISTER_MESSAGE:%x\n", value);
+ }
+ 
+-static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, bool set)
++static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, bool set, u32 *data, u8 msg, bool ret)
+ {
+ 	int rc;
+-	u8 msg;
+ 	u32 val;
+ 
+ 	/* Wait until we get a valid response */
+@@ -148,8 +248,8 @@ static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, bool set)
+ 	amd_pmc_reg_write(dev, AMD_PMC_REGISTER_ARGUMENT, set);
+ 
+ 	/* Write message ID to message ID register */
+-	msg = (dev->cpu_id == AMD_CPU_ID_RN) ? MSG_OS_HINT_RN : MSG_OS_HINT_PCO;
+ 	amd_pmc_reg_write(dev, AMD_PMC_REGISTER_MESSAGE, msg);
++
+ 	/* Wait until we get a valid response */
+ 	rc = readx_poll_timeout(ioread32, dev->regbase + AMD_PMC_REGISTER_RESPONSE,
+ 				val, val == AMD_PMC_RESULT_OK, PMC_MSG_DELAY_MIN_US,
+@@ -158,16 +258,40 @@ static int amd_pmc_send_cmd(struct amd_pmc_dev *dev, bool set)
+ 		dev_err(dev->dev, "SMU response timed out\n");
+ 		return rc;
+ 	}
++
++	if (ret) {
++		/* PMFW may take longer time to return back the data */
++		usleep_range(DELAY_MIN_US, 10 * DELAY_MAX_US);
++		*data = amd_pmc_reg_read(dev, AMD_PMC_REGISTER_ARGUMENT);
++	}
++
+ 	amd_pmc_dump_registers(dev);
+ 	return 0;
+ }
+ 
++static int amd_pmc_get_os_hint(struct amd_pmc_dev *dev)
++{
++	switch (dev->cpu_id) {
++	case AMD_CPU_ID_PCO:
++		return MSG_OS_HINT_PCO;
++	case AMD_CPU_ID_RN:
++		return MSG_OS_HINT_RN;
++	}
++	return -EINVAL;
++}
++
+ static int __maybe_unused amd_pmc_suspend(struct device *dev)
+ {
+ 	struct amd_pmc_dev *pdev = dev_get_drvdata(dev);
+ 	int rc;
++	u8 msg;
++
++	/* Reset and Start SMU logging - to monitor the s0i3 stats */
++	amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_RESET, 0);
++	amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_START, 0);
+ 
+-	rc = amd_pmc_send_cmd(pdev, 1);
++	msg = amd_pmc_get_os_hint(pdev);
++	rc = amd_pmc_send_cmd(pdev, 1, NULL, msg, 0);
+ 	if (rc)
+ 		dev_err(pdev->dev, "suspend failed\n");
+ 
+@@ -178,8 +302,13 @@ static int __maybe_unused amd_pmc_resume(struct device *dev)
+ {
+ 	struct amd_pmc_dev *pdev = dev_get_drvdata(dev);
+ 	int rc;
++	u8 msg;
++
++	/* Let SMU know that we are looking for stats */
++	amd_pmc_send_cmd(pdev, 0, NULL, SMU_MSG_LOG_DUMP_DATA, 0);
+ 
+-	rc = amd_pmc_send_cmd(pdev, 0);
++	msg = amd_pmc_get_os_hint(pdev);
++	rc = amd_pmc_send_cmd(pdev, 0, NULL, msg, 0);
+ 	if (rc)
+ 		dev_err(pdev->dev, "resume failed\n");
+ 
+@@ -202,8 +331,7 @@ static int amd_pmc_probe(struct platform_device *pdev)
+ {
+ 	struct amd_pmc_dev *dev = &pmc;
+ 	struct pci_dev *rdev;
+-	u32 base_addr_lo;
+-	u32 base_addr_hi;
++	u32 base_addr_lo, base_addr_hi;
+ 	u64 base_addr;
+ 	int err;
+ 	u32 val;
+@@ -254,6 +382,10 @@ static int amd_pmc_probe(struct platform_device *pdev)
+ 	if (!dev->regbase)
+ 		return -ENOMEM;
+ 
++	/* Use SMU to get the s0i3 debug stats */
++	err = amd_pmc_setup_smu_logging(dev);
++	if (err)
++		dev_err(dev->dev, "SMU debugging info not supported on this platform\n");
+ 	platform_set_drvdata(pdev, dev);
+ 	amd_pmc_dbgfs_register(dev);
+ 	return 0;
+-- 
+2.32.0
+
+From 67d72c927ba962a13e8f91e656712987bebaad07 Mon Sep 17 00:00:00 2001
+From: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Date: Thu, 17 Jun 2021 17:00:38 +0530
+Subject: [PATCH] platform/x86: amd-pmc: Add support for logging s0ix counters
+
+Even the FCH SSC registers provides certain level of information
+about the s0ix entry and exit times which comes handy when the SMU
+fails to report the statistics via the mailbox communication.
+
+This information is captured via a new debugfs file "s0ix_stats".
+A non-zero entry in this counters would mean that the system entered
+the s0ix state.
+
+If s0ix entry time and exit time don't change during suspend to idle,
+the silicon has not entered the deepest state.
+
+Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Patchset: s0ix-amd
+---
+ drivers/platform/x86/amd-pmc.c | 46 ++++++++++++++++++++++++++++++++--
+ 1 file changed, 44 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c
+index b5249fdeb95f..b6ad290c9a86 100644
+--- a/drivers/platform/x86/amd-pmc.c
++++ b/drivers/platform/x86/amd-pmc.c
+@@ -46,6 +46,15 @@
+ #define AMD_PMC_RESULT_CMD_UNKNOWN           0xFE
+ #define AMD_PMC_RESULT_FAILED                0xFF
+ 
++/* FCH SSC Registers */
++#define FCH_S0I3_ENTRY_TIME_L_OFFSET	0x30
++#define FCH_S0I3_ENTRY_TIME_H_OFFSET	0x34
++#define FCH_S0I3_EXIT_TIME_L_OFFSET	0x38
++#define FCH_S0I3_EXIT_TIME_H_OFFSET	0x3C
++#define FCH_SSC_MAPPING_SIZE		0x800
++#define FCH_BASE_PHY_ADDR_LOW		0xFED81100
++#define FCH_BASE_PHY_ADDR_HIGH		0x00000000
++
+ /* SMU Message Definations */
+ #define SMU_MSG_GETSMUVERSION		0x02
+ #define SMU_MSG_LOG_GETDRAM_ADDR_HI	0x04
+@@ -96,6 +105,7 @@ static const struct amd_pmc_bit_map soc15_ip_blk[] = {
+ struct amd_pmc_dev {
+ 	void __iomem *regbase;
+ 	void __iomem *smu_virt_addr;
++	void __iomem *fch_virt_addr;
+ 	u32 base_addr;
+ 	u32 cpu_id;
+ 	u32 active_ips;
+@@ -140,7 +150,6 @@ static int smu_fw_info_show(struct seq_file *s, void *unused)
+ {
+ 	struct amd_pmc_dev *dev = s->private;
+ 	struct smu_metrics table;
+-	u32 value;
+ 	int idx;
+ 
+ 	if (dev->cpu_id == AMD_CPU_ID_PCO)
+@@ -166,6 +175,29 @@ static int smu_fw_info_show(struct seq_file *s, void *unused)
+ }
+ DEFINE_SHOW_ATTRIBUTE(smu_fw_info);
+ 
++static int s0ix_stats_show(struct seq_file *s, void *unused)
++{
++	struct amd_pmc_dev *dev = s->private;
++	u64 entry_time, exit_time, residency;
++
++	entry_time = ioread32(dev->fch_virt_addr + FCH_S0I3_ENTRY_TIME_H_OFFSET);
++	entry_time = entry_time << 32 | ioread32(dev->fch_virt_addr + FCH_S0I3_ENTRY_TIME_L_OFFSET);
++
++	exit_time = ioread32(dev->fch_virt_addr + FCH_S0I3_EXIT_TIME_H_OFFSET);
++	exit_time = exit_time << 32 | ioread32(dev->fch_virt_addr + FCH_S0I3_EXIT_TIME_L_OFFSET);
++
++	/* It's in 48MHz. We need to convert it to unit of 100ns */
++	residency = (exit_time - entry_time) * 10 / 48;
++
++	seq_puts(s, "=== S0ix statistics ===\n");
++	seq_printf(s, "S0ix Entry Time: %lld\n", entry_time);
++	seq_printf(s, "S0ix Exit Time: %lld\n", exit_time);
++	seq_printf(s, "Residency Time: %lld\n", residency);
++
++	return 0;
++}
++DEFINE_SHOW_ATTRIBUTE(s0ix_stats);
++
+ static void amd_pmc_dbgfs_unregister(struct amd_pmc_dev *dev)
+ {
+ 	debugfs_remove_recursive(dev->dbgfs_dir);
+@@ -176,6 +208,8 @@ static void amd_pmc_dbgfs_register(struct amd_pmc_dev *dev)
+ 	dev->dbgfs_dir = debugfs_create_dir("amd_pmc", NULL);
+ 	debugfs_create_file("smu_fw_info", 0644, dev->dbgfs_dir, dev,
+ 			    &smu_fw_info_fops);
++	debugfs_create_file("s0ix_stats", 0644, dev->dbgfs_dir, dev,
++			    &s0ix_stats_fops);
+ }
+ #else
+ static inline void amd_pmc_dbgfs_register(struct amd_pmc_dev *dev)
+@@ -332,7 +366,7 @@ static int amd_pmc_probe(struct platform_device *pdev)
+ 	struct amd_pmc_dev *dev = &pmc;
+ 	struct pci_dev *rdev;
+ 	u32 base_addr_lo, base_addr_hi;
+-	u64 base_addr;
++	u64 base_addr, fch_phys_addr;
+ 	int err;
+ 	u32 val;
+ 
+@@ -382,6 +416,14 @@ static int amd_pmc_probe(struct platform_device *pdev)
+ 	if (!dev->regbase)
+ 		return -ENOMEM;
+ 
++	/* Use FCH registers to get the S0ix stats */
++	base_addr_lo = FCH_BASE_PHY_ADDR_LOW;
++	base_addr_hi = FCH_BASE_PHY_ADDR_HIGH;
++	fch_phys_addr = ((u64)base_addr_hi << 32 | base_addr_lo);
++	dev->fch_virt_addr = devm_ioremap(dev->dev, fch_phys_addr, FCH_SSC_MAPPING_SIZE);
++	if (!dev->fch_virt_addr)
++		return -ENOMEM;
++
+ 	/* Use SMU to get the s0i3 debug stats */
+ 	err = amd_pmc_setup_smu_logging(dev);
+ 	if (err)
+-- 
+2.32.0
+
+From 813ca0ce9c510dbf702aa974366763516ff42efa Mon Sep 17 00:00:00 2001
+From: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Date: Thu, 17 Jun 2021 17:00:39 +0530
+Subject: [PATCH] platform/x86: amd-pmc: Add support for ACPI ID AMDI0006
+
+Some newer BIOSes have added another ACPI ID for the uPEP device.
+SMU statistics behave identically on this device.
+
+Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Patchset: s0ix-amd
+---
+ drivers/platform/x86/amd-pmc.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c
+index b6ad290c9a86..2a73fe0deaf3 100644
+--- a/drivers/platform/x86/amd-pmc.c
++++ b/drivers/platform/x86/amd-pmc.c
+@@ -443,6 +443,7 @@ static int amd_pmc_remove(struct platform_device *pdev)
+ 
+ static const struct acpi_device_id amd_pmc_acpi_ids[] = {
+ 	{"AMDI0005", 0},
++	{"AMDI0006", 0},
+ 	{"AMD0004", 0},
+ 	{"AMD0005", 0},
+ 	{ }
+-- 
+2.32.0
+
+From 19f9c25731eff78f5d3c64f0fbcc89366cf9e25b Mon Sep 17 00:00:00 2001
+From: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Date: Thu, 17 Jun 2021 17:00:40 +0530
+Subject: [PATCH] platform/x86: amd-pmc: Add new acpi id for future PMC
+ controllers
+
+The upcoming PMC controller would have a newer acpi id, add that to
+the supported acpid device list.
+
+Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
+Patchset: s0ix-amd
+---
+ drivers/platform/x86/amd-pmc.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/drivers/platform/x86/amd-pmc.c b/drivers/platform/x86/amd-pmc.c
+index 2a73fe0deaf3..5a2be598fc2e 100644
+--- a/drivers/platform/x86/amd-pmc.c
++++ b/drivers/platform/x86/amd-pmc.c
+@@ -68,6 +68,7 @@
+ #define AMD_CPU_ID_RN			0x1630
+ #define AMD_CPU_ID_PCO			AMD_CPU_ID_RV
+ #define AMD_CPU_ID_CZN			AMD_CPU_ID_RN
++#define AMD_CPU_ID_YC			0x14B5
+ 
+ #define PMC_MSG_DELAY_MIN_US		100
+ #define RESPONSE_REGISTER_LOOP_MAX	200
+@@ -309,6 +310,7 @@ static int amd_pmc_get_os_hint(struct amd_pmc_dev *dev)
+ 	case AMD_CPU_ID_PCO:
+ 		return MSG_OS_HINT_PCO;
+ 	case AMD_CPU_ID_RN:
++	case AMD_CPU_ID_YC:
+ 		return MSG_OS_HINT_RN;
+ 	}
+ 	return -EINVAL;
+@@ -354,6 +356,7 @@ static const struct dev_pm_ops amd_pmc_pm_ops = {
+ };
+ 
+ static const struct pci_device_id pmc_pci_ids[] = {
++	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_YC) },
+ 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_CZN) },
+ 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_RN) },
+ 	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_PCO) },
+@@ -444,6 +447,7 @@ static int amd_pmc_remove(struct platform_device *pdev)
+ static const struct acpi_device_id amd_pmc_acpi_ids[] = {
+ 	{"AMDI0005", 0},
+ 	{"AMDI0006", 0},
++	{"AMDI0007", 0},
+ 	{"AMD0004", 0},
+ 	{"AMD0005", 0},
+ 	{ }
+-- 
+2.32.0
+
+From 855bc0bc74dc1b774ef5ae06cf4d20f852838da7 Mon Sep 17 00:00:00 2001
+From: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
+Date: Thu, 17 Jun 2021 11:42:08 -0500
+Subject: [PATCH] ACPI: PM: s2idle: Use correct revision id
+
+AMD spec mentions only revision 0. With this change,
+device constraint list is populated properly.
+
+Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
+Patchset: s0ix-amd
+---
+ drivers/acpi/x86/s2idle.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/acpi/x86/s2idle.c b/drivers/acpi/x86/s2idle.c
+index 482e6b23b21a..4339e6da0dd6 100644
+--- a/drivers/acpi/x86/s2idle.c
++++ b/drivers/acpi/x86/s2idle.c
+@@ -96,7 +96,7 @@ static void lpi_device_get_constraints_amd(void)
+ 	int i, j, k;
+ 
+ 	out_obj = acpi_evaluate_dsm_typed(lps0_device_handle, &lps0_dsm_guid,
+-					  1, ACPI_LPS0_GET_DEVICE_CONSTRAINTS,
++					  rev_id, ACPI_LPS0_GET_DEVICE_CONSTRAINTS,
+ 					  NULL, ACPI_TYPE_PACKAGE);
+ 
+ 	if (!out_obj)
+-- 
+2.32.0
+

+ 1 - 0
pkg/arch/kernel/0010-s0ix-amd.patch

@@ -0,0 +1 @@
+../../../patches/5.12/0010-s0ix-amd.patch

+ 11 - 9
pkg/arch/kernel/PKGBUILD

@@ -36,6 +36,7 @@ source=(
   0007-surface-typecover.patch
   0008-surface-go-touchscreen.patch
   0009-cameras.patch
+  0010-s0ix-amd.patch
 )
 validpgpkeys=(
   'ABAF11C65A2970B130ABE3C479BE3E4300411886'  # Linus Torvalds
@@ -46,15 +47,16 @@ sha256sums=('e9d0478bdcd63eed79d398d470e4ec6cd458e7eb747c35ac6ca7b558740b37bb'
             '55c4cb76754b1db234a0994806106d8481c171d4e3fead12793f0083a48511d4'
             '252c7a78ffb1efe9751aabc93cc79031ef69dbc95baa7970cbaabcd5474fe7d8'
             '9474de18769968c5558fedda5be354fe0babf1365541d4d0ac8e1ac47d4bbb88'
-            'd75d2aa62323431a4ba86baefdd0003a0bc89f1e3af0c2df7f6225f88a2c2be6'
-            'b10c9650019537a7ca394daf61cba7148e321a55f262209ce104684cbfd5b28a'
-            '39c691a29949c6f45c2d12ad414e2692b2ffd05b3d79e037b0a1ef86714dbc73'
-            'ceee40dd548a82f7a01a7d755da3644bc77dc7380a231db84ad019edbcddc436'
-            '2e4e0cee0bb696b4cc5f76e43d1e3df822fc0e77c7413966a8a0b689c3ca637e'
-            '519f7c20eb4914ac57bf902c5530bdbab73cf63da86b2274716d2b33032541fe'
-            '338acbcfec9f880ffc9241d8807633e07e48ec793c21be1453d8b927398cc0e9'
-            'f26051b1f0c3b1cd47add84b84b2d2f53d3b98ac72e3b8708ad1d20c2795a25d'
-            'ef3a647fdea598c10e10a83f5ff8b54bddf984f0cc442a980d62a3a6fcf3ba30')
+            'a896152c73dcd8531ba7deb78d22c97847595da0a0896abadc1c666f5efd99df'
+            '491128d80b3f902b42ffce408d487db24c973a4ebbdc8dffacd199d5de63d77b'
+            '13c33c8f0490667ab3bd211edba4add28edef5238e413c6562896750113e7b61'
+            '68b7a97496eeacd4ad7b1dd196a63ea8ebe8f4fc8fa676385f715e9143ce0af5'
+            'cd35bce31645c4af3602d5ad752dceed56ae7e29122dc6fbd8041e69b301a163'
+            '619876853393a435e4da649f35f27651d5186b9f57d87cc7605b946be48c79be'
+            '7ece66447f99797f1a4df9130fe2f23829c206c7fde252780ff7a36363cb2fae'
+            'f7bb2e30b3dd2dfad7b59880e7b274d390336e31372ec4c6afeb965a1d43935f'
+            '038d7e87cd78725c686e94f9d7766da88f305e666ac2fef172fc40f3ac65d802'
+            'bfa47ab8f04d48acd1f2c037eda1da78c6b8fdb859ffde4c36b2c8086113d63c')
 
 
 export KBUILD_BUILD_HOST=archlinux