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This class is intended to replace all IOAddress usages in the Kernel codebase altogether. The idea is to ensure IO can be done in arch-specific manner that is determined mostly in compile-time, but to still be able to use most of the Kernel code in non-x86 builds. Specific devices that rely on x86-specific IO instructions are already placed in the Arch/x86 directory and are omitted for non-x86 builds. The reason this works so well is the fact that x86 IO space acts in a similar fashion to the traditional memory space being available in most CPU architectures - the x86 IO space is essentially just an array of bytes like the physical memory address space, but requires x86 IO instructions to load and store data. Therefore, many devices allow host software to interact with the hardware registers in both ways, with a noticeable trend even in the modern x86 hardware to move away from the old x86 IO space to exclusively using memory-mapped IO. Therefore, the IOWindow class encapsulates both methods for x86 builds. The idea is to allow PCI devices to be used in either way in x86 builds, so when trying to map an IOWindow on a PCI BAR, the Kernel will try to find the proper method being declared with the PCI BAR flags. For old PCI hardware on non-x86 builds this might turn into a problem as we can't use port mapped IO, so the Kernel will gracefully fail with ENOTSUP error code if that's the case, as there's really nothing we can do within such case. For general IO, the read{8,16,32} and write{8,16,32} methods are available as a convenient API for other places in the Kernel. There are simply no direct 64-bit IO API methods yet, as it's not needed right now and is not considered to be Arch-agnostic too - the x86 IO space doesn't support generating 64 bit cycle on IO bus and instead requires two 2 32-bit accesses. If for whatever reason it appears to be necessary to do IO in such manner, it could probably be added with some neat tricks to do so. It is recommended to use Memory::TypedMapping struct if direct 64 bit IO is actually needed.
163 lines
5.6 KiB
C++
163 lines
5.6 KiB
C++
/*
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* Copyright (c) 2022, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/ByteReader.h>
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#include <AK/Platform.h>
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#include <AK/Types.h>
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#if ARCH(I386) || ARCH(X86_64)
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# include <Kernel/Arch/x86/IO.h>
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#endif
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#include <Kernel/Bus/PCI/Definitions.h>
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#include <Kernel/Memory/TypedMapping.h>
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#include <Kernel/PhysicalAddress.h>
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namespace Kernel {
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class IOWindow {
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public:
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enum class SpaceType {
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#if ARCH(I386) || ARCH(X86_64)
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IO,
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#endif
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Memory,
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};
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SpaceType space_type() const { return m_space_type; }
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template<typename V>
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void write();
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#if ARCH(I386) || ARCH(X86_64)
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static ErrorOr<NonnullOwnPtr<IOWindow>> create_for_io_space(IOAddress, u64 space_length);
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#endif
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static ErrorOr<NonnullOwnPtr<IOWindow>> create_for_pci_device_bar(PCI::DeviceIdentifier const&, PCI::HeaderType0BaseRegister, u64 space_length);
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static ErrorOr<NonnullOwnPtr<IOWindow>> create_for_pci_device_bar(PCI::DeviceIdentifier const&, PCI::HeaderType0BaseRegister);
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static ErrorOr<NonnullOwnPtr<IOWindow>> create_for_pci_device_bar(PCI::Address const&, PCI::HeaderType0BaseRegister, u64 space_length);
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static ErrorOr<NonnullOwnPtr<IOWindow>> create_for_pci_device_bar(PCI::Address const&, PCI::HeaderType0BaseRegister);
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ErrorOr<NonnullOwnPtr<IOWindow>> create_from_io_window_with_offset(u64 offset, u64 space_length);
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ErrorOr<NonnullOwnPtr<IOWindow>> create_from_io_window_with_offset(u64 offset);
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bool is_access_valid(u64 offset, size_t byte_size_access) const;
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u8 read8(u64 offset);
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u16 read16(u64 offset);
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u32 read32(u64 offset);
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void write8(u64 offset, u8);
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void write16(u64 offset, u16);
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void write32(u64 offset, u32);
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// Note: These methods are useful in exceptional cases where we need to do unaligned
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// access. This mostly happens on emulators and hypervisors (such as VMWare) because they don't enforce aligned access
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// to IO and sometimes even require such access, so we have to use these functions.
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void write32_unaligned(u64 offset, u32);
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u32 read32_unaligned(u64 offset);
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bool operator==(IOWindow const& other) const = delete;
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bool operator!=(IOWindow const& other) const = delete;
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bool operator>(IOWindow const& other) const = delete;
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bool operator>=(IOWindow const& other) const = delete;
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bool operator<(IOWindow const& other) const = delete;
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bool operator<=(IOWindow const& other) const = delete;
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~IOWindow();
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PhysicalAddress as_physical_memory_address() const;
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#if ARCH(I386) || ARCH(X86_64)
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IOAddress as_io_address() const;
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#endif
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private:
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explicit IOWindow(NonnullOwnPtr<Memory::TypedMapping<volatile u8>>);
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u8 volatile* as_memory_address_pointer();
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#if ARCH(I386) || ARCH(X86_64)
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struct IOAddressData {
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public:
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IOAddressData(u64 address, u64 space_length)
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: m_address(address)
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, m_space_length(space_length)
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{
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}
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u64 address() const { return m_address; }
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u64 space_length() const { return m_space_length; }
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private:
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u64 m_address { 0 };
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u64 m_space_length { 0 };
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};
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explicit IOWindow(NonnullOwnPtr<IOAddressData>);
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#endif
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bool is_access_in_range(u64 offset, size_t byte_size_access) const;
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bool is_access_aligned(u64 offset, size_t byte_size_access) const;
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template<typename T>
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ALWAYS_INLINE void in(u64 start_offset, T& data)
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{
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#if ARCH(I386) || ARCH(X86_64)
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if (m_space_type == SpaceType::IO) {
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data = as_io_address().offset(start_offset).in<T>();
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return;
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}
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#endif
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VERIFY(m_space_type == SpaceType::Memory);
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VERIFY(m_memory_mapped_range);
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// Note: For memory-mapped IO we simply never allow unaligned access as it
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// can cause problems with strict bare metal hardware. For example, some XHCI USB controllers
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// might completely lock up because of an unaligned memory access to their registers.
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VERIFY((start_offset % sizeof(T)) == 0);
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data = *(volatile T*)(as_memory_address_pointer() + start_offset);
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}
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template<typename T>
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ALWAYS_INLINE void out(u64 start_offset, T value)
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{
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#if ARCH(I386) || ARCH(X86_64)
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if (m_space_type == SpaceType::IO) {
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VERIFY(m_io_range);
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as_io_address().offset(start_offset).out<T>(value);
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return;
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}
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#endif
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VERIFY(m_space_type == SpaceType::Memory);
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VERIFY(m_memory_mapped_range);
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// Note: For memory-mapped IO we simply never allow unaligned access as it
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// can cause problems with strict bare metal hardware. For example, some XHCI USB controllers
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// might completely lock up because of an unaligned memory access to their registers.
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VERIFY((start_offset % sizeof(T)) == 0);
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*(volatile T*)(as_memory_address_pointer() + start_offset) = value;
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}
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SpaceType m_space_type { SpaceType::Memory };
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OwnPtr<Memory::TypedMapping<volatile u8>> m_memory_mapped_range;
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#if ARCH(I386) || ARCH(X86_64)
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OwnPtr<IOAddressData> m_io_range;
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#endif
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};
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}
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template<>
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struct AK::Formatter<Kernel::IOWindow> : AK::Formatter<FormatString> {
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ErrorOr<void> format(FormatBuilder& builder, Kernel::IOWindow const& value)
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{
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#if ARCH(I386) || ARCH(X86_64)
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if (value.space_type() == Kernel::IOWindow::SpaceType::IO)
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return Formatter<FormatString>::format(builder, "{}"sv, value.as_io_address());
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#endif
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VERIFY(value.space_type() == Kernel::IOWindow::SpaceType::Memory);
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return Formatter<FormatString>::format(builder, "Memory {}"sv, value.as_physical_memory_address());
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}
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};
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