475 lines
17 KiB
C++
475 lines
17 KiB
C++
/*
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* Copyright (c) 2018-2021, Andreas Kling <kling@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#include <AK/MACAddress.h>
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#include <Kernel/Bus/PCI/API.h>
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#include <Kernel/Bus/PCI/IDs.h>
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#include <Kernel/Debug.h>
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#include <Kernel/Net/Intel/E1000NetworkAdapter.h>
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#include <Kernel/Net/NetworkingManagement.h>
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#include <Kernel/Sections.h>
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namespace Kernel {
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#define REG_CTRL 0x0000
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#define REG_STATUS 0x0008
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#define REG_EEPROM 0x0014
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#define REG_CTRL_EXT 0x0018
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#define REG_INTERRUPT_CAUSE_READ 0x00C0
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#define REG_INTERRUPT_RATE 0x00C4
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#define REG_INTERRUPT_MASK_SET 0x00D0
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#define REG_INTERRUPT_MASK_CLEAR 0x00D8
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#define REG_RCTRL 0x0100
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#define REG_RXDESCLO 0x2800
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#define REG_RXDESCHI 0x2804
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#define REG_RXDESCLEN 0x2808
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#define REG_RXDESCHEAD 0x2810
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#define REG_RXDESCTAIL 0x2818
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#define REG_TCTRL 0x0400
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#define REG_TXDESCLO 0x3800
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#define REG_TXDESCHI 0x3804
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#define REG_TXDESCLEN 0x3808
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#define REG_TXDESCHEAD 0x3810
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#define REG_TXDESCTAIL 0x3818
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#define REG_RDTR 0x2820 // RX Delay Timer Register
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#define REG_RXDCTL 0x3828 // RX Descriptor Control
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#define REG_RADV 0x282C // RX Int. Absolute Delay Timer
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#define REG_RSRPD 0x2C00 // RX Small Packet Detect Interrupt
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#define REG_TIPG 0x0410 // Transmit Inter Packet Gap
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#define ECTRL_SLU 0x40 // set link up
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#define RCTL_EN (1 << 1) // Receiver Enable
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#define RCTL_SBP (1 << 2) // Store Bad Packets
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#define RCTL_UPE (1 << 3) // Unicast Promiscuous Enabled
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#define RCTL_MPE (1 << 4) // Multicast Promiscuous Enabled
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#define RCTL_LPE (1 << 5) // Long Packet Reception Enable
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#define RCTL_LBM_NONE (0 << 6) // No Loopback
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#define RCTL_LBM_PHY (3 << 6) // PHY or external SerDesc loopback
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#define RTCL_RDMTS_HALF (0 << 8) // Free Buffer Threshold is 1/2 of RDLEN
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#define RTCL_RDMTS_QUARTER (1 << 8) // Free Buffer Threshold is 1/4 of RDLEN
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#define RTCL_RDMTS_EIGHTH (2 << 8) // Free Buffer Threshold is 1/8 of RDLEN
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#define RCTL_MO_36 (0 << 12) // Multicast Offset - bits 47:36
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#define RCTL_MO_35 (1 << 12) // Multicast Offset - bits 46:35
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#define RCTL_MO_34 (2 << 12) // Multicast Offset - bits 45:34
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#define RCTL_MO_32 (3 << 12) // Multicast Offset - bits 43:32
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#define RCTL_BAM (1 << 15) // Broadcast Accept Mode
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#define RCTL_VFE (1 << 18) // VLAN Filter Enable
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#define RCTL_CFIEN (1 << 19) // Canonical Form Indicator Enable
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#define RCTL_CFI (1 << 20) // Canonical Form Indicator Bit Value
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#define RCTL_DPF (1 << 22) // Discard Pause Frames
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#define RCTL_PMCF (1 << 23) // Pass MAC Control Frames
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#define RCTL_SECRC (1 << 26) // Strip Ethernet CRC
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// Buffer Sizes
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#define RCTL_BSIZE_256 (3 << 16)
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#define RCTL_BSIZE_512 (2 << 16)
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#define RCTL_BSIZE_1024 (1 << 16)
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#define RCTL_BSIZE_2048 (0 << 16)
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#define RCTL_BSIZE_4096 ((3 << 16) | (1 << 25))
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#define RCTL_BSIZE_8192 ((2 << 16) | (1 << 25))
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#define RCTL_BSIZE_16384 ((1 << 16) | (1 << 25))
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// Transmit Command
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#define CMD_EOP (1 << 0) // End of Packet
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#define CMD_IFCS (1 << 1) // Insert FCS
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#define CMD_IC (1 << 2) // Insert Checksum
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#define CMD_RS (1 << 3) // Report Status
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#define CMD_RPS (1 << 4) // Report Packet Sent
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#define CMD_VLE (1 << 6) // VLAN Packet Enable
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#define CMD_IDE (1 << 7) // Interrupt Delay Enable
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// TCTL Register
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#define TCTL_EN (1 << 1) // Transmit Enable
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#define TCTL_PSP (1 << 3) // Pad Short Packets
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#define TCTL_CT_SHIFT 4 // Collision Threshold
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#define TCTL_COLD_SHIFT 12 // Collision Distance
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#define TCTL_SWXOFF (1 << 22) // Software XOFF Transmission
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#define TCTL_RTLC (1 << 24) // Re-transmit on Late Collision
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#define TSTA_DD (1 << 0) // Descriptor Done
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#define TSTA_EC (1 << 1) // Excess Collisions
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#define TSTA_LC (1 << 2) // Late Collision
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#define LSTA_TU (1 << 3) // Transmit Underrun
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// STATUS Register
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#define STATUS_FD 0x01
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#define STATUS_LU 0x02
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#define STATUS_TXOFF 0x08
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#define STATUS_SPEED 0xC0
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#define STATUS_SPEED_10MB 0x00
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#define STATUS_SPEED_100MB 0x40
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#define STATUS_SPEED_1000MB1 0x80
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#define STATUS_SPEED_1000MB2 0xC0
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// Interrupt Masks
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#define INTERRUPT_TXDW (1 << 0)
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#define INTERRUPT_TXQE (1 << 1)
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#define INTERRUPT_LSC (1 << 2)
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#define INTERRUPT_RXSEQ (1 << 3)
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#define INTERRUPT_RXDMT0 (1 << 4)
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#define INTERRUPT_RXO (1 << 6)
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#define INTERRUPT_RXT0 (1 << 7)
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#define INTERRUPT_MDAC (1 << 9)
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#define INTERRUPT_RXCFG (1 << 10)
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#define INTERRUPT_PHYINT (1 << 12)
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#define INTERRUPT_TXD_LOW (1 << 15)
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#define INTERRUPT_SRPD (1 << 16)
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// https://www.intel.com/content/dam/doc/manual/pci-pci-x-family-gbe-controllers-software-dev-manual.pdf Section 5.2
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UNMAP_AFTER_INIT static bool is_valid_device_id(u16 device_id)
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{
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// FIXME: It would be nice to distinguish which particular device it is.
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// Especially since it's needed to determine which registers we can access.
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// The reason I haven't done it now is because there's some IDs with multiple devices
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// and some devices with multiple IDs.
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switch (device_id) {
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case 0x1019: // 82547EI-A0, 82547EI-A1, 82547EI-B0, 82547GI-B0
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case 0x101A: // 82547EI-B0
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case 0x1010: // 82546EB-A1
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case 0x1012: // 82546EB-A1
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case 0x101D: // 82546EB-A1
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case 0x1079: // 82546GB-B0
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case 0x107A: // 82546GB-B0
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case 0x107B: // 82546GB-B0
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case 0x100F: // 82545EM-A
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case 0x1011: // 82545EM-A
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case 0x1026: // 82545GM-B
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case 0x1027: // 82545GM-B
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case 0x1028: // 82545GM-B
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case 0x1107: // 82544EI-A4
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case 0x1112: // 82544GC-A4
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case 0x1013: // 82541EI-A0, 82541EI-B0
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case 0x1018: // 82541EI-B0
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case 0x1076: // 82541GI-B1, 82541PI-C0
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case 0x1077: // 82541GI-B1
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case 0x1078: // 82541ER-C0
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case 0x1017: // 82540EP-A
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case 0x1016: // 82540EP-A
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case 0x100E: // 82540EM-A
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case 0x1015: // 82540EM-A
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return true;
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default:
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return false;
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}
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}
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UNMAP_AFTER_INIT ErrorOr<bool> E1000NetworkAdapter::probe(PCI::DeviceIdentifier const& pci_device_identifier)
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{
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if (pci_device_identifier.hardware_id().vendor_id != PCI::VendorID::Intel)
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return false;
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return is_valid_device_id(pci_device_identifier.hardware_id().device_id);
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}
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UNMAP_AFTER_INIT ErrorOr<NonnullRefPtr<NetworkAdapter>> E1000NetworkAdapter::create(PCI::DeviceIdentifier const& pci_device_identifier)
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{
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u8 irq = pci_device_identifier.interrupt_line().value();
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auto interface_name = TRY(NetworkingManagement::generate_interface_name_from_pci_address(pci_device_identifier));
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auto registers_io_window = TRY(IOWindow::create_for_pci_device_bar(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR0));
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auto rx_buffer_region = TRY(MM.allocate_contiguous_kernel_region(rx_buffer_size * number_of_rx_descriptors, "E1000 RX buffers"sv, Memory::Region::Access::ReadWrite));
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auto tx_buffer_region = MM.allocate_contiguous_kernel_region(tx_buffer_size * number_of_tx_descriptors, "E1000 TX buffers"sv, Memory::Region::Access::ReadWrite).release_value();
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auto rx_descriptors_region = TRY(MM.allocate_contiguous_kernel_region(TRY(Memory::page_round_up(sizeof(e1000_rx_desc) * number_of_rx_descriptors)), "E1000 RX Descriptors"sv, Memory::Region::Access::ReadWrite));
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auto tx_descriptors_region = TRY(MM.allocate_contiguous_kernel_region(TRY(Memory::page_round_up(sizeof(e1000_tx_desc) * number_of_tx_descriptors)), "E1000 TX Descriptors"sv, Memory::Region::Access::ReadWrite));
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return TRY(adopt_nonnull_ref_or_enomem(new (nothrow) E1000NetworkAdapter(pci_device_identifier,
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irq, move(registers_io_window),
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move(rx_buffer_region),
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move(tx_buffer_region),
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move(rx_descriptors_region),
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move(tx_descriptors_region),
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move(interface_name))));
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}
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UNMAP_AFTER_INIT ErrorOr<void> E1000NetworkAdapter::initialize(Badge<NetworkingManagement>)
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{
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dmesgln_pci(*this, "Found @ {}", device_identifier().address());
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enable_bus_mastering(device_identifier());
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dmesgln_pci(*this, "IO base: {}", m_registers_io_window);
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dmesgln_pci(*this, "Interrupt line: {}", interrupt_number());
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detect_eeprom();
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dmesgln_pci(*this, "Has EEPROM? {}", m_has_eeprom);
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read_mac_address();
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auto const& mac = mac_address();
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dmesgln_pci(*this, "MAC address: {}", mac.to_string());
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initialize_rx_descriptors();
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initialize_tx_descriptors();
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setup_link();
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setup_interrupts();
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m_link_up = ((in32(REG_STATUS) & STATUS_LU) != 0);
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return {};
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}
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UNMAP_AFTER_INIT void E1000NetworkAdapter::setup_link()
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{
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u32 flags = in32(REG_CTRL);
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out32(REG_CTRL, flags | ECTRL_SLU);
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}
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UNMAP_AFTER_INIT void E1000NetworkAdapter::setup_interrupts()
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{
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out32(REG_INTERRUPT_RATE, 6000); // Interrupt rate of 1.536 milliseconds
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out32(REG_INTERRUPT_MASK_SET, INTERRUPT_LSC | INTERRUPT_RXT0 | INTERRUPT_RXO);
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in32(REG_INTERRUPT_CAUSE_READ);
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enable_irq();
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}
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UNMAP_AFTER_INIT E1000NetworkAdapter::E1000NetworkAdapter(PCI::DeviceIdentifier const& device_identifier, u8 irq,
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NonnullOwnPtr<IOWindow> registers_io_window, NonnullOwnPtr<Memory::Region> rx_buffer_region,
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NonnullOwnPtr<Memory::Region> tx_buffer_region, NonnullOwnPtr<Memory::Region> rx_descriptors_region,
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NonnullOwnPtr<Memory::Region> tx_descriptors_region, NonnullOwnPtr<KString> interface_name)
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: NetworkAdapter(move(interface_name))
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, PCI::Device(device_identifier)
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, IRQHandler(irq)
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, m_registers_io_window(move(registers_io_window))
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, m_rx_descriptors_region(move(rx_descriptors_region))
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, m_tx_descriptors_region(move(tx_descriptors_region))
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, m_rx_buffer_region(move(rx_buffer_region))
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, m_tx_buffer_region(move(tx_buffer_region))
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{
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}
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UNMAP_AFTER_INIT E1000NetworkAdapter::~E1000NetworkAdapter() = default;
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bool E1000NetworkAdapter::handle_irq(RegisterState const&)
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{
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u32 status = in32(REG_INTERRUPT_CAUSE_READ);
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m_entropy_source.add_random_event(status);
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if (status == 0)
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return false;
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if (status & INTERRUPT_LSC) {
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u32 flags = in32(REG_CTRL);
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out32(REG_CTRL, flags | ECTRL_SLU);
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m_link_up = ((in32(REG_STATUS) & STATUS_LU) != 0);
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}
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if (status & INTERRUPT_RXDMT0) {
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// Threshold OK?
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}
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if (status & INTERRUPT_RXO) {
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dbgln_if(E1000_DEBUG, "E1000: RX buffer overrun");
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}
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if (status & INTERRUPT_RXT0) {
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receive();
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}
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m_wait_queue.wake_all();
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out32(REG_INTERRUPT_CAUSE_READ, 0xffffffff);
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return true;
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}
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UNMAP_AFTER_INIT void E1000NetworkAdapter::detect_eeprom()
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{
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out32(REG_EEPROM, 0x1);
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for (int i = 0; i < 999; ++i) {
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u32 data = in32(REG_EEPROM);
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if (data & 0x10) {
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m_has_eeprom = true;
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return;
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}
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}
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m_has_eeprom = false;
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}
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UNMAP_AFTER_INIT u32 E1000NetworkAdapter::read_eeprom(u8 address)
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{
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u16 data = 0;
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u32 tmp = 0;
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if (m_has_eeprom) {
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out32(REG_EEPROM, ((u32)address << 8) | 1);
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while (!((tmp = in32(REG_EEPROM)) & (1 << 4)))
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;
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} else {
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out32(REG_EEPROM, ((u32)address << 2) | 1);
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while (!((tmp = in32(REG_EEPROM)) & (1 << 1)))
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;
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}
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data = (tmp >> 16) & 0xffff;
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return data;
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}
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UNMAP_AFTER_INIT void E1000NetworkAdapter::read_mac_address()
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{
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if (m_has_eeprom) {
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MACAddress mac {};
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u32 tmp = read_eeprom(0);
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mac[0] = tmp & 0xff;
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mac[1] = tmp >> 8;
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tmp = read_eeprom(1);
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mac[2] = tmp & 0xff;
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mac[3] = tmp >> 8;
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tmp = read_eeprom(2);
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mac[4] = tmp & 0xff;
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mac[5] = tmp >> 8;
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set_mac_address(mac);
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} else {
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VERIFY_NOT_REACHED();
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}
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}
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UNMAP_AFTER_INIT void E1000NetworkAdapter::initialize_rx_descriptors()
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{
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auto* rx_descriptors = (e1000_tx_desc*)m_rx_descriptors_region->vaddr().as_ptr();
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constexpr auto rx_buffer_page_count = rx_buffer_size / PAGE_SIZE;
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for (size_t i = 0; i < number_of_rx_descriptors; ++i) {
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auto& descriptor = rx_descriptors[i];
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m_rx_buffers[i] = m_rx_buffer_region->vaddr().as_ptr() + rx_buffer_size * i;
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descriptor.addr = m_rx_buffer_region->physical_page(rx_buffer_page_count * i)->paddr().get();
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descriptor.status = 0;
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}
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out32(REG_RXDESCLO, m_rx_descriptors_region->physical_page(0)->paddr().get());
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out32(REG_RXDESCHI, 0);
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out32(REG_RXDESCLEN, number_of_rx_descriptors * sizeof(e1000_rx_desc));
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out32(REG_RXDESCHEAD, 0);
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out32(REG_RXDESCTAIL, number_of_rx_descriptors - 1);
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out32(REG_RCTRL, RCTL_EN | RCTL_SBP | RCTL_UPE | RCTL_MPE | RCTL_LBM_NONE | RTCL_RDMTS_HALF | RCTL_BAM | RCTL_SECRC | RCTL_BSIZE_8192);
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}
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UNMAP_AFTER_INIT void E1000NetworkAdapter::initialize_tx_descriptors()
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{
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auto* tx_descriptors = (e1000_tx_desc*)m_tx_descriptors_region->vaddr().as_ptr();
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constexpr auto tx_buffer_page_count = tx_buffer_size / PAGE_SIZE;
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for (size_t i = 0; i < number_of_tx_descriptors; ++i) {
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auto& descriptor = tx_descriptors[i];
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m_tx_buffers[i] = m_tx_buffer_region->vaddr().as_ptr() + tx_buffer_size * i;
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descriptor.addr = m_tx_buffer_region->physical_page(tx_buffer_page_count * i)->paddr().get();
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descriptor.cmd = 0;
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}
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out32(REG_TXDESCLO, m_tx_descriptors_region->physical_page(0)->paddr().get());
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out32(REG_TXDESCHI, 0);
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out32(REG_TXDESCLEN, number_of_tx_descriptors * sizeof(e1000_tx_desc));
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out32(REG_TXDESCHEAD, 0);
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out32(REG_TXDESCTAIL, 0);
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out32(REG_TCTRL, in32(REG_TCTRL) | TCTL_EN | TCTL_PSP);
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out32(REG_TIPG, 0x0060200A);
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}
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void E1000NetworkAdapter::out8(u16 address, u8 data)
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{
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dbgln_if(E1000_DEBUG, "E1000: OUT8 {:#02x} @ {:#04x}", data, address);
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m_registers_io_window->write8(address, data);
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}
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void E1000NetworkAdapter::out16(u16 address, u16 data)
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{
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dbgln_if(E1000_DEBUG, "E1000: OUT16 {:#04x} @ {:#04x}", data, address);
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m_registers_io_window->write16(address, data);
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}
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void E1000NetworkAdapter::out32(u16 address, u32 data)
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{
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dbgln_if(E1000_DEBUG, "E1000: OUT32 {:#08x} @ {:#04x}", data, address);
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m_registers_io_window->write32(address, data);
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}
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u8 E1000NetworkAdapter::in8(u16 address)
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{
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dbgln_if(E1000_DEBUG, "E1000: IN8 @ {:#04x}", address);
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return m_registers_io_window->read8(address);
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}
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u16 E1000NetworkAdapter::in16(u16 address)
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{
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dbgln_if(E1000_DEBUG, "E1000: IN16 @ {:#04x}", address);
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return m_registers_io_window->read16(address);
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}
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u32 E1000NetworkAdapter::in32(u16 address)
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{
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dbgln_if(E1000_DEBUG, "E1000: IN32 @ {:#04x}", address);
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return m_registers_io_window->read32(address);
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}
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void E1000NetworkAdapter::send_raw(ReadonlyBytes payload)
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{
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disable_irq();
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size_t tx_current = in32(REG_TXDESCTAIL) % number_of_tx_descriptors;
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dbgln_if(E1000_DEBUG, "E1000: Sending packet ({} bytes)", payload.size());
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auto* tx_descriptors = (e1000_tx_desc*)m_tx_descriptors_region->vaddr().as_ptr();
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auto& descriptor = tx_descriptors[tx_current];
|
|
VERIFY(payload.size() <= 8192);
|
|
auto* vptr = (void*)m_tx_buffers[tx_current];
|
|
memcpy(vptr, payload.data(), payload.size());
|
|
descriptor.length = payload.size();
|
|
descriptor.status = 0;
|
|
descriptor.cmd = CMD_EOP | CMD_IFCS | CMD_RS;
|
|
dbgln_if(E1000_DEBUG, "E1000: Using tx descriptor {} (head is at {})", tx_current, in32(REG_TXDESCHEAD));
|
|
tx_current = (tx_current + 1) % number_of_tx_descriptors;
|
|
Processor::disable_interrupts();
|
|
enable_irq();
|
|
out32(REG_TXDESCTAIL, tx_current);
|
|
for (;;) {
|
|
if (descriptor.status) {
|
|
Processor::enable_interrupts();
|
|
break;
|
|
}
|
|
m_wait_queue.wait_forever("E1000NetworkAdapter"sv);
|
|
}
|
|
dbgln_if(E1000_DEBUG, "E1000: Sent packet, status is now {:#02x}!", (u8)descriptor.status);
|
|
}
|
|
|
|
void E1000NetworkAdapter::receive()
|
|
{
|
|
auto* rx_descriptors = (e1000_tx_desc*)m_rx_descriptors_region->vaddr().as_ptr();
|
|
u32 rx_current;
|
|
for (;;) {
|
|
rx_current = in32(REG_RXDESCTAIL) % number_of_rx_descriptors;
|
|
rx_current = (rx_current + 1) % number_of_rx_descriptors;
|
|
if (!(rx_descriptors[rx_current].status & 1))
|
|
break;
|
|
auto* buffer = m_rx_buffers[rx_current];
|
|
u16 length = rx_descriptors[rx_current].length;
|
|
VERIFY(length <= 8192);
|
|
dbgln_if(E1000_DEBUG, "E1000: Received 1 packet @ {:p} ({} bytes)", buffer, length);
|
|
did_receive({ buffer, length });
|
|
rx_descriptors[rx_current].status = 0;
|
|
out32(REG_RXDESCTAIL, rx_current);
|
|
}
|
|
}
|
|
|
|
i32 E1000NetworkAdapter::link_speed()
|
|
{
|
|
if (!link_up())
|
|
return NetworkAdapter::LINKSPEED_INVALID;
|
|
|
|
u32 speed = in32(REG_STATUS) & STATUS_SPEED;
|
|
switch (speed) {
|
|
case STATUS_SPEED_10MB:
|
|
return 10;
|
|
case STATUS_SPEED_100MB:
|
|
return 100;
|
|
case STATUS_SPEED_1000MB1:
|
|
case STATUS_SPEED_1000MB2:
|
|
return 1000;
|
|
default:
|
|
return NetworkAdapter::LINKSPEED_INVALID;
|
|
}
|
|
}
|
|
|
|
bool E1000NetworkAdapter::link_full_duplex()
|
|
{
|
|
u32 status = in32(REG_STATUS);
|
|
return !!(status & STATUS_FD);
|
|
}
|
|
|
|
}
|