NE2000NetworkAdapter.cpp 18 KB

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  1. /*
  2. * Copyright (c) 2021, the SerenityOS developers.
  3. *
  4. * SPDX-License-Identifier: BSD-2-Clause
  5. */
  6. #include <AK/MACAddress.h>
  7. #include <Kernel/Bus/PCI/API.h>
  8. #include <Kernel/Debug.h>
  9. #include <Kernel/IO.h>
  10. #include <Kernel/Net/NE2000NetworkAdapter.h>
  11. #include <Kernel/Sections.h>
  12. namespace Kernel {
  13. /**
  14. * The NE2000 is an ancient 10 Mib/s Ethernet network card standard by Novell
  15. * from the late 80s. Based on National Semiconductor's DP8390 Ethernet chip
  16. * or compatible, they were known to be extremely bare-bones but also very
  17. * cheap entry-level cards.
  18. *
  19. * QEMU supports them with the ne2k_{isa,pci} devices, physical incarnations
  20. * were available from different manufacturers for the ISA bus and later on
  21. * the PCI bus, including:
  22. * - Realtek's RTL8029
  23. * - VIA Technologies, Inc.'s VT86C926
  24. *
  25. * Official documentation from National Semiconductor includes:
  26. * - Datasheet "DP8390D/NS32490D NIC Network Interface Controller"
  27. * - Application Note 874 "Writing Drivers for the DP8390 NIC Family of Ethernet Controllers"
  28. *
  29. * This driver supports only the PCI variant.
  30. *
  31. * Remember, friends don't let friends use NE2000 network cards :^)
  32. */
  33. // Page 0 registers
  34. static constexpr u8 REG_RW_COMMAND = 0x00;
  35. static constexpr u8 BIT_COMMAND_STOP = (0b1 << 0);
  36. static constexpr u8 BIT_COMMAND_START = (0b1 << 1);
  37. static constexpr u8 BIT_COMMAND_TXP = (0b1 << 2);
  38. static constexpr u8 BIT_COMMAND_DMA_READ = (0b001 << 3);
  39. static constexpr u8 BIT_COMMAND_DMA_WRITE = (0b010 << 3);
  40. static constexpr u8 BIT_COMMAND_DMA_SEND = (0b011 << 3);
  41. static constexpr u8 BIT_COMMAND_DMA_ABORT = (0b100 << 3);
  42. static constexpr u8 BIT_COMMAND_DMA_FIELD = (0b111 << 3);
  43. static constexpr u8 BIT_COMMAND_PAGE1 = (0b01 << 6);
  44. static constexpr u8 BIT_COMMAND_PAGE2 = (0b10 << 6);
  45. static constexpr u8 BIT_COMMAND_PAGE_FIELD = (0b11 << 6);
  46. static constexpr u8 REG_WR_PAGESTART = 0x01;
  47. static constexpr u8 REG_WR_PAGESTOP = 0x02;
  48. static constexpr u8 REG_RW_BOUNDARY = 0x03;
  49. static constexpr u8 REG_RD_TRANSMITSTATUS = 0x04;
  50. static constexpr u8 REG_WR_TRANSMITPAGE = 0x04;
  51. static constexpr u8 REG_RD_NCR = 0x05;
  52. static constexpr u8 REG_WR_TRANSMITBYTECOUNT0 = 0x05;
  53. static constexpr u8 REG_WR_TRANSMITBYTECOUNT1 = 0x06;
  54. static constexpr u8 REG_RW_INTERRUPTSTATUS = 0x07;
  55. static constexpr u8 REG_RD_CRDMA0 = 0x08;
  56. static constexpr u8 REG_WR_REMOTESTARTADDRESS0 = 0x08;
  57. static constexpr u8 REG_RD_CRDMA1 = 0x09;
  58. static constexpr u8 REG_WR_REMOTESTARTADDRESS1 = 0x09;
  59. static constexpr u8 REG_WR_REMOTEBYTECOUNT0 = 0x0a;
  60. static constexpr u8 REG_WR_REMOTEBYTECOUNT1 = 0x0b;
  61. static constexpr u8 REG_RD_RECEIVESTATUS = 0x0c;
  62. static constexpr u8 BIT_RECEIVESTATUS_PRX = (0b1 << 0);
  63. static constexpr u8 BIT_RECEIVESTATUS_CRC = (0b1 << 1);
  64. static constexpr u8 BIT_RECEIVESTATUS_FAE = (0b1 << 2);
  65. static constexpr u8 BIT_RECEIVESTATUS_FO = (0b1 << 3);
  66. static constexpr u8 BIT_RECEIVESTATUS_MPA = (0b1 << 4);
  67. static constexpr u8 REG_WR_RECEIVECONFIGURATION = 0x0c;
  68. static constexpr u8 BIT_RECEIVECONFIGURATION_SEP = (0b1 << 0);
  69. static constexpr u8 BIT_RECEIVECONFIGURATION_AR = (0b1 << 1);
  70. static constexpr u8 BIT_RECEIVECONFIGURATION_AB = (0b1 << 2);
  71. static constexpr u8 BIT_RECEIVECONFIGURATION_AM = (0b1 << 3);
  72. static constexpr u8 BIT_RECEIVECONFIGURATION_PRO = (0b1 << 4);
  73. static constexpr u8 BIT_RECEIVECONFIGURATION_MON = (0b1 << 5);
  74. static constexpr u8 REG_RD_FAE_TALLY = 0x0d;
  75. static constexpr u8 REG_WR_TRANSMITCONFIGURATION = 0x0d;
  76. static constexpr u8 BIT_WR_TRANSMITCONFIGURATION_LOOPBACK = (0b10 << 0);
  77. static constexpr u8 REG_RD_CRC_TALLY = 0x0e;
  78. static constexpr u8 REG_WR_DATACONFIGURATION = 0x0e;
  79. static constexpr u8 BIT_DATACONFIGURATION_WTS = (0b1 << 0);
  80. static constexpr u8 BIT_DATACONFIGURATION_BOS = (0b1 << 1);
  81. static constexpr u8 BIT_DATACONFIGURATION_LS = (0b1 << 2);
  82. static constexpr u8 BIT_DATACONFIGURATION_FIFO_8B = (0b10 << 5);
  83. static constexpr u8 REG_RD_MISS_PKT_TALLY = 0x0f;
  84. static constexpr u8 REG_WR_INTERRUPTMASK = 0x0f;
  85. static constexpr u8 BIT_INTERRUPTMASK_PRX = (0b1 << 0);
  86. static constexpr u8 BIT_INTERRUPTMASK_PTX = (0b1 << 1);
  87. static constexpr u8 BIT_INTERRUPTMASK_RXE = (0b1 << 2);
  88. static constexpr u8 BIT_INTERRUPTMASK_TXE = (0b1 << 3);
  89. static constexpr u8 BIT_INTERRUPTMASK_OVW = (0b1 << 4);
  90. static constexpr u8 BIT_INTERRUPTMASK_CNT = (0b1 << 5);
  91. static constexpr u8 BIT_INTERRUPTMASK_RDC = (0b1 << 6);
  92. static constexpr u8 BIT_INTERRUPTMASK_RST = (0b1 << 7);
  93. static constexpr u8 REG_RW_IOPORT = 0x10;
  94. // Page 1 registers
  95. static constexpr u8 REG_RW_PHYSICALADDRESS0 = 0x01;
  96. static constexpr u8 REG_RW_CURRENT = 0x07;
  97. static constexpr int NE2K_PAGE_SIZE = 256;
  98. static constexpr int NE2K_RAM_BEGIN = 16384;
  99. static constexpr int NE2K_RAM_END = 32768;
  100. static constexpr int NE2K_RAM_SIZE = NE2K_RAM_END - NE2K_RAM_BEGIN;
  101. static constexpr int NE2K_RAM_SEND_BEGIN = 16384;
  102. static constexpr int NE2K_RAM_SEND_END = 16384 + 6 * NE2K_PAGE_SIZE;
  103. static constexpr int NE2K_RAM_SEND_SIZE = NE2K_RAM_SEND_END - NE2K_RAM_SEND_BEGIN;
  104. static constexpr int NE2K_RAM_RECV_BEGIN = NE2K_RAM_SEND_END;
  105. static constexpr int NE2K_RAM_RECV_END = NE2K_RAM_END;
  106. static constexpr int NE2K_RAM_RECV_SIZE = NE2K_RAM_RECV_END - NE2K_RAM_RECV_BEGIN;
  107. static_assert(NE2K_RAM_BEGIN % NE2K_PAGE_SIZE == 0);
  108. static_assert(NE2K_RAM_END % NE2K_PAGE_SIZE == 0);
  109. static_assert(NE2K_RAM_SEND_BEGIN % NE2K_PAGE_SIZE == 0);
  110. static_assert(NE2K_RAM_SEND_END % NE2K_PAGE_SIZE == 0);
  111. static_assert(NE2K_RAM_RECV_BEGIN % NE2K_PAGE_SIZE == 0);
  112. static_assert(NE2K_RAM_RECV_END % NE2K_PAGE_SIZE == 0);
  113. struct [[gnu::packed]] received_packet_header {
  114. u8 status;
  115. u8 next_packet_page;
  116. u16 length;
  117. };
  118. UNMAP_AFTER_INIT RefPtr<NE2000NetworkAdapter> NE2000NetworkAdapter::try_to_initialize(PCI::DeviceIdentifier const& pci_device_identifier)
  119. {
  120. constexpr auto ne2k_ids = Array {
  121. PCI::HardwareID { 0x10EC, 0x8029 }, // RealTek RTL-8029(AS)
  122. // List of clones, taken from Linux's ne2k-pci.c
  123. PCI::HardwareID { 0x1050, 0x0940 }, // Winbond 89C940
  124. PCI::HardwareID { 0x11f6, 0x1401 }, // Compex RL2000
  125. PCI::HardwareID { 0x8e2e, 0x3000 }, // KTI ET32P2
  126. PCI::HardwareID { 0x4a14, 0x5000 }, // NetVin NV5000SC
  127. PCI::HardwareID { 0x1106, 0x0926 }, // Via 86C926
  128. PCI::HardwareID { 0x10bd, 0x0e34 }, // SureCom NE34
  129. PCI::HardwareID { 0x1050, 0x5a5a }, // Winbond W89C940F
  130. PCI::HardwareID { 0x12c3, 0x0058 }, // Holtek HT80232
  131. PCI::HardwareID { 0x12c3, 0x5598 }, // Holtek HT80229
  132. PCI::HardwareID { 0x8c4a, 0x1980 }, // Winbond W89C940 (misprogrammed)
  133. };
  134. if (!ne2k_ids.span().contains_slow(pci_device_identifier.hardware_id()))
  135. return {};
  136. u8 irq = pci_device_identifier.interrupt_line().value();
  137. return adopt_ref_if_nonnull(new (nothrow) NE2000NetworkAdapter(pci_device_identifier.address(), irq));
  138. }
  139. UNMAP_AFTER_INIT NE2000NetworkAdapter::NE2000NetworkAdapter(PCI::Address address, u8 irq)
  140. : PCI::Device(address)
  141. , IRQHandler(irq)
  142. , m_io_base(PCI::get_BAR0(pci_address()) & ~3)
  143. {
  144. set_interface_name(address);
  145. dmesgln("NE2000: Found @ {}", pci_address());
  146. dmesgln("NE2000: Port base: {}", m_io_base);
  147. dmesgln("NE2000: Interrupt line: {}", interrupt_number());
  148. int ram_errors = ram_test();
  149. dmesgln("NE2000: RAM test {}, got {} byte errors", (ram_errors == 0 ? "OK" : "KO"), ram_errors);
  150. reset();
  151. set_mac_address(m_mac_address);
  152. dmesgln("NE2000: MAC address: {}", m_mac_address.to_string().characters());
  153. enable_irq();
  154. }
  155. UNMAP_AFTER_INIT NE2000NetworkAdapter::~NE2000NetworkAdapter()
  156. {
  157. }
  158. bool NE2000NetworkAdapter::handle_irq(const RegisterState&)
  159. {
  160. u8 status = in8(REG_RW_INTERRUPTSTATUS);
  161. m_entropy_source.add_random_event(status);
  162. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Got interrupt, status={:#02x}", status);
  163. if (status == 0) {
  164. return false;
  165. }
  166. if (status & BIT_INTERRUPTMASK_PRX) {
  167. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Interrupt for packet received");
  168. }
  169. if (status & BIT_INTERRUPTMASK_PTX) {
  170. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Interrupt for packet sent");
  171. }
  172. if (status & BIT_INTERRUPTMASK_RXE) {
  173. u8 fae = in8(REG_RD_FAE_TALLY);
  174. u8 crc = in8(REG_RD_CRC_TALLY);
  175. u8 miss = in8(REG_RD_MISS_PKT_TALLY);
  176. dmesgln("NE2000NetworkAdapter: Packet reception error framing={} crc={} missed={}", fae, crc, miss);
  177. // TODO: handle counters
  178. }
  179. if (status & BIT_INTERRUPTMASK_TXE) {
  180. dmesgln("NE2000NetworkAdapter: Packet transmission error");
  181. }
  182. if (status & BIT_INTERRUPTMASK_OVW) {
  183. dmesgln("NE2000NetworkAdapter: Ring buffer reception overflow error");
  184. // TODO: handle counters
  185. }
  186. if (status & BIT_INTERRUPTMASK_CNT) {
  187. dmesgln("NE2000NetworkAdapter: Counter overflow error");
  188. // TODO: handle counters
  189. }
  190. if (status & BIT_INTERRUPTMASK_RST) {
  191. dmesgln("NE2000NetworkAdapter: NIC requires reset due to packet reception overflow");
  192. // TODO: proper reset procedure
  193. reset();
  194. }
  195. receive();
  196. m_wait_queue.wake_all();
  197. out8(REG_RW_INTERRUPTSTATUS, status);
  198. return true;
  199. }
  200. UNMAP_AFTER_INIT int NE2000NetworkAdapter::ram_test()
  201. {
  202. IOAddress io(PCI::get_BAR0(pci_address()) & ~3);
  203. int errors = 0;
  204. out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_STOP);
  205. #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
  206. out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_WTS);
  207. #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
  208. out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_BOS | BIT_DATACONFIGURATION_WTS);
  209. #else
  210. # error Unknown byte order
  211. #endif
  212. out8(REG_WR_REMOTEBYTECOUNT0, 0x00);
  213. out8(REG_WR_REMOTEBYTECOUNT1, 0x00);
  214. out8(REG_WR_RECEIVECONFIGURATION, BIT_RECEIVECONFIGURATION_MON);
  215. out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_START);
  216. Array<u8, NE2K_RAM_SIZE> buffer;
  217. const u8 patterns[3] = { 0x5a, 0xff, 0x00 };
  218. for (int i = 0; i < 3; ++i) {
  219. for (size_t j = 0; j < buffer.size(); ++j)
  220. buffer[j] = patterns[i];
  221. rdma_write(NE2K_RAM_BEGIN, buffer);
  222. rdma_read(NE2K_RAM_BEGIN, buffer);
  223. for (size_t j = 0; j < buffer.size(); ++j) {
  224. if (buffer[j] != patterns[i]) {
  225. if (errors < 16)
  226. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Bad adapter RAM @ {} expected={} got={}", PhysicalAddress(NE2K_RAM_BEGIN + j), patterns[i], buffer[j]);
  227. else if (errors == 16)
  228. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Too many RAM errors, silencing further output");
  229. errors++;
  230. }
  231. }
  232. }
  233. return errors;
  234. }
  235. void NE2000NetworkAdapter::reset()
  236. {
  237. const u8 interrupt_mask = BIT_INTERRUPTMASK_PRX | BIT_INTERRUPTMASK_PTX | BIT_INTERRUPTMASK_RXE | BIT_INTERRUPTMASK_TXE | BIT_INTERRUPTMASK_OVW | BIT_INTERRUPTMASK_CNT;
  238. u8 prom[32];
  239. // Taken from DP8390D's datasheet section 11.0, "Initialization Procedures"
  240. out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_STOP);
  241. #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
  242. out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_WTS);
  243. #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
  244. out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_BOS | BIT_DATACONFIGURATION_WTS);
  245. #else
  246. # error Unknown byte order
  247. #endif
  248. out8(REG_WR_REMOTEBYTECOUNT0, 0x00);
  249. out8(REG_WR_REMOTEBYTECOUNT1, 0x00);
  250. out8(REG_WR_RECEIVECONFIGURATION, BIT_RECEIVECONFIGURATION_AB | BIT_RECEIVECONFIGURATION_AR);
  251. out8(REG_WR_TRANSMITCONFIGURATION, BIT_WR_TRANSMITCONFIGURATION_LOOPBACK);
  252. m_ring_read_ptr = NE2K_RAM_RECV_BEGIN >> 8;
  253. out8(REG_WR_PAGESTART, NE2K_RAM_RECV_BEGIN >> 8);
  254. out8(REG_RW_BOUNDARY, NE2K_RAM_RECV_BEGIN >> 8);
  255. out8(REG_WR_PAGESTOP, NE2K_RAM_RECV_END >> 8);
  256. out8(REG_RW_INTERRUPTSTATUS, 0xff);
  257. out8(REG_WR_INTERRUPTMASK, interrupt_mask);
  258. rdma_read(0, Bytes(prom, sizeof(prom)));
  259. for (int i = 0; i < 6; i++) {
  260. m_mac_address[i] = prom[i * 2];
  261. }
  262. out8(REG_RW_COMMAND, BIT_COMMAND_PAGE1 | BIT_COMMAND_DMA_ABORT | BIT_COMMAND_STOP);
  263. for (int i = 0; i < 6; i++) {
  264. out8(REG_RW_PHYSICALADDRESS0 + i, m_mac_address[i]);
  265. }
  266. out8(REG_RW_CURRENT, NE2K_RAM_RECV_BEGIN >> 8);
  267. out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_START);
  268. out8(REG_WR_TRANSMITCONFIGURATION, 0xe0);
  269. }
  270. void NE2000NetworkAdapter::rdma_read(size_t address, Bytes payload)
  271. {
  272. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: DMA read @ {} length={}", PhysicalAddress(address), payload.size());
  273. u8 command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_PAGE_FIELD | BIT_COMMAND_DMA_FIELD);
  274. out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_ABORT);
  275. out8(REG_RW_INTERRUPTSTATUS, BIT_INTERRUPTMASK_RDC);
  276. out8(REG_WR_REMOTEBYTECOUNT0, payload.size());
  277. out8(REG_WR_REMOTEBYTECOUNT1, payload.size() >> 8);
  278. out8(REG_WR_REMOTESTARTADDRESS0, address);
  279. out8(REG_WR_REMOTESTARTADDRESS1, address >> 8);
  280. command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_DMA_FIELD);
  281. out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_READ);
  282. for (size_t i = 0; i < payload.size(); i += 2) {
  283. u16 data = in16(REG_RW_IOPORT);
  284. payload[i] = data;
  285. if (i != payload.size() - 1)
  286. payload[i + 1] = data >> 8;
  287. }
  288. while (!(in8(REG_RW_INTERRUPTSTATUS) & BIT_INTERRUPTMASK_RDC))
  289. ;
  290. }
  291. void NE2000NetworkAdapter::rdma_write(size_t address, ReadonlyBytes payload)
  292. {
  293. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: DMA write @ {} length={}", PhysicalAddress(address), payload.size());
  294. u8 command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_PAGE_FIELD | BIT_COMMAND_DMA_FIELD);
  295. out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_ABORT);
  296. out8(REG_RW_INTERRUPTSTATUS, BIT_INTERRUPTMASK_RDC);
  297. out8(REG_WR_REMOTEBYTECOUNT0, payload.size());
  298. out8(REG_WR_REMOTEBYTECOUNT1, payload.size() >> 8);
  299. out8(REG_WR_REMOTESTARTADDRESS0, address);
  300. out8(REG_WR_REMOTESTARTADDRESS1, address >> 8);
  301. command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_DMA_FIELD);
  302. out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_WRITE);
  303. for (size_t i = 0; i < payload.size(); i += 2) {
  304. u16 data = payload[i];
  305. if (i != payload.size() - 1)
  306. data |= payload[i + 1] << 8;
  307. out16(REG_RW_IOPORT, data);
  308. }
  309. while (!(in8(REG_RW_INTERRUPTSTATUS) & BIT_INTERRUPTMASK_RDC))
  310. ;
  311. }
  312. void NE2000NetworkAdapter::send_raw(ReadonlyBytes payload)
  313. {
  314. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Sending packet length={}", payload.size());
  315. if (payload.size() > NE2K_RAM_SEND_SIZE) {
  316. dmesgln("NE2000NetworkAdapter: Packet to send was too big; discarding");
  317. return;
  318. }
  319. while (in8(REG_RW_COMMAND) & BIT_COMMAND_TXP)
  320. m_wait_queue.wait_forever("NE2000NetworkAdapter");
  321. disable_irq();
  322. size_t packet_size = payload.size();
  323. if (packet_size < 64)
  324. packet_size = 64;
  325. rdma_write(NE2K_RAM_SEND_BEGIN, payload);
  326. out8(REG_WR_TRANSMITPAGE, NE2K_RAM_SEND_BEGIN >> 8);
  327. out8(REG_WR_TRANSMITBYTECOUNT0, packet_size);
  328. out8(REG_WR_TRANSMITBYTECOUNT1, packet_size >> 8);
  329. out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_TXP | BIT_COMMAND_START);
  330. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Packet submitted for transmission");
  331. enable_irq();
  332. }
  333. void NE2000NetworkAdapter::receive()
  334. {
  335. while (true) {
  336. out8(REG_RW_COMMAND, BIT_COMMAND_PAGE1 | in8(REG_RW_COMMAND));
  337. u8 current = in8(REG_RW_CURRENT);
  338. out8(REG_RW_COMMAND, in8(REG_RW_COMMAND) & ~BIT_COMMAND_PAGE_FIELD);
  339. if (m_ring_read_ptr == current)
  340. break;
  341. size_t header_address = m_ring_read_ptr << 8;
  342. received_packet_header header;
  343. rdma_read(header_address, Bytes(reinterpret_cast<u8*>(&header), sizeof(header)));
  344. bool packet_ok = header.status & BIT_RECEIVESTATUS_PRX;
  345. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Packet received {} length={}", (packet_ok ? "intact" : "damaged"), header.length);
  346. if (packet_ok) {
  347. size_t bytes_in_packet = sizeof(received_packet_header) + header.length;
  348. auto packet_result = NetworkByteBuffer::create_uninitialized(bytes_in_packet);
  349. u8 drop_buffer[NE2K_PAGE_SIZE];
  350. Bytes buffer { drop_buffer, array_size(drop_buffer) };
  351. bool will_drop { false };
  352. if (!packet_result.has_value()) {
  353. dbgln("NE2000NetworkAdapter: Not enough memory for packet with length = {}, dropping.", header.length);
  354. will_drop = true;
  355. } else {
  356. buffer = packet_result->bytes();
  357. }
  358. int current_offset = 0;
  359. int ring_offset = header_address;
  360. while (bytes_in_packet > 0) {
  361. int copy_size = min(bytes_in_packet, NE2K_PAGE_SIZE);
  362. rdma_read(ring_offset, buffer.slice(current_offset, copy_size));
  363. if (!will_drop)
  364. current_offset += copy_size;
  365. ring_offset += copy_size;
  366. bytes_in_packet -= copy_size;
  367. if (ring_offset == NE2K_RAM_RECV_END)
  368. ring_offset = NE2K_RAM_RECV_BEGIN;
  369. }
  370. if (!will_drop)
  371. did_receive(buffer.slice(sizeof(received_packet_header)));
  372. }
  373. if (header.next_packet_page == (NE2K_RAM_RECV_BEGIN >> 8))
  374. out8(REG_RW_BOUNDARY, (NE2K_RAM_RECV_END >> 8) - 1);
  375. else
  376. out8(REG_RW_BOUNDARY, header.next_packet_page - 1);
  377. m_ring_read_ptr = header.next_packet_page;
  378. }
  379. }
  380. void NE2000NetworkAdapter::out8(u16 address, u8 data)
  381. {
  382. m_io_base.offset(address).out(data);
  383. }
  384. void NE2000NetworkAdapter::out16(u16 address, u16 data)
  385. {
  386. m_io_base.offset(address).out(data);
  387. }
  388. u8 NE2000NetworkAdapter::in8(u16 address)
  389. {
  390. u8 data = m_io_base.offset(address).in<u8>();
  391. return data;
  392. }
  393. u16 NE2000NetworkAdapter::in16(u16 address)
  394. {
  395. return m_io_base.offset(address).in<u16>();
  396. }
  397. }