API.cpp 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196
  1. /*
  2. * Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
  3. *
  4. * SPDX-License-Identifier: BSD-2-Clause
  5. */
  6. #include <Kernel/Bus/PCI/API.h>
  7. #include <Kernel/Bus/PCI/Access.h>
  8. #include <Kernel/Sections.h>
  9. namespace Kernel::PCI {
  10. void write8(Address address, u32 field, u8 value) { Access::the().write8_field(address, field, value); }
  11. void write16(Address address, u32 field, u16 value) { Access::the().write16_field(address, field, value); }
  12. void write32(Address address, u32 field, u32 value) { Access::the().write32_field(address, field, value); }
  13. u8 read8(Address address, u32 field) { return Access::the().read8_field(address, field); }
  14. u16 read16(Address address, u32 field) { return Access::the().read16_field(address, field); }
  15. u32 read32(Address address, u32 field) { return Access::the().read32_field(address, field); }
  16. void enumerate(Function<void(Address, DeviceIdentifier const&)> callback)
  17. {
  18. Access::the().fast_enumerate(callback);
  19. }
  20. DeviceIdentifier get_device_identifier(Address address)
  21. {
  22. return Access::the().get_device_identifier(address);
  23. }
  24. HardwareID get_hardware_id(Address address)
  25. {
  26. return { read16(address, PCI_VENDOR_ID), read16(address, PCI_DEVICE_ID) };
  27. }
  28. void enable_io_space(Address address)
  29. {
  30. write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) | (1 << 0));
  31. }
  32. void disable_io_space(Address address)
  33. {
  34. write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) & ~(1 << 0));
  35. }
  36. void enable_memory_space(Address address)
  37. {
  38. write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) | (1 << 1));
  39. }
  40. void disable_memory_space(Address address)
  41. {
  42. write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) & ~(1 << 1));
  43. }
  44. bool is_io_space_enabled(Address address)
  45. {
  46. return (read16(address, PCI_COMMAND) & 1) != 0;
  47. }
  48. void enable_interrupt_line(Address address)
  49. {
  50. write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) & ~(1 << 10));
  51. }
  52. void disable_interrupt_line(Address address)
  53. {
  54. write16(address, PCI_COMMAND, read16(address, PCI_COMMAND) | 1 << 10);
  55. }
  56. u32 get_BAR0(Address address)
  57. {
  58. return read32(address, PCI_BAR0);
  59. }
  60. u32 get_BAR1(Address address)
  61. {
  62. return read32(address, PCI_BAR1);
  63. }
  64. u32 get_BAR2(Address address)
  65. {
  66. return read32(address, PCI_BAR2);
  67. }
  68. u32 get_BAR3(Address address)
  69. {
  70. return read16(address, PCI_BAR3);
  71. }
  72. u32 get_BAR4(Address address)
  73. {
  74. return read32(address, PCI_BAR4);
  75. }
  76. u32 get_BAR5(Address address)
  77. {
  78. return read32(address, PCI_BAR5);
  79. }
  80. u32 get_BAR(Address address, u8 bar)
  81. {
  82. VERIFY(bar <= 5);
  83. switch (bar) {
  84. case 0:
  85. return get_BAR0(address);
  86. case 1:
  87. return get_BAR1(address);
  88. case 2:
  89. return get_BAR2(address);
  90. case 3:
  91. return get_BAR3(address);
  92. case 4:
  93. return get_BAR4(address);
  94. case 5:
  95. return get_BAR5(address);
  96. default:
  97. VERIFY_NOT_REACHED();
  98. }
  99. }
  100. void enable_bus_mastering(Address address)
  101. {
  102. auto value = read16(address, PCI_COMMAND);
  103. value |= (1 << 2);
  104. value |= (1 << 0);
  105. write16(address, PCI_COMMAND, value);
  106. }
  107. void disable_bus_mastering(Address address)
  108. {
  109. auto value = read16(address, PCI_COMMAND);
  110. value &= ~(1 << 2);
  111. value |= (1 << 0);
  112. write16(address, PCI_COMMAND, value);
  113. }
  114. size_t get_BAR_space_size(Address address, u8 bar_number)
  115. {
  116. // See PCI Spec 2.3, Page 222
  117. VERIFY(bar_number < 6);
  118. u8 field = (PCI_BAR0 + (bar_number << 2));
  119. u32 bar_reserved = read32(address, field);
  120. write32(address, field, 0xFFFFFFFF);
  121. u32 space_size = read32(address, field);
  122. write32(address, field, bar_reserved);
  123. space_size &= 0xfffffff0;
  124. space_size = (~space_size) + 1;
  125. return space_size;
  126. }
  127. void raw_access(Address address, u32 field, size_t access_size, u32 value)
  128. {
  129. VERIFY(access_size != 0);
  130. if (access_size == 1) {
  131. write8(address, field, value);
  132. return;
  133. }
  134. if (access_size == 2) {
  135. write16(address, field, value);
  136. return;
  137. }
  138. if (access_size == 4) {
  139. write32(address, field, value);
  140. return;
  141. }
  142. VERIFY_NOT_REACHED();
  143. }
  144. u8 Capability::read8(u32 field) const
  145. {
  146. return PCI::read8(m_address, m_ptr + field);
  147. }
  148. u16 Capability::read16(u32 field) const
  149. {
  150. return PCI::read16(m_address, m_ptr + field);
  151. }
  152. u32 Capability::read32(u32 field) const
  153. {
  154. return PCI::read32(m_address, m_ptr + field);
  155. }
  156. void Capability::write8(u32 field, u8 value)
  157. {
  158. PCI::write8(m_address, m_ptr + field, value);
  159. }
  160. void Capability::write16(u32 field, u16 value)
  161. {
  162. PCI::write16(m_address, m_ptr + field, value);
  163. }
  164. void Capability::write32(u32 field, u32 value)
  165. {
  166. PCI::write32(m_address, m_ptr + field, value);
  167. }
  168. }