InterruptManagement.cpp 9.1 KB

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  1. /*
  2. * Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright notice, this
  9. * list of conditions and the following disclaimer.
  10. *
  11. * 2. Redistributions in binary form must reproduce the above copyright notice,
  12. * this list of conditions and the following disclaimer in the documentation
  13. * and/or other materials provided with the distribution.
  14. *
  15. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  16. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  18. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  19. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  21. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  22. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  23. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  24. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. */
  26. #include <AK/FixedArray.h>
  27. #include <AK/StringView.h>
  28. #include <Kernel/ACPI/MultiProcessorParser.h>
  29. #include <Kernel/Arch/i386/CPU.h>
  30. #include <Kernel/CommandLine.h>
  31. #include <Kernel/IO.h>
  32. #include <Kernel/Interrupts/APIC.h>
  33. #include <Kernel/Interrupts/IOAPIC.h>
  34. #include <Kernel/Interrupts/InterruptManagement.h>
  35. #include <Kernel/Interrupts/PIC.h>
  36. #include <Kernel/Interrupts/SpuriousInterruptHandler.h>
  37. #include <Kernel/Interrupts/UnhandledInterruptHandler.h>
  38. #include <Kernel/Syscall.h>
  39. #include <Kernel/VM/MemoryManager.h>
  40. #include <Kernel/VM/TypedMapping.h>
  41. #define PCAT_COMPAT_FLAG 0x1
  42. namespace Kernel {
  43. static InterruptManagement* s_interrupt_management;
  44. bool InterruptManagement::initialized()
  45. {
  46. return (s_interrupt_management != nullptr);
  47. }
  48. InterruptManagement& InterruptManagement::the()
  49. {
  50. ASSERT(InterruptManagement::initialized());
  51. return *s_interrupt_management;
  52. }
  53. void InterruptManagement::initialize()
  54. {
  55. ASSERT(!InterruptManagement::initialized());
  56. s_interrupt_management = new InterruptManagement();
  57. if (kernel_command_line().lookup("smp").value_or("off") == "on")
  58. InterruptManagement::the().switch_to_ioapic_mode();
  59. else
  60. InterruptManagement::the().switch_to_pic_mode();
  61. }
  62. void InterruptManagement::enumerate_interrupt_handlers(Function<void(GenericInterruptHandler&)> callback)
  63. {
  64. for (int i = 0; i < GENERIC_INTERRUPT_HANDLERS_COUNT; i++) {
  65. auto& handler = get_interrupt_handler(i);
  66. if (handler.type() != HandlerType::UnhandledInterruptHandler)
  67. callback(handler);
  68. }
  69. }
  70. IRQController& InterruptManagement::get_interrupt_controller(int index)
  71. {
  72. ASSERT(index >= 0);
  73. ASSERT(!m_interrupt_controllers[index].is_null());
  74. return *m_interrupt_controllers[index];
  75. }
  76. u8 InterruptManagement::acquire_mapped_interrupt_number(u8 original_irq)
  77. {
  78. if (!InterruptManagement::initialized()) {
  79. // This is necessary, because we install UnhandledInterruptHandlers before we actually initialize the Interrupt Management object...
  80. return original_irq;
  81. }
  82. return InterruptManagement::the().get_mapped_interrupt_vector(original_irq);
  83. }
  84. u8 InterruptManagement::acquire_irq_number(u8 mapped_interrupt_vector)
  85. {
  86. ASSERT(InterruptManagement::initialized());
  87. return InterruptManagement::the().get_irq_vector(mapped_interrupt_vector);
  88. }
  89. u8 InterruptManagement::get_mapped_interrupt_vector(u8 original_irq)
  90. {
  91. // FIXME: For SMP configuration (with IOAPICs) use a better routing scheme to make redirections more efficient.
  92. // FIXME: Find a better way to handle conflict with Syscall interrupt gate.
  93. ASSERT((original_irq + IRQ_VECTOR_BASE) != syscall_vector);
  94. return original_irq;
  95. }
  96. u8 InterruptManagement::get_irq_vector(u8 mapped_interrupt_vector)
  97. {
  98. // FIXME: For SMP configuration (with IOAPICs) use a better routing scheme to make redirections more efficient.
  99. return mapped_interrupt_vector;
  100. }
  101. RefPtr<IRQController> InterruptManagement::get_responsible_irq_controller(u8 interrupt_vector)
  102. {
  103. if (m_interrupt_controllers.size() == 1 && m_interrupt_controllers[0]->type() == IRQControllerType::i8259) {
  104. return m_interrupt_controllers[0];
  105. }
  106. for (auto irq_controller : m_interrupt_controllers) {
  107. if (irq_controller->gsi_base() <= interrupt_vector)
  108. if (!irq_controller->is_hard_disabled())
  109. return irq_controller;
  110. }
  111. ASSERT_NOT_REACHED();
  112. }
  113. PhysicalAddress InterruptManagement::search_for_madt()
  114. {
  115. dbg() << "Early access to ACPI tables for interrupt setup";
  116. auto rsdp = ACPI::StaticParsing::find_rsdp();
  117. if (!rsdp.has_value())
  118. return {};
  119. return ACPI::StaticParsing::find_table(rsdp.value(), "APIC");
  120. }
  121. InterruptManagement::InterruptManagement()
  122. : m_madt(search_for_madt())
  123. {
  124. }
  125. void InterruptManagement::switch_to_pic_mode()
  126. {
  127. klog() << "Interrupts: Switch to Legacy PIC mode";
  128. InterruptDisabler disabler;
  129. m_smp_enabled = false;
  130. m_interrupt_controllers[0] = adopt(*new PIC());
  131. SpuriousInterruptHandler::initialize(7);
  132. SpuriousInterruptHandler::initialize(15);
  133. for (auto& irq_controller : m_interrupt_controllers) {
  134. ASSERT(irq_controller);
  135. if (irq_controller->type() == IRQControllerType::i82093AA) {
  136. irq_controller->hard_disable();
  137. dbg() << "Interrupts: Detected " << irq_controller->model() << " - Disabled";
  138. } else {
  139. dbg() << "Interrupts: Detected " << irq_controller->model();
  140. }
  141. }
  142. }
  143. void InterruptManagement::switch_to_ioapic_mode()
  144. {
  145. klog() << "Interrupts: Switch to IOAPIC mode";
  146. InterruptDisabler disabler;
  147. if (m_madt.is_null()) {
  148. dbg() << "Interrupts: ACPI MADT is not available, reverting to PIC mode";
  149. switch_to_pic_mode();
  150. return;
  151. }
  152. dbg() << "Interrupts: MADT @ P " << m_madt.as_ptr();
  153. locate_apic_data();
  154. m_smp_enabled = true;
  155. if (m_interrupt_controllers.size() == 1) {
  156. if (get_interrupt_controller(0).type() == IRQControllerType::i8259) {
  157. klog() << "Interrupts: NO IOAPIC detected, Reverting to PIC mode.";
  158. return;
  159. }
  160. }
  161. for (auto& irq_controller : m_interrupt_controllers) {
  162. ASSERT(irq_controller);
  163. if (irq_controller->type() == IRQControllerType::i8259) {
  164. irq_controller->hard_disable();
  165. dbg() << "Interrupts: Detected " << irq_controller->model() << " Disabled";
  166. } else {
  167. dbg() << "Interrupts: Detected " << irq_controller->model();
  168. }
  169. }
  170. APIC::init();
  171. APIC::enable_bsp();
  172. if (auto mp_parser = MultiProcessorParser::autodetect()) {
  173. m_pci_interrupt_overrides = mp_parser->get_pci_interrupt_redirections();
  174. }
  175. }
  176. void InterruptManagement::locate_apic_data()
  177. {
  178. ASSERT(!m_madt.is_null());
  179. auto madt = map_typed<ACPI::Structures::MADT>(m_madt);
  180. int irq_controller_count = 0;
  181. if (madt->flags & PCAT_COMPAT_FLAG) {
  182. m_interrupt_controllers[0] = adopt(*new PIC());
  183. irq_controller_count++;
  184. }
  185. size_t entry_index = 0;
  186. size_t entries_length = madt->h.length - sizeof(ACPI::Structures::MADT);
  187. auto* madt_entry = madt->entries;
  188. while (entries_length > 0) {
  189. size_t entry_length = madt_entry->length;
  190. if (madt_entry->type == (u8)ACPI::Structures::MADTEntryType::IOAPIC) {
  191. auto* ioapic_entry = (const ACPI::Structures::MADTEntries::IOAPIC*)madt_entry;
  192. dbg() << "IOAPIC found @ MADT entry " << entry_index << ", MMIO Registers @ " << PhysicalAddress(ioapic_entry->ioapic_address);
  193. m_interrupt_controllers.resize(1 + irq_controller_count);
  194. // FIXME: Casting ioapic_entry->ioapic_address below looks suspicious!
  195. m_interrupt_controllers[irq_controller_count] = adopt(*new IOAPIC(*(ioapic_mmio_regs*)(FlatPtr)ioapic_entry->ioapic_address, ioapic_entry->gsi_base));
  196. irq_controller_count++;
  197. }
  198. if (madt_entry->type == (u8)ACPI::Structures::MADTEntryType::InterruptSourceOverride) {
  199. auto* interrupt_override_entry = (const ACPI::Structures::MADTEntries::InterruptSourceOverride*)madt_entry;
  200. m_isa_interrupt_overrides.empend(
  201. interrupt_override_entry->bus,
  202. interrupt_override_entry->source,
  203. interrupt_override_entry->global_system_interrupt,
  204. interrupt_override_entry->flags);
  205. dbg() << "Interrupts: Overriding INT 0x" << String::format("%x", interrupt_override_entry->source) << " with GSI " << interrupt_override_entry->global_system_interrupt << ", for bus 0x" << String::format("%x", interrupt_override_entry->bus);
  206. }
  207. madt_entry = (ACPI::Structures::MADTEntryHeader*)(VirtualAddress(madt_entry).offset(entry_length).get());
  208. entries_length -= entry_length;
  209. entry_index++;
  210. }
  211. }
  212. }