InterruptManagement.cpp 8.9 KB

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  1. /*
  2. * Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright notice, this
  9. * list of conditions and the following disclaimer.
  10. *
  11. * 2. Redistributions in binary form must reproduce the above copyright notice,
  12. * this list of conditions and the following disclaimer in the documentation
  13. * and/or other materials provided with the distribution.
  14. *
  15. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  16. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  18. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  19. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  21. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  22. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  23. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  24. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. */
  26. #include <AK/StringView.h>
  27. #include <Kernel/ACPI/MultiProcessorParser.h>
  28. #include <Kernel/API/Syscall.h>
  29. #include <Kernel/Arch/i386/CPU.h>
  30. #include <Kernel/CommandLine.h>
  31. #include <Kernel/IO.h>
  32. #include <Kernel/Interrupts/APIC.h>
  33. #include <Kernel/Interrupts/IOAPIC.h>
  34. #include <Kernel/Interrupts/InterruptManagement.h>
  35. #include <Kernel/Interrupts/PIC.h>
  36. #include <Kernel/Interrupts/SpuriousInterruptHandler.h>
  37. #include <Kernel/Interrupts/UnhandledInterruptHandler.h>
  38. #include <Kernel/VM/MemoryManager.h>
  39. #include <Kernel/VM/TypedMapping.h>
  40. #define PCAT_COMPAT_FLAG 0x1
  41. namespace Kernel {
  42. static InterruptManagement* s_interrupt_management;
  43. bool InterruptManagement::initialized()
  44. {
  45. return (s_interrupt_management != nullptr);
  46. }
  47. InterruptManagement& InterruptManagement::the()
  48. {
  49. ASSERT(InterruptManagement::initialized());
  50. return *s_interrupt_management;
  51. }
  52. void InterruptManagement::initialize()
  53. {
  54. ASSERT(!InterruptManagement::initialized());
  55. s_interrupt_management = new InterruptManagement();
  56. if (kernel_command_line().lookup("smp").value_or("off") == "on")
  57. InterruptManagement::the().switch_to_ioapic_mode();
  58. else
  59. InterruptManagement::the().switch_to_pic_mode();
  60. }
  61. void InterruptManagement::enumerate_interrupt_handlers(Function<void(GenericInterruptHandler&)> callback)
  62. {
  63. for (int i = 0; i < GENERIC_INTERRUPT_HANDLERS_COUNT; i++) {
  64. auto& handler = get_interrupt_handler(i);
  65. if (handler.type() != HandlerType::UnhandledInterruptHandler)
  66. callback(handler);
  67. }
  68. }
  69. IRQController& InterruptManagement::get_interrupt_controller(int index)
  70. {
  71. ASSERT(index >= 0);
  72. ASSERT(!m_interrupt_controllers[index].is_null());
  73. return *m_interrupt_controllers[index];
  74. }
  75. u8 InterruptManagement::acquire_mapped_interrupt_number(u8 original_irq)
  76. {
  77. if (!InterruptManagement::initialized()) {
  78. // This is necessary, because we install UnhandledInterruptHandlers before we actually initialize the Interrupt Management object...
  79. return original_irq;
  80. }
  81. return InterruptManagement::the().get_mapped_interrupt_vector(original_irq);
  82. }
  83. u8 InterruptManagement::acquire_irq_number(u8 mapped_interrupt_vector)
  84. {
  85. ASSERT(InterruptManagement::initialized());
  86. return InterruptManagement::the().get_irq_vector(mapped_interrupt_vector);
  87. }
  88. u8 InterruptManagement::get_mapped_interrupt_vector(u8 original_irq)
  89. {
  90. // FIXME: For SMP configuration (with IOAPICs) use a better routing scheme to make redirections more efficient.
  91. // FIXME: Find a better way to handle conflict with Syscall interrupt gate.
  92. ASSERT((original_irq + IRQ_VECTOR_BASE) != syscall_vector);
  93. return original_irq;
  94. }
  95. u8 InterruptManagement::get_irq_vector(u8 mapped_interrupt_vector)
  96. {
  97. // FIXME: For SMP configuration (with IOAPICs) use a better routing scheme to make redirections more efficient.
  98. return mapped_interrupt_vector;
  99. }
  100. RefPtr<IRQController> InterruptManagement::get_responsible_irq_controller(u8 interrupt_vector)
  101. {
  102. if (m_interrupt_controllers.size() == 1 && m_interrupt_controllers[0]->type() == IRQControllerType::i8259) {
  103. return m_interrupt_controllers[0];
  104. }
  105. for (auto irq_controller : m_interrupt_controllers) {
  106. if (irq_controller->gsi_base() <= interrupt_vector)
  107. if (!irq_controller->is_hard_disabled())
  108. return irq_controller;
  109. }
  110. ASSERT_NOT_REACHED();
  111. }
  112. PhysicalAddress InterruptManagement::search_for_madt()
  113. {
  114. dbg() << "Early access to ACPI tables for interrupt setup";
  115. auto rsdp = ACPI::StaticParsing::find_rsdp();
  116. if (!rsdp.has_value())
  117. return {};
  118. return ACPI::StaticParsing::find_table(rsdp.value(), "APIC");
  119. }
  120. InterruptManagement::InterruptManagement()
  121. : m_madt(search_for_madt())
  122. {
  123. }
  124. void InterruptManagement::switch_to_pic_mode()
  125. {
  126. klog() << "Interrupts: Switch to Legacy PIC mode";
  127. InterruptDisabler disabler;
  128. m_smp_enabled = false;
  129. m_interrupt_controllers[0] = adopt(*new PIC());
  130. SpuriousInterruptHandler::initialize(7);
  131. SpuriousInterruptHandler::initialize(15);
  132. for (auto& irq_controller : m_interrupt_controllers) {
  133. ASSERT(irq_controller);
  134. if (irq_controller->type() == IRQControllerType::i82093AA) {
  135. irq_controller->hard_disable();
  136. dbg() << "Interrupts: Detected " << irq_controller->model() << " - Disabled";
  137. } else {
  138. dbg() << "Interrupts: Detected " << irq_controller->model();
  139. }
  140. }
  141. }
  142. void InterruptManagement::switch_to_ioapic_mode()
  143. {
  144. klog() << "Interrupts: Switch to IOAPIC mode";
  145. InterruptDisabler disabler;
  146. if (m_madt.is_null()) {
  147. dbg() << "Interrupts: ACPI MADT is not available, reverting to PIC mode";
  148. switch_to_pic_mode();
  149. return;
  150. }
  151. dbg() << "Interrupts: MADT @ P " << m_madt.as_ptr();
  152. locate_apic_data();
  153. m_smp_enabled = true;
  154. if (m_interrupt_controllers.size() == 1) {
  155. if (get_interrupt_controller(0).type() == IRQControllerType::i8259) {
  156. klog() << "Interrupts: NO IOAPIC detected, Reverting to PIC mode.";
  157. return;
  158. }
  159. }
  160. for (auto& irq_controller : m_interrupt_controllers) {
  161. ASSERT(irq_controller);
  162. if (irq_controller->type() == IRQControllerType::i8259) {
  163. irq_controller->hard_disable();
  164. dbg() << "Interrupts: Detected " << irq_controller->model() << " Disabled";
  165. } else {
  166. dbg() << "Interrupts: Detected " << irq_controller->model();
  167. }
  168. }
  169. if (auto mp_parser = MultiProcessorParser::autodetect()) {
  170. m_pci_interrupt_overrides = mp_parser->get_pci_interrupt_redirections();
  171. }
  172. APIC::the().init_bsp();
  173. }
  174. void InterruptManagement::locate_apic_data()
  175. {
  176. ASSERT(!m_madt.is_null());
  177. auto madt = map_typed<ACPI::Structures::MADT>(m_madt);
  178. int irq_controller_count = 0;
  179. if (madt->flags & PCAT_COMPAT_FLAG) {
  180. m_interrupt_controllers[0] = adopt(*new PIC());
  181. irq_controller_count++;
  182. }
  183. size_t entry_index = 0;
  184. size_t entries_length = madt->h.length - sizeof(ACPI::Structures::MADT);
  185. auto* madt_entry = madt->entries;
  186. while (entries_length > 0) {
  187. size_t entry_length = madt_entry->length;
  188. if (madt_entry->type == (u8)ACPI::Structures::MADTEntryType::IOAPIC) {
  189. auto* ioapic_entry = (const ACPI::Structures::MADTEntries::IOAPIC*)madt_entry;
  190. dbg() << "IOAPIC found @ MADT entry " << entry_index << ", MMIO Registers @ " << PhysicalAddress(ioapic_entry->ioapic_address);
  191. m_interrupt_controllers.resize(1 + irq_controller_count);
  192. m_interrupt_controllers[irq_controller_count] = adopt(*new IOAPIC(PhysicalAddress(ioapic_entry->ioapic_address), ioapic_entry->gsi_base));
  193. irq_controller_count++;
  194. }
  195. if (madt_entry->type == (u8)ACPI::Structures::MADTEntryType::InterruptSourceOverride) {
  196. auto* interrupt_override_entry = (const ACPI::Structures::MADTEntries::InterruptSourceOverride*)madt_entry;
  197. m_isa_interrupt_overrides.empend(
  198. interrupt_override_entry->bus,
  199. interrupt_override_entry->source,
  200. interrupt_override_entry->global_system_interrupt,
  201. interrupt_override_entry->flags);
  202. dbg() << "Interrupts: Overriding INT 0x" << String::format("%x", interrupt_override_entry->source) << " with GSI " << interrupt_override_entry->global_system_interrupt << ", for bus 0x" << String::format("%x", interrupt_override_entry->bus);
  203. }
  204. madt_entry = (ACPI::Structures::MADTEntryHeader*)(VirtualAddress(madt_entry).offset(entry_length).get());
  205. entries_length -= entry_length;
  206. entry_index++;
  207. }
  208. }
  209. }