NetworkAdapter.cpp 18 KB

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  1. /*
  2. * Copyright (c) 2021, the SerenityOS developers.
  3. *
  4. * SPDX-License-Identifier: BSD-2-Clause
  5. */
  6. #include <AK/MACAddress.h>
  7. #include <Kernel/Arch/x86/IO.h>
  8. #include <Kernel/Bus/PCI/API.h>
  9. #include <Kernel/Debug.h>
  10. #include <Kernel/Net/NE2000/NetworkAdapter.h>
  11. #include <Kernel/Net/NetworkingManagement.h>
  12. #include <Kernel/Sections.h>
  13. namespace Kernel {
  14. /**
  15. * The NE2000 is an ancient 10 Mib/s Ethernet network card standard by Novell
  16. * from the late 80s. Based on National Semiconductor's DP8390 Ethernet chip
  17. * or compatible, they were known to be extremely bare-bones but also very
  18. * cheap entry-level cards.
  19. *
  20. * QEMU supports them with the ne2k_{isa,pci} devices, physical incarnations
  21. * were available from different manufacturers for the ISA bus and later on
  22. * the PCI bus, including:
  23. * - Realtek's RTL8029
  24. * - VIA Technologies, Inc.'s VT86C926
  25. *
  26. * Official documentation from National Semiconductor includes:
  27. * - Datasheet "DP8390D/NS32490D NIC Network Interface Controller"
  28. * - Application Note 874 "Writing Drivers for the DP8390 NIC Family of Ethernet Controllers"
  29. *
  30. * This driver supports only the PCI variant.
  31. *
  32. * Remember, friends don't let friends use NE2000 network cards :^)
  33. */
  34. // Page 0 registers
  35. static constexpr u8 REG_RW_COMMAND = 0x00;
  36. static constexpr u8 BIT_COMMAND_STOP = (0b1 << 0);
  37. static constexpr u8 BIT_COMMAND_START = (0b1 << 1);
  38. static constexpr u8 BIT_COMMAND_TXP = (0b1 << 2);
  39. static constexpr u8 BIT_COMMAND_DMA_READ = (0b001 << 3);
  40. static constexpr u8 BIT_COMMAND_DMA_WRITE = (0b010 << 3);
  41. static constexpr u8 BIT_COMMAND_DMA_SEND = (0b011 << 3);
  42. static constexpr u8 BIT_COMMAND_DMA_ABORT = (0b100 << 3);
  43. static constexpr u8 BIT_COMMAND_DMA_FIELD = (0b111 << 3);
  44. static constexpr u8 BIT_COMMAND_PAGE1 = (0b01 << 6);
  45. static constexpr u8 BIT_COMMAND_PAGE2 = (0b10 << 6);
  46. static constexpr u8 BIT_COMMAND_PAGE_FIELD = (0b11 << 6);
  47. static constexpr u8 REG_WR_PAGESTART = 0x01;
  48. static constexpr u8 REG_WR_PAGESTOP = 0x02;
  49. static constexpr u8 REG_RW_BOUNDARY = 0x03;
  50. static constexpr u8 REG_RD_TRANSMITSTATUS = 0x04;
  51. static constexpr u8 REG_WR_TRANSMITPAGE = 0x04;
  52. static constexpr u8 REG_RD_NCR = 0x05;
  53. static constexpr u8 REG_WR_TRANSMITBYTECOUNT0 = 0x05;
  54. static constexpr u8 REG_WR_TRANSMITBYTECOUNT1 = 0x06;
  55. static constexpr u8 REG_RW_INTERRUPTSTATUS = 0x07;
  56. static constexpr u8 REG_RD_CRDMA0 = 0x08;
  57. static constexpr u8 REG_WR_REMOTESTARTADDRESS0 = 0x08;
  58. static constexpr u8 REG_RD_CRDMA1 = 0x09;
  59. static constexpr u8 REG_WR_REMOTESTARTADDRESS1 = 0x09;
  60. static constexpr u8 REG_WR_REMOTEBYTECOUNT0 = 0x0a;
  61. static constexpr u8 REG_WR_REMOTEBYTECOUNT1 = 0x0b;
  62. static constexpr u8 REG_RD_RECEIVESTATUS = 0x0c;
  63. static constexpr u8 BIT_RECEIVESTATUS_PRX = (0b1 << 0);
  64. static constexpr u8 BIT_RECEIVESTATUS_CRC = (0b1 << 1);
  65. static constexpr u8 BIT_RECEIVESTATUS_FAE = (0b1 << 2);
  66. static constexpr u8 BIT_RECEIVESTATUS_FO = (0b1 << 3);
  67. static constexpr u8 BIT_RECEIVESTATUS_MPA = (0b1 << 4);
  68. static constexpr u8 REG_WR_RECEIVECONFIGURATION = 0x0c;
  69. static constexpr u8 BIT_RECEIVECONFIGURATION_SEP = (0b1 << 0);
  70. static constexpr u8 BIT_RECEIVECONFIGURATION_AR = (0b1 << 1);
  71. static constexpr u8 BIT_RECEIVECONFIGURATION_AB = (0b1 << 2);
  72. static constexpr u8 BIT_RECEIVECONFIGURATION_AM = (0b1 << 3);
  73. static constexpr u8 BIT_RECEIVECONFIGURATION_PRO = (0b1 << 4);
  74. static constexpr u8 BIT_RECEIVECONFIGURATION_MON = (0b1 << 5);
  75. static constexpr u8 REG_RD_FAE_TALLY = 0x0d;
  76. static constexpr u8 REG_WR_TRANSMITCONFIGURATION = 0x0d;
  77. static constexpr u8 BIT_WR_TRANSMITCONFIGURATION_LOOPBACK = (0b10 << 0);
  78. static constexpr u8 REG_RD_CRC_TALLY = 0x0e;
  79. static constexpr u8 REG_WR_DATACONFIGURATION = 0x0e;
  80. static constexpr u8 BIT_DATACONFIGURATION_WTS = (0b1 << 0);
  81. static constexpr u8 BIT_DATACONFIGURATION_BOS = (0b1 << 1);
  82. static constexpr u8 BIT_DATACONFIGURATION_LS = (0b1 << 2);
  83. static constexpr u8 BIT_DATACONFIGURATION_FIFO_8B = (0b10 << 5);
  84. static constexpr u8 REG_RD_MISS_PKT_TALLY = 0x0f;
  85. static constexpr u8 REG_WR_INTERRUPTMASK = 0x0f;
  86. static constexpr u8 BIT_INTERRUPTMASK_PRX = (0b1 << 0);
  87. static constexpr u8 BIT_INTERRUPTMASK_PTX = (0b1 << 1);
  88. static constexpr u8 BIT_INTERRUPTMASK_RXE = (0b1 << 2);
  89. static constexpr u8 BIT_INTERRUPTMASK_TXE = (0b1 << 3);
  90. static constexpr u8 BIT_INTERRUPTMASK_OVW = (0b1 << 4);
  91. static constexpr u8 BIT_INTERRUPTMASK_CNT = (0b1 << 5);
  92. static constexpr u8 BIT_INTERRUPTMASK_RDC = (0b1 << 6);
  93. static constexpr u8 BIT_INTERRUPTMASK_RST = (0b1 << 7);
  94. static constexpr u8 REG_RW_IOPORT = 0x10;
  95. // Page 1 registers
  96. static constexpr u8 REG_RW_PHYSICALADDRESS0 = 0x01;
  97. static constexpr u8 REG_RW_CURRENT = 0x07;
  98. static constexpr int NE2K_PAGE_SIZE = 256;
  99. static constexpr int NE2K_RAM_BEGIN = 16384;
  100. static constexpr int NE2K_RAM_END = 32768;
  101. static constexpr int NE2K_RAM_SIZE = NE2K_RAM_END - NE2K_RAM_BEGIN;
  102. static constexpr int NE2K_RAM_SEND_BEGIN = 16384;
  103. static constexpr int NE2K_RAM_SEND_END = 16384 + 6 * NE2K_PAGE_SIZE;
  104. static constexpr int NE2K_RAM_SEND_SIZE = NE2K_RAM_SEND_END - NE2K_RAM_SEND_BEGIN;
  105. static constexpr int NE2K_RAM_RECV_BEGIN = NE2K_RAM_SEND_END;
  106. static constexpr int NE2K_RAM_RECV_END = NE2K_RAM_END;
  107. static constexpr int NE2K_RAM_RECV_SIZE = NE2K_RAM_RECV_END - NE2K_RAM_RECV_BEGIN;
  108. static_assert(NE2K_RAM_BEGIN % NE2K_PAGE_SIZE == 0);
  109. static_assert(NE2K_RAM_END % NE2K_PAGE_SIZE == 0);
  110. static_assert(NE2K_RAM_SEND_BEGIN % NE2K_PAGE_SIZE == 0);
  111. static_assert(NE2K_RAM_SEND_END % NE2K_PAGE_SIZE == 0);
  112. static_assert(NE2K_RAM_RECV_BEGIN % NE2K_PAGE_SIZE == 0);
  113. static_assert(NE2K_RAM_RECV_END % NE2K_PAGE_SIZE == 0);
  114. struct [[gnu::packed]] received_packet_header {
  115. u8 status;
  116. u8 next_packet_page;
  117. u16 length;
  118. };
  119. UNMAP_AFTER_INIT RefPtr<NE2000NetworkAdapter> NE2000NetworkAdapter::try_to_initialize(PCI::DeviceIdentifier const& pci_device_identifier)
  120. {
  121. constexpr auto ne2k_ids = Array {
  122. PCI::HardwareID { 0x10EC, 0x8029 }, // RealTek RTL-8029(AS)
  123. // List of clones, taken from Linux's ne2k-pci.c
  124. PCI::HardwareID { 0x1050, 0x0940 }, // Winbond 89C940
  125. PCI::HardwareID { 0x11f6, 0x1401 }, // Compex RL2000
  126. PCI::HardwareID { 0x8e2e, 0x3000 }, // KTI ET32P2
  127. PCI::HardwareID { 0x4a14, 0x5000 }, // NetVin NV5000SC
  128. PCI::HardwareID { 0x1106, 0x0926 }, // Via 86C926
  129. PCI::HardwareID { 0x10bd, 0x0e34 }, // SureCom NE34
  130. PCI::HardwareID { 0x1050, 0x5a5a }, // Winbond W89C940F
  131. PCI::HardwareID { 0x12c3, 0x0058 }, // Holtek HT80232
  132. PCI::HardwareID { 0x12c3, 0x5598 }, // Holtek HT80229
  133. PCI::HardwareID { 0x8c4a, 0x1980 }, // Winbond W89C940 (misprogrammed)
  134. };
  135. if (!ne2k_ids.span().contains_slow(pci_device_identifier.hardware_id()))
  136. return {};
  137. u8 irq = pci_device_identifier.interrupt_line().value();
  138. // FIXME: Better propagate errors here
  139. auto interface_name_or_error = NetworkingManagement::generate_interface_name_from_pci_address(pci_device_identifier);
  140. if (interface_name_or_error.is_error())
  141. return {};
  142. return adopt_ref_if_nonnull(new (nothrow) NE2000NetworkAdapter(pci_device_identifier.address(), irq, interface_name_or_error.release_value()));
  143. }
  144. UNMAP_AFTER_INIT NE2000NetworkAdapter::NE2000NetworkAdapter(PCI::Address address, u8 irq, NonnullOwnPtr<KString> interface_name)
  145. : NetworkAdapter(move(interface_name))
  146. , PCI::Device(address)
  147. , IRQHandler(irq)
  148. , m_io_base(PCI::get_BAR0(pci_address()) & ~3)
  149. {
  150. dmesgln("NE2000: Found @ {}", pci_address());
  151. dmesgln("NE2000: Port base: {}", m_io_base);
  152. dmesgln("NE2000: Interrupt line: {}", interrupt_number());
  153. int ram_errors = ram_test();
  154. dmesgln("NE2000: RAM test {}, got {} byte errors", (ram_errors == 0 ? "OK" : "KO"), ram_errors);
  155. reset();
  156. set_mac_address(m_mac_address);
  157. dmesgln("NE2000: MAC address: {}", m_mac_address.to_string());
  158. enable_irq();
  159. }
  160. UNMAP_AFTER_INIT NE2000NetworkAdapter::~NE2000NetworkAdapter()
  161. {
  162. }
  163. bool NE2000NetworkAdapter::handle_irq(const RegisterState&)
  164. {
  165. u8 status = in8(REG_RW_INTERRUPTSTATUS);
  166. m_entropy_source.add_random_event(status);
  167. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Got interrupt, status={:#02x}", status);
  168. if (status == 0) {
  169. return false;
  170. }
  171. if (status & BIT_INTERRUPTMASK_PRX) {
  172. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Interrupt for packet received");
  173. }
  174. if (status & BIT_INTERRUPTMASK_PTX) {
  175. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Interrupt for packet sent");
  176. }
  177. if (status & BIT_INTERRUPTMASK_RXE) {
  178. u8 fae = in8(REG_RD_FAE_TALLY);
  179. u8 crc = in8(REG_RD_CRC_TALLY);
  180. u8 miss = in8(REG_RD_MISS_PKT_TALLY);
  181. dmesgln("NE2000NetworkAdapter: Packet reception error framing={} crc={} missed={}", fae, crc, miss);
  182. // TODO: handle counters
  183. }
  184. if (status & BIT_INTERRUPTMASK_TXE) {
  185. dmesgln("NE2000NetworkAdapter: Packet transmission error");
  186. }
  187. if (status & BIT_INTERRUPTMASK_OVW) {
  188. dmesgln("NE2000NetworkAdapter: Ring buffer reception overflow error");
  189. // TODO: handle counters
  190. }
  191. if (status & BIT_INTERRUPTMASK_CNT) {
  192. dmesgln("NE2000NetworkAdapter: Counter overflow error");
  193. // TODO: handle counters
  194. }
  195. if (status & BIT_INTERRUPTMASK_RST) {
  196. dmesgln("NE2000NetworkAdapter: NIC requires reset due to packet reception overflow");
  197. // TODO: proper reset procedure
  198. reset();
  199. }
  200. receive();
  201. m_wait_queue.wake_all();
  202. out8(REG_RW_INTERRUPTSTATUS, status);
  203. return true;
  204. }
  205. UNMAP_AFTER_INIT int NE2000NetworkAdapter::ram_test()
  206. {
  207. IOAddress io(PCI::get_BAR0(pci_address()) & ~3);
  208. int errors = 0;
  209. out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_STOP);
  210. #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
  211. out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_WTS);
  212. #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
  213. out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_BOS | BIT_DATACONFIGURATION_WTS);
  214. #else
  215. # error Unknown byte order
  216. #endif
  217. out8(REG_WR_REMOTEBYTECOUNT0, 0x00);
  218. out8(REG_WR_REMOTEBYTECOUNT1, 0x00);
  219. out8(REG_WR_RECEIVECONFIGURATION, BIT_RECEIVECONFIGURATION_MON);
  220. out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_START);
  221. Array<u8, NE2K_RAM_SIZE> buffer;
  222. const u8 patterns[3] = { 0x5a, 0xff, 0x00 };
  223. for (int i = 0; i < 3; ++i) {
  224. for (size_t j = 0; j < buffer.size(); ++j)
  225. buffer[j] = patterns[i];
  226. rdma_write(NE2K_RAM_BEGIN, buffer);
  227. rdma_read(NE2K_RAM_BEGIN, buffer);
  228. for (size_t j = 0; j < buffer.size(); ++j) {
  229. if (buffer[j] != patterns[i]) {
  230. if (errors < 16)
  231. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Bad adapter RAM @ {} expected={} got={}", PhysicalAddress(NE2K_RAM_BEGIN + j), patterns[i], buffer[j]);
  232. else if (errors == 16)
  233. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Too many RAM errors, silencing further output");
  234. errors++;
  235. }
  236. }
  237. }
  238. return errors;
  239. }
  240. void NE2000NetworkAdapter::reset()
  241. {
  242. const u8 interrupt_mask = BIT_INTERRUPTMASK_PRX | BIT_INTERRUPTMASK_PTX | BIT_INTERRUPTMASK_RXE | BIT_INTERRUPTMASK_TXE | BIT_INTERRUPTMASK_OVW | BIT_INTERRUPTMASK_CNT;
  243. u8 prom[32];
  244. // Taken from DP8390D's datasheet section 11.0, "Initialization Procedures"
  245. out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_STOP);
  246. #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
  247. out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_WTS);
  248. #elif __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
  249. out8(REG_WR_DATACONFIGURATION, BIT_DATACONFIGURATION_FIFO_8B | BIT_DATACONFIGURATION_BOS | BIT_DATACONFIGURATION_WTS);
  250. #else
  251. # error Unknown byte order
  252. #endif
  253. out8(REG_WR_REMOTEBYTECOUNT0, 0x00);
  254. out8(REG_WR_REMOTEBYTECOUNT1, 0x00);
  255. out8(REG_WR_RECEIVECONFIGURATION, BIT_RECEIVECONFIGURATION_AB | BIT_RECEIVECONFIGURATION_AR);
  256. out8(REG_WR_TRANSMITCONFIGURATION, BIT_WR_TRANSMITCONFIGURATION_LOOPBACK);
  257. m_ring_read_ptr = NE2K_RAM_RECV_BEGIN >> 8;
  258. out8(REG_WR_PAGESTART, NE2K_RAM_RECV_BEGIN >> 8);
  259. out8(REG_RW_BOUNDARY, NE2K_RAM_RECV_BEGIN >> 8);
  260. out8(REG_WR_PAGESTOP, NE2K_RAM_RECV_END >> 8);
  261. out8(REG_RW_INTERRUPTSTATUS, 0xff);
  262. out8(REG_WR_INTERRUPTMASK, interrupt_mask);
  263. rdma_read(0, Bytes(prom, sizeof(prom)));
  264. for (int i = 0; i < 6; i++) {
  265. m_mac_address[i] = prom[i * 2];
  266. }
  267. out8(REG_RW_COMMAND, BIT_COMMAND_PAGE1 | BIT_COMMAND_DMA_ABORT | BIT_COMMAND_STOP);
  268. for (int i = 0; i < 6; i++) {
  269. out8(REG_RW_PHYSICALADDRESS0 + i, m_mac_address[i]);
  270. }
  271. out8(REG_RW_CURRENT, NE2K_RAM_RECV_BEGIN >> 8);
  272. out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_START);
  273. out8(REG_WR_TRANSMITCONFIGURATION, 0xe0);
  274. }
  275. void NE2000NetworkAdapter::rdma_read(size_t address, Bytes payload)
  276. {
  277. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: DMA read @ {} length={}", PhysicalAddress(address), payload.size());
  278. u8 command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_PAGE_FIELD | BIT_COMMAND_DMA_FIELD);
  279. out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_ABORT);
  280. out8(REG_RW_INTERRUPTSTATUS, BIT_INTERRUPTMASK_RDC);
  281. out8(REG_WR_REMOTEBYTECOUNT0, payload.size());
  282. out8(REG_WR_REMOTEBYTECOUNT1, payload.size() >> 8);
  283. out8(REG_WR_REMOTESTARTADDRESS0, address);
  284. out8(REG_WR_REMOTESTARTADDRESS1, address >> 8);
  285. command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_DMA_FIELD);
  286. out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_READ);
  287. for (size_t i = 0; i < payload.size(); i += 2) {
  288. u16 data = in16(REG_RW_IOPORT);
  289. payload[i] = data;
  290. if (i != payload.size() - 1)
  291. payload[i + 1] = data >> 8;
  292. }
  293. while (!(in8(REG_RW_INTERRUPTSTATUS) & BIT_INTERRUPTMASK_RDC))
  294. ;
  295. }
  296. void NE2000NetworkAdapter::rdma_write(size_t address, ReadonlyBytes payload)
  297. {
  298. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: DMA write @ {} length={}", PhysicalAddress(address), payload.size());
  299. u8 command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_PAGE_FIELD | BIT_COMMAND_DMA_FIELD);
  300. out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_ABORT);
  301. out8(REG_RW_INTERRUPTSTATUS, BIT_INTERRUPTMASK_RDC);
  302. out8(REG_WR_REMOTEBYTECOUNT0, payload.size());
  303. out8(REG_WR_REMOTEBYTECOUNT1, payload.size() >> 8);
  304. out8(REG_WR_REMOTESTARTADDRESS0, address);
  305. out8(REG_WR_REMOTESTARTADDRESS1, address >> 8);
  306. command = in8(REG_RW_COMMAND) & ~(BIT_COMMAND_DMA_FIELD);
  307. out8(REG_RW_COMMAND, command | BIT_COMMAND_DMA_WRITE);
  308. for (size_t i = 0; i < payload.size(); i += 2) {
  309. u16 data = payload[i];
  310. if (i != payload.size() - 1)
  311. data |= payload[i + 1] << 8;
  312. out16(REG_RW_IOPORT, data);
  313. }
  314. while (!(in8(REG_RW_INTERRUPTSTATUS) & BIT_INTERRUPTMASK_RDC))
  315. ;
  316. }
  317. void NE2000NetworkAdapter::send_raw(ReadonlyBytes payload)
  318. {
  319. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Sending packet length={}", payload.size());
  320. if (payload.size() > NE2K_RAM_SEND_SIZE) {
  321. dmesgln("NE2000NetworkAdapter: Packet to send was too big; discarding");
  322. return;
  323. }
  324. while (in8(REG_RW_COMMAND) & BIT_COMMAND_TXP)
  325. m_wait_queue.wait_forever("NE2000NetworkAdapter");
  326. disable_irq();
  327. size_t packet_size = payload.size();
  328. if (packet_size < 64)
  329. packet_size = 64;
  330. rdma_write(NE2K_RAM_SEND_BEGIN, payload);
  331. out8(REG_WR_TRANSMITPAGE, NE2K_RAM_SEND_BEGIN >> 8);
  332. out8(REG_WR_TRANSMITBYTECOUNT0, packet_size);
  333. out8(REG_WR_TRANSMITBYTECOUNT1, packet_size >> 8);
  334. out8(REG_RW_COMMAND, BIT_COMMAND_DMA_ABORT | BIT_COMMAND_TXP | BIT_COMMAND_START);
  335. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Packet submitted for transmission");
  336. enable_irq();
  337. }
  338. void NE2000NetworkAdapter::receive()
  339. {
  340. while (true) {
  341. out8(REG_RW_COMMAND, BIT_COMMAND_PAGE1 | in8(REG_RW_COMMAND));
  342. u8 current = in8(REG_RW_CURRENT);
  343. out8(REG_RW_COMMAND, in8(REG_RW_COMMAND) & ~BIT_COMMAND_PAGE_FIELD);
  344. if (m_ring_read_ptr == current)
  345. break;
  346. size_t header_address = m_ring_read_ptr << 8;
  347. received_packet_header header;
  348. rdma_read(header_address, Bytes(reinterpret_cast<u8*>(&header), sizeof(header)));
  349. bool packet_ok = header.status & BIT_RECEIVESTATUS_PRX;
  350. dbgln_if(NE2000_DEBUG, "NE2000NetworkAdapter: Packet received {} length={}", (packet_ok ? "intact" : "damaged"), header.length);
  351. if (packet_ok) {
  352. size_t bytes_in_packet = sizeof(received_packet_header) + header.length;
  353. auto packet_result = NetworkByteBuffer::create_uninitialized(bytes_in_packet);
  354. u8 drop_buffer[NE2K_PAGE_SIZE];
  355. Bytes buffer { drop_buffer, array_size(drop_buffer) };
  356. bool will_drop { false };
  357. if (!packet_result.has_value()) {
  358. dbgln("NE2000NetworkAdapter: Not enough memory for packet with length = {}, dropping.", header.length);
  359. will_drop = true;
  360. } else {
  361. buffer = packet_result->bytes();
  362. }
  363. int current_offset = 0;
  364. int ring_offset = header_address;
  365. while (bytes_in_packet > 0) {
  366. int copy_size = min(bytes_in_packet, NE2K_PAGE_SIZE);
  367. rdma_read(ring_offset, buffer.slice(current_offset, copy_size));
  368. if (!will_drop)
  369. current_offset += copy_size;
  370. ring_offset += copy_size;
  371. bytes_in_packet -= copy_size;
  372. if (ring_offset == NE2K_RAM_RECV_END)
  373. ring_offset = NE2K_RAM_RECV_BEGIN;
  374. }
  375. if (!will_drop)
  376. did_receive(buffer.slice(sizeof(received_packet_header)));
  377. }
  378. if (header.next_packet_page == (NE2K_RAM_RECV_BEGIN >> 8))
  379. out8(REG_RW_BOUNDARY, (NE2K_RAM_RECV_END >> 8) - 1);
  380. else
  381. out8(REG_RW_BOUNDARY, header.next_packet_page - 1);
  382. m_ring_read_ptr = header.next_packet_page;
  383. }
  384. }
  385. void NE2000NetworkAdapter::out8(u16 address, u8 data)
  386. {
  387. m_io_base.offset(address).out(data);
  388. }
  389. void NE2000NetworkAdapter::out16(u16 address, u16 data)
  390. {
  391. m_io_base.offset(address).out(data);
  392. }
  393. u8 NE2000NetworkAdapter::in8(u16 address)
  394. {
  395. u8 data = m_io_base.offset(address).in<u8>();
  396. return data;
  397. }
  398. u16 NE2000NetworkAdapter::in16(u16 address)
  399. {
  400. return m_io_base.offset(address).in<u16>();
  401. }
  402. }