InterruptManagement.cpp 9.1 KB

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  1. /*
  2. * Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
  3. * All rights reserved.
  4. *
  5. * Redistribution and use in source and binary forms, with or without
  6. * modification, are permitted provided that the following conditions are met:
  7. *
  8. * 1. Redistributions of source code must retain the above copyright notice, this
  9. * list of conditions and the following disclaimer.
  10. *
  11. * 2. Redistributions in binary form must reproduce the above copyright notice,
  12. * this list of conditions and the following disclaimer in the documentation
  13. * and/or other materials provided with the distribution.
  14. *
  15. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  16. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  18. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  19. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  21. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  22. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  23. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  24. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. */
  26. #include <AK/FixedArray.h>
  27. #include <Kernel/ACPI/MultiProcessorParser.h>
  28. #include <Kernel/Arch/i386/CPU.h>
  29. #include <Kernel/Interrupts/APIC.h>
  30. #include <Kernel/Interrupts/IOAPIC.h>
  31. #include <Kernel/Interrupts/InterruptManagement.h>
  32. #include <Kernel/Interrupts/PIC.h>
  33. #include <Kernel/Interrupts/SpuriousInterruptHandler.h>
  34. #include <Kernel/Interrupts/UnhandledInterruptHandler.h>
  35. #include <Kernel/VM/MemoryManager.h>
  36. #include <LibBareMetal/IO.h>
  37. #define PCAT_COMPAT_FLAG 0x1
  38. namespace Kernel {
  39. static InterruptManagement* s_interrupt_management;
  40. bool InterruptManagement::initialized()
  41. {
  42. return (s_interrupt_management != nullptr);
  43. }
  44. InterruptManagement& InterruptManagement::the()
  45. {
  46. ASSERT(InterruptManagement::initialized());
  47. return *s_interrupt_management;
  48. }
  49. void InterruptManagement::initialize()
  50. {
  51. ASSERT(!InterruptManagement::initialized());
  52. s_interrupt_management = new InterruptManagement();
  53. }
  54. void InterruptManagement::enumerate_interrupt_handlers(Function<void(GenericInterruptHandler&)> callback)
  55. {
  56. for (int i = 0; i < GENERIC_INTERRUPT_HANDLERS_COUNT; i++) {
  57. auto& handler = get_interrupt_handler(i);
  58. if (handler.type() != HandlerType::UnhandledInterruptHandler)
  59. callback(handler);
  60. }
  61. }
  62. IRQController& InterruptManagement::get_interrupt_controller(int index)
  63. {
  64. ASSERT(index >= 0);
  65. ASSERT(!m_interrupt_controllers[index].is_null());
  66. return *m_interrupt_controllers[index];
  67. }
  68. Vector<RefPtr<ISAInterruptOverrideMetadata>> InterruptManagement::isa_overrides()
  69. {
  70. return m_isa_interrupt_overrides;
  71. }
  72. u8 InterruptManagement::acquire_mapped_interrupt_number(u8 number)
  73. {
  74. if (!InterruptManagement::initialized()) {
  75. // This is necessary, because we install UnhandledInterruptHandlers before we actually initialize the Interrupt Management object...
  76. return number;
  77. }
  78. return InterruptManagement::the().get_mapped_vector_number(number);
  79. }
  80. u8 InterruptManagement::get_mapped_vector_number(u8 original_vector)
  81. {
  82. // FIXME: For SMP configuration (with IOAPICs) use a better routing scheme to make redirections more efficient.
  83. return original_vector;
  84. }
  85. RefPtr<IRQController> InterruptManagement::get_responsible_irq_controller(u8 interrupt_vector)
  86. {
  87. if (m_interrupt_controllers.size() == 1 && m_interrupt_controllers[0]->type() == IRQControllerType::i8259) {
  88. return m_interrupt_controllers[0];
  89. }
  90. for (auto irq_controller : m_interrupt_controllers) {
  91. if (irq_controller->get_gsi_base() <= interrupt_vector)
  92. if (!irq_controller->is_hard_disabled())
  93. return irq_controller;
  94. }
  95. ASSERT_NOT_REACHED();
  96. }
  97. PhysicalAddress InterruptManagement::search_for_madt()
  98. {
  99. dbg() << "Early access to ACPI tables for interrupt setup";
  100. auto rsdp = ACPI::StaticParsing::search_rsdp();
  101. if (rsdp.is_null())
  102. return {};
  103. return ACPI::StaticParsing::search_table(rsdp, "APIC");
  104. }
  105. InterruptManagement::InterruptManagement()
  106. : m_madt(search_for_madt())
  107. {
  108. if (m_madt.is_null()) {
  109. m_interrupt_controllers[0] = adopt(*new PIC());
  110. return;
  111. }
  112. // FIXME: Check what is the actual data size then map accordingly
  113. dbg() << "Interrupts: MADT @ P " << m_madt.as_ptr();
  114. locate_apic_data();
  115. }
  116. void InterruptManagement::switch_to_pic_mode()
  117. {
  118. klog() << "Interrupts: Switch to Legacy PIC mode";
  119. InterruptDisabler disabler;
  120. m_smp_enabled = false;
  121. SpuriousInterruptHandler::initialize(7);
  122. SpuriousInterruptHandler::initialize(15);
  123. for (auto& irq_controller : m_interrupt_controllers) {
  124. ASSERT(irq_controller);
  125. if (irq_controller->type() == IRQControllerType::i82093AA) {
  126. irq_controller->hard_disable();
  127. dbg() << "Interrupts: Detected " << irq_controller->model() << " - Disabled";
  128. } else {
  129. dbg() << "Interrupts: Detected " << irq_controller->model();
  130. }
  131. }
  132. }
  133. void InterruptManagement::switch_to_ioapic_mode()
  134. {
  135. klog() << "Interrupts: Switch to IOAPIC mode";
  136. InterruptDisabler disabler;
  137. m_smp_enabled = true;
  138. if (m_interrupt_controllers.size() == 1) {
  139. if (get_interrupt_controller(0).type() == IRQControllerType::i8259) {
  140. klog() << "Interrupts: NO IOAPIC detected, Reverting to PIC mode.";
  141. return;
  142. }
  143. }
  144. for (auto& irq_controller : m_interrupt_controllers) {
  145. ASSERT(irq_controller);
  146. if (irq_controller->type() == IRQControllerType::i8259) {
  147. irq_controller->hard_disable();
  148. dbg() << "Interrupts: Detected " << irq_controller->model() << " Disabled";
  149. } else {
  150. dbg() << "Interrupts: Detected " << irq_controller->model();
  151. }
  152. }
  153. APIC::init();
  154. APIC::enable_bsp();
  155. MultiProcessorParser::initialize();
  156. }
  157. void InterruptManagement::locate_apic_data()
  158. {
  159. ASSERT(!m_madt.is_null());
  160. auto region = MM.allocate_kernel_region(m_madt.page_base(), (PAGE_SIZE * 2), "Initializing Interrupts", Region::Access::Read);
  161. auto& madt = *(const ACPI::Structures::MADT*)region->vaddr().offset(m_madt.offset_in_page()).as_ptr();
  162. int irq_controller_count = 0;
  163. if (madt.flags & PCAT_COMPAT_FLAG) {
  164. m_interrupt_controllers[0] = adopt(*new PIC());
  165. irq_controller_count++;
  166. }
  167. size_t entry_index = 0;
  168. size_t entries_length = madt.h.length - sizeof(ACPI::Structures::MADT);
  169. auto* madt_entry = madt.entries;
  170. while (entries_length > 0) {
  171. size_t entry_length = madt_entry->length;
  172. if (madt_entry->type == (u8)ACPI::Structures::MADTEntryType::IOAPIC) {
  173. auto* ioapic_entry = (const ACPI::Structures::MADTEntries::IOAPIC*)madt_entry;
  174. dbg() << "IOAPIC found @ MADT entry " << entry_index << ", MMIO Registers @ Px" << String::format("%x", ioapic_entry->ioapic_address);
  175. m_interrupt_controllers.resize(1 + irq_controller_count);
  176. m_interrupt_controllers[irq_controller_count] = adopt(*new IOAPIC(*(ioapic_mmio_regs*)ioapic_entry->ioapic_address, ioapic_entry->gsi_base));
  177. irq_controller_count++;
  178. }
  179. if (madt_entry->type == (u8)ACPI::Structures::MADTEntryType::InterruptSourceOverride) {
  180. auto* interrupt_override_entry = (const ACPI::Structures::MADTEntries::InterruptSourceOverride*)madt_entry;
  181. m_isa_interrupt_overrides.append(adopt(*new ISAInterruptOverrideMetadata(
  182. interrupt_override_entry->bus,
  183. interrupt_override_entry->source,
  184. interrupt_override_entry->global_system_interrupt,
  185. interrupt_override_entry->flags)));
  186. dbg() << "Interrupts: Overriding INT 0x" << String::format("%x", interrupt_override_entry->source) << " with GSI " << interrupt_override_entry->global_system_interrupt << ", for bus 0x" << String::format("%x", interrupt_override_entry->bus);
  187. }
  188. madt_entry = (ACPI::Structures::MADTEntryHeader*)(VirtualAddress((u32)madt_entry).offset(entry_length).get());
  189. entries_length -= entry_length;
  190. entry_index++;
  191. }
  192. }
  193. void InterruptManagement::locate_pci_interrupt_overrides()
  194. {
  195. // FIXME: calling the MultiProcessorParser causes a pagefault.
  196. ASSERT_NOT_REACHED();
  197. m_pci_interrupt_overrides = MultiProcessorParser::the().get_pci_interrupt_redirections();
  198. }
  199. ISAInterruptOverrideMetadata::ISAInterruptOverrideMetadata(u8 bus, u8 source, u32 global_system_interrupt, u16 flags)
  200. : m_bus(bus)
  201. , m_source(source)
  202. , m_global_system_interrupt(global_system_interrupt)
  203. , m_flags(flags)
  204. {
  205. }
  206. u8 ISAInterruptOverrideMetadata::bus() const
  207. {
  208. return m_bus;
  209. }
  210. u8 ISAInterruptOverrideMetadata::source() const
  211. {
  212. return m_source;
  213. }
  214. u32 ISAInterruptOverrideMetadata::gsi() const
  215. {
  216. return m_global_system_interrupt;
  217. }
  218. u16 ISAInterruptOverrideMetadata::flags() const
  219. {
  220. return m_flags;
  221. }
  222. }