LibX86: Add missing MovD and MovQ instructions
These are placeholders for now
This commit is contained in:
Hendiadyoin1
Andreas Kling
parent
efa42c4d45
commit
eb6af29421
Notes:
sideshowbarker
2024-07-18 08:30:52 +09:00
Author: https://github.com/Hendiadyoin1 Commit: https://github.com/SerenityOS/serenity/commit/eb6af294215 Pull-request: https://github.com/SerenityOS/serenity/pull/8610 Reviewed-by: https://github.com/awesomekling Reviewed-by: https://github.com/dascandy
5 changed files with 39 additions and 7 deletions
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@ -3528,9 +3528,13 @@ DEFINE_GENERIC_INSN_HANDLERS(AND, op_and, true, false, false)
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DEFINE_GENERIC_INSN_HANDLERS(CMP, op_sub, false, false, false)
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DEFINE_GENERIC_INSN_HANDLERS_PARTIAL(TEST, op_and, false, false, false)
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void SoftCPU::MOVQ_mm1_mm2m64(const X86::Instruction&) { TODO_INSN(); }
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void SoftCPU::MOVQ_mm1_mm2m64(const X86::Instruction&) { TODO_INSN(); };
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void SoftCPU::MOVQ_mm1m64_mm2(const X86::Instruction&) { TODO_INSN(); };
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void SoftCPU::MOVD_mm1_rm32(const X86::Instruction&) { TODO_INSN(); };
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void SoftCPU::MOVQ_mm1_rm64(const X86::Instruction&) { TODO_INSN(); }; // long mode
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void SoftCPU::MOVD_rm32_mm2(const X86::Instruction&) { TODO_INSN(); };
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void SoftCPU::MOVQ_rm64_mm2(const X86::Instruction&) { TODO_INSN(); }; // long mode
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void SoftCPU::EMMS(const X86::Instruction&) { TODO_INSN(); }
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void SoftCPU::MOVQ_mm1_m64_mm2(const X86::Instruction&) { TODO_INSN(); }
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void SoftCPU::wrap_0xC0(const X86::Instruction&) { TODO_INSN(); }
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void SoftCPU::wrap_0xC1_16(const X86::Instruction&) { TODO_INSN(); }
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void SoftCPU::wrap_0xC1_32(const X86::Instruction&) { TODO_INSN(); }
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@ -3540,4 +3544,5 @@ void SoftCPU::wrap_0xD1_32(const X86::Instruction&) { TODO_INSN(); }
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void SoftCPU::wrap_0xD2(const X86::Instruction&) { TODO_INSN(); }
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void SoftCPU::wrap_0xD3_16(const X86::Instruction&) { TODO_INSN(); }
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void SoftCPU::wrap_0xD3_32(const X86::Instruction&) { TODO_INSN(); }
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}
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@ -1094,8 +1094,12 @@ private:
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virtual void XOR_reg32_RM32(const X86::Instruction&) override;
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virtual void XOR_reg8_RM8(const X86::Instruction&) override;
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virtual void MOVQ_mm1_mm2m64(const X86::Instruction&) override;
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virtual void MOVQ_mm1m64_mm2(const X86::Instruction&) override;
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virtual void MOVD_mm1_rm32(const X86::Instruction&) override;
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virtual void MOVQ_mm1_rm64(const X86::Instruction&) override; // long mode
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virtual void MOVD_rm32_mm2(const X86::Instruction&) override;
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virtual void MOVQ_rm64_mm2(const X86::Instruction&) override; // long mode
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virtual void EMMS(const X86::Instruction&) override;
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virtual void MOVQ_mm1_m64_mm2(const X86::Instruction&) override;
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virtual void wrap_0xC0(const X86::Instruction&) override;
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virtual void wrap_0xC1_16(const X86::Instruction&) override;
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virtual void wrap_0xC1_32(const X86::Instruction&) override;
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@ -142,6 +142,8 @@ static void build(InstructionDescriptor* table, u8 op, const char* mnemonic, Ins
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case OP_CR_reg32:
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case OP_reg16_RM8:
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case OP_reg32_RM8:
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case OP_mm1_rm32:
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case OP_rm32_mm2:
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case OP_mm1_mm2m64:
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case OP_mm1_mm2m32:
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case OP_mm1m64_mm2:
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@ -812,6 +814,7 @@ static void build_slash_reg(u8 op, u8 slash, const char* mnemonic, InstructionFo
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build_0f(0x69, "PUNPCKHWD", OP_mm1_mm2m64, &Interpreter::PUNPCKHWD_mm1_mm2m64);
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build_0f(0x6A, "PUNPCKHDQ", OP_mm1_mm2m64, &Interpreter::PUNPCKHDQ_mm1_mm2m64);
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build_0f(0x6B, "PACKSSDW", OP_mm1_mm2m64, &Interpreter::PACKSSDW_mm1_mm2m64);
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build_0f(0x6E, "MOVD", OP_mm1_rm32, &Interpreter::MOVD_mm1_rm32);
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build_0f(0x6F, "MOVQ", OP_mm1_mm2m64, &Interpreter::MOVQ_mm1_mm2m64);
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build_0f_slash(0x71, 2, "PSRLW", OP_mm1_imm8, &Interpreter::PSRLW_mm1_mm2m64);
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@ -829,7 +832,8 @@ static void build_slash_reg(u8 op, u8 slash, const char* mnemonic, InstructionFo
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build_0f(0x76, "PCMPEQD", OP_mm1_mm2m64, &Interpreter::PCMPEQD_mm1_mm2m64);
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build_0f(0x75, "PCMPEQW", OP_mm1_mm2m64, &Interpreter::PCMPEQW_mm1_mm2m64);
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build_0f(0x77, "EMMS", OP, &Interpreter::EMMS);
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build_0f(0x7F, "MOVQ", OP_mm1m64_mm2, &Interpreter::MOVQ_mm1_m64_mm2);
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build_0f(0x7E, "MOVD", OP_rm32_mm2, &Interpreter::MOVD_rm32_mm2);
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build_0f(0x7F, "MOVQ", OP_mm1m64_mm2, &Interpreter::MOVQ_mm1m64_mm2);
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build_0f(0x80, "JO", OP_NEAR_imm, &Interpreter::Jcc_NEAR_imm);
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build_0f(0x81, "JNO", OP_NEAR_imm, &Interpreter::Jcc_NEAR_imm);
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@ -1319,6 +1323,7 @@ void Instruction::to_string_internal(StringBuilder& builder, u32 origin, const S
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auto append_relative_imm32 = [&] { formatted_address(origin + 5, x32, i32(imm32())); };
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auto append_mm = [&] { builder.appendff("mm{}", register_index()); };
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auto append_mmrm32 = [&] { builder.append(m_modrm.to_string_mm(*this)); };
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auto append_mmrm64 = [&] { builder.append(m_modrm.to_string_mm(*this)); };
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auto append = [&](auto& content) { builder.append(content); };
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@ -1843,11 +1848,23 @@ void Instruction::to_string_internal(StringBuilder& builder, u32 origin, const S
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append_imm8();
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break;
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case OP_mm1_mm2m32:
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append_mnemonic_space();
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append_mm();
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append(", ");
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append_mmrm32();
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break;
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case OP_mm1_rm32:
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append_mnemonic_space();
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append_mm();
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append(", ");
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append_rm32();
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break;
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case OP_rm32_mm2:
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append_mnemonic_space();
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append_rm32();
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append(", ");
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append_mm();
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break;
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case OP_mm1_mm2m64:
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append_mnemonic_space();
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append_mm();
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@ -1856,9 +1873,9 @@ void Instruction::to_string_internal(StringBuilder& builder, u32 origin, const S
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break;
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case OP_mm1m64_mm2:
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append_mnemonic_space();
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append_mm();
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append(", ");
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append_mmrm64();
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append(", ");
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append_mm();
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break;
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case InstructionPrefix:
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append_mnemonic();
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@ -103,6 +103,8 @@ enum InstructionFormat {
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OP_RM32_reg32_imm8,
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OP_RM16_reg16_CL,
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OP_RM32_reg32_CL,
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OP_mm1_rm32,
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OP_rm32_mm2,
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OP_mm1_mm2m64,
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OP_mm1_mm2m32,
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OP_mm1_imm8,
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@ -641,8 +641,12 @@ public:
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virtual void XOR_reg32_RM32(const Instruction&) = 0;
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virtual void XOR_reg8_RM8(const Instruction&) = 0;
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virtual void MOVQ_mm1_mm2m64(const Instruction&) = 0;
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virtual void MOVQ_mm1m64_mm2(const Instruction&) = 0;
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virtual void MOVD_mm1_rm32(const Instruction&) = 0;
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virtual void MOVQ_mm1_rm64(const Instruction&) = 0; // long mode
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virtual void MOVD_rm32_mm2(const Instruction&) = 0;
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virtual void MOVQ_rm64_mm2(const Instruction&) = 0; // long mode
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virtual void EMMS(const Instruction&) = 0;
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virtual void MOVQ_mm1_m64_mm2(const Instruction&) = 0;
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virtual void wrap_0xC0(const Instruction&) = 0;
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virtual void wrap_0xC1_16(const Instruction&) = 0;
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virtual void wrap_0xC1_32(const Instruction&) = 0;
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