瀏覽代碼

Kernel/Storage: Remove the None option from AHCI reset policy

This was proved to be a problematic option. I tested this option on
bare metal AHCI controller, and if we didn't reset the controller, the
firmware (SeaBIOS) could leave the controller state not clean, so an
plugged device signature was in place although the specific port had no
plugged device after rebooting.
Therefore, we need to ensure we use the controller in a clean state
always.

In addition to that, the Complete option was renamed to Aggressive, as
it represents better the consequences of choosing this option.
Liav A 4 年之前
父節點
當前提交
d431e4cd01
共有 4 個文件被更改,包括 8 次插入13 次删除
  1. 2 4
      Kernel/CommandLine.cpp
  2. 1 2
      Kernel/CommandLine.h
  3. 4 6
      Kernel/Storage/AHCIController.cpp
  4. 1 1
      Kernel/Storage/AHCIPortHandler.cpp

+ 2 - 4
Kernel/CommandLine.cpp

@@ -178,10 +178,8 @@ UNMAP_AFTER_INIT AHCIResetMode CommandLine::ahci_reset_mode() const
     const auto ahci_reset_mode = lookup("ahci_reset_mode").value_or("controller");
     if (ahci_reset_mode == "controller") {
         return AHCIResetMode::ControllerOnly;
-    } else if (ahci_reset_mode == "none") {
-        return AHCIResetMode::None;
-    } else if (ahci_reset_mode == "complete") {
-        return AHCIResetMode::Complete;
+    } else if (ahci_reset_mode == "aggressive") {
+        return AHCIResetMode::Aggressive;
     }
     PANIC("Unknown AHCIResetMode: {}", ahci_reset_mode);
 }

+ 1 - 2
Kernel/CommandLine.h

@@ -38,8 +38,7 @@ enum class PCIAccessLevel {
 
 enum class AHCIResetMode {
     ControllerOnly,
-    Complete,
-    None
+    Aggressive,
 };
 
 class CommandLine {

+ 4 - 6
Kernel/Storage/AHCIController.cpp

@@ -137,13 +137,11 @@ AHCIController::~AHCIController()
 
 void AHCIController::initialize()
 {
-    if (kernel_command_line().ahci_reset_mode() != AHCIResetMode::None) {
-        if (!reset()) {
-            dmesgln("{}: AHCI controller reset failed", pci_address());
-            return;
-        }
-        dmesgln("{}: AHCI controller reset", pci_address());
+    if (!reset()) {
+        dmesgln("{}: AHCI controller reset failed", pci_address());
+        return;
     }
+    dmesgln("{}: AHCI controller reset", pci_address());
     dbgln("{}: AHCI command list entries count - {}", pci_address(), hba_capabilities().max_command_list_entries_count);
 
     u32 version = hba().control_regs.version;

+ 1 - 1
Kernel/Storage/AHCIPortHandler.cpp

@@ -31,7 +31,7 @@ AHCIPortHandler::AHCIPortHandler(AHCIController& controller, u8 irq, AHCI::Maske
     m_pending_ports_interrupts.set_all();
     enable_irq();
 
-    if (kernel_command_line().ahci_reset_mode() == AHCIResetMode::Complete) {
+    if (kernel_command_line().ahci_reset_mode() == AHCIResetMode::Aggressive) {
         for (auto index : taken_ports.to_vector()) {
             auto port = AHCIPort::create(*this, static_cast<volatile AHCI::PortRegisters&>(controller.hba().port_regs[index]), index);
             m_handled_ports.set(index, port);