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@@ -15,12 +15,13 @@ Timer::Timer()
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: HardwareTimer(to_underlying(CSR::SCAUSE::SupervisorTimerInterrupt) & ~CSR::SCAUSE_INTERRUPT_MASK)
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{
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// FIXME: Actually query the frequency of the timer from the device tree.
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+
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// Based on the "/cpus/timebase-frequency" device tree node for the QEMU virt machine
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m_frequency = 10'000'000; // in Hz
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- set_interrupt_interval_usec(m_frequency / OPTIMAL_TICKS_PER_SECOND_RATE);
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+ m_interrupt_interval = m_frequency / OPTIMAL_TICKS_PER_SECOND_RATE;
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- set_compare(microseconds_since_boot() + m_interrupt_interval);
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+ set_compare(current_ticks() + m_interrupt_interval);
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RISCV64::CSR::set_bits(RISCV64::CSR::Address::SIE, 1 << interrupt_number());
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}
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@@ -31,7 +32,7 @@ NonnullLockRefPtr<Timer> Timer::initialize()
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return timer;
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}
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-u64 Timer::microseconds_since_boot()
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+u64 Timer::current_ticks()
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{
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return RISCV64::CSR::read(RISCV64::CSR::Address::TIME);
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}
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@@ -40,7 +41,7 @@ bool Timer::handle_interrupt(RegisterState const& regs)
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{
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auto result = HardwareTimer::handle_interrupt(regs);
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- set_compare(microseconds_since_boot() + m_interrupt_interval);
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+ set_compare(current_ticks() + m_interrupt_interval);
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return result;
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}
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@@ -48,7 +49,7 @@ bool Timer::handle_interrupt(RegisterState const& regs)
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u64 Timer::update_time(u64& seconds_since_boot, u32& ticks_this_second, bool query_only)
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{
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// Should only be called by the time keeper interrupt handler!
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- u64 current_value = microseconds_since_boot();
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+ u64 current_value = current_ticks();
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u64 delta_ticks = m_main_counter_drift;
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if (current_value >= m_main_counter_last_read) {
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delta_ticks += current_value - m_main_counter_last_read;
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@@ -71,11 +72,6 @@ u64 Timer::update_time(u64& seconds_since_boot, u32& ticks_this_second, bool que
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return (delta_ticks * 1000000000ull) / ticks_per_second;
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}
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-void Timer::set_interrupt_interval_usec(u32 interrupt_interval)
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-{
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- m_interrupt_interval = interrupt_interval;
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-}
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-
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void Timer::set_compare(u64 compare)
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{
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if (SBI::Timer::set_timer(compare).is_error())
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