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@@ -6,6 +6,8 @@
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#include "StdLib.h"
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#include "Task.h"
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+//#define MM_DEBUG
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+
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static MemoryManager* s_the;
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MemoryManager& MM
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@@ -15,10 +17,12 @@ MemoryManager& MM
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MemoryManager::MemoryManager()
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{
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- m_pageDirectory = (dword*)0x5000;
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+ m_kernel_page_directory = (dword*)0x5000;
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m_pageTableZero = (dword*)0x6000;
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m_pageTableOne = (dword*)0x7000;
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+ m_next_laddr.set(0xd0000000);
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+
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initializePaging();
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}
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@@ -26,12 +30,12 @@ MemoryManager::~MemoryManager()
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{
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}
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-void MemoryManager::populatePageDirectory(Task& task)
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+void MemoryManager::populate_page_directory(Task& task)
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{
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memset(task.m_pageDirectory, 0, 4096);
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- task.m_pageDirectory[0] = m_pageDirectory[0];
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- task.m_pageDirectory[1] = m_pageDirectory[1];
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+ task.m_pageDirectory[0] = m_kernel_page_directory[0];
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+ task.m_pageDirectory[1] = m_kernel_page_directory[1];
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}
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void MemoryManager::initializePaging()
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@@ -40,10 +44,10 @@ void MemoryManager::initializePaging()
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static_assert(sizeof(MemoryManager::PageTableEntry) == 4);
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memset(m_pageTableZero, 0, 4096);
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memset(m_pageTableOne, 0, 4096);
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- memset(m_pageDirectory, 0, 4096);
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+ memset(m_kernel_page_directory, 0, 4096);
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#ifdef MM_DEBUG
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- kprintf("MM: Page directory @ %p\n", m_pageDirectory);
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+ kprintf("MM: Kernel page directory @ %p\n", m_kernel_page_directory);
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#endif
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// Make null dereferences crash.
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@@ -56,7 +60,7 @@ void MemoryManager::initializePaging()
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m_freePages.append(PhysicalAddress(i));
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}
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- asm volatile("movl %%eax, %%cr3"::"a"(m_pageDirectory));
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+ asm volatile("movl %%eax, %%cr3"::"a"(m_kernel_page_directory));
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asm volatile(
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"movl %cr0, %eax\n"
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"orl $0x80000001, %eax\n"
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@@ -69,19 +73,20 @@ void* MemoryManager::allocatePageTable()
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auto ppages = allocatePhysicalPages(1);
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dword address = ppages[0].get();
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identityMap(LinearAddress(address), 4096);
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+ memset((void*)address, 0, 4096);
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return (void*)address;
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}
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-auto MemoryManager::ensurePTE(dword* pageDirectory, LinearAddress linearAddress) -> PageTableEntry
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+auto MemoryManager::ensurePTE(dword* page_directory, LinearAddress laddr) -> PageTableEntry
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{
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ASSERT_INTERRUPTS_DISABLED();
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- dword pageDirectoryIndex = (linearAddress.get() >> 22) & 0x3ff;
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- dword pageTableIndex = (linearAddress.get() >> 12) & 0x3ff;
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+ dword pageDirectoryIndex = (laddr.get() >> 22) & 0x3ff;
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+ dword pageTableIndex = (laddr.get() >> 12) & 0x3ff;
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- PageDirectoryEntry pde = PageDirectoryEntry(&pageDirectory[pageDirectoryIndex]);
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+ PageDirectoryEntry pde = PageDirectoryEntry(&page_directory[pageDirectoryIndex]);
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if (!pde.isPresent()) {
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#ifdef MM_DEBUG
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- kprintf("MM: PDE %u not present, allocating\n", pageDirectoryIndex);
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+ dbgprintf("MM: PDE %u not present, allocating\n", pageDirectoryIndex);
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#endif
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if (pageDirectoryIndex == 0) {
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pde.setPageTableBase((dword)m_pageTableZero);
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@@ -95,8 +100,9 @@ auto MemoryManager::ensurePTE(dword* pageDirectory, LinearAddress linearAddress)
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pde.setWritable(true);
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} else {
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auto* pageTable = allocatePageTable();
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- kprintf("MM: Allocated page table #%u (for laddr=%p) at %p\n", pageDirectoryIndex, linearAddress.get(), pageTable);
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- memset(pageTable, 0, 4096);
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+#ifdef MM_DEBUG
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+ dbgprintf("MM: PDE %x allocated page table #%u (for laddr=%p) at %p\n", page_directory, pageDirectoryIndex, laddr.get(), pageTable);
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+#endif
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pde.setPageTableBase((dword)pageTable);
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pde.setUserAllowed(true);
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pde.setPresent(true);
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@@ -112,7 +118,7 @@ void MemoryManager::protectMap(LinearAddress linearAddress, size_t length)
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// FIXME: ASSERT(linearAddress is 4KB aligned);
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for (dword offset = 0; offset < length; offset += 4096) {
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auto pteAddress = linearAddress.offset(offset);
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- auto pte = ensurePTE(m_pageDirectory, pteAddress);
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+ auto pte = ensurePTE(m_kernel_page_directory, pteAddress);
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pte.setPhysicalPageBase(pteAddress.get());
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pte.setUserAllowed(false);
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pte.setPresent(false);
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@@ -127,7 +133,7 @@ void MemoryManager::identityMap(LinearAddress linearAddress, size_t length)
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// FIXME: ASSERT(linearAddress is 4KB aligned);
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for (dword offset = 0; offset < length; offset += 4096) {
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auto pteAddress = linearAddress.offset(offset);
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- auto pte = ensurePTE(m_pageDirectory, pteAddress);
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+ auto pte = ensurePTE(m_kernel_page_directory, pteAddress);
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pte.setPhysicalPageBase(pteAddress.get());
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pte.setUserAllowed(true);
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pte.setPresent(true);
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@@ -204,7 +210,7 @@ Vector<PhysicalAddress> MemoryManager::allocatePhysicalPages(size_t count)
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byte* MemoryManager::quickMapOnePage(PhysicalAddress physicalAddress)
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{
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ASSERT_INTERRUPTS_DISABLED();
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- auto pte = ensurePTE(m_pageDirectory, LinearAddress(4 * MB));
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+ auto pte = ensurePTE(m_kernel_page_directory, LinearAddress(4 * MB));
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kprintf("MM: quickmap %x @ %x {pte @ %p}\n", physicalAddress.get(), 4*MB, pte.ptr());
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pte.setPhysicalPageBase(physicalAddress.pageBase());
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pte.setPresent(true);
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@@ -213,6 +219,20 @@ byte* MemoryManager::quickMapOnePage(PhysicalAddress physicalAddress)
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return (byte*)(4 * MB);
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}
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+void MemoryManager::enter_kernel_paging_scope()
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+{
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+ InterruptDisabler disabler;
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+ current->m_tss.cr3 = (dword)m_kernel_page_directory;
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+ asm volatile("movl %%eax, %%cr3"::"a"(m_kernel_page_directory));
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+}
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+
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+void MemoryManager::enter_task_paging_scope(Task& task)
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+{
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+ InterruptDisabler disabler;
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+ current->m_tss.cr3 = (dword)task.m_pageDirectory;
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+ asm volatile("movl %%eax, %%cr3"::"a"(task.m_pageDirectory));
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+}
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+
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void MemoryManager::flushEntireTLB()
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{
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asm volatile(
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@@ -226,6 +246,67 @@ void MemoryManager::flushTLB(LinearAddress laddr)
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asm volatile("invlpg %0": :"m" (*(char*)laddr.get()));
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}
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+void MemoryManager::map_region_at_address(dword* page_directory, Task::Region& region, LinearAddress laddr)
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+{
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+ InterruptDisabler disabler;
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+ auto& zone = *region.zone;
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+ for (size_t i = 0; i < zone.m_pages.size(); ++i) {
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+ auto page_laddr = laddr.offset(i * PAGE_SIZE);
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+ auto pte = ensurePTE(page_directory, page_laddr);
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+ pte.setPhysicalPageBase(zone.m_pages[i].get());
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+ pte.setPresent(true);
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+ pte.setWritable(true);
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+ pte.setUserAllowed(true);
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+ flushTLB(page_laddr);
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+#ifdef MM_DEBUG
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+ dbgprintf("MM: >> map_region_at_address (PD=%x) L%x => P%x\n", page_directory, page_laddr, zone.m_pages[i].get());
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+#endif
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+ }
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+}
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+
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+void MemoryManager::unmap_range(dword* page_directory, LinearAddress laddr, size_t size)
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+{
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+ ASSERT((size % PAGE_SIZE) == 0);
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+
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+ InterruptDisabler disabler;
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+ size_t numPages = size / 4096;
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+ for (size_t i = 0; i < numPages; ++i) {
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+ auto page_laddr = laddr.offset(i * PAGE_SIZE);
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+ auto pte = ensurePTE(page_directory, page_laddr);
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+ pte.setPhysicalPageBase(0);
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+ pte.setPresent(false);
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+ pte.setWritable(false);
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+ pte.setUserAllowed(false);
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+ flushTLB(page_laddr);
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+#ifdef MM_DEBUG
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+ dbgprintf("MM: << unmap_range L%x =/> 0\n", page_laddr);
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+#endif
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+ }
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+}
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+
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+LinearAddress MemoryManager::allocate_linear_address_range(size_t size)
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+{
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+ ASSERT((size % PAGE_SIZE) == 0);
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+
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+ // FIXME: Recycle ranges!
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+ auto laddr = m_next_laddr;
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+ m_next_laddr.set(m_next_laddr.get() + size);
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+ return laddr;
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+}
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+
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+byte* MemoryManager::create_kernel_alias_for_region(Task::Region& region)
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+{
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+ InterruptDisabler disabler;
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+ auto laddr = allocate_linear_address_range(region.size);
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+ map_region_at_address(m_kernel_page_directory, region, laddr);
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+ return laddr.asPtr();
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+}
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+
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+void MemoryManager::remove_kernel_alias_for_region(Task::Region& region, byte* addr)
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+{
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+ unmap_range(m_kernel_page_directory, LinearAddress((dword)addr), region.size);
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+}
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+
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bool MemoryManager::unmapRegion(Task& task, Task::Region& region)
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{
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InterruptDisabler disabler;
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@@ -238,7 +319,9 @@ bool MemoryManager::unmapRegion(Task& task, Task::Region& region)
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pte.setWritable(false);
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pte.setUserAllowed(false);
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flushTLB(laddr);
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- //kprintf("MM: >> Unmapped L%x => P%x <<\n", laddr, zone.m_pages[i].get());
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+#ifdef MM_DEBUG
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+ //dbgprintf("MM: >> Unmapped L%x => P%x <<\n", laddr, zone.m_pages[i].get());
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+#endif
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}
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return true;
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}
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@@ -246,7 +329,6 @@ bool MemoryManager::unmapRegion(Task& task, Task::Region& region)
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bool MemoryManager::unmapSubregion(Task& task, Task::Subregion& subregion)
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{
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InterruptDisabler disabler;
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- auto& region = *subregion.region;
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size_t numPages = subregion.size / 4096;
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ASSERT(numPages);
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for (size_t i = 0; i < numPages; ++i) {
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@@ -257,7 +339,9 @@ bool MemoryManager::unmapSubregion(Task& task, Task::Subregion& subregion)
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pte.setWritable(false);
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pte.setUserAllowed(false);
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flushTLB(laddr);
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- //kprintf("MM: >> Unmapped subregion %s L%x => P%x <<\n", subregion.name.characters(), laddr, zone.m_pages[i].get());
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+#ifdef MM_DEBUG
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+ //dbgprintf("MM: >> Unmapped subregion %s L%x => P%x <<\n", subregion.name.characters(), laddr, zone.m_pages[i].get());
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+#endif
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}
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return true;
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}
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@@ -290,27 +374,18 @@ bool MemoryManager::mapSubregion(Task& task, Task::Subregion& subregion)
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pte.setPhysicalPageBase(zone.m_pages[firstPage + i].get());
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pte.setPresent(true);
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pte.setWritable(true);
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- pte.setUserAllowed(!task.isRing0());
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+ pte.setUserAllowed(true);
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flushTLB(laddr);
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- //kprintf("MM: >> Mapped subregion %s L%x => P%x (%u into region)<<\n", subregion.name.characters(), laddr, zone.m_pages[firstPage + i].get(), subregion.offset);
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+#ifdef MM_DEBUG
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+ //dbgprintf("MM: >> Mapped subregion %s L%x => P%x (%u into region)\n", subregion.name.characters(), laddr, zone.m_pages[firstPage + i].get(), subregion.offset);
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+#endif
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}
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return true;
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}
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bool MemoryManager::mapRegion(Task& task, Task::Region& region)
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{
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- InterruptDisabler disabler;
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- auto& zone = *region.zone;
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- for (size_t i = 0; i < zone.m_pages.size(); ++i) {
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- auto laddr = region.linearAddress.offset(i * PAGE_SIZE);
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- auto pte = ensurePTE(task.m_pageDirectory,laddr);
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- pte.setPhysicalPageBase(zone.m_pages[i].get());
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- pte.setPresent(true);
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- pte.setWritable(true);
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- pte.setUserAllowed(!task.isRing0()); // FIXME: This doesn't make sense. Allow USER if the TASK is RING0? Wh...what?
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- flushTLB(laddr);
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- //kprintf("MM: >> Mapped L%x => P%x <<\n", laddr, zone.m_pages[i].get());
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- }
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+ map_region_at_address(task.m_pageDirectory, region, region.linearAddress);
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return true;
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}
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