Kernel: Move PCI IDE driver code to the Arch/x86 directory

That code heavily relies on x86-specific instructions, and while other
CPU architectures and platforms can have PCI IDE controllers, currently
we don't support those, so this code is a special case which needs to be
in the Arch/x86 directory.
In the future it could be put back to the original place when we make it
more generic and suitable for other platforms.

Kernel/Storage/ATA/GenericIDE/PCIController.cpp → Kernel/Arch/x86/PCI/IDELegacyModeController.cpp

@@ -6,22 +6,22 @@
 
 #include <AK/OwnPtr.h>
 #include <AK/Types.h>
+#include <Kernel/Arch/x86/PCI/IDELegacyModeController.h>
 #include <Kernel/Bus/PCI/API.h>
 #include <Kernel/FileSystem/ProcFS.h>
 #include <Kernel/Library/LockRefPtr.h>
 #include <Kernel/Sections.h>
 #include <Kernel/Storage/ATA/ATADiskDevice.h>
 #include <Kernel/Storage/ATA/GenericIDE/Channel.h>
-#include <Kernel/Storage/ATA/GenericIDE/PCIController.h>
 
 namespace Kernel {
 
-UNMAP_AFTER_INIT NonnullLockRefPtr<PCIIDEController> PCIIDEController::initialize(PCI::DeviceIdentifier const& device_identifier, bool force_pio)
+UNMAP_AFTER_INIT NonnullLockRefPtr<PCIIDELegacyModeController> PCIIDELegacyModeController::initialize(PCI::DeviceIdentifier const& device_identifier, bool force_pio)
 {
-    return adopt_lock_ref(*new PCIIDEController(device_identifier, force_pio));
+    return adopt_lock_ref(*new PCIIDELegacyModeController(device_identifier, force_pio));
 }
 
-UNMAP_AFTER_INIT PCIIDEController::PCIIDEController(PCI::DeviceIdentifier const& device_identifier, bool force_pio)
+UNMAP_AFTER_INIT PCIIDELegacyModeController::PCIIDELegacyModeController(PCI::DeviceIdentifier const& device_identifier, bool force_pio)
     : PCI::Device(device_identifier.address())
     , m_prog_if(device_identifier.prog_if())
     , m_interrupt_line(device_identifier.interrupt_line())
@@ -33,22 +33,22 @@ UNMAP_AFTER_INIT PCIIDEController::PCIIDEController(PCI::DeviceIdentifier const&
     initialize(force_pio);
 }
 
-bool PCIIDEController::is_pci_native_mode_enabled() const
+bool PCIIDELegacyModeController::is_pci_native_mode_enabled() const
 {
     return (m_prog_if.value() & 0x05) != 0;
 }
 
-bool PCIIDEController::is_pci_native_mode_enabled_on_primary_channel() const
+bool PCIIDELegacyModeController::is_pci_native_mode_enabled_on_primary_channel() const
 {
     return (m_prog_if.value() & 0x1) == 0x1;
 }
 
-bool PCIIDEController::is_pci_native_mode_enabled_on_secondary_channel() const
+bool PCIIDELegacyModeController::is_pci_native_mode_enabled_on_secondary_channel() const
 {
     return (m_prog_if.value() & 0x4) == 0x4;
 }
 
-bool PCIIDEController::is_bus_master_capable() const
+bool PCIIDELegacyModeController::is_bus_master_capable() const
 {
     return m_prog_if.value() & (1 << 7);
 }
@@ -78,7 +78,7 @@ static char const* detect_controller_type(u8 programming_value)
     VERIFY_NOT_REACHED();
 }
 
-UNMAP_AFTER_INIT void PCIIDEController::initialize(bool force_pio)
+UNMAP_AFTER_INIT void PCIIDELegacyModeController::initialize(bool force_pio)
 {
     auto bus_master_base = IOAddress(PCI::get_BAR4(pci_address()) & (~1));
     dbgln("IDE controller @ {}: bus master base was set to {}", pci_address(), bus_master_base);

Kernel/Storage/ATA/GenericIDE/PCIController.h → Kernel/Arch/x86/PCI/IDELegacyModeController.h

@@ -16,10 +16,10 @@ namespace Kernel {
 
 class AsyncBlockDeviceRequest;
 
-class PCIIDEController final : public IDEController
+class PCIIDELegacyModeController final : public IDEController
     , public PCI::Device {
 public:
-    static NonnullLockRefPtr<PCIIDEController> initialize(PCI::DeviceIdentifier const&, bool force_pio);
+    static NonnullLockRefPtr<PCIIDELegacyModeController> initialize(PCI::DeviceIdentifier const&, bool force_pio);
 
     bool is_bus_master_capable() const;
     bool is_pci_native_mode_enabled() const;
@@ -27,7 +27,7 @@ public:
 private:
     bool is_pci_native_mode_enabled_on_primary_channel() const;
     bool is_pci_native_mode_enabled_on_secondary_channel() const;
-    PCIIDEController(PCI::DeviceIdentifier const&, bool force_pio);
+    PCIIDELegacyModeController(PCI::DeviceIdentifier const&, bool force_pio);
 
     LockRefPtr<StorageDevice> device_by_channel_and_position(u32 index) const;
     void initialize(bool force_pio);

Kernel/CMakeLists.txt

@@ -90,7 +90,6 @@ set(KERNEL_SOURCES
     Storage/ATA/AHCI/InterruptHandler.cpp
     Storage/ATA/GenericIDE/Controller.cpp
     Storage/ATA/GenericIDE/Channel.cpp
-    Storage/ATA/GenericIDE/PCIController.cpp
     Storage/ATA/ATAController.cpp
     Storage/ATA/ATADevice.cpp
     Storage/ATA/ATADiskDevice.cpp
@@ -341,6 +340,7 @@ if ("${SERENITY_ARCH}" STREQUAL "i686" OR "${SERENITY_ARCH}" STREQUAL "x86_64")
         Arch/x86/ISABus/I8042Controller.cpp
         Arch/x86/ISABus/IDEController.cpp
         Arch/x86/PCI/Controller/HostBridge.cpp
+        Arch/x86/PCI/IDELegacyModeController.cpp
         Arch/x86/PCI/Initializer.cpp
     )
 

Kernel/Storage/ATA/GenericIDE/Channel.cpp

@@ -82,11 +82,11 @@ ErrorOr<void> IDEChannel::port_phy_reset()
     return {};
 }
 
-ErrorOr<void> IDEChannel::allocate_resources_for_pci_ide_controller(Badge<PCIIDEController>, bool force_pio)
+#if ARCH(I386) || ARCH(X86_64)
+ErrorOr<void> IDEChannel::allocate_resources_for_pci_ide_controller(Badge<PCIIDELegacyModeController>, bool force_pio)
 {
     return allocate_resources(force_pio);
 }
-#if ARCH(I386) || ARCH(X86_64)
 ErrorOr<void> IDEChannel::allocate_resources_for_isa_ide_controller(Badge<ISAIDEController>)
 {
     return allocate_resources(false);

Kernel/Storage/ATA/GenericIDE/Channel.h

@@ -36,8 +36,8 @@ namespace Kernel {
 class AsyncBlockDeviceRequest;
 
 class IDEController;
-class PCIIDEController;
 #if ARCH(I386) || ARCH(X86_64)
+class PCIIDELegacyModeController;
 class ISAIDEController;
 #endif
 class IDEChannel
@@ -112,8 +112,8 @@ public:
 
     virtual StringView purpose() const override { return "PATA Channel"sv; }
 
-    ErrorOr<void> allocate_resources_for_pci_ide_controller(Badge<PCIIDEController>, bool force_pio);
 #if ARCH(I386) || ARCH(X86_64)
+    ErrorOr<void> allocate_resources_for_pci_ide_controller(Badge<PCIIDELegacyModeController>, bool force_pio);
     ErrorOr<void> allocate_resources_for_isa_ide_controller(Badge<ISAIDEController>);
 #endif
 

Kernel/Storage/StorageManagement.cpp

@@ -12,6 +12,7 @@
 #include <AK/UUID.h>
 #if ARCH(I386) || ARCH(X86_64)
 #    include <Kernel/Arch/x86/ISABus/IDEController.h>
+#    include <Kernel/Arch/x86/PCI/IDELegacyModeController.h>
 #endif
 #include <Kernel/Bus/PCI/API.h>
 #include <Kernel/Bus/PCI/Access.h>
@@ -23,7 +24,6 @@
 #include <Kernel/Panic.h>
 #include <Kernel/Storage/ATA/AHCI/Controller.h>
 #include <Kernel/Storage/ATA/GenericIDE/Controller.h>
-#include <Kernel/Storage/ATA/GenericIDE/PCIController.h>
 #include <Kernel/Storage/NVMe/NVMeController.h>
 #include <Kernel/Storage/Ramdisk/Controller.h>
 #include <Kernel/Storage/StorageManagement.h>
@@ -103,10 +103,12 @@ UNMAP_AFTER_INIT void StorageManagement::enumerate_pci_controllers(bool force_pi
                 }
             }
 
+#if ARCH(I386) || ARCH(X86_64)
             auto subclass_code = static_cast<SubclassID>(device_identifier.subclass_code().value());
             if (subclass_code == SubclassID::IDEController && kernel_command_line().is_ide_enabled()) {
-                m_controllers.append(PCIIDEController::initialize(device_identifier, force_pio));
+                m_controllers.append(PCIIDELegacyModeController::initialize(device_identifier, force_pio));
             }
+#endif
 
             if (subclass_code == SubclassID::SATAController
                 && device_identifier.prog_if().value() == to_underlying(PCI::MassStorage::SATAProgIF::AHCI)) {