Kernel/PCI: Introduce a new ECAM access mechanism
Now the kernel supports 2 ECAM access methods. MMIOAccess was renamed to WindowedMMIOAccess and is what we had until now - each device that is detected on boot is assigned to a memory-mapped window, so IO operations on multiple devices can occur simultaneously due to creating multiple virtual mappings, hence the name is a memory-mapped window. This commit adds a new class called MMIOAccess (not to be confused with the old MMIOAccess class). This class creates one memory-mapped window. On each IO operation on a configuration space of a device, it maps the requested PCI bus region to that window. Therefore it holds a SpinLock during the operation to ensure that no other PCI bus region was mapped during the call. A user can choose to either use PCI ECAM with memory-mapped window for each device, or for an entire bus. By default, the kernel prefers to map the entire PCI bus region.
This commit is contained in:
Liav A
Andreas Kling
parent
441e374396
commit
8abbb7e090
Notes:
sideshowbarker
2024-07-18 20:51:35 +09:00
Author: https://github.com/supercomputer7 Commit: https://github.com/SerenityOS/serenity/commit/8abbb7e0901 Pull-request: https://github.com/SerenityOS/serenity/pull/6088
11 changed files with 320 additions and 100 deletions
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@ -115,8 +115,9 @@ set(KERNEL_SOURCES
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PCI/Device.cpp
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PCI/DeviceController.cpp
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PCI/IOAccess.cpp
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PCI/Initializer.cpp
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PCI/MMIOAccess.cpp
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PCI/Initializer.cpp
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PCI/WindowedMMIOAccess.cpp
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Panic.cpp
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PerformanceEventBuffer.cpp
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Process.cpp
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@ -108,13 +108,15 @@ UNMAP_AFTER_INIT bool CommandLine::is_vmmouse_enabled() const
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return lookup("vmmouse").value_or("on") == "on";
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}
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UNMAP_AFTER_INIT bool CommandLine::is_pci_ecam_enabled() const
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UNMAP_AFTER_INIT PCIAccessLevel CommandLine::pci_access_level() const
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{
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auto value = lookup("pci_ecam").value_or("on");
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if (value == "on")
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return true;
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return PCIAccessLevel::MappingPerBus;
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if (value == "per-device")
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return PCIAccessLevel::MappingPerDevice;
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if (value == "off")
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return false;
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return PCIAccessLevel::IOAddressing;
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PANIC("Unknown PCI ECAM setting: {}", value);
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}
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@ -50,6 +50,12 @@ enum class AcpiFeatureLevel {
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Disabled,
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};
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enum class PCIAccessLevel {
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IOAddressing,
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MappingPerBus,
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MappingPerDevice,
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};
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enum class AHCIResetMode {
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ControllerOnly,
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Complete,
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@ -71,7 +77,7 @@ public:
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[[nodiscard]] bool is_ide_enabled() const;
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[[nodiscard]] bool is_smp_enabled() const;
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[[nodiscard]] bool is_vmmouse_enabled() const;
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[[nodiscard]] bool is_pci_ecam_enabled() const;
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[[nodiscard]] PCIAccessLevel pci_access_level() const;
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[[nodiscard]] bool is_legacy_time_enabled() const;
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[[nodiscard]] bool is_text_mode() const;
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[[nodiscard]] bool is_force_pio() const;
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@ -34,11 +34,6 @@ namespace Kernel {
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class PCI::Access {
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public:
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enum class Type {
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IO,
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MMIO,
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};
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void enumerate(Function<void(Address, ID)>&) const;
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void enumerate_bus(int type, u8 bus, Function<void(Address, ID)>&, bool recursive);
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@ -226,6 +226,7 @@ PhysicalID get_physical_id(Address address);
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class Access;
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class MMIOAccess;
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class WindowedMMIOAccess;
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class IOAccess;
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class MMIOSegment;
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class DeviceController;
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@ -40,7 +40,7 @@ protected:
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private:
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virtual void enumerate_hardware(Function<void(Address, ID)>) override;
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virtual const char* access_type() const override { return "IO-Access"; };
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virtual const char* access_type() const override { return "IOAccess"; };
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virtual uint32_t segment_count() const override { return 1; };
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virtual void write8_field(Address address, u32, u8) override final;
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virtual void write16_field(Address address, u32, u16) override final;
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@ -30,6 +30,7 @@
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#include <Kernel/PCI/IOAccess.h>
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#include <Kernel/PCI/Initializer.h>
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#include <Kernel/PCI/MMIOAccess.h>
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#include <Kernel/PCI/WindowedMMIOAccess.h>
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#include <Kernel/Panic.h>
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namespace Kernel {
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@ -37,25 +38,38 @@ namespace PCI {
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static bool test_pci_io();
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UNMAP_AFTER_INIT static Access::Type detect_optimal_access_type(bool mmio_allowed)
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UNMAP_AFTER_INIT static PCIAccessLevel detect_optimal_access_type(PCIAccessLevel boot_determined)
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{
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if (mmio_allowed && ACPI::is_enabled() && !ACPI::Parser::the()->find_table("MCFG").is_null())
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return Access::Type::MMIO;
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if (!ACPI::is_enabled() || ACPI::Parser::the()->find_table("MCFG").is_null())
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return PCIAccessLevel::IOAddressing;
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if (boot_determined != PCIAccessLevel::IOAddressing)
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return boot_determined;
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if (test_pci_io())
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return Access::Type::IO;
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return PCIAccessLevel::IOAddressing;
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PANIC("No PCI bus access method detected!");
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}
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UNMAP_AFTER_INIT void initialize()
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{
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bool mmio_allowed = kernel_command_line().is_pci_ecam_enabled();
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auto boot_determined = kernel_command_line().pci_access_level();
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if (detect_optimal_access_type(mmio_allowed) == Access::Type::MMIO)
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switch (detect_optimal_access_type(boot_determined)) {
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case PCIAccessLevel::MappingPerDevice:
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WindowedMMIOAccess::initialize(ACPI::Parser::the()->find_table("MCFG"));
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break;
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case PCIAccessLevel::MappingPerBus:
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MMIOAccess::initialize(ACPI::Parser::the()->find_table("MCFG"));
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else
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break;
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case PCIAccessLevel::IOAddressing:
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IOAccess::initialize();
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break;
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default:
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VERIFY_NOT_REACHED();
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}
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PCI::enumerate([&](const Address& address, ID id) {
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dmesgln("{} {}", address, id);
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});
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -33,52 +33,35 @@
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namespace Kernel {
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namespace PCI {
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class MMIOSegment {
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public:
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MMIOSegment(PhysicalAddress, u8, u8);
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u8 get_start_bus() const;
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u8 get_end_bus() const;
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size_t get_size() const;
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PhysicalAddress get_paddr() const;
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#define MEMORY_RANGE_PER_BUS (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE * PCI_MAX_DEVICES_PER_BUS)
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private:
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PhysicalAddress m_base_addr;
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u8 m_start_bus;
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u8 m_end_bus;
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};
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#define PCI_MMIO_CONFIG_SPACE_SIZE 4096
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UNMAP_AFTER_INIT DeviceConfigurationSpaceMapping::DeviceConfigurationSpaceMapping(Address device_address, const MMIOSegment& mmio_segment)
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: m_device_address(device_address)
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, m_mapped_region(MM.allocate_kernel_region(page_round_up(PCI_MMIO_CONFIG_SPACE_SIZE), "PCI MMIO Device Access", Region::Access::Read | Region::Access::Write).release_nonnull())
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{
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PhysicalAddress segment_lower_addr = mmio_segment.get_paddr();
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PhysicalAddress device_physical_mmio_space = segment_lower_addr.offset(
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PCI_MMIO_CONFIG_SPACE_SIZE * m_device_address.function() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE) * m_device_address.device() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE * PCI_MAX_DEVICES_PER_BUS) * (m_device_address.bus() - mmio_segment.get_start_bus()));
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m_mapped_region->physical_page_slot(0) = PhysicalPage::create(device_physical_mmio_space, false, false);
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m_mapped_region->remap();
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}
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uint32_t MMIOAccess::segment_count() const
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u32 MMIOAccess::segment_count() const
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{
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return m_segments.size();
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}
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uint8_t MMIOAccess::segment_start_bus(u32 seg) const
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u8 MMIOAccess::segment_start_bus(u32 seg) const
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{
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auto segment = m_segments.get(seg);
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VERIFY(segment.has_value());
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return segment.value().get_start_bus();
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}
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uint8_t MMIOAccess::segment_end_bus(u32 seg) const
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u8 MMIOAccess::segment_end_bus(u32 seg) const
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{
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auto segment = m_segments.get(seg);
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VERIFY(segment.has_value());
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return segment.value().get_end_bus();
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}
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PhysicalAddress MMIOAccess::determine_memory_mapped_bus_region(u32 segment, u8 bus) const
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{
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VERIFY(bus >= segment_start_bus(segment) && bus <= segment_end_bus(segment));
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auto seg = m_segments.get(segment);
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VERIFY(seg.has_value());
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return seg.value().get_paddr().offset(MEMORY_RANGE_PER_BUS * (bus - seg.value().get_start_bus()));
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}
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UNMAP_AFTER_INIT void MMIOAccess::initialize(PhysicalAddress mcfg)
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{
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if (!Access::is_initialized()) {
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@ -118,77 +101,78 @@ UNMAP_AFTER_INIT MMIOAccess::MMIOAccess(PhysicalAddress p_mcfg)
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dmesgln("PCI: MMIO segments: {}", m_segments.size());
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InterruptDisabler disabler;
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VERIFY(m_segments.contains(0));
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// Note: we need to map this region before enumerating the hardware and adding
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// PCI::PhysicalID objects to the vector, because get_capabilities calls
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// PCI::read16 which will need this region to be mapped.
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m_mapped_region = MM.allocate_kernel_region(determine_memory_mapped_bus_region(0, m_segments.get(0).value().get_start_bus()), MEMORY_RANGE_PER_BUS, "PCI ECAM", Region::Access::Read | Region::Access::Write);
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dmesgln("PCI ECAM Mapped region @ {}", m_mapped_region->vaddr());
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enumerate_hardware([&](const Address& address, ID id) {
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m_mapped_device_regions.append(make<DeviceConfigurationSpaceMapping>(address, m_segments.get(address.seg()).value()));
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m_physical_ids.append({ address, id, get_capabilities(address) });
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dbgln_if(PCI_DEBUG, "PCI: Mapping device @ pci ({}) {} {}", address, m_mapped_device_regions.last().vaddr(), m_mapped_device_regions.last().paddr());
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});
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}
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Optional<VirtualAddress> MMIOAccess::get_device_configuration_space(Address address)
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void MMIOAccess::map_bus_region(u32 segment, u8 bus)
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{
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dbgln_if(PCI_DEBUG, "PCI: Getting device configuration space for {}", address);
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for (auto& mapping : m_mapped_device_regions) {
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auto checked_address = mapping.address();
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dbgln_if(PCI_DEBUG, "PCI Device Configuration Space Mapping: Check if {} was requested", checked_address);
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if (address.seg() == checked_address.seg()
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&& address.bus() == checked_address.bus()
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&& address.device() == checked_address.device()
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&& address.function() == checked_address.function()) {
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dbgln_if(PCI_DEBUG, "PCI Device Configuration Space Mapping: Found {}", checked_address);
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return mapping.vaddr();
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}
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}
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VERIFY(m_access_lock.is_locked());
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if (m_mapped_bus == bus)
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return;
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m_mapped_region = MM.allocate_kernel_region(determine_memory_mapped_bus_region(segment, bus), MEMORY_RANGE_PER_BUS, "PCI ECAM", Region::Access::Read | Region::Access::Write);
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}
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dbgln_if(PCI_DEBUG, "PCI: No device configuration space found for {}", address);
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return {};
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VirtualAddress MMIOAccess::get_device_configuration_space(Address address)
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{
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VERIFY(m_access_lock.is_locked());
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dbgln_if(PCI_DEBUG, "PCI: Getting device configuration space for {}", address);
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map_bus_region(address.seg(), address.bus());
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return m_mapped_region->vaddr().offset(PCI_MMIO_CONFIG_SPACE_SIZE * address.function() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE) * address.device());
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}
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u8 MMIOAccess::read8_field(Address address, u32 field)
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{
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InterruptDisabler disabler;
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ScopedSpinLock lock(m_access_lock);
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VERIFY(field <= 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 8-bit field {:#08x} for {}", field, address);
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return *((u8*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
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return *((volatile u8*)(get_device_configuration_space(address).get() + (field & 0xfff)));
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}
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u16 MMIOAccess::read16_field(Address address, u32 field)
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{
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InterruptDisabler disabler;
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ScopedSpinLock lock(m_access_lock);
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VERIFY(field < 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 16-bit field {:#08x} for {}", field, address);
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return *((u16*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
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return *((volatile u16*)(get_device_configuration_space(address).get() + (field & 0xfff)));
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}
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u32 MMIOAccess::read32_field(Address address, u32 field)
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{
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InterruptDisabler disabler;
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ScopedSpinLock lock(m_access_lock);
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VERIFY(field <= 0xffc);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 32-bit field {:#08x} for {}", field, address);
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return *((u32*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
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return *((volatile u32*)(get_device_configuration_space(address).get() + (field & 0xfff)));
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}
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void MMIOAccess::write8_field(Address address, u32 field, u8 value)
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{
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InterruptDisabler disabler;
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ScopedSpinLock lock(m_access_lock);
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VERIFY(field <= 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 8-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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*((u8*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
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*((volatile u8*)(get_device_configuration_space(address).get() + (field & 0xfff))) = value;
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}
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void MMIOAccess::write16_field(Address address, u32 field, u16 value)
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{
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InterruptDisabler disabler;
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ScopedSpinLock lock(m_access_lock);
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VERIFY(field < 0xfff);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 16-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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*((u16*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
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*((volatile u16*)(get_device_configuration_space(address).get() + (field & 0xfff))) = value;
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}
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void MMIOAccess::write32_field(Address address, u32 field, u32 value)
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{
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InterruptDisabler disabler;
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ScopedSpinLock lock(m_access_lock);
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VERIFY(field <= 0xffc);
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dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 32-bit field {:#08x}, value={:#02x} for {}", field, value, address);
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*((u32*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
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*((volatile u32*)(get_device_configuration_space(address).get() + (field & 0xfff))) = value;
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}
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void MMIOAccess::enumerate_hardware(Function<void(Address, ID)> callback)
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@ -210,29 +194,29 @@ void MMIOAccess::enumerate_hardware(Function<void(Address, ID)> callback)
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}
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}
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MMIOSegment::MMIOSegment(PhysicalAddress segment_base_addr, u8 start_bus, u8 end_bus)
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MMIOAccess::MMIOSegment::MMIOSegment(PhysicalAddress segment_base_addr, u8 start_bus, u8 end_bus)
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: m_base_addr(segment_base_addr)
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, m_start_bus(start_bus)
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, m_end_bus(end_bus)
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{
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}
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u8 MMIOSegment::get_start_bus() const
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u8 MMIOAccess::MMIOSegment::get_start_bus() const
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{
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return m_start_bus;
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}
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u8 MMIOSegment::get_end_bus() const
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u8 MMIOAccess::MMIOSegment::get_end_bus() const
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{
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return m_end_bus;
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}
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size_t MMIOSegment::get_size() const
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size_t MMIOAccess::MMIOSegment::get_size() const
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{
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return (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE * PCI_MAX_DEVICES_PER_BUS * (get_end_bus() - get_start_bus()));
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}
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PhysicalAddress MMIOSegment::get_paddr() const
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PhysicalAddress MMIOAccess::MMIOSegment::get_paddr() const
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{
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return m_base_addr;
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020, Liav A. <liavalb@hotmail.co.il>
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* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -32,6 +32,7 @@
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#include <AK/Types.h>
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#include <Kernel/ACPI/Definitions.h>
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#include <Kernel/PCI/Access.h>
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#include <Kernel/SpinLock.h>
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#include <Kernel/VM/AnonymousVMObject.h>
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#include <Kernel/VM/PhysicalRegion.h>
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#include <Kernel/VM/Region.h>
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@ -40,27 +41,37 @@
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namespace Kernel {
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namespace PCI {
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class DeviceConfigurationSpaceMapping {
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#define PCI_MMIO_CONFIG_SPACE_SIZE 4096
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class MMIOAccess : public Access {
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public:
|
||||
DeviceConfigurationSpaceMapping(Address, const MMIOSegment&);
|
||||
VirtualAddress vaddr() const { return m_mapped_region->vaddr(); };
|
||||
PhysicalAddress paddr() const { return m_mapped_region->physical_page(0)->paddr(); }
|
||||
const Address& address() const { return m_device_address; };
|
||||
class MMIOSegment {
|
||||
public:
|
||||
MMIOSegment(PhysicalAddress, u8, u8);
|
||||
u8 get_start_bus() const;
|
||||
u8 get_end_bus() const;
|
||||
size_t get_size() const;
|
||||
PhysicalAddress get_paddr() const;
|
||||
|
||||
private:
|
||||
PhysicalAddress m_base_addr;
|
||||
u8 m_start_bus;
|
||||
u8 m_end_bus;
|
||||
};
|
||||
static void initialize(PhysicalAddress mcfg);
|
||||
|
||||
private:
|
||||
Address m_device_address;
|
||||
NonnullOwnPtr<Region> m_mapped_region;
|
||||
};
|
||||
|
||||
class MMIOAccess final : public Access {
|
||||
public:
|
||||
static void initialize(PhysicalAddress mcfg);
|
||||
PhysicalAddress determine_memory_mapped_bus_region(u32 segment, u8 bus) const;
|
||||
void map_bus_region(u32, u8);
|
||||
VirtualAddress get_device_configuration_space(Address address);
|
||||
SpinLock<u8> m_access_lock;
|
||||
u8 m_mapped_bus { 0 };
|
||||
OwnPtr<Region> m_mapped_region;
|
||||
|
||||
protected:
|
||||
explicit MMIOAccess(PhysicalAddress mcfg);
|
||||
|
||||
private:
|
||||
virtual const char* access_type() const override { return "MMIO-Access"; };
|
||||
virtual const char* access_type() const override { return "MMIOAccess"; };
|
||||
virtual u32 segment_count() const override;
|
||||
virtual void enumerate_hardware(Function<void(Address, ID)>) override;
|
||||
virtual void write8_field(Address address, u32, u8) override;
|
||||
|
|
@ -70,13 +81,11 @@ private:
|
|||
virtual u16 read16_field(Address address, u32) override;
|
||||
virtual u32 read32_field(Address address, u32) override;
|
||||
|
||||
Optional<VirtualAddress> get_device_configuration_space(Address address);
|
||||
virtual u8 segment_start_bus(u32) const override;
|
||||
virtual u8 segment_end_bus(u32) const override;
|
||||
|
||||
PhysicalAddress m_mcfg;
|
||||
HashMap<u16, MMIOSegment> m_segments;
|
||||
NonnullOwnPtrVector<DeviceConfigurationSpaceMapping> m_mapped_device_regions;
|
||||
};
|
||||
|
||||
}
|
||||
|
|
|
|||
133
Kernel/PCI/WindowedMMIOAccess.cpp
Normal file
133
Kernel/PCI/WindowedMMIOAccess.cpp
Normal file
|
|
@ -0,0 +1,133 @@
|
|||
/*
|
||||
* Copyright (c) 2020-2021, Liav A. <liavalb@hotmail.co.il>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <AK/Optional.h>
|
||||
#include <AK/StringView.h>
|
||||
#include <Kernel/Debug.h>
|
||||
#include <Kernel/PCI/WindowedMMIOAccess.h>
|
||||
#include <Kernel/VM/MemoryManager.h>
|
||||
|
||||
namespace Kernel {
|
||||
namespace PCI {
|
||||
|
||||
UNMAP_AFTER_INIT DeviceConfigurationSpaceMapping::DeviceConfigurationSpaceMapping(Address device_address, const MMIOAccess::MMIOSegment& mmio_segment)
|
||||
: m_device_address(device_address)
|
||||
, m_mapped_region(MM.allocate_kernel_region(page_round_up(PCI_MMIO_CONFIG_SPACE_SIZE), "PCI MMIO Device Access", Region::Access::Read | Region::Access::Write).release_nonnull())
|
||||
{
|
||||
PhysicalAddress segment_lower_addr = mmio_segment.get_paddr();
|
||||
PhysicalAddress device_physical_mmio_space = segment_lower_addr.offset(
|
||||
PCI_MMIO_CONFIG_SPACE_SIZE * m_device_address.function() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE) * m_device_address.device() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE * PCI_MAX_DEVICES_PER_BUS) * (m_device_address.bus() - mmio_segment.get_start_bus()));
|
||||
m_mapped_region->physical_page_slot(0) = PhysicalPage::create(device_physical_mmio_space, false, false);
|
||||
m_mapped_region->remap();
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT void WindowedMMIOAccess::initialize(PhysicalAddress mcfg)
|
||||
{
|
||||
if (!Access::is_initialized()) {
|
||||
new WindowedMMIOAccess(mcfg);
|
||||
dbgln_if(PCI_DEBUG, "PCI: MMIO access initialised.");
|
||||
}
|
||||
}
|
||||
|
||||
UNMAP_AFTER_INIT WindowedMMIOAccess::WindowedMMIOAccess(PhysicalAddress p_mcfg)
|
||||
: MMIOAccess(p_mcfg)
|
||||
{
|
||||
dmesgln("PCI: Using MMIO (mapping per device) for PCI configuration space access");
|
||||
|
||||
InterruptDisabler disabler;
|
||||
|
||||
enumerate_hardware([&](const Address& address, ID) {
|
||||
m_mapped_device_regions.append(make<DeviceConfigurationSpaceMapping>(address, m_segments.get(address.seg()).value()));
|
||||
});
|
||||
}
|
||||
|
||||
Optional<VirtualAddress> WindowedMMIOAccess::get_device_configuration_space(Address address)
|
||||
{
|
||||
dbgln_if(PCI_DEBUG, "PCI: Getting device configuration space for {}", address);
|
||||
for (auto& mapping : m_mapped_device_regions) {
|
||||
auto checked_address = mapping.address();
|
||||
dbgln_if(PCI_DEBUG, "PCI Device Configuration Space Mapping: Check if {} was requested", checked_address);
|
||||
if (address.seg() == checked_address.seg()
|
||||
&& address.bus() == checked_address.bus()
|
||||
&& address.device() == checked_address.device()
|
||||
&& address.function() == checked_address.function()) {
|
||||
dbgln_if(PCI_DEBUG, "PCI Device Configuration Space Mapping: Found {}", checked_address);
|
||||
return mapping.vaddr();
|
||||
}
|
||||
}
|
||||
|
||||
dbgln_if(PCI_DEBUG, "PCI: No device configuration space found for {}", address);
|
||||
return {};
|
||||
}
|
||||
|
||||
u8 WindowedMMIOAccess::read8_field(Address address, u32 field)
|
||||
{
|
||||
InterruptDisabler disabler;
|
||||
VERIFY(field <= 0xfff);
|
||||
dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 8-bit field {:#08x} for {}", field, address);
|
||||
return *((u8*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
|
||||
}
|
||||
|
||||
u16 WindowedMMIOAccess::read16_field(Address address, u32 field)
|
||||
{
|
||||
InterruptDisabler disabler;
|
||||
VERIFY(field < 0xfff);
|
||||
dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 16-bit field {:#08x} for {}", field, address);
|
||||
return *((u16*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
|
||||
}
|
||||
|
||||
u32 WindowedMMIOAccess::read32_field(Address address, u32 field)
|
||||
{
|
||||
InterruptDisabler disabler;
|
||||
VERIFY(field <= 0xffc);
|
||||
dbgln_if(PCI_DEBUG, "PCI: MMIO Reading 32-bit field {:#08x} for {}", field, address);
|
||||
return *((u32*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
|
||||
}
|
||||
|
||||
void WindowedMMIOAccess::write8_field(Address address, u32 field, u8 value)
|
||||
{
|
||||
InterruptDisabler disabler;
|
||||
VERIFY(field <= 0xfff);
|
||||
dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 8-bit field {:#08x}, value={:#02x} for {}", field, value, address);
|
||||
*((u8*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
|
||||
}
|
||||
void WindowedMMIOAccess::write16_field(Address address, u32 field, u16 value)
|
||||
{
|
||||
InterruptDisabler disabler;
|
||||
VERIFY(field < 0xfff);
|
||||
dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 16-bit field {:#08x}, value={:#02x} for {}", field, value, address);
|
||||
*((u16*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
|
||||
}
|
||||
void WindowedMMIOAccess::write32_field(Address address, u32 field, u32 value)
|
||||
{
|
||||
InterruptDisabler disabler;
|
||||
VERIFY(field <= 0xffc);
|
||||
dbgln_if(PCI_DEBUG, "PCI: MMIO Writing 32-bit field {:#08x}, value={:#02x} for {}", field, value, address);
|
||||
*((u32*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
75
Kernel/PCI/WindowedMMIOAccess.h
Normal file
75
Kernel/PCI/WindowedMMIOAccess.h
Normal file
|
|
@ -0,0 +1,75 @@
|
|||
/*
|
||||
* Copyright (c) 2020-2021, Liav A. <liavalb@hotmail.co.il>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <AK/HashMap.h>
|
||||
#include <AK/NonnullOwnPtrVector.h>
|
||||
#include <AK/OwnPtr.h>
|
||||
#include <AK/Types.h>
|
||||
#include <Kernel/ACPI/Definitions.h>
|
||||
#include <Kernel/PCI/Access.h>
|
||||
#include <Kernel/PCI/MMIOAccess.h>
|
||||
#include <Kernel/VM/AnonymousVMObject.h>
|
||||
#include <Kernel/VM/PhysicalRegion.h>
|
||||
#include <Kernel/VM/Region.h>
|
||||
#include <Kernel/VM/VMObject.h>
|
||||
|
||||
namespace Kernel {
|
||||
namespace PCI {
|
||||
|
||||
class DeviceConfigurationSpaceMapping {
|
||||
public:
|
||||
DeviceConfigurationSpaceMapping(Address, const MMIOAccess::MMIOSegment&);
|
||||
VirtualAddress vaddr() const { return m_mapped_region->vaddr(); };
|
||||
PhysicalAddress paddr() const { return m_mapped_region->physical_page(0)->paddr(); }
|
||||
const Address& address() const { return m_device_address; };
|
||||
|
||||
private:
|
||||
Address m_device_address;
|
||||
NonnullOwnPtr<Region> m_mapped_region;
|
||||
};
|
||||
|
||||
class WindowedMMIOAccess final : public MMIOAccess {
|
||||
public:
|
||||
static void initialize(PhysicalAddress mcfg);
|
||||
|
||||
private:
|
||||
explicit WindowedMMIOAccess(PhysicalAddress mcfg);
|
||||
virtual const char* access_type() const override { return "WindowedMMIOAccess"; };
|
||||
virtual void write8_field(Address address, u32, u8) override;
|
||||
virtual void write16_field(Address address, u32, u16) override;
|
||||
virtual void write32_field(Address address, u32, u32) override;
|
||||
virtual u8 read8_field(Address address, u32) override;
|
||||
virtual u16 read16_field(Address address, u32) override;
|
||||
virtual u32 read32_field(Address address, u32) override;
|
||||
|
||||
Optional<VirtualAddress> get_device_configuration_space(Address address);
|
||||
NonnullOwnPtrVector<DeviceConfigurationSpaceMapping> m_mapped_device_regions;
|
||||
};
|
||||
|
||||
}
|
||||
}
|
||||
Loading…
Add table
Reference in a new issue