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@@ -6,768 +6,13 @@
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#pragma once
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-#include <AK/Platform.h>
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-#include <AK/Vector.h>
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-
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-#if ARCH(X86_64)
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+#include <LibJIT/X86_64/Assembler.h>
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namespace JIT {
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-
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-struct Assembler {
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- Assembler(Vector<u8>& output)
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- : m_output(output)
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- {
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- }
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-
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- Vector<u8>& m_output;
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-
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- enum class Reg {
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- RAX = 0,
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- RCX = 1,
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- RDX = 2,
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- RBX = 3,
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- RSP = 4,
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- RBP = 5,
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- RSI = 6,
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- RDI = 7,
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- R8 = 8,
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- R9 = 9,
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- R10 = 10,
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- R11 = 11,
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- R12 = 12,
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- R13 = 13,
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- R14 = 14,
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- R15 = 15,
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- };
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-
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- struct Operand {
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- enum class Type {
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- Reg,
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- Imm,
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- Mem64BaseAndOffset,
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- };
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-
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- Type type {};
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-
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- Reg reg {};
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- u64 offset_or_immediate { 0 };
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-
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- static Operand Register(Reg reg)
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- {
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- Operand operand;
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- operand.type = Type::Reg;
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- operand.reg = reg;
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- return operand;
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- }
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-
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- static Operand Imm(u64 imm)
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- {
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- Operand operand;
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- operand.type = Type::Imm;
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- operand.offset_or_immediate = imm;
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- return operand;
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- }
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-
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- static Operand Mem64BaseAndOffset(Reg base, u64 offset)
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- {
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- Operand operand;
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- operand.type = Type::Mem64BaseAndOffset;
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- operand.reg = base;
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- operand.offset_or_immediate = offset;
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- return operand;
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- }
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-
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- bool is_register_or_memory() const
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- {
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- return type == Type::Reg || type == Type::Mem64BaseAndOffset;
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- }
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-
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- bool fits_in_u8() const
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- {
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- VERIFY(type == Type::Imm);
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- return offset_or_immediate <= NumericLimits<u8>::max();
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- }
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- bool fits_in_u32() const
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- {
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- VERIFY(type == Type::Imm);
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- return offset_or_immediate <= NumericLimits<u32>::max();
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- }
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- bool fits_in_i8() const
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- {
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- VERIFY(type == Type::Imm);
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- return (offset_or_immediate <= NumericLimits<i8>::max()) || (((~offset_or_immediate) & NumericLimits<i8>::min()) == 0);
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- }
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- bool fits_in_i32() const
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- {
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- VERIFY(type == Type::Imm);
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- return (offset_or_immediate <= NumericLimits<i32>::max()) || (((~offset_or_immediate) & NumericLimits<i32>::min()) == 0);
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- }
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- };
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-
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- enum class Condition {
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- Overflow = 0x0,
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- EqualTo = 0x4,
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- NotEqualTo = 0x5,
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- UnsignedGreaterThan = 0x7,
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- UnsignedGreaterThanOrEqualTo = 0x3,
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- UnsignedLessThan = 0x2,
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- UnsignedLessThanOrEqualTo = 0x6,
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- SignedGreaterThan = 0xF,
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- SignedGreaterThanOrEqualTo = 0xD,
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- SignedLessThan = 0xC,
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- SignedLessThanOrEqualTo = 0xE,
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- };
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-
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- static constexpr u8 encode_reg(Reg reg)
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- {
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- return to_underlying(reg) & 0x7;
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- }
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-
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- enum class Patchable {
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- Yes,
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- No,
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- };
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-
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- union ModRM {
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- static constexpr u8 Mem = 0b00;
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- static constexpr u8 MemDisp8 = 0b01;
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- static constexpr u8 MemDisp32 = 0b10;
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- static constexpr u8 Reg = 0b11;
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- struct {
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- u8 rm : 3;
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- u8 reg : 3;
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- u8 mode : 2;
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- };
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- u8 raw;
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- };
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-
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- void emit_modrm_slash(u8 slash, Operand rm, Patchable patchable = Patchable::No)
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- {
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- ModRM raw;
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- raw.rm = encode_reg(rm.reg);
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- raw.reg = slash;
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- emit_modrm(raw, rm, patchable);
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- }
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-
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- void emit_modrm_rm(Operand dst, Operand src, Patchable patchable = Patchable::No)
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- {
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- VERIFY(dst.type == Operand::Type::Reg);
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- ModRM raw {};
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- raw.reg = encode_reg(dst.reg);
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- raw.rm = encode_reg(src.reg);
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- emit_modrm(raw, src, patchable);
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- }
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-
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- void emit_modrm_mr(Operand dst, Operand src, Patchable patchable = Patchable::No)
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- {
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- VERIFY(src.type == Operand::Type::Reg);
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- ModRM raw {};
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- raw.reg = encode_reg(src.reg);
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- raw.rm = encode_reg(dst.reg);
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- emit_modrm(raw, dst, patchable);
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- }
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-
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- void emit_modrm(ModRM raw, Operand rm, Patchable patchable)
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- {
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- // FIXME: rm:100 (RSP) is reserved as the SIB marker
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- VERIFY(rm.type != Operand::Type::Imm);
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-
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- switch (rm.type) {
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- case Operand::Type::Reg:
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- // FIXME: There is mod:00,rm:101(EBP?) -> disp32, that might be something else
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- raw.mode = ModRM::Reg;
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- emit8(raw.raw);
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- break;
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- case Operand::Type::Mem64BaseAndOffset: {
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- auto disp = rm.offset_or_immediate;
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- if (patchable == Patchable::Yes) {
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- raw.mode = ModRM::MemDisp32;
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- emit8(raw.raw);
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- emit32(disp);
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- } else if (disp == 0) {
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- raw.mode = ModRM::Mem;
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- emit8(raw.raw);
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- } else if (static_cast<i64>(disp) >= -128 && disp <= 127) {
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- raw.mode = ModRM::MemDisp8;
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- emit8(raw.raw);
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- emit8(disp & 0xff);
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- } else {
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- raw.mode = ModRM::MemDisp32;
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- emit8(raw.raw);
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- emit32(disp);
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- }
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- break;
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- }
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- case Operand::Type::Imm:
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- VERIFY_NOT_REACHED();
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- }
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- }
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-
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- union REX {
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- struct {
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- u8 B : 1; // ModRM::RM
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- u8 X : 1; // SIB::Index
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- u8 R : 1; // ModRM::Reg
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- u8 W : 1; // Operand size override
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- u8 _ : 4 { 0b0100 };
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- };
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- u8 raw;
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- };
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-
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- enum class REX_W : bool {
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- No = 0,
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- Yes = 1
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- };
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-
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- void emit_rex_for_OI(Operand arg, REX_W W)
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- {
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- emit_rex_for_slash(arg, W);
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- }
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-
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- void emit_rex_for_slash(Operand arg, REX_W W)
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- {
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- VERIFY(arg.is_register_or_memory());
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-
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- if (W == REX_W::No && to_underlying(arg.reg) < 8)
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- return;
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-
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- REX rex {
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- .B = to_underlying(arg.reg) >= 8,
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- .X = 0,
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- .R = 0,
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- .W = to_underlying(W)
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- };
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- emit8(rex.raw);
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- }
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- void emit_rex_for_mr(Operand dst, Operand src, REX_W W)
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- {
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- VERIFY(dst.is_register_or_memory());
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- VERIFY(src.type == Operand::Type::Reg);
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- if (W == REX_W::No && to_underlying(dst.reg) < 8 && to_underlying(src.reg) < 8)
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- return;
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- REX rex {
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- .B = to_underlying(dst.reg) >= 8,
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- .X = 0,
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- .R = to_underlying(src.reg) >= 8,
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- .W = to_underlying(W)
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- };
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- emit8(rex.raw);
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- }
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-
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- void emit_rex_for_rm(Operand dst, Operand src, REX_W W)
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- {
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- VERIFY(src.is_register_or_memory());
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- VERIFY(dst.type == Operand::Type::Reg);
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- if (W == REX_W::No && to_underlying(dst.reg) < 8 && to_underlying(src.reg) < 8)
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- return;
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- REX rex {
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- .B = to_underlying(src.reg) >= 8,
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- .X = 0,
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- .R = to_underlying(dst.reg) >= 8,
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- .W = to_underlying(W)
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- };
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- emit8(rex.raw);
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- }
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-
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- void shift_right(Operand dst, Operand count)
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- {
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- VERIFY(dst.type == Operand::Type::Reg);
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- VERIFY(count.type == Operand::Type::Imm);
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- VERIFY(count.fits_in_u8());
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- emit_rex_for_slash(dst, REX_W::Yes);
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- emit8(0xc1);
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- emit_modrm_slash(5, dst);
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- emit8(count.offset_or_immediate);
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- }
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-
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- void mov(Operand dst, Operand src, Patchable patchable = Patchable::No)
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- {
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- if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
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- if (src.type == Operand::Type::Reg && src.reg == dst.reg)
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- return;
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- emit_rex_for_mr(dst, src, REX_W::Yes);
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- emit8(0x89);
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- emit_modrm_mr(dst, src, patchable);
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- return;
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- }
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-
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- if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm) {
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- if (patchable == Patchable::No) {
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- if (src.offset_or_immediate == 0) {
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- // xor dst, dst
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- // Note: Operand size does not matter here, as the result is 0-extended to 64 bit,
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- // so we don't have to set the W flag in the REX prefix,
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- // or use it at all in case we dont use REX addressed registers (elision is implemented in the helper)
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- emit_rex_for_mr(dst, dst, REX_W::No);
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- emit8(0x31);
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- emit_modrm_mr(dst, dst, patchable);
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- return;
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- }
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- if (src.fits_in_u32()) {
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- emit_rex_for_OI(dst, REX_W::No);
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- emit8(0xb8 | encode_reg(dst.reg));
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- emit32(src.offset_or_immediate);
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- return;
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- }
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- }
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- emit_rex_for_OI(dst, REX_W::Yes);
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- emit8(0xb8 | encode_reg(dst.reg));
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- emit64(src.offset_or_immediate);
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- return;
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- }
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-
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- if (dst.type == Operand::Type::Reg && src.is_register_or_memory()) {
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- emit_rex_for_rm(dst, src, REX_W::Yes);
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- emit8(0x8b);
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- emit_modrm_rm(dst, src, patchable);
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- return;
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- }
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-
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- VERIFY_NOT_REACHED();
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- }
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-
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- void emit8(u8 value)
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- {
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- m_output.append(value);
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- }
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-
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- void emit32(u32 value)
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- {
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- m_output.append((value >> 0) & 0xff);
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- m_output.append((value >> 8) & 0xff);
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- m_output.append((value >> 16) & 0xff);
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- m_output.append((value >> 24) & 0xff);
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- }
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-
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- void emit64(u64 value)
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- {
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- m_output.append((value >> 0) & 0xff);
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- m_output.append((value >> 8) & 0xff);
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- m_output.append((value >> 16) & 0xff);
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- m_output.append((value >> 24) & 0xff);
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- m_output.append((value >> 32) & 0xff);
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- m_output.append((value >> 40) & 0xff);
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- m_output.append((value >> 48) & 0xff);
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- m_output.append((value >> 56) & 0xff);
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- }
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-
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- struct Label {
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- Optional<size_t> offset_of_label_in_instruction_stream;
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- Vector<size_t> jump_slot_offsets_in_instruction_stream;
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-
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- void add_jump(Assembler& assembler, size_t offset)
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- {
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- jump_slot_offsets_in_instruction_stream.append(offset);
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- if (offset_of_label_in_instruction_stream.has_value())
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- link_jump(assembler, offset);
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- }
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-
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- void link(Assembler& assembler)
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- {
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- link_to(assembler, assembler.m_output.size());
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- }
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-
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- void link_to(Assembler& assembler, size_t link_offset)
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- {
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- VERIFY(!offset_of_label_in_instruction_stream.has_value());
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- offset_of_label_in_instruction_stream = link_offset;
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- for (auto offset_in_instruction_stream : jump_slot_offsets_in_instruction_stream)
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- link_jump(assembler, offset_in_instruction_stream);
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- }
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-
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- private:
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- void link_jump(Assembler& assembler, size_t offset_in_instruction_stream)
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- {
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- auto offset = offset_of_label_in_instruction_stream.value() - offset_in_instruction_stream;
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- auto jump_slot = offset_in_instruction_stream - 4;
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- assembler.m_output[jump_slot + 0] = (offset >> 0) & 0xff;
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- assembler.m_output[jump_slot + 1] = (offset >> 8) & 0xff;
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- assembler.m_output[jump_slot + 2] = (offset >> 16) & 0xff;
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- assembler.m_output[jump_slot + 3] = (offset >> 24) & 0xff;
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- }
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- };
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-
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- [[nodiscard]] Label jump()
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- {
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- // jmp target (RIP-relative 32-bit offset)
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- emit8(0xe9);
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- emit32(0xdeadbeef);
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- Assembler::Label label {};
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- label.add_jump(*this, m_output.size());
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- return label;
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- }
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-
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- void jump(Label& label)
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- {
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- // jmp target (RIP-relative 32-bit offset)
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- emit8(0xe9);
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- emit32(0xdeadbeef);
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- label.add_jump(*this, m_output.size());
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- }
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-
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- void jump(Operand op)
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- {
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- emit_rex_for_slash(op, REX_W::No);
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- emit8(0xff);
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- emit_modrm_slash(4, op);
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- }
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-
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- void verify_not_reached()
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- {
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- // ud2
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- emit8(0x0f);
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- emit8(0x0b);
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- }
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-
|
|
|
- void cmp(Operand lhs, Operand rhs)
|
|
|
- {
|
|
|
- if (lhs.type == Operand::Type::Reg && rhs.type == Operand::Type::Imm && rhs.offset_or_immediate == 0) {
|
|
|
- test(lhs, lhs);
|
|
|
- } else if (lhs.is_register_or_memory() && rhs.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_mr(lhs, rhs, REX_W::Yes);
|
|
|
- emit8(0x39);
|
|
|
- emit_modrm_mr(lhs, rhs);
|
|
|
- } else if (lhs.is_register_or_memory() && rhs.type == Operand::Type::Imm && rhs.fits_in_i8()) {
|
|
|
- emit_rex_for_slash(lhs, REX_W::Yes);
|
|
|
- emit8(0x83);
|
|
|
- emit_modrm_slash(7, lhs);
|
|
|
- emit8(rhs.offset_or_immediate);
|
|
|
- } else if (lhs.is_register_or_memory() && rhs.type == Operand::Type::Imm && rhs.fits_in_i32()) {
|
|
|
- emit_rex_for_slash(lhs, REX_W::Yes);
|
|
|
- emit8(0x81);
|
|
|
- emit_modrm_slash(7, lhs);
|
|
|
- emit32(rhs.offset_or_immediate);
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void test(Operand lhs, Operand rhs)
|
|
|
- {
|
|
|
- if (lhs.is_register_or_memory() && rhs.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_mr(lhs, rhs, REX_W::Yes);
|
|
|
- emit8(0x85);
|
|
|
- emit_modrm_mr(lhs, rhs);
|
|
|
- } else if (lhs.type != Operand::Type::Imm && rhs.type == Operand::Type::Imm) {
|
|
|
- VERIFY(rhs.fits_in_i32());
|
|
|
- emit_rex_for_slash(lhs, REX_W::Yes);
|
|
|
- emit8(0xf7);
|
|
|
- emit_modrm_slash(0, lhs);
|
|
|
- emit32(rhs.offset_or_immediate);
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void jump_if(Condition condition, Label& label)
|
|
|
- {
|
|
|
- emit8(0x0F);
|
|
|
- emit8(0x80 | to_underlying(condition));
|
|
|
- emit32(0xdeadbeef);
|
|
|
- label.add_jump(*this, m_output.size());
|
|
|
- }
|
|
|
-
|
|
|
- void jump_if(Operand lhs, Condition condition, Operand rhs, Label& label)
|
|
|
- {
|
|
|
- cmp(lhs, rhs);
|
|
|
- jump_if(condition, label);
|
|
|
- }
|
|
|
-
|
|
|
- void sign_extend_32_to_64_bits(Reg reg)
|
|
|
- {
|
|
|
- // movsxd (reg as 64-bit), (reg as 32-bit)
|
|
|
- emit_rex_for_rm(Operand::Register(reg), Operand::Register(reg), REX_W::Yes);
|
|
|
- emit8(0x63);
|
|
|
- emit_modrm_rm(Operand::Register(reg), Operand::Register(reg));
|
|
|
- }
|
|
|
-
|
|
|
- void bitwise_and(Operand dst, Operand src)
|
|
|
- {
|
|
|
- // and dst,src
|
|
|
- if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_mr(dst, src, REX_W::Yes);
|
|
|
- emit8(0x21);
|
|
|
- emit_modrm_mr(dst, src);
|
|
|
- } else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i8()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::Yes);
|
|
|
- emit8(0x83);
|
|
|
- emit_modrm_slash(4, dst);
|
|
|
- emit8(src.offset_or_immediate);
|
|
|
- } else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i32()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::Yes);
|
|
|
- emit8(0x81);
|
|
|
- emit_modrm_slash(4, dst);
|
|
|
- emit32(src.offset_or_immediate);
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void bitwise_or(Operand dst, Operand src)
|
|
|
- {
|
|
|
- // or dst,src
|
|
|
- if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_mr(dst, src, REX_W::Yes);
|
|
|
- emit8(0x09);
|
|
|
- emit_modrm_mr(dst, src);
|
|
|
- } else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i8()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::Yes);
|
|
|
- emit8(0x83);
|
|
|
- emit_modrm_slash(1, dst);
|
|
|
- emit8(src.offset_or_immediate);
|
|
|
- } else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i32()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::Yes);
|
|
|
- emit8(0x81);
|
|
|
- emit_modrm_slash(1, dst);
|
|
|
- emit32(src.offset_or_immediate);
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void bitwise_xor32(Operand dst, Operand src)
|
|
|
- {
|
|
|
- if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_mr(dst, src, REX_W::No);
|
|
|
- emit8(0x31);
|
|
|
- emit_modrm_mr(dst, src);
|
|
|
- } else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i8()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::No);
|
|
|
- emit8(0x83);
|
|
|
- emit_modrm_slash(6, dst);
|
|
|
- emit8(src.offset_or_immediate);
|
|
|
- } else if (dst.type == Operand::Type::Reg && src.type == Operand::Type::Imm && src.fits_in_i32()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::No);
|
|
|
- emit8(0x81);
|
|
|
- emit_modrm_slash(6, dst);
|
|
|
- emit32(src.offset_or_immediate);
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void mul32(Operand dest, Operand src, Optional<Label&> overflow_label)
|
|
|
- {
|
|
|
- // imul32 dest, src (32-bit signed)
|
|
|
- if (dest.type == Operand::Type::Reg && src.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_rm(dest, src, REX_W::No);
|
|
|
- emit8(0x0f);
|
|
|
- emit8(0xaf);
|
|
|
- emit_modrm_rm(dest, src);
|
|
|
- } else if (dest.type == Operand::Type::Reg && src.type == Operand::Type::Mem64BaseAndOffset) {
|
|
|
- emit_rex_for_rm(dest, src, REX_W::No);
|
|
|
- emit8(0x0f);
|
|
|
- emit8(0xaf);
|
|
|
- emit_modrm_rm(dest, src);
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
-
|
|
|
- if (overflow_label.has_value()) {
|
|
|
- jump_if(Condition::Overflow, *overflow_label);
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void enter()
|
|
|
- {
|
|
|
- push(Operand::Register(Reg::RBP));
|
|
|
- mov(Operand::Register(Reg::RBP), Operand::Register(Reg::RSP));
|
|
|
-
|
|
|
- push_callee_saved_registers();
|
|
|
- }
|
|
|
-
|
|
|
- void exit()
|
|
|
- {
|
|
|
- pop_callee_saved_registers();
|
|
|
-
|
|
|
- // leave
|
|
|
- emit8(0xc9);
|
|
|
-
|
|
|
- // ret
|
|
|
- emit8(0xc3);
|
|
|
- }
|
|
|
-
|
|
|
- void push_callee_saved_registers()
|
|
|
- {
|
|
|
- // FIXME: Don't push RBX twice :^)
|
|
|
- push(Operand::Register(Reg::RBX));
|
|
|
- push(Operand::Register(Reg::RBX));
|
|
|
- push(Operand::Register(Reg::R12));
|
|
|
- push(Operand::Register(Reg::R13));
|
|
|
- push(Operand::Register(Reg::R14));
|
|
|
- push(Operand::Register(Reg::R15));
|
|
|
- }
|
|
|
-
|
|
|
- void pop_callee_saved_registers()
|
|
|
- {
|
|
|
- pop(Operand::Register(Reg::R15));
|
|
|
- pop(Operand::Register(Reg::R14));
|
|
|
- pop(Operand::Register(Reg::R13));
|
|
|
- pop(Operand::Register(Reg::R12));
|
|
|
-
|
|
|
- // FIXME: Don't pop RBX twice :^)
|
|
|
- pop(Operand::Register(Reg::RBX));
|
|
|
- pop(Operand::Register(Reg::RBX));
|
|
|
- }
|
|
|
-
|
|
|
- void push(Operand op)
|
|
|
- {
|
|
|
- if (op.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_OI(op, REX_W::No);
|
|
|
- emit8(0x50 | encode_reg(op.reg));
|
|
|
- } else if (op.type == Operand::Type::Imm) {
|
|
|
- if (op.fits_in_i8()) {
|
|
|
- emit8(0x6a);
|
|
|
- emit8(op.offset_or_immediate);
|
|
|
- } else if (op.fits_in_i32()) {
|
|
|
- emit8(0x68);
|
|
|
- emit32(op.offset_or_immediate);
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void pop(Operand op)
|
|
|
- {
|
|
|
- if (op.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_OI(op, REX_W::No);
|
|
|
- emit8(0x58 | encode_reg(op.reg));
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void add(Operand dst, Operand src)
|
|
|
- {
|
|
|
- if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_mr(dst, src, REX_W::Yes);
|
|
|
- emit8(0x01);
|
|
|
- emit_modrm_mr(dst, src);
|
|
|
- } else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i8()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::Yes);
|
|
|
- emit8(0x83);
|
|
|
- emit_modrm_slash(0, dst);
|
|
|
- emit8(src.offset_or_immediate);
|
|
|
- } else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i32()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::Yes);
|
|
|
- emit8(0x81);
|
|
|
- emit_modrm_slash(0, dst);
|
|
|
- emit32(src.offset_or_immediate);
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void add32(Operand dst, Operand src, Optional<Label&> overflow_label)
|
|
|
- {
|
|
|
- if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_mr(dst, src, REX_W::No);
|
|
|
- emit8(0x01);
|
|
|
- emit_modrm_mr(dst, src);
|
|
|
- } else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i8()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::No);
|
|
|
- emit8(0x83);
|
|
|
- emit_modrm_slash(0, dst);
|
|
|
- emit8(src.offset_or_immediate);
|
|
|
- } else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i32()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::No);
|
|
|
- emit8(0x81);
|
|
|
- emit_modrm_slash(0, dst);
|
|
|
- emit32(src.offset_or_immediate);
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
-
|
|
|
- if (overflow_label.has_value()) {
|
|
|
- jump_if(Condition::Overflow, *overflow_label);
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void sub(Operand dst, Operand src)
|
|
|
- {
|
|
|
- if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_mr(dst, src, REX_W::Yes);
|
|
|
- emit8(0x29);
|
|
|
- emit_modrm_mr(dst, src);
|
|
|
- } else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i8()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::Yes);
|
|
|
- emit8(0x83);
|
|
|
- emit_modrm_slash(5, dst);
|
|
|
- emit8(src.offset_or_immediate);
|
|
|
- } else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i32()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::Yes);
|
|
|
- emit8(0x81);
|
|
|
- emit_modrm_slash(5, dst);
|
|
|
- emit32(src.offset_or_immediate);
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void sub32(Operand dst, Operand src, Optional<Label&> overflow_label)
|
|
|
- {
|
|
|
- if (dst.is_register_or_memory() && src.type == Operand::Type::Reg) {
|
|
|
- emit_rex_for_mr(dst, src, REX_W::No);
|
|
|
- emit8(0x29);
|
|
|
- emit_modrm_mr(dst, src);
|
|
|
- } else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i8()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::No);
|
|
|
- emit8(0x83);
|
|
|
- emit_modrm_slash(5, dst);
|
|
|
- emit8(src.offset_or_immediate);
|
|
|
- } else if (dst.is_register_or_memory() && src.type == Operand::Type::Imm && src.fits_in_i32()) {
|
|
|
- emit_rex_for_slash(dst, REX_W::No);
|
|
|
- emit8(0x81);
|
|
|
- emit_modrm_slash(5, dst);
|
|
|
- emit32(src.offset_or_immediate);
|
|
|
- } else {
|
|
|
- VERIFY_NOT_REACHED();
|
|
|
- }
|
|
|
-
|
|
|
- if (overflow_label.has_value()) {
|
|
|
- jump_if(Condition::Overflow, *overflow_label);
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- void native_call(
|
|
|
- void* callee,
|
|
|
- Vector<Operand> const& preserved_registers = {},
|
|
|
- Vector<Operand> const& stack_arguments = {})
|
|
|
- {
|
|
|
- for (auto const& reg : preserved_registers.in_reverse())
|
|
|
- push(reg);
|
|
|
-
|
|
|
- // Preserve 16-byte stack alignment for non-even amount of stack-passed arguments
|
|
|
- auto needs_aligning = ((stack_arguments.size() + preserved_registers.size()) % 2) == 1;
|
|
|
- if (needs_aligning)
|
|
|
- push(Operand::Imm(0));
|
|
|
- for (auto const& stack_argument : stack_arguments.in_reverse())
|
|
|
- push(stack_argument);
|
|
|
-
|
|
|
- // load callee into RAX
|
|
|
- mov(Operand::Register(Reg::RAX), Operand::Imm(bit_cast<u64>(callee)));
|
|
|
-
|
|
|
- // call RAX
|
|
|
- emit8(0xff);
|
|
|
- emit_modrm_slash(2, Operand::Register(Reg::RAX));
|
|
|
-
|
|
|
- if (!stack_arguments.is_empty() || needs_aligning)
|
|
|
- add(Operand::Register(Reg::RSP), Operand::Imm((stack_arguments.size() + (needs_aligning ? 1 : 0)) * sizeof(void*)));
|
|
|
-
|
|
|
- for (auto const& reg : preserved_registers)
|
|
|
- pop(reg);
|
|
|
- }
|
|
|
-
|
|
|
- void trap()
|
|
|
- {
|
|
|
- // int3
|
|
|
- emit8(0xcc);
|
|
|
- }
|
|
|
-};
|
|
|
-
|
|
|
-}
|
|
|
-
|
|
|
+#if ARCH(X86_64)
|
|
|
+# define JIT_ARCH_SUPPORTED 1
|
|
|
+typedef X86_64Assembler Assembler;
|
|
|
+#else
|
|
|
+# undef JIT_ARCH_SUPPORTED
|
|
|
#endif
|
|
|
+}
|