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@@ -157,7 +157,7 @@ ErrorOr<NonnullLockRefPtr<SDMemoryCard>> SDHostController::try_initialize_insert
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// 2. Send CMD8 (SEND_IF_COND) to the card
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// 2. Send CMD8 (SEND_IF_COND) to the card
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// SD interface condition: 7:0 = check pattern, 11:8 = supply voltage
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// SD interface condition: 7:0 = check pattern, 11:8 = supply voltage
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// 0x1aa: check pattern = 10101010, supply voltage = 1 => 2.7-3.6V
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// 0x1aa: check pattern = 10101010, supply voltage = 1 => 2.7-3.6V
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- const u32 voltage_window = 0x1aa;
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+ u32 const voltage_window = 0x1aa;
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TRY(issue_command(SD::Commands::send_if_cond, voltage_window));
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TRY(issue_command(SD::Commands::send_if_cond, voltage_window));
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auto interface_condition_response = wait_for_response();
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auto interface_condition_response = wait_for_response();
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@@ -456,14 +456,14 @@ ErrorOr<void> SDHostController::sd_clock_supply(u32 frequency)
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VERIFY((m_registers->host_configuration_1 & sd_clock_enable) == 0);
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VERIFY((m_registers->host_configuration_1 & sd_clock_enable) == 0);
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// 1. Find out the divisor to determine the SD Clock Frequency
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// 1. Find out the divisor to determine the SD Clock Frequency
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- const u32 sd_clock_frequency = TRY(retrieve_sd_clock_frequency());
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+ u32 const sd_clock_frequency = TRY(retrieve_sd_clock_frequency());
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u32 divisor = TRY(calculate_sd_clock_divisor(sd_clock_frequency, frequency));
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u32 divisor = TRY(calculate_sd_clock_divisor(sd_clock_frequency, frequency));
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// 2. Set Internal Clock Enable and SDCLK Frequency Select in the Clock Control register
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// 2. Set Internal Clock Enable and SDCLK Frequency Select in the Clock Control register
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- const u32 eight_lower_bits_of_sdclk_frequency_select = (divisor & 0xff) << 8;
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+ u32 const eight_lower_bits_of_sdclk_frequency_select = (divisor & 0xff) << 8;
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u32 sdclk_frequency_select = eight_lower_bits_of_sdclk_frequency_select;
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u32 sdclk_frequency_select = eight_lower_bits_of_sdclk_frequency_select;
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if (host_version() == SD::HostVersion::Version3) {
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if (host_version() == SD::HostVersion::Version3) {
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- const u32 two_upper_bits_of_sdclk_frequency_select = (divisor >> 8 & 0x3) << 6;
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+ u32 const two_upper_bits_of_sdclk_frequency_select = (divisor >> 8 & 0x3) << 6;
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sdclk_frequency_select |= two_upper_bits_of_sdclk_frequency_select;
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sdclk_frequency_select |= two_upper_bits_of_sdclk_frequency_select;
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}
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}
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m_registers->host_configuration_1 = (m_registers->host_configuration_1 & ~sd_clock_divisor_mask) | internal_clock_enable | sdclk_frequency_select;
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m_registers->host_configuration_1 = (m_registers->host_configuration_1 & ~sd_clock_divisor_mask) | internal_clock_enable | sdclk_frequency_select;
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@@ -958,7 +958,7 @@ ErrorOr<u32> SDHostController::retrieve_sd_clock_frequency()
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// If these bits are all 0, the Host System has to get information via another method
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// If these bits are all 0, the Host System has to get information via another method
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TODO();
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TODO();
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}
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}
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- const i64 one_mhz = 1'000'000;
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+ i64 const one_mhz = 1'000'000;
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return { m_registers->capabilities.base_clock_frequency * one_mhz };
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return { m_registers->capabilities.base_clock_frequency * one_mhz };
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}
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}
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