0ct0pu5/ladybird
1
0
Fork 0
mirror of https://github.com/LadybirdBrowser/ladybird.git synced 2024-12-04 13:30:31 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions 7

Kernel: Let's try disabling the CPU's page-level caching for framebuffers.

Browse source
This commit is contained in:
Andreas Kling 2019-02-07 09:24:41 +01:00
parent 44e1a45b2a
commit 458706c4cf
Notes: sideshowbarker 2024-07-19 15:50:32 +09:00 
Author: https://github.com/awesomekling
Commit: https://github.com/SerenityOS/serenity/commit/458706c4cf5
2 changed files with 24 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
Kernel/MemoryManager.cpp
View file

@ -483,6 +483,8 @@ void MemoryManager::remap_region_page(Region& region, unsigned page_index_in_reg
pte.set_writable(false);
else
pte.set_writable(region.is_writable());
pte.set_cache_disabled(!region.vmo().m_allow_cpu_caching);
pte.set_write_through(!region.vmo().m_allow_cpu_caching);
pte.set_user_allowed(user_allowed);
region.page_directory()->flush(page_laddr);
#ifdef MM_DEBUG
@ -517,6 +519,8 @@ void MemoryManager::map_region_at_address(PageDirectory& page_directory, Region&
pte.set_writable(false);
else
pte.set_writable(region.is_writable());
pte.set_cache_disabled(!region.vmo().m_allow_cpu_caching);
pte.set_write_through(!region.vmo().m_allow_cpu_caching);
} else {
pte.set_physical_page_base(0);
pte.set_present(false);
@ -676,7 +680,9 @@ RetainPtr<VMObject> VMObject::create_anonymous(size_t size)
RetainPtr<VMObject> VMObject::create_framebuffer_wrapper(PhysicalAddress paddr, size_t size)
{
size = ceil_div(size, PAGE_SIZE) * PAGE_SIZE;
return adopt(*new VMObject(paddr, size));
auto vmo = adopt(*new VMObject(paddr, size));
vmo->m_allow_cpu_caching = false;
return vmo;
}
RetainPtr<VMObject> VMObject::clone()

17
Kernel/MemoryManager.h
View file

@ -114,6 +114,7 @@ private:
bool m_anonymous { false };
off_t m_inode_offset { 0 };
size_t m_size { 0 };
bool m_allow_cpu_caching { true };
RetainPtr<Inode> m_inode;
Vector<RetainPtr<PhysicalPage>> m_physical_pages;
Lock m_paging_lock;
@ -292,6 +293,8 @@ private:
Present = 1 << 0,
ReadWrite = 1 << 1,
UserSupervisor = 1 << 2,
WriteThrough = 1 << 3,
CacheDisabled = 1 << 4,
};
bool is_present() const { return raw() & Present; }
@ -303,6 +306,12 @@ private:
bool is_writable() const { return raw() & ReadWrite; }
void set_writable(bool b) { set_bit(ReadWrite, b); }
bool is_write_through() const { return raw() & WriteThrough; }
void set_write_through(bool b) { set_bit(WriteThrough, b); }
bool is_cache_disabled() const { return raw() & CacheDisabled; }
void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
void set_bit(byte bit, bool value)
{
if (value)
@ -331,6 +340,8 @@ private:
Present = 1 << 0,
ReadWrite = 1 << 1,
UserSupervisor = 1 << 2,
WriteThrough = 1 << 3,
CacheDisabled = 1 << 4,
};
bool is_present() const { return raw() & Present; }
@ -342,6 +353,12 @@ private:
bool is_writable() const { return raw() & ReadWrite; }
void set_writable(bool b) { set_bit(ReadWrite, b); }
bool is_write_through() const { return raw() & WriteThrough; }
void set_write_through(bool b) { set_bit(WriteThrough, b); }
bool is_cache_disabled() const { return raw() & CacheDisabled; }
void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
void set_bit(byte bit, bool value)
{
if (value)