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@@ -10,6 +10,7 @@
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// This is the size of the floating point environment image in protected mode
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static_assert(sizeof(__x87_floating_point_environment) == 28);
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+#ifndef AK_ARCH_AARCH64
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static u16 read_status_register()
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{
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u16 status_register;
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@@ -45,6 +46,7 @@ static void set_mxcsr(u32 new_mxcsr)
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}
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static constexpr u32 default_mxcsr_value = 0x1f80;
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+#endif
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extern "C" {
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@@ -53,10 +55,14 @@ int fegetenv(fenv_t* env)
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if (!env)
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return 1;
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+#ifdef AK_ARCH_AARCH64
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+ TODO_AARCH64();
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+#else
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asm volatile("fnstenv %0"
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: "=m"(env->__x87_fpu_env)::"memory");
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env->__mxcsr = read_mxcsr();
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+#endif
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return 0;
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}
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@@ -66,6 +72,9 @@ int fesetenv(fenv_t const* env)
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if (!env)
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return 1;
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+#ifdef AK_ARCH_AARCH64
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+ TODO_AARCH64();
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+#else
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if (env == FE_DFL_ENV) {
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asm volatile("finit");
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set_mxcsr(default_mxcsr_value);
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@@ -76,6 +85,7 @@ int fesetenv(fenv_t const* env)
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: "memory");
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set_mxcsr(env->__mxcsr);
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+#endif
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return 0;
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}
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@@ -87,9 +97,13 @@ int feholdexcept(fenv_t* env)
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fenv_t current_env;
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fegetenv(¤t_env);
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+#ifdef AK_ARCH_AARCH64
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+ TODO_AARCH64();
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+#else
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current_env.__x87_fpu_env.__status_word &= ~FE_ALL_EXCEPT;
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current_env.__x87_fpu_env.__status_word &= ~(1 << 7); // Clear the "Exception Status Summary" bit
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current_env.__x87_fpu_env.__control_word &= FE_ALL_EXCEPT; // Masking these bits stops the corresponding exceptions from being generated according to the Intel Programmer's Manual
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+#endif
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fesetenv(¤t_env);
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@@ -122,8 +136,12 @@ int fesetexceptflag(fexcept_t const* except, int exceptions)
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fegetenv(¤t_env);
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exceptions &= FE_ALL_EXCEPT;
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+#ifdef AK_ARCH_AARCH64
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+ TODO_AARCH64();
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+#else
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current_env.__x87_fpu_env.__status_word &= exceptions;
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current_env.__x87_fpu_env.__status_word &= ~(1 << 7); // Make sure exceptions don't get raised
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+#endif
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fesetenv(¤t_env);
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return 0;
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@@ -131,8 +149,12 @@ int fesetexceptflag(fexcept_t const* except, int exceptions)
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int fegetround()
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{
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+#ifdef AK_ARCH_AARCH64
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+ TODO_AARCH64();
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+#else
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// There's no way to signal whether the SSE rounding mode and x87 ones are different, so we assume they're the same
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return (read_status_register() >> 10) & 3;
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+#endif
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}
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int fesetround(int rounding_mode)
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@@ -140,6 +162,9 @@ int fesetround(int rounding_mode)
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if (rounding_mode < FE_TONEAREST || rounding_mode > FE_TOWARDZERO)
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return 1;
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+#ifdef AK_ARCH_AARCH64
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+ TODO_AARCH64();
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+#else
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auto control_word = read_control_word();
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control_word &= ~(3 << 10);
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@@ -154,6 +179,8 @@ int fesetround(int rounding_mode)
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set_mxcsr(mxcsr);
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+#endif
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+
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return 0;
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}
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@@ -164,8 +191,12 @@ int feclearexcept(int exceptions)
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fenv_t current_env;
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fegetenv(¤t_env);
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+#ifdef AK_ARCH_AARCH64
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+ TODO_AARCH64();
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+#else
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current_env.__x87_fpu_env.__status_word &= ~exceptions;
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current_env.__x87_fpu_env.__status_word &= ~(1 << 7); // Clear the "Exception Status Summary" bit
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+#endif
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fesetenv(¤t_env);
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return 0;
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@@ -173,10 +204,15 @@ int feclearexcept(int exceptions)
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int fetestexcept(int exceptions)
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{
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+#ifdef AK_ARCH_AARCH64
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+ (void)exceptions;
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+ TODO_AARCH64();
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+#else
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u16 status_register = read_status_register() & FE_ALL_EXCEPT;
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exceptions &= FE_ALL_EXCEPT;
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return status_register & exceptions;
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+#endif
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}
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int feraiseexcept(int exceptions)
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@@ -186,6 +222,9 @@ int feraiseexcept(int exceptions)
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exceptions &= FE_ALL_EXCEPT;
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+#ifdef AK_ARCH_AARCH64
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+ TODO_AARCH64();
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+#else
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// While the order in which the exceptions is raised is unspecified, FE_OVERFLOW and FE_UNDERFLOW must be raised before FE_INEXACT, so handle that case in this branch
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if (exceptions & FE_INEXACT) {
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env.__x87_fpu_env.__status_word &= ((u16)exceptions & ~FE_INEXACT);
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@@ -203,6 +242,7 @@ int feraiseexcept(int exceptions)
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env.__x87_fpu_env.__status_word &= exceptions;
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fesetenv(&env);
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asm volatile("fwait");
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+#endif
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return 0;
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}
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