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@@ -13,45 +13,45 @@ class PageTableEntry;
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struct [[gnu::packed]] TSS32
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{
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- word backlink, __blh;
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- dword esp0;
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- word ss0, __ss0h;
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- dword esp1;
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- word ss1, __ss1h;
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- dword esp2;
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- word ss2, __ss2h;
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- dword cr3, eip, eflags;
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- dword eax, ecx, edx, ebx, esp, ebp, esi, edi;
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- word es, __esh;
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- word cs, __csh;
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- word ss, __ssh;
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- word ds, __dsh;
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- word fs, __fsh;
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- word gs, __gsh;
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- word ldt, __ldth;
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- word trace, iomapbase;
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+ u16 backlink, __blh;
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+ u32 esp0;
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+ u16 ss0, __ss0h;
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+ u32 esp1;
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+ u16 ss1, __ss1h;
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+ u32 esp2;
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+ u16 ss2, __ss2h;
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+ u32 cr3, eip, eflags;
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+ u32 eax, ecx, edx, ebx, esp, ebp, esi, edi;
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+ u16 es, __esh;
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+ u16 cs, __csh;
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+ u16 ss, __ssh;
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+ u16 ds, __dsh;
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+ u16 fs, __fsh;
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+ u16 gs, __gsh;
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+ u16 ldt, __ldth;
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+ u16 trace, iomapbase;
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};
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union [[gnu::packed]] Descriptor
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{
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struct {
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- word limit_lo;
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- word base_lo;
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- byte base_hi;
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- byte type : 4;
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- byte descriptor_type : 1;
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- byte dpl : 2;
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- byte segment_present : 1;
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- byte limit_hi : 4;
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- byte : 1;
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- byte zero : 1;
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- byte operation_size : 1;
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- byte granularity : 1;
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- byte base_hi2;
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+ u16 limit_lo;
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+ u16 base_lo;
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+ u8 base_hi;
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+ u8 type : 4;
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+ u8 descriptor_type : 1;
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+ u8 dpl : 2;
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+ u8 segment_present : 1;
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+ u8 limit_hi : 4;
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+ u8 : 1;
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+ u8 zero : 1;
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+ u8 operation_size : 1;
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+ u8 granularity : 1;
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+ u8 base_hi2;
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};
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struct {
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- dword low;
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- dword high;
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+ u32 low;
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+ u32 high;
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};
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enum Type {
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@@ -72,15 +72,15 @@ union [[gnu::packed]] Descriptor
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void set_base(void* b)
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{
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- base_lo = (dword)(b)&0xffff;
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- base_hi = ((dword)(b) >> 16) & 0xff;
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- base_hi2 = ((dword)(b) >> 24) & 0xff;
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+ base_lo = (u32)(b)&0xffff;
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+ base_hi = ((u32)(b) >> 16) & 0xff;
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+ base_hi2 = ((u32)(b) >> 24) & 0xff;
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}
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- void set_limit(dword l)
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+ void set_limit(u32 l)
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{
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- limit_lo = (dword)l & 0xffff;
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- limit_hi = ((dword)l >> 16) & 0xff;
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+ limit_lo = (u32)l & 0xffff;
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+ limit_hi = ((u32)l >> 16) & 0xff;
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}
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};
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@@ -89,13 +89,13 @@ class PageDirectoryEntry {
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public:
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PageTableEntry* page_table_base() { return reinterpret_cast<PageTableEntry*>(m_raw & 0xfffff000u); }
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- void set_page_table_base(dword value)
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+ void set_page_table_base(u32 value)
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{
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m_raw &= 0xfff;
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m_raw |= value & 0xfffff000;
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}
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- dword raw() const { return m_raw; }
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+ u32 raw() const { return m_raw; }
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void copy_from(Badge<MemoryManager>, const PageDirectoryEntry& other) { m_raw = other.m_raw; }
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enum Flags {
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@@ -121,7 +121,7 @@ public:
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bool is_cache_disabled() const { return raw() & CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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- void set_bit(byte bit, bool value)
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+ void set_bit(u8 bit, bool value)
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{
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if (value)
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m_raw |= bit;
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@@ -130,7 +130,7 @@ public:
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}
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private:
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- dword m_raw;
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+ u32 m_raw;
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};
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class PageTableEntry {
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@@ -138,13 +138,13 @@ class PageTableEntry {
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public:
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void* physical_page_base() { return reinterpret_cast<void*>(m_raw & 0xfffff000u); }
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- void set_physical_page_base(dword value)
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+ void set_physical_page_base(u32 value)
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{
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m_raw &= 0xfff;
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m_raw |= value & 0xfffff000;
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}
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- dword raw() const { return m_raw; }
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+ u32 raw() const { return m_raw; }
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enum Flags {
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Present = 1 << 0,
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@@ -169,7 +169,7 @@ public:
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bool is_cache_disabled() const { return raw() & CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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- void set_bit(byte bit, bool value)
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+ void set_bit(u8 bit, bool value)
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{
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if (value)
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m_raw |= bit;
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@@ -178,7 +178,7 @@ public:
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}
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private:
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- dword m_raw;
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+ u32 m_raw;
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};
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static_assert(sizeof(PageDirectoryEntry) == 4);
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@@ -189,17 +189,17 @@ class IRQHandler;
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void gdt_init();
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void idt_init();
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void sse_init();
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-void register_interrupt_handler(byte number, void (*f)());
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-void register_user_callable_interrupt_handler(byte number, void (*f)());
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-void register_irq_handler(byte number, IRQHandler&);
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-void unregister_irq_handler(byte number, IRQHandler&);
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+void register_interrupt_handler(u8 number, void (*f)());
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+void register_user_callable_interrupt_handler(u8 number, void (*f)());
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+void register_irq_handler(u8 number, IRQHandler&);
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+void unregister_irq_handler(u8 number, IRQHandler&);
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void flush_idt();
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void flush_gdt();
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-void load_task_register(word selector);
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-word gdt_alloc_entry();
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-void gdt_free_entry(word);
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-Descriptor& get_gdt_entry(word selector);
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-void write_gdt_entry(word selector, Descriptor&);
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+void load_task_register(u16 selector);
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+u16 gdt_alloc_entry();
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+void gdt_free_entry(u16);
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+Descriptor& get_gdt_entry(u16 selector);
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+void write_gdt_entry(u16 selector, Descriptor&);
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[[noreturn]] static inline void hang()
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{
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@@ -208,8 +208,8 @@ void write_gdt_entry(word selector, Descriptor&);
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}
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}
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-#define LSW(x) ((dword)(x)&0xFFFF)
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-#define MSW(x) (((dword)(x) >> 16) & 0xFFFF)
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+#define LSW(x) ((u32)(x)&0xFFFF)
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+#define MSW(x) (((u32)(x) >> 16) & 0xFFFF)
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#define LSB(x) ((x)&0xFF)
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#define MSB(x) (((x) >> 8) & 0xFF)
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@@ -220,17 +220,17 @@ void write_gdt_entry(word selector, Descriptor&);
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#define memory_barrier() asm volatile("" :: \
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: "memory")
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-inline dword cpu_cr3()
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+inline u32 cpu_cr3()
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{
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- dword cr3;
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+ u32 cr3;
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asm volatile("movl %%cr3, %%eax"
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: "=a"(cr3));
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return cr3;
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}
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-inline dword cpu_flags()
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+inline u32 cpu_flags()
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{
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- dword flags;
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+ u32 flags;
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asm volatile(
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"pushf\n"
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"pop %0\n"
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@@ -259,7 +259,7 @@ public:
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}
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private:
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- dword m_flags;
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+ u32 m_flags;
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};
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class InterruptDisabler {
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@@ -277,7 +277,7 @@ public:
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}
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private:
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- dword m_flags;
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+ u32 m_flags;
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};
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/* Map IRQ0-15 @ ISR 0x50-0x5F */
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@@ -297,14 +297,14 @@ struct PageFaultFlags {
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class PageFault {
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public:
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- PageFault(word code, VirtualAddress vaddr)
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+ PageFault(u16 code, VirtualAddress vaddr)
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: m_code(code)
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, m_vaddr(vaddr)
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{
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}
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VirtualAddress vaddr() const { return m_vaddr; }
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- word code() const { return m_code; }
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+ u16 code() const { return m_code; }
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bool is_not_present() const { return (m_code & 1) == PageFaultFlags::NotPresent; }
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bool is_protection_violation() const { return (m_code & 1) == PageFaultFlags::ProtectionViolation; }
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@@ -315,86 +315,86 @@ public:
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bool is_instruction_fetch() const { return (m_code & 8) == PageFaultFlags::InstructionFetch; }
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private:
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- word m_code;
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+ u16 m_code;
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VirtualAddress m_vaddr;
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};
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struct [[gnu::packed]] RegisterDump
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{
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- word ss;
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- word gs;
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- word fs;
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- word es;
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- word ds;
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- dword edi;
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- dword esi;
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- dword ebp;
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- dword esp;
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- dword ebx;
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- dword edx;
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- dword ecx;
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- dword eax;
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- dword eip;
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- word cs;
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- word __csPadding;
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- dword eflags;
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- dword esp_if_crossRing;
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- word ss_if_crossRing;
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+ u16 ss;
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+ u16 gs;
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+ u16 fs;
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+ u16 es;
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+ u16 ds;
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+ u32 edi;
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+ u32 esi;
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+ u32 ebp;
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+ u32 esp;
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+ u32 ebx;
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+ u32 edx;
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+ u32 ecx;
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+ u32 eax;
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+ u32 eip;
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+ u16 cs;
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+ u16 __csPadding;
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+ u32 eflags;
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+ u32 esp_if_crossRing;
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+ u16 ss_if_crossRing;
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};
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struct [[gnu::packed]] RegisterDumpWithExceptionCode
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{
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- word ss;
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- word gs;
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- word fs;
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- word es;
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- word ds;
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- dword edi;
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- dword esi;
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- dword ebp;
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- dword esp;
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- dword ebx;
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- dword edx;
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- dword ecx;
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- dword eax;
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- word exception_code;
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- word __exception_code_padding;
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- dword eip;
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- word cs;
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- word __csPadding;
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- dword eflags;
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- dword esp_if_crossRing;
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- word ss_if_crossRing;
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+ u16 ss;
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+ u16 gs;
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+ u16 fs;
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+ u16 es;
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+ u16 ds;
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+ u32 edi;
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+ u32 esi;
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+ u32 ebp;
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+ u32 esp;
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+ u32 ebx;
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+ u32 edx;
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+ u32 ecx;
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+ u32 eax;
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+ u16 exception_code;
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+ u16 __exception_code_padding;
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+ u32 eip;
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+ u16 cs;
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+ u16 __csPadding;
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+ u32 eflags;
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+ u32 esp_if_crossRing;
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+ u16 ss_if_crossRing;
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};
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struct [[gnu::aligned(16)]] FPUState
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{
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- byte buffer[512];
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+ u8 buffer[512];
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};
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-inline constexpr dword page_base_of(dword address)
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+inline constexpr u32 page_base_of(u32 address)
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{
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return address & 0xfffff000;
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}
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class CPUID {
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public:
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- CPUID(dword function) { asm volatile("cpuid"
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+ CPUID(u32 function) { asm volatile("cpuid"
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: "=a"(m_eax), "=b"(m_ebx), "=c"(m_ecx), "=d"(m_edx)
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: "a"(function), "c"(0)); }
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- dword eax() const { return m_eax; }
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- dword ebx() const { return m_ebx; }
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- dword ecx() const { return m_ecx; }
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- dword edx() const { return m_edx; }
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+ u32 eax() const { return m_eax; }
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+ u32 ebx() const { return m_ebx; }
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+ u32 ecx() const { return m_ecx; }
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+ u32 edx() const { return m_edx; }
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private:
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- dword m_eax { 0xffffffff };
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- dword m_ebx { 0xffffffff };
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- dword m_ecx { 0xffffffff };
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- dword m_edx { 0xffffffff };
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+ u32 m_eax { 0xffffffff };
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+ u32 m_ebx { 0xffffffff };
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+ u32 m_ecx { 0xffffffff };
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+ u32 m_edx { 0xffffffff };
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};
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-inline void read_tsc(dword& lsw, dword& msw)
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+inline void read_tsc(u32& lsw, u32& msw)
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{
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asm volatile("rdtsc"
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: "=d"(msw), "=a"(lsw));
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