Kernel/riscv64: Add a basic trap handler to pre_init

This trap handler uses the SBI to print an error message via a newly
introduced panic function, which is necessary as `pre_init` is running
identity mapped.
Also add a header file for `pre_init.cpp` as we wan't to use the panic
and `dbgln` function in the MMU init code as well.
This commit is contained in:
Sönke Holz 2024-01-03 17:21:19 +01:00 committed by Andrew Kaster
parent 5a8781393a
commit 27860cfaa2
Notes: sideshowbarker 2024-07-17 04:01:41 +09:00
2 changed files with 60 additions and 4 deletions

View file

@ -4,19 +4,53 @@
* SPDX-License-Identifier: BSD-2-Clause
*/
#include <AK/Types.h>
#include <Kernel/Arch/riscv64/pre_init.h>
#include <Kernel/Arch/Processor.h>
#include <Kernel/Memory/PhysicalAddress.h>
#include <Kernel/Arch/riscv64/MMU.h>
#include <Kernel/Arch/riscv64/SBI.h>
#include <Kernel/Sections.h>
namespace Kernel {
extern "C" [[noreturn]] void pre_init(FlatPtr mhartid, PhysicalPtr fdt_phys_addr);
extern "C" [[noreturn]] void pre_init(FlatPtr mhartid, PhysicalPtr fdt_phys_addr)
UNMAP_AFTER_INIT void dbgln_without_mmu(StringView message)
{
auto probe_result = SBI::Base::probe_extension(SBI::EID::DebugConsole);
if (probe_result.is_error() || probe_result.value() == 0) {
for (auto const ch : message.bytes())
(void)SBI::Legacy::console_putchar(ch);
(void)SBI::Legacy::console_putchar('\n');
} else {
for (auto const ch : message.bytes())
(void)SBI::DBCN::debug_console_write_byte(ch);
(void)SBI::DBCN::debug_console_write_byte('\n');
}
}
[[noreturn]] UNMAP_AFTER_INIT void panic_without_mmu(StringView message)
{
dbgln_without_mmu("KERNEL PANIC in pre_init :^("sv);
dbgln_without_mmu(message);
// We can't use Processor::halt() here, as that would result in an absolute jump.
RISCV64::CSR::write(RISCV64::CSR::Address::SIE, 0);
for (;;)
asm volatile("wfi");
}
[[gnu::aligned(4)]] [[noreturn]] UNMAP_AFTER_INIT static void early_trap_handler()
{
panic_without_mmu("Unexpected trap"sv);
}
extern "C" [[noreturn]] UNMAP_AFTER_INIT void pre_init(FlatPtr mhartid, PhysicalPtr fdt_phys_addr)
{
(void)mhartid;
(void)fdt_phys_addr;
// Catch traps in pre_init
RISCV64::CSR::write(RISCV64::CSR::Address::STVEC, bit_cast<FlatPtr>(&early_trap_handler));
// FIXME: Implement this
Processor::halt();

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@ -0,0 +1,22 @@
/*
* Copyright (c) 2023, Sönke Holz <sholz8530@gmail.com>
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#pragma once
#include <AK/Forward.h>
#include <Kernel/Memory/PhysicalAddress.h>
#include <AK/Platform.h>
VALIDATE_IS_RISCV64()
namespace Kernel {
void dbgln_without_mmu(StringView);
[[noreturn]] void panic_without_mmu(StringView);
extern "C" [[noreturn]] void pre_init(FlatPtr mhartid, PhysicalPtr fdt_phys_addr);
}