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@@ -1582,11 +1582,23 @@ void SoftCPU::FLD1(const X86::Instruction&)
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fpu_push(1.0);
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}
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-void SoftCPU::FLDL2T(const X86::Instruction&) { TODO_INSN(); }
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+void SoftCPU::FLDL2T(const X86::Instruction&)
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+{
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+ fpu_push(log2f(10.0f));
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+}
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+
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void SoftCPU::FLDL2E(const X86::Instruction&) { TODO_INSN(); }
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void SoftCPU::FLDPI(const X86::Instruction&) { TODO_INSN(); }
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-void SoftCPU::FLDLG2(const X86::Instruction&) { TODO_INSN(); }
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-void SoftCPU::FLDLN2(const X86::Instruction&) { TODO_INSN(); }
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+
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+void SoftCPU::FLDLG2(const X86::Instruction&)
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+{
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+ fpu_push(log10f(2.0f));
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+}
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+
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+void SoftCPU::FLDLN2(const X86::Instruction&)
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+{
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+ fpu_push(logf(2.0f));
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+}
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void SoftCPU::FLDZ(const X86::Instruction&)
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{
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@@ -1617,7 +1629,13 @@ void SoftCPU::FSQRT(const X86::Instruction&)
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}
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void SoftCPU::FSINCOS(const X86::Instruction&) { TODO_INSN(); }
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-void SoftCPU::FRNDINT(const X86::Instruction&) { TODO_INSN(); }
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+
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+void SoftCPU::FRNDINT(const X86::Instruction&)
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+{
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+ // FIXME: support rounding mode
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+ fpu_set(0, round(fpu_get(0)));
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+}
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+
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void SoftCPU::FSCALE(const X86::Instruction&) { TODO_INSN(); }
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void SoftCPU::FSIN(const X86::Instruction&)
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@@ -1625,7 +1643,10 @@ void SoftCPU::FSIN(const X86::Instruction&)
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fpu_set(0, sin(fpu_get(0)));
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}
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-void SoftCPU::FCOS(const X86::Instruction&) { TODO_INSN(); }
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+void SoftCPU::FCOS(const X86::Instruction&)
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+{
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+ fpu_set(0, cos(fpu_get(0)));
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+}
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void SoftCPU::FIADD_RM32(const X86::Instruction& insn)
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{
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